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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.62 96.00 96.37 100.00 98.85


Total test records in report: 1105
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T329 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_reset_invalid.3629488314 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 149401845 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.3634617351 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 35149728 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_wakeup_race.3744144778 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 257199183 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.1811964371 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 40099737 ps
T333 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset.1705429157 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 184555437 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.1742201070 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 201517119 ps
T335 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.3363511466 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 162866408 ps
T336 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.1721767069 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 85643827 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.329935395 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 90261035 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.80999126 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 160728026 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.2822563127 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 34920855 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.1536951268 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:17 AM UTC 24 24221659 ps
T341 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.489141732 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:18 AM UTC 24 108456951 ps
T342 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.237991207 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:18 AM UTC 24 109977910 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all.3523305982 Sep 11 05:40:09 AM UTC 24 Sep 11 05:40:18 AM UTC 24 2284999356 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3220373186 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:18 AM UTC 24 1884813663 ps
T91 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.580717795 Sep 11 05:40:04 AM UTC 24 Sep 11 05:40:19 AM UTC 24 8618369342 ps
T345 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3699110495 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:19 AM UTC 24 1054299022 ps
T346 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.3464032097 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:19 AM UTC 24 886107559 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.1763774421 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:21 AM UTC 24 75887373 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.3063359692 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:21 AM UTC 24 27010894 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.82642141 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:21 AM UTC 24 91830815 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.408735590 Sep 11 05:40:32 AM UTC 24 Sep 11 05:40:34 AM UTC 24 208641879 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.22277774 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:21 AM UTC 24 54920288 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.2672380946 Sep 11 05:40:26 AM UTC 24 Sep 11 05:40:35 AM UTC 24 349072253 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.3699592070 Sep 11 05:40:20 AM UTC 24 Sep 11 05:40:21 AM UTC 24 28625600 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.1806226606 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:21 AM UTC 24 44421810 ps
T355 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.696190906 Sep 11 05:40:20 AM UTC 24 Sep 11 05:40:21 AM UTC 24 52745125 ps
T356 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.3255010544 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:21 AM UTC 24 100448736 ps
T357 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.1678529075 Sep 11 05:40:20 AM UTC 24 Sep 11 05:40:22 AM UTC 24 55131140 ps
T358 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.2816349583 Sep 11 05:40:20 AM UTC 24 Sep 11 05:40:22 AM UTC 24 108573228 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.1957395983 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:22 AM UTC 24 76186847 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.2456879185 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:22 AM UTC 24 178103219 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.786308363 Sep 11 05:40:20 AM UTC 24 Sep 11 05:40:22 AM UTC 24 129426051 ps
T362 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.3474217451 Sep 11 05:40:20 AM UTC 24 Sep 11 05:40:22 AM UTC 24 114469457 ps
T363 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.761188952 Sep 11 05:40:20 AM UTC 24 Sep 11 05:40:22 AM UTC 24 112070774 ps
T364 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3249086121 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:23 AM UTC 24 932388932 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1662307968 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:24 AM UTC 24 953122372 ps
T366 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.3064005363 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:25 AM UTC 24 1566926053 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.3158641560 Sep 11 05:40:15 AM UTC 24 Sep 11 05:40:27 AM UTC 24 7207537799 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.1278792787 Sep 11 05:40:19 AM UTC 24 Sep 11 05:40:28 AM UTC 24 2240030516 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.3965961790 Sep 11 05:40:26 AM UTC 24 Sep 11 05:40:29 AM UTC 24 30148967 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.1887511464 Sep 11 05:40:26 AM UTC 24 Sep 11 05:40:29 AM UTC 24 373915803 ps
T371 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.1813592667 Sep 11 05:40:26 AM UTC 24 Sep 11 05:40:29 AM UTC 24 90745570 ps
T372 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.1956730829 Sep 11 05:40:27 AM UTC 24 Sep 11 05:40:29 AM UTC 24 64036463 ps
T373 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.2611246482 Sep 11 05:40:27 AM UTC 24 Sep 11 05:40:29 AM UTC 24 265953029 ps
T374 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.3622579349 Sep 11 05:40:27 AM UTC 24 Sep 11 05:40:30 AM UTC 24 27781330 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.3231455229 Sep 11 05:40:25 AM UTC 24 Sep 11 05:40:30 AM UTC 24 39967708 ps
T376 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.2600011695 Sep 11 05:40:26 AM UTC 24 Sep 11 05:40:34 AM UTC 24 75125098 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.3238608805 Sep 11 05:40:26 AM UTC 24 Sep 11 05:40:34 AM UTC 24 225059324 ps
T378 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.2487002751 Sep 11 05:40:31 AM UTC 24 Sep 11 05:40:34 AM UTC 24 144811630 ps
T106 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.347996542 Sep 11 05:40:37 AM UTC 24 Sep 11 05:40:41 AM UTC 24 728951586 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.1353249634 Sep 11 05:40:25 AM UTC 24 Sep 11 05:40:37 AM UTC 24 1848203417 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.2753066231 Sep 11 05:40:39 AM UTC 24 Sep 11 05:40:44 AM UTC 24 67203611 ps
T381 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.240982714 Sep 11 05:40:35 AM UTC 24 Sep 11 05:40:44 AM UTC 24 122293643 ps
T382 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.2171169887 Sep 11 05:40:35 AM UTC 24 Sep 11 05:40:44 AM UTC 24 63803434 ps
T383 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.3111752529 Sep 11 05:40:36 AM UTC 24 Sep 11 05:40:44 AM UTC 24 42824864 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.2553025268 Sep 11 05:40:36 AM UTC 24 Sep 11 05:40:44 AM UTC 24 153794841 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.2445602605 Sep 11 05:40:25 AM UTC 24 Sep 11 05:40:45 AM UTC 24 68085569 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1121470517 Sep 11 05:40:25 AM UTC 24 Sep 11 05:40:46 AM UTC 24 1244893741 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.1051895583 Sep 11 05:40:40 AM UTC 24 Sep 11 05:40:49 AM UTC 24 58435937 ps
T107 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.3050582558 Sep 11 05:41:07 AM UTC 24 Sep 11 05:41:09 AM UTC 24 64731330 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.3088144309 Sep 11 05:41:07 AM UTC 24 Sep 11 05:41:09 AM UTC 24 304198192 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.1907894735 Sep 11 05:40:38 AM UTC 24 Sep 11 05:40:50 AM UTC 24 50453024 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.2923788469 Sep 11 05:40:47 AM UTC 24 Sep 11 05:40:50 AM UTC 24 71860338 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.1470980557 Sep 11 05:40:31 AM UTC 24 Sep 11 05:40:50 AM UTC 24 63816364 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.1048148356 Sep 11 05:40:31 AM UTC 24 Sep 11 05:40:50 AM UTC 24 88259981 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.3829997334 Sep 11 05:40:47 AM UTC 24 Sep 11 05:40:50 AM UTC 24 218711702 ps
T79 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.3299119313 Sep 11 05:40:36 AM UTC 24 Sep 11 05:40:52 AM UTC 24 7727623845 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2670217940 Sep 11 05:40:31 AM UTC 24 Sep 11 05:40:52 AM UTC 24 943210654 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3194359392 Sep 11 05:40:31 AM UTC 24 Sep 11 05:40:52 AM UTC 24 857188353 ps
T396 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.337464876 Sep 11 05:40:46 AM UTC 24 Sep 11 05:40:54 AM UTC 24 27277730 ps
T397 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.3616425877 Sep 11 05:40:46 AM UTC 24 Sep 11 05:40:54 AM UTC 24 49093709 ps
T398 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.3111875262 Sep 11 05:40:46 AM UTC 24 Sep 11 05:40:54 AM UTC 24 54498846 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.2036366342 Sep 11 05:40:29 AM UTC 24 Sep 11 05:40:54 AM UTC 24 56269276 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.3352288001 Sep 11 05:40:29 AM UTC 24 Sep 11 05:40:54 AM UTC 24 323392303 ps
T401 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.2145926704 Sep 11 05:40:43 AM UTC 24 Sep 11 05:40:55 AM UTC 24 93057511 ps
T402 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.967669416 Sep 11 05:40:53 AM UTC 24 Sep 11 05:40:55 AM UTC 24 41732282 ps
T403 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3919522666 Sep 11 05:40:46 AM UTC 24 Sep 11 05:40:55 AM UTC 24 1273741984 ps
T404 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1217466805 Sep 11 05:40:46 AM UTC 24 Sep 11 05:40:55 AM UTC 24 1127630429 ps
T108 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.4039704000 Sep 11 05:40:53 AM UTC 24 Sep 11 05:40:57 AM UTC 24 608577114 ps
T405 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.755758553 Sep 11 05:40:51 AM UTC 24 Sep 11 05:41:00 AM UTC 24 48302512 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.52192063 Sep 11 05:40:51 AM UTC 24 Sep 11 05:41:00 AM UTC 24 108935903 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2092589732 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:09 AM UTC 24 1287958147 ps
T408 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.2300115361 Sep 11 05:40:51 AM UTC 24 Sep 11 05:41:00 AM UTC 24 53344602 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.3740676495 Sep 11 05:40:58 AM UTC 24 Sep 11 05:41:00 AM UTC 24 99194128 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.212727053 Sep 11 05:40:51 AM UTC 24 Sep 11 05:41:00 AM UTC 24 150038178 ps
T411 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.554274094 Sep 11 05:40:58 AM UTC 24 Sep 11 05:41:00 AM UTC 24 123164497 ps
T412 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.719570486 Sep 11 05:40:58 AM UTC 24 Sep 11 05:41:00 AM UTC 24 76781882 ps
T413 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.3751618620 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:00 AM UTC 24 69261304 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.3241993063 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:00 AM UTC 24 152679422 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.1398436947 Sep 11 05:40:58 AM UTC 24 Sep 11 05:41:00 AM UTC 24 273812028 ps
T416 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.3645196317 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:00 AM UTC 24 32574240 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.4071351892 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 53189614 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.3780711423 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 35348379 ps
T419 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.3287851604 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 427351922 ps
T420 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.102365608 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 64509409 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.4116383690 Sep 11 05:40:58 AM UTC 24 Sep 11 05:41:01 AM UTC 24 221276952 ps
T422 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.4042001206 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 82148545 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.3364779234 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 67087395 ps
T424 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.1439390599 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 39664483 ps
T425 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.290805619 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 117240157 ps
T426 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.4061988741 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 116184561 ps
T427 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.1029468988 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 214002873 ps
T428 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.4020774090 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:01 AM UTC 24 372760007 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2384522391 Sep 11 05:40:58 AM UTC 24 Sep 11 05:41:02 AM UTC 24 1015646898 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.3903034257 Sep 11 05:40:53 AM UTC 24 Sep 11 05:41:02 AM UTC 24 56464595 ps
T431 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.3681810413 Sep 11 05:40:26 AM UTC 24 Sep 11 05:41:02 AM UTC 24 64915131 ps
T432 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1623675953 Sep 11 05:40:58 AM UTC 24 Sep 11 05:41:03 AM UTC 24 749930456 ps
T109 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.2150474549 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:04 AM UTC 24 887810028 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.3468469959 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 28996049 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.3371159729 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 38216820 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.1731938170 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 51979316 ps
T436 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.1828543160 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 35355979 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.1246987052 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 25043120 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.1576793416 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 313020630 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.3242468767 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 130136534 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.697877857 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 409234118 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.786936413 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 54475166 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.2803868894 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:12 AM UTC 24 1442322812 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.2497885713 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 67050294 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.2095819445 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 31994586 ps
T445 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.1441141105 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 151912995 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.880448223 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:08 AM UTC 24 117699288 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.900157144 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:09 AM UTC 24 402343766 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.1452240873 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:09 AM UTC 24 284408344 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.1455337090 Sep 11 05:41:07 AM UTC 24 Sep 11 05:41:09 AM UTC 24 65774320 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2664527072 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:10 AM UTC 24 1049347701 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2876399509 Sep 11 05:41:07 AM UTC 24 Sep 11 05:41:10 AM UTC 24 1243514441 ps
T452 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2970978250 Sep 11 05:41:07 AM UTC 24 Sep 11 05:41:10 AM UTC 24 781148686 ps
T53 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.935977742 Sep 11 05:40:53 AM UTC 24 Sep 11 05:41:11 AM UTC 24 2799249339 ps
T92 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.111430349 Sep 11 05:41:06 AM UTC 24 Sep 11 05:41:13 AM UTC 24 2449491459 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.4085557041 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:14 AM UTC 24 40279878 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.2092167769 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 35659210 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.2118999913 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 134034203 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.4195606963 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 113980438 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.2856302359 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 545982760 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.3347074033 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 58913214 ps
T459 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.4110949731 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 78986045 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.3568028639 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 77315466 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.4186565954 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 51071221 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.4168308450 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 51106903 ps
T80 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.2579373502 Sep 11 05:40:59 AM UTC 24 Sep 11 05:41:15 AM UTC 24 6541803240 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.4274379734 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 68482499 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.302196122 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 71029848 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.4060269229 Sep 11 05:41:14 AM UTC 24 Sep 11 05:41:15 AM UTC 24 30704625 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.3234455864 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 225625071 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.1642115710 Sep 11 05:41:14 AM UTC 24 Sep 11 05:41:15 AM UTC 24 30942931 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.2307434760 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:15 AM UTC 24 144203008 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.2896298210 Sep 11 05:41:14 AM UTC 24 Sep 11 05:41:16 AM UTC 24 32474510 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.4231555376 Sep 11 05:41:14 AM UTC 24 Sep 11 05:41:16 AM UTC 24 70071220 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.2955734516 Sep 11 05:41:14 AM UTC 24 Sep 11 05:41:16 AM UTC 24 114638493 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.2333316322 Sep 11 05:41:14 AM UTC 24 Sep 11 05:41:16 AM UTC 24 319186639 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.4292448506 Sep 11 05:41:14 AM UTC 24 Sep 11 05:41:16 AM UTC 24 69861611 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.2357880875 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:17 AM UTC 24 1531082707 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3901717998 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:17 AM UTC 24 1203713146 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1071669972 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:17 AM UTC 24 1302109619 ps
T72 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.1492554932 Sep 11 05:41:13 AM UTC 24 Sep 11 05:41:22 AM UTC 24 3717154879 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.4293591979 Sep 11 05:41:21 AM UTC 24 Sep 11 05:41:23 AM UTC 24 69351696 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.1540035399 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:23 AM UTC 24 31266823 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.3984134749 Sep 11 05:41:21 AM UTC 24 Sep 11 05:41:23 AM UTC 24 127120844 ps
T480 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.2348036725 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:23 AM UTC 24 82598700 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.131424793 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:23 AM UTC 24 125249826 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.708540761 Sep 11 05:41:21 AM UTC 24 Sep 11 05:41:24 AM UTC 24 110503004 ps
T483 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.3458087667 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 111979733 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.573276180 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 191668760 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.1083962408 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 29701497 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.64044193 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 37513694 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.4228825778 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 137335580 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.3946716498 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 176449889 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.2382986493 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 60269212 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.1953977557 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 62236690 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.3643042972 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 49963321 ps
T492 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.588043089 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 203382631 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.2267453685 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 117629602 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.1554547321 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 65594307 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.1416487185 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 32236390 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.2325170827 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 49047496 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.2167006881 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 95202235 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.3564082647 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 192030406 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.2248638825 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 46786554 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.2855160648 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 194546840 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.3869971692 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 323599867 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.1687115431 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:24 AM UTC 24 80489371 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1365357964 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:26 AM UTC 24 808891721 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3421930436 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:26 AM UTC 24 889882092 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.1326868585 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:26 AM UTC 24 1364797055 ps
T506 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.62994020 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:26 AM UTC 24 890220064 ps
T145 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.1284689711 Sep 11 05:41:21 AM UTC 24 Sep 11 05:41:28 AM UTC 24 1712954064 ps
T507 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.2488664883 Sep 11 05:41:22 AM UTC 24 Sep 11 05:41:33 AM UTC 24 6347848826 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.179948068 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 31031517 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.491353230 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 83557122 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.108489438 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:33 AM UTC 24 119374205 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.1406796013 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 108318764 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.2713834919 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 43798145 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.339781005 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 112155278 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.1138670919 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 243607273 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.2102711210 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 55812499 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.1232281975 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 65318130 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.2425546074 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:33 AM UTC 24 66417753 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.3982720112 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 163833084 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.1186844137 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 56431935 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.771706535 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 38225326 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.1478484325 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 76563457 ps
T522 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.4104337117 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 90887968 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.3515002866 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 131901006 ps
T524 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.3437463472 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 108005785 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.1186468421 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 53074810 ps
T526 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.2759904102 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 74692413 ps
T527 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.1150552295 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 362205923 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.2209475850 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 54874002 ps
T529 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.2320213430 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:34 AM UTC 24 151763459 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.980462450 Sep 11 05:41:31 AM UTC 24 Sep 11 05:41:34 AM UTC 24 1222831845 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.3372868274 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:35 AM UTC 24 71918469 ps
T532 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.18251566 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:35 AM UTC 24 455346095 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2471570477 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:36 AM UTC 24 1280461943 ps
T534 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3287152019 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:36 AM UTC 24 827132987 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.3984044282 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:38 AM UTC 24 4518718257 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.3163535373 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:38 AM UTC 24 4743791523 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.4204169600 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 25192263 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.3850688397 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 270956526 ps
T539 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.927359254 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:55 AM UTC 24 113664493 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.3764409906 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 26012235 ps
T541 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.107903411 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 111966108 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.1721010586 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 33966306 ps
T543 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.2747564135 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 27678267 ps
T544 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.354281709 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 344234010 ps
T545 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.244156857 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 65355721 ps
T546 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.997522138 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 71406282 ps
T547 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.2343304504 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 53159898 ps
T548 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.1468440896 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 131640130 ps
T549 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.3561496875 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 144813843 ps
T550 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.58794617 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:43 AM UTC 24 115740461 ps
T551 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.2091967960 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 55780426 ps
T552 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.2715152473 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 110671702 ps
T553 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.3699662715 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 61886612 ps
T554 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.31486065 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:44 AM UTC 24 154023122 ps
T555 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.4102992535 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:44 AM UTC 24 72682357 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.949939475 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 472177136 ps
T557 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.4095147839 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:44 AM UTC 24 56333001 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.2387691231 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 58519853 ps
T559 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.826427123 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 62268939 ps
T560 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.2994445397 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 269202431 ps
T561 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.1702549415 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 22593884 ps
T562 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.1039426030 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 92604431 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.1829703817 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 28513434 ps
T564 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.1341963727 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 719092372 ps
T565 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.2844932601 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 103271689 ps
T566 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.2543110476 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:44 AM UTC 24 213102230 ps
T567 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3024280755 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:44 AM UTC 24 2882475622 ps
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