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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 98.23 96.58 99.62 96.00 96.37 100.00 98.85


Total test records in report: 1105
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html
T568 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.314597103 Sep 11 05:41:41 AM UTC 24 Sep 11 05:41:45 AM UTC 24 901309271 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.765107482 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:45 AM UTC 24 998856901 ps
T570 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2829640472 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:46 AM UTC 24 891441176 ps
T571 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.1829399171 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:46 AM UTC 24 1017882688 ps
T572 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.1020466495 Sep 11 05:41:32 AM UTC 24 Sep 11 05:41:49 AM UTC 24 11736914210 ps
T573 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.2993453486 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:54 AM UTC 24 91338620 ps
T574 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.2112659935 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:54 AM UTC 24 67517314 ps
T575 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.274828562 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:54 AM UTC 24 85652592 ps
T576 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.2234318796 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 176070850 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.673766384 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 36461067 ps
T578 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.3526171979 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:55 AM UTC 24 600636321 ps
T579 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.2842894322 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:55 AM UTC 24 159543242 ps
T580 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.965008830 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 68976506 ps
T581 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.3777141996 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:55 AM UTC 24 545411776 ps
T582 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.576439452 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:55 AM UTC 24 238648831 ps
T583 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.749729945 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 41085483 ps
T584 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.2196257915 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:55 AM UTC 24 112333975 ps
T585 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.3130612841 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 61168714 ps
T586 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.138796432 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 67000570 ps
T587 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.2556253787 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 49525753 ps
T588 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.3855852289 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:55 AM UTC 24 31621753 ps
T589 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.2178083782 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:56 AM UTC 24 107061171 ps
T590 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.1135848222 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:56 AM UTC 24 143928475 ps
T591 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.3482160283 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:56 AM UTC 24 32113220 ps
T592 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.755240457 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:56 AM UTC 24 155170767 ps
T593 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.1057202439 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:56 AM UTC 24 1518001188 ps
T594 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3911314545 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:57 AM UTC 24 1000760886 ps
T595 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3625729218 Sep 11 05:41:52 AM UTC 24 Sep 11 05:41:57 AM UTC 24 898311769 ps
T596 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4220762883 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:58 AM UTC 24 771473170 ps
T597 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.915776088 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:58 AM UTC 24 926383176 ps
T598 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.2038640979 Sep 11 05:41:42 AM UTC 24 Sep 11 05:41:58 AM UTC 24 10191963528 ps
T599 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.2243493894 Sep 11 05:41:53 AM UTC 24 Sep 11 05:41:59 AM UTC 24 1944930478 ps
T600 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.3780581456 Sep 11 05:41:53 AM UTC 24 Sep 11 05:42:03 AM UTC 24 4566399425 ps
T601 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.3529372421 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:04 AM UTC 24 39727825 ps
T602 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.1781446785 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:04 AM UTC 24 59196079 ps
T603 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.749129926 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 666486076 ps
T604 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_aborted_low_power.3838998331 Sep 11 05:43:42 AM UTC 24 Sep 11 05:43:44 AM UTC 24 57623664 ps
T605 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.451667325 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 20980353 ps
T606 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.3780339005 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 42266820 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.3207086163 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 77327870 ps
T607 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.2225205419 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 70025346 ps
T608 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.1476589925 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 155594034 ps
T609 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.1412445682 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 297555238 ps
T610 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.4193508320 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 145750253 ps
T611 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.762802696 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 25224021 ps
T612 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.1127111077 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 71081820 ps
T613 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.1620731481 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 38581339 ps
T614 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.464984072 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 261925126 ps
T615 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.4214255038 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 120514196 ps
T616 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.1345096063 Sep 11 05:42:04 AM UTC 24 Sep 11 05:42:05 AM UTC 24 53699152 ps
T617 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.3068436167 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 86634940 ps
T618 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.4143506031 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 404846906 ps
T619 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.4073940446 Sep 11 05:42:04 AM UTC 24 Sep 11 05:42:05 AM UTC 24 71960758 ps
T620 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.408839895 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 318238922 ps
T621 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.1128451375 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:05 AM UTC 24 299074719 ps
T622 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.2777027988 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:06 AM UTC 24 497017440 ps
T623 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.2658394104 Sep 11 05:42:04 AM UTC 24 Sep 11 05:42:06 AM UTC 24 27928675 ps
T624 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.2544688739 Sep 11 05:42:04 AM UTC 24 Sep 11 05:42:06 AM UTC 24 113468479 ps
T625 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.897741079 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:07 AM UTC 24 1386514561 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.3319020230 Sep 11 05:41:52 AM UTC 24 Sep 11 05:42:07 AM UTC 24 3925654263 ps
T626 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.206497447 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:07 AM UTC 24 860255222 ps
T627 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.1163427430 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:10 AM UTC 24 1578181573 ps
T628 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.4085452079 Sep 11 05:42:04 AM UTC 24 Sep 11 05:42:10 AM UTC 24 1226110977 ps
T629 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.596220255 Sep 11 05:42:04 AM UTC 24 Sep 11 05:42:11 AM UTC 24 1980529833 ps
T630 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.919244560 Sep 11 05:42:13 AM UTC 24 Sep 11 05:42:15 AM UTC 24 83077990 ps
T631 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.1615145948 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:15 AM UTC 24 129592538 ps
T632 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.786857978 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:15 AM UTC 24 90008586 ps
T633 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.3336474669 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:15 AM UTC 24 56294792 ps
T634 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.4108383026 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 29077154 ps
T635 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.3719011892 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 399603838 ps
T636 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.1337341060 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 272450794 ps
T637 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.3685377496 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:17 AM UTC 24 168145360 ps
T638 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.2175548753 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 29101560 ps
T639 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.1916091656 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 78004510 ps
T640 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.860844303 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 47954422 ps
T641 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.1543840634 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 393196305 ps
T642 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.684243088 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 91182622 ps
T643 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.3483283150 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 54262518 ps
T644 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.1337130768 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 43931375 ps
T645 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.1681938385 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 34896790 ps
T646 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.2255619566 Sep 11 05:42:15 AM UTC 24 Sep 11 05:42:17 AM UTC 24 67515509 ps
T647 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.2555000924 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 108074772 ps
T648 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3401986724 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:17 AM UTC 24 1638278001 ps
T649 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.1853802581 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 36256223 ps
T650 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.1678972280 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 181802778 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.3883696105 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 57583369 ps
T651 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.1075064678 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 29118454 ps
T652 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.1847466135 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 92080798 ps
T653 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.1018138773 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 267960972 ps
T654 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.792320213 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 45945793 ps
T655 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.1641391294 Sep 11 05:42:15 AM UTC 24 Sep 11 05:42:16 AM UTC 24 75349917 ps
T656 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.1730494977 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:16 AM UTC 24 75247755 ps
T74 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.362775004 Sep 11 05:42:03 AM UTC 24 Sep 11 05:42:17 AM UTC 24 3467928211 ps
T657 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1657474553 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:17 AM UTC 24 2289233490 ps
T81 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.1677333368 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:18 AM UTC 24 536067435 ps
T658 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1733420885 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:18 AM UTC 24 889303092 ps
T659 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3725776193 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:18 AM UTC 24 1020682722 ps
T660 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.690947129 Sep 11 05:42:14 AM UTC 24 Sep 11 05:42:22 AM UTC 24 1542581632 ps
T661 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.2361329345 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 148005709 ps
T662 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.2370002680 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 46843954 ps
T663 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.2261298380 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 121072013 ps
T664 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2033034798 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:42 AM UTC 24 1045756996 ps
T665 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.3935262238 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 112154142 ps
T666 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.588776857 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 126227629 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.4007902178 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 39073741 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.1544982573 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 58118899 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.1021771748 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 160748482 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.1027021015 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 28308809 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.997066082 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 42042147 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.2360432850 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 83691954 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.2096959136 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 74037862 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.3059255693 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 117070353 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.697661088 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 91373702 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1595211612 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:42 AM UTC 24 1007052852 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.2958020051 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 1530341139 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.177146694 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 66821851 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.3416174661 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 31243854 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.1483749198 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 28960070 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.382203105 Sep 11 05:42:27 AM UTC 24 Sep 11 05:42:28 AM UTC 24 30715225 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.3192646070 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 125485179 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.955731427 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:28 AM UTC 24 111092494 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.2912917453 Sep 11 05:42:27 AM UTC 24 Sep 11 05:42:28 AM UTC 24 38812774 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.3273726556 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:29 AM UTC 24 204759613 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.1624466315 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:29 AM UTC 24 215936720 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.4285408226 Sep 11 05:42:27 AM UTC 24 Sep 11 05:42:29 AM UTC 24 138423455 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.1825797397 Sep 11 05:42:27 AM UTC 24 Sep 11 05:42:29 AM UTC 24 189055044 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.3665210495 Sep 11 05:42:27 AM UTC 24 Sep 11 05:42:29 AM UTC 24 231200444 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3558352455 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:30 AM UTC 24 813435738 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3170218444 Sep 11 05:42:27 AM UTC 24 Sep 11 05:42:30 AM UTC 24 973314694 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1803068880 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:30 AM UTC 24 844422119 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3426414839 Sep 11 05:42:27 AM UTC 24 Sep 11 05:42:30 AM UTC 24 974805571 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.4016638498 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:31 AM UTC 24 1134520748 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.4036154196 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:32 AM UTC 24 4245368810 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.109078902 Sep 11 05:42:26 AM UTC 24 Sep 11 05:42:34 AM UTC 24 5278039272 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.3782481461 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 45697833 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.895122386 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 58148499 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.3440650867 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 75099822 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.1978061481 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 262808270 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.3422657286 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:43 AM UTC 24 2776489713 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.3584090701 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 108389630 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.2060155296 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 60868293 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.2883840353 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 120018496 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.2900428277 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 57238152 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.3789064231 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 82440680 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.2548345799 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:40 AM UTC 24 128249870 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.3560873598 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 279546520 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.3573858736 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 161897702 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.1754730996 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 32509344 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.2896936481 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:40 AM UTC 24 86447437 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.2952415007 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:40 AM UTC 24 41149855 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.353479847 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:41 AM UTC 24 97836990 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.2666040980 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 113013558 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.3497402272 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 41634332 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.2407084918 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:41 AM UTC 24 274388593 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.1373875541 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 204210351 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.3101636039 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 29849469 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.4278026980 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 46689457 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.3498283170 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 178157534 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.1015605307 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 78396120 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.887047661 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 401811781 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.2143454047 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 43278032 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.3174710751 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:41 AM UTC 24 187156140 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.368098495 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:43 AM UTC 24 1673720142 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2245508371 Sep 11 05:42:38 AM UTC 24 Sep 11 05:42:42 AM UTC 24 1369795403 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2547148989 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:43 AM UTC 24 910504919 ps
T71 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.2084133350 Sep 11 05:42:39 AM UTC 24 Sep 11 05:42:46 AM UTC 24 1809146033 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.510597522 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 29244926 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.802952352 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 96531616 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.1890193061 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 189265866 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.2563390688 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 158410696 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.181665315 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 87029772 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.1523862755 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 38774570 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.447846824 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 75961122 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.1618701872 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 135385094 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.289342640 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 120718826 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.2390077670 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:10 AM UTC 24 1546796551 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.582045763 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:54 AM UTC 24 392387953 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.2586661034 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 82518177 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.237637106 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 47337922 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.1509891061 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 58759145 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.3973331941 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 184377042 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.3382689937 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 30156159 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.2158862845 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 99998718 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.2862279153 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 95453980 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.1184817374 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 111374027 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.3800425461 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 206992960 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.2912539152 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 243592378 ps
T179 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.2888591167 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 70225871 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.3488430997 Sep 11 05:43:08 AM UTC 24 Sep 11 05:43:10 AM UTC 24 103597568 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.3854834678 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 60511688 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.825324696 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:10 AM UTC 24 182487152 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.1612482935 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 134597463 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.1270137934 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 43976521 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.2147221921 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 95466837 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.1817842576 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 46469620 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.2289029765 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 45810474 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.3483015964 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 185660020 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.3419931419 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 75023497 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.1604481572 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 185695071 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.1262620294 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:55 AM UTC 24 263622488 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.630464612 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 337797531 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.3385456824 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:55 AM UTC 24 283564129 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1649791631 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:56 AM UTC 24 745907988 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.3233318574 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:56 AM UTC 24 626487868 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2676248641 Sep 11 05:42:52 AM UTC 24 Sep 11 05:42:57 AM UTC 24 841335492 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4025466798 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:57 AM UTC 24 953339751 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.511292541 Sep 11 05:42:53 AM UTC 24 Sep 11 05:42:57 AM UTC 24 835937288 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.3508993595 Sep 11 05:42:52 AM UTC 24 Sep 11 05:43:06 AM UTC 24 7743806419 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.4293460590 Sep 11 05:43:06 AM UTC 24 Sep 11 05:43:08 AM UTC 24 42694562 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.1293284402 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:08 AM UTC 24 32906072 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.44611174 Sep 11 05:43:06 AM UTC 24 Sep 11 05:43:08 AM UTC 24 166753130 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.1356380176 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 157147304 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.1936842350 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 66028094 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.3080661232 Sep 11 05:43:06 AM UTC 24 Sep 11 05:43:09 AM UTC 24 207103684 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.1361170092 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 31505044 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.319107188 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 106236713 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.2230879501 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 115656080 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.136704606 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 78952352 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.3951304714 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 49700337 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.3916535794 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 39679054 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.947918142 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 44665032 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.2417807447 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 125761494 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.3737869644 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:10 AM UTC 24 52246031 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.2187541454 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 83659737 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.2434768823 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 281674446 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.3574920663 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 1549660536 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3538549948 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 74266262 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.1134034363 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 117004317 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.453291821 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 40572542 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.1810926091 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 71516592 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.1945820881 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 164391150 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.3961353655 Sep 11 05:43:08 AM UTC 24 Sep 11 05:43:09 AM UTC 24 30837067 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.1132124370 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:10 AM UTC 24 113974849 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.3379187648 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 67449490 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.3846985127 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 151209448 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.2622462961 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:09 AM UTC 24 277735773 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1269765153 Sep 11 05:43:08 AM UTC 24 Sep 11 05:43:10 AM UTC 24 89354666 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.734020473 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:10 AM UTC 24 1250442169 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2177043743 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:11 AM UTC 24 923340601 ps
T798 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3343157388 Sep 11 05:43:08 AM UTC 24 Sep 11 05:43:11 AM UTC 24 1140724882 ps
T799 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.2942963669 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:11 AM UTC 24 3185990277 ps
T800 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2630813614 Sep 11 05:43:08 AM UTC 24 Sep 11 05:43:12 AM UTC 24 878252031 ps
T147 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.1242407941 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:13 AM UTC 24 3094368758 ps
T148 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.948496200 Sep 11 05:43:07 AM UTC 24 Sep 11 05:43:15 AM UTC 24 1720957459 ps
T801 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.529015605 Sep 11 05:43:23 AM UTC 24 Sep 11 05:43:25 AM UTC 24 53665934 ps
T802 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.2542195826 Sep 11 05:43:23 AM UTC 24 Sep 11 05:43:25 AM UTC 24 109053821 ps
T803 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.3262792386 Sep 11 05:43:24 AM UTC 24 Sep 11 05:43:25 AM UTC 24 33825691 ps
T804 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.2837514148 Sep 11 05:43:24 AM UTC 24 Sep 11 05:43:25 AM UTC 24 56368900 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.4285415199 Sep 11 05:43:42 AM UTC 24 Sep 11 05:43:44 AM UTC 24 66125225 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_10/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.2422848048 Sep 11 05:43:42 AM UTC 24 Sep 11 05:43:44 AM UTC 24 180714373 ps
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