| T329 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_wakeup_race.960014214 |
|
|
Sep 18 07:47:50 PM UTC 24 |
Sep 18 07:47:52 PM UTC 24 |
188208361 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.2674090662 |
|
|
Sep 18 07:47:50 PM UTC 24 |
Sep 18 07:47:52 PM UTC 24 |
78770063 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.3810535588 |
|
|
Sep 18 07:47:50 PM UTC 24 |
Sep 18 07:47:52 PM UTC 24 |
315075067 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.2865961796 |
|
|
Sep 18 07:47:51 PM UTC 24 |
Sep 18 07:47:53 PM UTC 24 |
29594537 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.2635683206 |
|
|
Sep 18 07:47:51 PM UTC 24 |
Sep 18 07:47:53 PM UTC 24 |
25376079 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.656400252 |
|
|
Sep 18 07:47:51 PM UTC 24 |
Sep 18 07:47:54 PM UTC 24 |
53288794 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.3518239553 |
|
|
Sep 18 07:48:02 PM UTC 24 |
Sep 18 07:48:04 PM UTC 24 |
248456309 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.2602160339 |
|
|
Sep 18 07:47:52 PM UTC 24 |
Sep 18 07:47:54 PM UTC 24 |
56502884 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.4033291901 |
|
|
Sep 18 07:47:53 PM UTC 24 |
Sep 18 07:47:54 PM UTC 24 |
65398879 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.3583233329 |
|
|
Sep 18 07:47:52 PM UTC 24 |
Sep 18 07:47:54 PM UTC 24 |
68901891 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.3909309889 |
|
|
Sep 18 07:47:50 PM UTC 24 |
Sep 18 07:47:55 PM UTC 24 |
1700500289 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.2578327045 |
|
|
Sep 18 07:47:40 PM UTC 24 |
Sep 18 07:47:55 PM UTC 24 |
7752304299 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.116529548 |
|
|
Sep 18 07:47:53 PM UTC 24 |
Sep 18 07:47:55 PM UTC 24 |
80423430 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.3262590065 |
|
|
Sep 18 07:47:53 PM UTC 24 |
Sep 18 07:47:55 PM UTC 24 |
177758930 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.2043178686 |
|
|
Sep 18 07:47:53 PM UTC 24 |
Sep 18 07:47:55 PM UTC 24 |
41230927 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.2358684313 |
|
|
Sep 18 07:47:53 PM UTC 24 |
Sep 18 07:47:55 PM UTC 24 |
408450523 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.40916268 |
|
|
Sep 18 07:47:51 PM UTC 24 |
Sep 18 07:47:55 PM UTC 24 |
1125319222 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.1333407730 |
|
|
Sep 18 07:47:54 PM UTC 24 |
Sep 18 07:47:56 PM UTC 24 |
26305949 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.2095613549 |
|
|
Sep 18 07:47:54 PM UTC 24 |
Sep 18 07:47:56 PM UTC 24 |
31503559 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.225002239 |
|
|
Sep 18 07:47:51 PM UTC 24 |
Sep 18 07:47:57 PM UTC 24 |
777923665 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.1673633501 |
|
|
Sep 18 07:47:55 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
35371082 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.3878763120 |
|
|
Sep 18 07:47:55 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
356912053 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.1187982309 |
|
|
Sep 18 07:47:55 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
178286047 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.2642102467 |
|
|
Sep 18 07:47:56 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
93207723 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.1748124216 |
|
|
Sep 18 07:47:56 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
36843484 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.892747124 |
|
|
Sep 18 07:47:56 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
30397893 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.1882389750 |
|
|
Sep 18 07:47:56 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
190414532 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.3382983188 |
|
|
Sep 18 07:47:55 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
376617844 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.2658694379 |
|
|
Sep 18 07:47:53 PM UTC 24 |
Sep 18 07:47:58 PM UTC 24 |
2482382005 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3776430319 |
|
|
Sep 18 07:47:55 PM UTC 24 |
Sep 18 07:47:59 PM UTC 24 |
1064937413 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.4181225740 |
|
|
Sep 18 07:47:57 PM UTC 24 |
Sep 18 07:47:59 PM UTC 24 |
59027019 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.2191353404 |
|
|
Sep 18 07:47:57 PM UTC 24 |
Sep 18 07:47:59 PM UTC 24 |
61665863 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.1206829206 |
|
|
Sep 18 07:47:57 PM UTC 24 |
Sep 18 07:47:59 PM UTC 24 |
113482988 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.313760497 |
|
|
Sep 18 07:47:55 PM UTC 24 |
Sep 18 07:48:00 PM UTC 24 |
785698274 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.1690497375 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:00 PM UTC 24 |
73786171 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.2691141221 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:01 PM UTC 24 |
31177380 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.832577545 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:01 PM UTC 24 |
105599517 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.2169617144 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:01 PM UTC 24 |
65172426 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.2148398623 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:01 PM UTC 24 |
111448516 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.1403091206 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:01 PM UTC 24 |
321433840 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.250187429 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:01 PM UTC 24 |
1141094983 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.151601572 |
|
|
Sep 18 07:47:53 PM UTC 24 |
Sep 18 07:48:02 PM UTC 24 |
2343510521 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.1643208404 |
|
|
Sep 18 07:48:00 PM UTC 24 |
Sep 18 07:48:02 PM UTC 24 |
55680330 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.638298870 |
|
|
Sep 18 07:47:50 PM UTC 24 |
Sep 18 07:48:02 PM UTC 24 |
1781874621 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.3579501777 |
|
|
Sep 18 07:48:00 PM UTC 24 |
Sep 18 07:48:03 PM UTC 24 |
252417618 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.626972272 |
|
|
Sep 18 07:48:00 PM UTC 24 |
Sep 18 07:48:03 PM UTC 24 |
50117279 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.2809989983 |
|
|
Sep 18 07:47:45 PM UTC 24 |
Sep 18 07:48:03 PM UTC 24 |
6858979460 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.2461298250 |
|
|
Sep 18 07:48:00 PM UTC 24 |
Sep 18 07:48:03 PM UTC 24 |
34778619 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.37693609 |
|
|
Sep 18 07:48:02 PM UTC 24 |
Sep 18 07:48:04 PM UTC 24 |
41956358 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.658183550 |
|
|
Sep 18 07:48:02 PM UTC 24 |
Sep 18 07:48:04 PM UTC 24 |
59087886 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.4025628414 |
|
|
Sep 18 07:48:02 PM UTC 24 |
Sep 18 07:48:04 PM UTC 24 |
96541856 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.1543183542 |
|
|
Sep 18 07:48:02 PM UTC 24 |
Sep 18 07:48:04 PM UTC 24 |
395160598 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.3688101369 |
|
|
Sep 18 07:48:02 PM UTC 24 |
Sep 18 07:48:04 PM UTC 24 |
104018732 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.3835751797 |
|
|
Sep 18 07:48:02 PM UTC 24 |
Sep 18 07:48:04 PM UTC 24 |
196606014 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2629000891 |
|
|
Sep 18 07:48:00 PM UTC 24 |
Sep 18 07:48:05 PM UTC 24 |
791520796 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.867543734 |
|
|
Sep 18 07:48:00 PM UTC 24 |
Sep 18 07:48:05 PM UTC 24 |
764958916 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.3215023906 |
|
|
Sep 18 07:48:04 PM UTC 24 |
Sep 18 07:48:06 PM UTC 24 |
48280272 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.455521435 |
|
|
Sep 18 07:48:04 PM UTC 24 |
Sep 18 07:48:06 PM UTC 24 |
40564012 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.1155504832 |
|
|
Sep 18 07:48:04 PM UTC 24 |
Sep 18 07:48:06 PM UTC 24 |
66531292 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.4274379237 |
|
|
Sep 18 07:48:04 PM UTC 24 |
Sep 18 07:48:06 PM UTC 24 |
145737249 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.823747063 |
|
|
Sep 18 07:48:04 PM UTC 24 |
Sep 18 07:48:06 PM UTC 24 |
134211989 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.3879328892 |
|
|
Sep 18 07:47:59 PM UTC 24 |
Sep 18 07:48:07 PM UTC 24 |
3251301405 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.31874527 |
|
|
Sep 18 07:48:04 PM UTC 24 |
Sep 18 07:48:07 PM UTC 24 |
2102788860 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.3196309897 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:08 PM UTC 24 |
31657247 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.3934901004 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:08 PM UTC 24 |
39551515 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.1037801181 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:08 PM UTC 24 |
118744834 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.3329304047 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:08 PM UTC 24 |
251139012 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.3670220346 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:08 PM UTC 24 |
785919709 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.97962411 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:08 PM UTC 24 |
53956691 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.1793710883 |
|
|
Sep 18 07:48:07 PM UTC 24 |
Sep 18 07:48:09 PM UTC 24 |
41245659 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.817948449 |
|
|
Sep 18 07:48:08 PM UTC 24 |
Sep 18 07:48:10 PM UTC 24 |
54532730 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.548615754 |
|
|
Sep 18 07:48:08 PM UTC 24 |
Sep 18 07:48:10 PM UTC 24 |
61841456 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.3532726543 |
|
|
Sep 18 07:48:08 PM UTC 24 |
Sep 18 07:48:10 PM UTC 24 |
220765276 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.3108430938 |
|
|
Sep 18 07:48:08 PM UTC 24 |
Sep 18 07:48:10 PM UTC 24 |
32931518 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2336406882 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:10 PM UTC 24 |
1034953606 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4235605671 |
|
|
Sep 18 07:48:06 PM UTC 24 |
Sep 18 07:48:10 PM UTC 24 |
847633482 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.2976222299 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:11 PM UTC 24 |
90269754 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.4115714586 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:11 PM UTC 24 |
56962452 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.2874723193 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:12 PM UTC 24 |
170240685 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.1110315254 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:12 PM UTC 24 |
429332102 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.3596990175 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:12 PM UTC 24 |
465460680 ps |
| T45 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.821056660 |
|
|
Sep 18 07:48:04 PM UTC 24 |
Sep 18 07:48:12 PM UTC 24 |
1397770152 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.3801927220 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:12 PM UTC 24 |
75648984 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.4236394970 |
|
|
Sep 18 07:48:11 PM UTC 24 |
Sep 18 07:48:13 PM UTC 24 |
101832174 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.1086090477 |
|
|
Sep 18 07:48:11 PM UTC 24 |
Sep 18 07:48:13 PM UTC 24 |
28745219 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.3383738109 |
|
|
Sep 18 07:48:11 PM UTC 24 |
Sep 18 07:48:13 PM UTC 24 |
122540655 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.3271608934 |
|
|
Sep 18 07:48:11 PM UTC 24 |
Sep 18 07:48:13 PM UTC 24 |
41757235 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.3347668226 |
|
|
Sep 18 07:48:11 PM UTC 24 |
Sep 18 07:48:13 PM UTC 24 |
300858509 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.3606600017 |
|
|
Sep 18 07:48:11 PM UTC 24 |
Sep 18 07:48:13 PM UTC 24 |
56671483 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.3378633543 |
|
|
Sep 18 07:48:11 PM UTC 24 |
Sep 18 07:48:13 PM UTC 24 |
109094312 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3227990930 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:14 PM UTC 24 |
1026882731 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.3865536126 |
|
|
Sep 18 07:48:12 PM UTC 24 |
Sep 18 07:48:14 PM UTC 24 |
251469718 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.712384436 |
|
|
Sep 18 07:48:12 PM UTC 24 |
Sep 18 07:48:14 PM UTC 24 |
162673905 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.1599864647 |
|
|
Sep 18 07:48:08 PM UTC 24 |
Sep 18 07:48:14 PM UTC 24 |
1224560582 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.118067741 |
|
|
Sep 18 07:48:12 PM UTC 24 |
Sep 18 07:48:14 PM UTC 24 |
77795529 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.1251128752 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:16 PM UTC 24 |
35015219 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.542572561 |
|
|
Sep 18 07:48:21 PM UTC 24 |
Sep 18 07:48:24 PM UTC 24 |
404602679 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.2100826770 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:16 PM UTC 24 |
37800448 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.745641256 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:16 PM UTC 24 |
165812957 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.587495913 |
|
|
Sep 18 07:48:09 PM UTC 24 |
Sep 18 07:48:16 PM UTC 24 |
863738695 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.3112390558 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:16 PM UTC 24 |
680048195 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.661011594 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:16 PM UTC 24 |
33599267 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.1116800041 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:16 PM UTC 24 |
51124912 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.1677275886 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:17 PM UTC 24 |
76077305 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.3656981116 |
|
|
Sep 18 07:48:21 PM UTC 24 |
Sep 18 07:48:24 PM UTC 24 |
102389828 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.1957305234 |
|
|
Sep 18 07:48:16 PM UTC 24 |
Sep 18 07:48:18 PM UTC 24 |
51274578 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.437645766 |
|
|
Sep 18 07:48:16 PM UTC 24 |
Sep 18 07:48:18 PM UTC 24 |
66377751 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.2039723012 |
|
|
Sep 18 07:48:16 PM UTC 24 |
Sep 18 07:48:18 PM UTC 24 |
640642231 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.633706869 |
|
|
Sep 18 07:48:16 PM UTC 24 |
Sep 18 07:48:18 PM UTC 24 |
64697668 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.1468450780 |
|
|
Sep 18 07:48:16 PM UTC 24 |
Sep 18 07:48:18 PM UTC 24 |
109553619 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2426018042 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:18 PM UTC 24 |
1029941500 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.2023872891 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:20 PM UTC 24 |
40140873 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3049915728 |
|
|
Sep 18 07:48:14 PM UTC 24 |
Sep 18 07:48:20 PM UTC 24 |
1022049844 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.1706252870 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:20 PM UTC 24 |
26942993 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.2099214672 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:20 PM UTC 24 |
99594767 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.706600905 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:20 PM UTC 24 |
76544401 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.3835448380 |
|
|
Sep 18 07:48:12 PM UTC 24 |
Sep 18 07:48:20 PM UTC 24 |
1567966061 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.1137715470 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:21 PM UTC 24 |
459950202 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.396976014 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:21 PM UTC 24 |
237155863 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.872023158 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:21 PM UTC 24 |
1673074633 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.3807030770 |
|
|
Sep 18 07:48:19 PM UTC 24 |
Sep 18 07:48:21 PM UTC 24 |
31117028 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.2869378414 |
|
|
Sep 18 07:48:20 PM UTC 24 |
Sep 18 07:48:22 PM UTC 24 |
30344046 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.3033678445 |
|
|
Sep 18 07:48:19 PM UTC 24 |
Sep 18 07:48:22 PM UTC 24 |
264550319 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.1335561651 |
|
|
Sep 18 07:48:20 PM UTC 24 |
Sep 18 07:48:22 PM UTC 24 |
123225421 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.3584887429 |
|
|
Sep 18 07:48:21 PM UTC 24 |
Sep 18 07:48:23 PM UTC 24 |
39974548 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.423068712 |
|
|
Sep 18 07:48:21 PM UTC 24 |
Sep 18 07:48:23 PM UTC 24 |
33646691 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.274997932 |
|
|
Sep 18 07:48:21 PM UTC 24 |
Sep 18 07:48:23 PM UTC 24 |
133042008 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.2279958960 |
|
|
Sep 18 07:48:21 PM UTC 24 |
Sep 18 07:48:23 PM UTC 24 |
63281106 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3199671302 |
|
|
Sep 18 07:48:19 PM UTC 24 |
Sep 18 07:48:24 PM UTC 24 |
1208366255 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.3423853746 |
|
|
Sep 18 07:48:23 PM UTC 24 |
Sep 18 07:48:25 PM UTC 24 |
64065838 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.1620046073 |
|
|
Sep 18 07:48:12 PM UTC 24 |
Sep 18 07:48:24 PM UTC 24 |
6012684438 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1251794944 |
|
|
Sep 18 07:48:19 PM UTC 24 |
Sep 18 07:48:25 PM UTC 24 |
912884761 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.4122334587 |
|
|
Sep 18 07:48:23 PM UTC 24 |
Sep 18 07:48:25 PM UTC 24 |
223632622 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.1236765842 |
|
|
Sep 18 07:48:23 PM UTC 24 |
Sep 18 07:48:25 PM UTC 24 |
63291285 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.830562590 |
|
|
Sep 18 07:48:23 PM UTC 24 |
Sep 18 07:48:25 PM UTC 24 |
154959053 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.9144946 |
|
|
Sep 18 07:48:23 PM UTC 24 |
Sep 18 07:48:26 PM UTC 24 |
226221624 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.3360478704 |
|
|
Sep 18 07:48:24 PM UTC 24 |
Sep 18 07:48:26 PM UTC 24 |
21359430 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.202074814 |
|
|
Sep 18 07:48:24 PM UTC 24 |
Sep 18 07:48:26 PM UTC 24 |
29681601 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.941179673 |
|
|
Sep 18 07:48:24 PM UTC 24 |
Sep 18 07:48:27 PM UTC 24 |
53578293 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.1276950169 |
|
|
Sep 18 07:48:08 PM UTC 24 |
Sep 18 07:48:27 PM UTC 24 |
27979395572 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.2435835841 |
|
|
Sep 18 07:48:24 PM UTC 24 |
Sep 18 07:48:27 PM UTC 24 |
107700257 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.3071685703 |
|
|
Sep 18 07:48:26 PM UTC 24 |
Sep 18 07:48:28 PM UTC 24 |
94141919 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.1121799608 |
|
|
Sep 18 07:48:26 PM UTC 24 |
Sep 18 07:48:28 PM UTC 24 |
47015878 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.1289505762 |
|
|
Sep 18 07:48:26 PM UTC 24 |
Sep 18 07:48:28 PM UTC 24 |
51425553 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.3608096550 |
|
|
Sep 18 07:48:26 PM UTC 24 |
Sep 18 07:48:28 PM UTC 24 |
169710546 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.100223322 |
|
|
Sep 18 07:48:26 PM UTC 24 |
Sep 18 07:48:28 PM UTC 24 |
52266687 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.1596845538 |
|
|
Sep 18 07:48:26 PM UTC 24 |
Sep 18 07:48:29 PM UTC 24 |
205768931 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2667428083 |
|
|
Sep 18 07:48:24 PM UTC 24 |
Sep 18 07:48:29 PM UTC 24 |
861270762 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.127704506 |
|
|
Sep 18 07:48:24 PM UTC 24 |
Sep 18 07:48:29 PM UTC 24 |
836252117 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.2443211050 |
|
|
Sep 18 07:48:23 PM UTC 24 |
Sep 18 07:48:29 PM UTC 24 |
1997530441 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.2650605577 |
|
|
Sep 18 07:48:28 PM UTC 24 |
Sep 18 07:48:30 PM UTC 24 |
29807156 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.4093101275 |
|
|
Sep 18 07:48:28 PM UTC 24 |
Sep 18 07:48:30 PM UTC 24 |
42320501 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.927235826 |
|
|
Sep 18 07:48:28 PM UTC 24 |
Sep 18 07:48:30 PM UTC 24 |
63378356 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.4057715383 |
|
|
Sep 18 07:48:21 PM UTC 24 |
Sep 18 07:48:30 PM UTC 24 |
3999448535 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.3678659347 |
|
|
Sep 18 07:48:28 PM UTC 24 |
Sep 18 07:48:30 PM UTC 24 |
126930928 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.3042598890 |
|
|
Sep 18 07:48:28 PM UTC 24 |
Sep 18 07:48:31 PM UTC 24 |
64777467 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.636849726 |
|
|
Sep 18 07:48:30 PM UTC 24 |
Sep 18 07:48:32 PM UTC 24 |
31539457 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.312145710 |
|
|
Sep 18 07:48:29 PM UTC 24 |
Sep 18 07:48:32 PM UTC 24 |
31876412 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.2940304067 |
|
|
Sep 18 07:48:30 PM UTC 24 |
Sep 18 07:48:32 PM UTC 24 |
50874743 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.297007000 |
|
|
Sep 18 07:48:29 PM UTC 24 |
Sep 18 07:48:32 PM UTC 24 |
54408540 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.3047518063 |
|
|
Sep 18 07:48:29 PM UTC 24 |
Sep 18 07:48:32 PM UTC 24 |
159990861 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.2182718171 |
|
|
Sep 18 07:48:18 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
3205434558 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.1425693059 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
81566536 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.1643235234 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
68014593 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.338268736 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
71809380 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2245197709 |
|
|
Sep 18 07:48:29 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
1291345332 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.3724710724 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
121298929 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.1688041808 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
68339191 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.728819860 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:33 PM UTC 24 |
31247344 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.1853569642 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:34 PM UTC 24 |
501414110 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3007701482 |
|
|
Sep 18 07:48:29 PM UTC 24 |
Sep 18 07:48:34 PM UTC 24 |
1005884828 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.2447545136 |
|
|
Sep 18 07:48:33 PM UTC 24 |
Sep 18 07:48:35 PM UTC 24 |
34850293 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.3396201066 |
|
|
Sep 18 07:48:33 PM UTC 24 |
Sep 18 07:48:35 PM UTC 24 |
254009449 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.1130381481 |
|
|
Sep 18 07:48:33 PM UTC 24 |
Sep 18 07:48:35 PM UTC 24 |
167339378 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.4118277353 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:37 PM UTC 24 |
2852786492 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.2997311262 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:37 PM UTC 24 |
39070888 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.74647560 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
37145926 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.2810378663 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
28827927 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.814358761 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
133806540 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.580907991 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
413707351 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.110544140 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
37593247 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.2252306731 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
447284097 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.3626816780 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
108651702 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.1524263769 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:38 PM UTC 24 |
59031558 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.866554250 |
|
|
Sep 18 07:48:36 PM UTC 24 |
Sep 18 07:48:39 PM UTC 24 |
57135547 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.1636902940 |
|
|
Sep 18 07:48:36 PM UTC 24 |
Sep 18 07:48:39 PM UTC 24 |
168431407 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.1112862836 |
|
|
Sep 18 07:48:37 PM UTC 24 |
Sep 18 07:48:40 PM UTC 24 |
307950144 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1952907150 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:40 PM UTC 24 |
751089170 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.3515237074 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:41 PM UTC 24 |
47716593 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.3941237768 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:41 PM UTC 24 |
120014738 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.2154731034 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:41 PM UTC 24 |
30630373 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.2145628651 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:41 PM UTC 24 |
116642264 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.3731164140 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:42 PM UTC 24 |
168791419 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.1046116410 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:42 PM UTC 24 |
263858623 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.119244049 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:42 PM UTC 24 |
327442256 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.37551293 |
|
|
Sep 18 07:48:35 PM UTC 24 |
Sep 18 07:48:42 PM UTC 24 |
861176595 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.3068987859 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:42 PM UTC 24 |
281546592 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.3417904797 |
|
|
Sep 18 07:48:31 PM UTC 24 |
Sep 18 07:48:43 PM UTC 24 |
3822984406 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.859593579 |
|
|
Sep 18 07:48:41 PM UTC 24 |
Sep 18 07:48:43 PM UTC 24 |
84070278 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4239370542 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:43 PM UTC 24 |
1077817112 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.1617459101 |
|
|
Sep 18 07:48:41 PM UTC 24 |
Sep 18 07:48:43 PM UTC 24 |
108814542 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.4194429876 |
|
|
Sep 18 07:48:41 PM UTC 24 |
Sep 18 07:48:44 PM UTC 24 |
194366767 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.1392712304 |
|
|
Sep 18 07:48:42 PM UTC 24 |
Sep 18 07:48:44 PM UTC 24 |
54379316 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.3809994630 |
|
|
Sep 18 07:48:42 PM UTC 24 |
Sep 18 07:48:44 PM UTC 24 |
251565303 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2582621214 |
|
|
Sep 18 07:48:39 PM UTC 24 |
Sep 18 07:48:45 PM UTC 24 |
900209882 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.89951777 |
|
|
Sep 18 07:48:42 PM UTC 24 |
Sep 18 07:48:45 PM UTC 24 |
56536652 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.3172021514 |
|
|
Sep 18 07:48:42 PM UTC 24 |
Sep 18 07:48:45 PM UTC 24 |
162710749 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.2077510423 |
|
|
Sep 18 07:48:42 PM UTC 24 |
Sep 18 07:48:45 PM UTC 24 |
83448790 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.669598713 |
|
|
Sep 18 07:48:37 PM UTC 24 |
Sep 18 07:48:45 PM UTC 24 |
10654065472 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.1560603713 |
|
|
Sep 18 07:48:44 PM UTC 24 |
Sep 18 07:48:46 PM UTC 24 |
225592431 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.3883535505 |
|
|
Sep 18 07:48:44 PM UTC 24 |
Sep 18 07:48:46 PM UTC 24 |
62647545 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.2496635906 |
|
|
Sep 18 07:48:44 PM UTC 24 |
Sep 18 07:48:46 PM UTC 24 |
20722407 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.1863829127 |
|
|
Sep 18 07:48:44 PM UTC 24 |
Sep 18 07:48:46 PM UTC 24 |
64487451 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.1537757346 |
|
|
Sep 18 07:48:44 PM UTC 24 |
Sep 18 07:48:47 PM UTC 24 |
213981936 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.1805831126 |
|
|
Sep 18 07:48:26 PM UTC 24 |
Sep 18 07:48:47 PM UTC 24 |
6380210270 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.2148383399 |
|
|
Sep 18 07:48:44 PM UTC 24 |
Sep 18 07:48:47 PM UTC 24 |
285114583 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.1394537075 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
40625205 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.1677088610 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
25247365 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.645133939 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
303474524 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.2201179580 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
54758659 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.3358806353 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
163937504 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.2760246027 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
88145325 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.1973204925 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
61752883 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.3776929464 |
|
|
Sep 18 07:48:46 PM UTC 24 |
Sep 18 07:48:48 PM UTC 24 |
115324244 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1858967355 |
|
|
Sep 18 07:48:45 PM UTC 24 |
Sep 18 07:48:49 PM UTC 24 |
886183467 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.3998193347 |
|
|
Sep 18 07:48:48 PM UTC 24 |
Sep 18 07:48:50 PM UTC 24 |
22221877 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.465740774 |
|
|
Sep 18 07:48:48 PM UTC 24 |
Sep 18 07:48:50 PM UTC 24 |
58350245 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.1562293954 |
|
|
Sep 18 07:48:48 PM UTC 24 |
Sep 18 07:48:50 PM UTC 24 |
76279595 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.1800808310 |
|
|
Sep 18 07:48:48 PM UTC 24 |
Sep 18 07:48:50 PM UTC 24 |
53111945 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3275630579 |
|
|
Sep 18 07:48:44 PM UTC 24 |
Sep 18 07:48:50 PM UTC 24 |
869958483 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.3684845046 |
|
|
Sep 18 07:48:50 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
246633848 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.581566422 |
|
|
Sep 18 07:48:42 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
2185654464 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.1380126484 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
29470721 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.1175099865 |
|
|
Sep 18 07:48:50 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
34094317 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.877964211 |
|
|
Sep 18 07:48:50 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
131131653 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.1222217585 |
|
|
Sep 18 07:48:48 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
906644490 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.3454812851 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
62192682 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.938874494 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:53 PM UTC 24 |
46668848 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.2418644697 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:54 PM UTC 24 |
41096056 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.4237870796 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:54 PM UTC 24 |
98590090 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.1094363623 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:54 PM UTC 24 |
42658364 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.1707103374 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:54 PM UTC 24 |
247969330 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.2830844405 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:54 PM UTC 24 |
118395468 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.2397843326 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:54 PM UTC 24 |
779677359 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2948164533 |
|
|
Sep 18 07:48:51 PM UTC 24 |
Sep 18 07:48:54 PM UTC 24 |
962136664 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1443643071 |
|
|
Sep 18 07:48:50 PM UTC 24 |
Sep 18 07:48:55 PM UTC 24 |
818487033 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.1478116779 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
105575382 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.1290075769 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:56 PM UTC 24 |
42920450 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.15693798 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:56 PM UTC 24 |
42297387 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.3251944034 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:56 PM UTC 24 |
124470085 ps |