| T565 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.3950276352 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:56 PM UTC 24 |
25344480 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.1977707334 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:56 PM UTC 24 |
244873781 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.3047027454 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:56 PM UTC 24 |
329621373 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.4048712868 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
29655408 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.30672045 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
88524687 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.2572092813 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
203111534 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.2070983380 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
48883490 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.131723553 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
87412476 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.2764074660 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
369546316 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.3064340241 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
73544960 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.237269719 |
|
|
Sep 18 07:48:56 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
125627566 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.3016191545 |
|
|
Sep 18 07:48:48 PM UTC 24 |
Sep 18 07:48:58 PM UTC 24 |
2254171262 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3961948816 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:59 PM UTC 24 |
907047230 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.2286956754 |
|
|
Sep 18 07:48:52 PM UTC 24 |
Sep 18 07:48:59 PM UTC 24 |
2847166800 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2667496379 |
|
|
Sep 18 07:48:54 PM UTC 24 |
Sep 18 07:48:59 PM UTC 24 |
1180028173 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.3021134260 |
|
|
Sep 18 07:48:57 PM UTC 24 |
Sep 18 07:48:59 PM UTC 24 |
41347786 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.2040117596 |
|
|
Sep 18 07:48:57 PM UTC 24 |
Sep 18 07:48:59 PM UTC 24 |
41077520 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.1091063834 |
|
|
Sep 18 07:48:57 PM UTC 24 |
Sep 18 07:49:00 PM UTC 24 |
244003311 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.957324747 |
|
|
Sep 18 07:48:57 PM UTC 24 |
Sep 18 07:49:00 PM UTC 24 |
44511872 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.786431358 |
|
|
Sep 18 07:48:57 PM UTC 24 |
Sep 18 07:49:00 PM UTC 24 |
157452719 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.1442481028 |
|
|
Sep 18 07:48:59 PM UTC 24 |
Sep 18 07:49:01 PM UTC 24 |
40182571 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.1618127345 |
|
|
Sep 18 07:48:59 PM UTC 24 |
Sep 18 07:49:01 PM UTC 24 |
58783050 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.2193777661 |
|
|
Sep 18 07:48:59 PM UTC 24 |
Sep 18 07:49:01 PM UTC 24 |
88694936 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.3779295567 |
|
|
Sep 18 07:48:59 PM UTC 24 |
Sep 18 07:49:01 PM UTC 24 |
150040718 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.3139426029 |
|
|
Sep 18 07:48:59 PM UTC 24 |
Sep 18 07:49:01 PM UTC 24 |
100756734 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.806548213 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:02 PM UTC 24 |
26408842 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.3476292445 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:02 PM UTC 24 |
40770850 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.3578080577 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:02 PM UTC 24 |
40786187 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.546204834 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
54270668 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.38792661 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
42627383 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3672328193 |
|
|
Sep 18 07:48:59 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
1019471667 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.658449927 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
1580339481 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.1699958263 |
|
|
Sep 18 07:48:57 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
1845185879 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4283574156 |
|
|
Sep 18 07:48:59 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
848529055 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.648024359 |
|
|
Sep 18 07:48:52 PM UTC 24 |
Sep 18 07:49:03 PM UTC 24 |
6210171798 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.4094780875 |
|
|
Sep 18 07:49:02 PM UTC 24 |
Sep 18 07:49:04 PM UTC 24 |
60714231 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.3363464751 |
|
|
Sep 18 07:49:02 PM UTC 24 |
Sep 18 07:49:04 PM UTC 24 |
210472419 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.945571419 |
|
|
Sep 18 07:49:02 PM UTC 24 |
Sep 18 07:49:04 PM UTC 24 |
102466911 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.3752573474 |
|
|
Sep 18 07:49:02 PM UTC 24 |
Sep 18 07:49:04 PM UTC 24 |
110671953 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.690845819 |
|
|
Sep 18 07:49:02 PM UTC 24 |
Sep 18 07:49:04 PM UTC 24 |
260159250 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.2402790565 |
|
|
Sep 18 07:49:03 PM UTC 24 |
Sep 18 07:49:05 PM UTC 24 |
28177084 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.182677266 |
|
|
Sep 18 07:49:03 PM UTC 24 |
Sep 18 07:49:05 PM UTC 24 |
31184712 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.3790005503 |
|
|
Sep 18 07:49:03 PM UTC 24 |
Sep 18 07:49:05 PM UTC 24 |
151518043 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.1362966190 |
|
|
Sep 18 07:49:03 PM UTC 24 |
Sep 18 07:49:06 PM UTC 24 |
52454339 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.2465661769 |
|
|
Sep 18 07:49:03 PM UTC 24 |
Sep 18 07:49:06 PM UTC 24 |
401547886 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.566717022 |
|
|
Sep 18 07:49:02 PM UTC 24 |
Sep 18 07:49:06 PM UTC 24 |
837325348 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.3790941465 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
46582969 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.3473701739 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
35526044 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.3415843608 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
48408315 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.2105770673 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
66516843 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.1536775529 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
51735556 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.3440141257 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
2489502355 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.1676958928 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
31411411 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.1732953810 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
138151176 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.2704901933 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:07 PM UTC 24 |
46170201 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.2860164529 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:08 PM UTC 24 |
246507180 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.3583934499 |
|
|
Sep 18 07:49:06 PM UTC 24 |
Sep 18 07:49:09 PM UTC 24 |
94150258 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.4057489027 |
|
|
Sep 18 07:49:06 PM UTC 24 |
Sep 18 07:49:09 PM UTC 24 |
73844364 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.3355289514 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:09 PM UTC 24 |
723572700 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1775417769 |
|
|
Sep 18 07:49:03 PM UTC 24 |
Sep 18 07:49:09 PM UTC 24 |
867765237 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1939772408 |
|
|
Sep 18 07:49:07 PM UTC 24 |
Sep 18 07:49:09 PM UTC 24 |
51737725 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.228820545 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:10 PM UTC 24 |
28434576 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.1718411483 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:10 PM UTC 24 |
31505040 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.3324019433 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:10 PM UTC 24 |
45382254 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.690724630 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:10 PM UTC 24 |
46244436 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.3247953830 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:11 PM UTC 24 |
65229389 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.2867960215 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:11 PM UTC 24 |
121983858 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.1686709045 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:11 PM UTC 24 |
396118821 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.3251966885 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:11 PM UTC 24 |
182000363 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2439159833 |
|
|
Sep 18 07:49:06 PM UTC 24 |
Sep 18 07:49:11 PM UTC 24 |
827099129 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.3409344342 |
|
|
Sep 18 07:49:10 PM UTC 24 |
Sep 18 07:49:12 PM UTC 24 |
84249646 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3124130547 |
|
|
Sep 18 07:49:07 PM UTC 24 |
Sep 18 07:49:12 PM UTC 24 |
800628930 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.2665985651 |
|
|
Sep 18 07:49:10 PM UTC 24 |
Sep 18 07:49:12 PM UTC 24 |
138882052 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.1340015093 |
|
|
Sep 18 07:49:10 PM UTC 24 |
Sep 18 07:49:12 PM UTC 24 |
336685727 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.1572547595 |
|
|
Sep 18 07:49:10 PM UTC 24 |
Sep 18 07:49:13 PM UTC 24 |
421338576 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.371742136 |
|
|
Sep 18 07:49:10 PM UTC 24 |
Sep 18 07:49:13 PM UTC 24 |
250745495 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.1592673275 |
|
|
Sep 18 07:49:12 PM UTC 24 |
Sep 18 07:49:14 PM UTC 24 |
83930474 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.3963036042 |
|
|
Sep 18 07:49:12 PM UTC 24 |
Sep 18 07:49:14 PM UTC 24 |
84514650 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.2372237267 |
|
|
Sep 18 07:49:05 PM UTC 24 |
Sep 18 07:49:14 PM UTC 24 |
4347882333 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.1492718826 |
|
|
Sep 18 07:49:12 PM UTC 24 |
Sep 18 07:49:14 PM UTC 24 |
127537489 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3918197395 |
|
|
Sep 18 07:49:12 PM UTC 24 |
Sep 18 07:49:14 PM UTC 24 |
107515163 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.2838659455 |
|
|
Sep 18 07:49:11 PM UTC 24 |
Sep 18 07:49:14 PM UTC 24 |
42979677 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.3199803450 |
|
|
Sep 18 07:48:57 PM UTC 24 |
Sep 18 07:49:14 PM UTC 24 |
10032426652 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.4210380112 |
|
|
Sep 18 07:49:00 PM UTC 24 |
Sep 18 07:49:15 PM UTC 24 |
4475220186 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.2062715112 |
|
|
Sep 18 07:49:13 PM UTC 24 |
Sep 18 07:49:15 PM UTC 24 |
39761887 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1548510349 |
|
|
Sep 18 07:49:13 PM UTC 24 |
Sep 18 07:49:15 PM UTC 24 |
48305460 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.2115535543 |
|
|
Sep 18 07:49:13 PM UTC 24 |
Sep 18 07:49:15 PM UTC 24 |
62103763 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.473450995 |
|
|
Sep 18 07:49:13 PM UTC 24 |
Sep 18 07:49:15 PM UTC 24 |
131357494 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.1334549330 |
|
|
Sep 18 07:49:13 PM UTC 24 |
Sep 18 07:49:15 PM UTC 24 |
367094784 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2446195465 |
|
|
Sep 18 07:49:12 PM UTC 24 |
Sep 18 07:49:16 PM UTC 24 |
940496371 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.1178841806 |
|
|
Sep 18 07:49:13 PM UTC 24 |
Sep 18 07:49:16 PM UTC 24 |
125428470 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.680135521 |
|
|
Sep 18 07:49:09 PM UTC 24 |
Sep 18 07:49:17 PM UTC 24 |
1859755977 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.2344709505 |
|
|
Sep 18 07:49:15 PM UTC 24 |
Sep 18 07:49:17 PM UTC 24 |
59855387 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.2359259345 |
|
|
Sep 18 07:49:15 PM UTC 24 |
Sep 18 07:49:17 PM UTC 24 |
30842534 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.3194768571 |
|
|
Sep 18 07:49:15 PM UTC 24 |
Sep 18 07:49:17 PM UTC 24 |
269426397 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.6980892 |
|
|
Sep 18 07:49:15 PM UTC 24 |
Sep 18 07:49:17 PM UTC 24 |
88805762 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.2380793327 |
|
|
Sep 18 07:49:15 PM UTC 24 |
Sep 18 07:49:17 PM UTC 24 |
112930816 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.2533734348 |
|
|
Sep 18 07:49:15 PM UTC 24 |
Sep 18 07:49:17 PM UTC 24 |
176404626 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3659563829 |
|
|
Sep 18 07:49:12 PM UTC 24 |
Sep 18 07:49:18 PM UTC 24 |
843193071 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3917804610 |
|
|
Sep 18 07:49:15 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
796670998 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.3313022878 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
30769053 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.2303782205 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
41259675 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.3169611609 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
243319828 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.3244471622 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
96747680 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.2821330981 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
69697142 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.1677687639 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
120040536 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.1661463959 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
67481571 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.4039576108 |
|
|
Sep 18 07:49:17 PM UTC 24 |
Sep 18 07:49:19 PM UTC 24 |
401673822 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2533975702 |
|
|
Sep 18 07:49:16 PM UTC 24 |
Sep 18 07:49:21 PM UTC 24 |
1051365861 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.1865261773 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:22 PM UTC 24 |
160382332 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.616351963 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:23 PM UTC 24 |
484953723 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.2288880047 |
|
|
Sep 18 07:49:21 PM UTC 24 |
Sep 18 07:49:23 PM UTC 24 |
50123036 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.3284127480 |
|
|
Sep 18 07:49:21 PM UTC 24 |
Sep 18 07:49:23 PM UTC 24 |
99285088 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.4157326251 |
|
|
Sep 18 07:49:21 PM UTC 24 |
Sep 18 07:49:23 PM UTC 24 |
73388153 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.2614916001 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:23 PM UTC 24 |
477971459 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.2138683088 |
|
|
Sep 18 07:49:21 PM UTC 24 |
Sep 18 07:49:23 PM UTC 24 |
255251007 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.523684299 |
|
|
Sep 18 07:49:21 PM UTC 24 |
Sep 18 07:49:24 PM UTC 24 |
117972644 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.3446780244 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:24 PM UTC 24 |
32533995 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.455713212 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:24 PM UTC 24 |
57799702 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3376120429 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:24 PM UTC 24 |
1320645627 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.1248745949 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
68760130 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.4211871332 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:24 PM UTC 24 |
43821031 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.4062107534 |
|
|
Sep 18 07:49:20 PM UTC 24 |
Sep 18 07:49:24 PM UTC 24 |
34226504 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2066987682 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:25 PM UTC 24 |
757844538 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.2621028707 |
|
|
Sep 18 07:49:08 PM UTC 24 |
Sep 18 07:49:25 PM UTC 24 |
4925217771 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.2537429077 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:25 PM UTC 24 |
64997119 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.332351312 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:25 PM UTC 24 |
280660198 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.1608495869 |
|
|
Sep 18 07:49:13 PM UTC 24 |
Sep 18 07:49:26 PM UTC 24 |
2866549890 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.290627991 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:27 PM UTC 24 |
4137883235 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.1311112511 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:28 PM UTC 24 |
29349187 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.1288863034 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:28 PM UTC 24 |
37833128 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.1533050297 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:28 PM UTC 24 |
47128564 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.530312517 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:28 PM UTC 24 |
105725708 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.2135447029 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:28 PM UTC 24 |
50220245 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.831912414 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:29 PM UTC 24 |
159737167 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.3212598646 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:29 PM UTC 24 |
58923238 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.2934593525 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:29 PM UTC 24 |
207759999 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.11855596 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:29 PM UTC 24 |
136172931 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.139907372 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:29 PM UTC 24 |
44875369 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.765023421 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:29 PM UTC 24 |
135161328 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.3236569906 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:29 PM UTC 24 |
53180245 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.3582257833 |
|
|
Sep 18 07:49:27 PM UTC 24 |
Sep 18 07:49:30 PM UTC 24 |
73729407 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.2822733168 |
|
|
Sep 18 07:49:27 PM UTC 24 |
Sep 18 07:49:30 PM UTC 24 |
123510194 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.4081649246 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:30 PM UTC 24 |
326598874 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.27672914 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:30 PM UTC 24 |
251568983 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.3414912588 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:30 PM UTC 24 |
245575783 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1652094829 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:30 PM UTC 24 |
1026269355 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.2010452230 |
|
|
Sep 18 07:49:19 PM UTC 24 |
Sep 18 07:49:31 PM UTC 24 |
1848697130 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.3735157351 |
|
|
Sep 18 07:49:29 PM UTC 24 |
Sep 18 07:49:31 PM UTC 24 |
32431089 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.1510368209 |
|
|
Sep 18 07:49:29 PM UTC 24 |
Sep 18 07:49:31 PM UTC 24 |
27078707 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4016888208 |
|
|
Sep 18 07:49:26 PM UTC 24 |
Sep 18 07:49:31 PM UTC 24 |
853012854 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.886355115 |
|
|
Sep 18 07:49:29 PM UTC 24 |
Sep 18 07:49:31 PM UTC 24 |
122520715 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.401173009 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:32 PM UTC 24 |
46387099 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.1994726109 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:32 PM UTC 24 |
28179633 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.1514842383 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:32 PM UTC 24 |
55365058 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.2540254616 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:32 PM UTC 24 |
136523517 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.1990868971 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:33 PM UTC 24 |
216103975 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.600183687 |
|
|
Sep 18 07:49:33 PM UTC 24 |
Sep 18 07:49:37 PM UTC 24 |
1284335991 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.143049746 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:33 PM UTC 24 |
82717705 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.3462470459 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
245388245 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.4267575471 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
32426403 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.4011273907 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
59910260 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3170139433 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
1144908323 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.2488820918 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
56598550 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.479228036 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
66910808 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.1576771613 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
46992365 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.3045306423 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
110309182 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.1942120872 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
3795727363 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.680079851 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
110171650 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.256200207 |
|
|
Sep 18 07:49:24 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
2033192018 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2745929275 |
|
|
Sep 18 07:49:30 PM UTC 24 |
Sep 18 07:49:34 PM UTC 24 |
1804679961 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.3405972120 |
|
|
Sep 18 07:49:29 PM UTC 24 |
Sep 18 07:49:35 PM UTC 24 |
2620924728 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.1000142196 |
|
|
Sep 18 07:49:33 PM UTC 24 |
Sep 18 07:49:35 PM UTC 24 |
41933425 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.1200229761 |
|
|
Sep 18 07:49:33 PM UTC 24 |
Sep 18 07:49:35 PM UTC 24 |
52514760 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.2832972028 |
|
|
Sep 18 07:49:33 PM UTC 24 |
Sep 18 07:49:35 PM UTC 24 |
411853888 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.3291569998 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:36 PM UTC 24 |
1715441258 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.1301016395 |
|
|
Sep 18 07:49:33 PM UTC 24 |
Sep 18 07:49:36 PM UTC 24 |
311036828 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.1667084634 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
93375018 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.1782577231 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
43066221 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.1308769460 |
|
|
Sep 18 07:49:36 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
31868879 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.2540612530 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
414473993 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.1869006723 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
42525199 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.3091220795 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
162489831 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.2136374988 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
57552481 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.1471695824 |
|
|
Sep 18 07:49:36 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
98910128 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.1845657348 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
194700721 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.1047301579 |
|
|
Sep 18 07:49:36 PM UTC 24 |
Sep 18 07:49:38 PM UTC 24 |
65267115 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.3739609583 |
|
|
Sep 18 07:49:29 PM UTC 24 |
Sep 18 07:49:39 PM UTC 24 |
3663636808 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.2688749502 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:43 PM UTC 24 |
52368439 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.3552939094 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:43 PM UTC 24 |
76971898 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.3822522184 |
|
|
Sep 18 07:49:38 PM UTC 24 |
Sep 18 07:49:43 PM UTC 24 |
74861948 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.1862721978 |
|
|
Sep 18 07:49:42 PM UTC 24 |
Sep 18 07:49:43 PM UTC 24 |
65668326 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.4257298885 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:43 PM UTC 24 |
110951529 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.2194796140 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:44 PM UTC 24 |
437068502 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.2154749130 |
|
|
Sep 18 07:49:32 PM UTC 24 |
Sep 18 07:49:44 PM UTC 24 |
3692145566 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1155533035 |
|
|
Sep 18 07:49:38 PM UTC 24 |
Sep 18 07:49:45 PM UTC 24 |
798906288 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1778281948 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:46 PM UTC 24 |
807365857 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4281510013 |
|
|
Sep 18 07:49:38 PM UTC 24 |
Sep 18 07:49:46 PM UTC 24 |
1332494398 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.3405576911 |
|
|
Sep 18 07:49:56 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
49846218 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.3408643265 |
|
|
Sep 18 07:49:35 PM UTC 24 |
Sep 18 07:49:47 PM UTC 24 |
3429419315 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.602232312 |
|
|
Sep 18 07:49:39 PM UTC 24 |
Sep 18 07:49:47 PM UTC 24 |
29116486 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.1691166070 |
|
|
Sep 18 07:49:39 PM UTC 24 |
Sep 18 07:49:47 PM UTC 24 |
22977106 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.442819994 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:47 PM UTC 24 |
52052892 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.1414915378 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:48 PM UTC 24 |
59366294 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.4257041889 |
|
|
Sep 18 07:49:39 PM UTC 24 |
Sep 18 07:49:48 PM UTC 24 |
109262310 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.1809489976 |
|
|
Sep 18 07:49:39 PM UTC 24 |
Sep 18 07:49:48 PM UTC 24 |
185562557 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.133634605 |
|
|
Sep 18 07:49:46 PM UTC 24 |
Sep 18 07:49:48 PM UTC 24 |
367637602 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.4168206549 |
|
|
Sep 18 07:49:39 PM UTC 24 |
Sep 18 07:49:48 PM UTC 24 |
420162459 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.2541721206 |
|
|
Sep 18 07:49:36 PM UTC 24 |
Sep 18 07:49:48 PM UTC 24 |
21598339 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.949088086 |
|
|
Sep 18 07:49:46 PM UTC 24 |
Sep 18 07:49:48 PM UTC 24 |
33205679 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.55147199 |
|
|
Sep 18 07:49:36 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
49106715 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.3901935353 |
|
|
Sep 18 07:49:36 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
152651049 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.3184833544 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
73904733 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.1568410885 |
|
|
Sep 18 07:49:46 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
243133587 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.1046290781 |
|
|
Sep 18 07:49:47 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
110834376 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.1515265931 |
|
|
Sep 18 07:49:47 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
80150536 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.1290467724 |
|
|
Sep 18 07:49:44 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
154968997 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.1102612737 |
|
|
Sep 18 07:49:44 PM UTC 24 |
Sep 18 07:49:49 PM UTC 24 |
43136501 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.3099364400 |
|
|
Sep 18 07:49:44 PM UTC 24 |
Sep 18 07:49:50 PM UTC 24 |
384069868 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3572261067 |
|
|
Sep 18 07:49:44 PM UTC 24 |
Sep 18 07:49:51 PM UTC 24 |
1422182449 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3750835936 |
|
|
Sep 18 07:49:44 PM UTC 24 |
Sep 18 07:49:51 PM UTC 24 |
858238986 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.1699616782 |
|
|
Sep 18 07:49:56 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
29817499 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.3550566308 |
|
|
Sep 18 07:49:55 PM UTC 24 |
Sep 18 07:49:59 PM UTC 24 |
320360414 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.997901500 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
89305374 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.1919874575 |
|
|
Sep 18 07:49:48 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
56861347 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.4191013159 |
|
|
Sep 18 07:49:48 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
60666270 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3561070041 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
167854057 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.857210069 |
|
|
Sep 18 07:49:51 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
53362818 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.15392659 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
28852136 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.1236302981 |
|
|
Sep 18 07:49:56 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
82223536 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.1846401699 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
243444010 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.3109057805 |
|
|
Sep 18 07:49:48 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
514388294 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.590129613 |
|
|
Sep 18 07:49:48 PM UTC 24 |
Sep 18 07:49:53 PM UTC 24 |
52612919 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.615119085 |
|
|
Sep 18 07:49:51 PM UTC 24 |
Sep 18 07:49:54 PM UTC 24 |
105580189 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1915985719 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:54 PM UTC 24 |
946360983 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.1003216652 |
|
|
Sep 18 07:49:52 PM UTC 24 |
Sep 18 07:49:54 PM UTC 24 |
104059965 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.2412981808 |
|
|
Sep 18 07:49:49 PM UTC 24 |
Sep 18 07:49:55 PM UTC 24 |
187512782 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.3306261801 |
|
|
Sep 18 07:49:49 PM UTC 24 |
Sep 18 07:49:55 PM UTC 24 |
32090922 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.850888262 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:55 PM UTC 24 |
81284275 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.734452745 |
|
|
Sep 18 07:49:49 PM UTC 24 |
Sep 18 07:49:55 PM UTC 24 |
84272334 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all_with_rand_reset.2329424892 |
|
|
Sep 18 07:49:40 PM UTC 24 |
Sep 18 07:49:56 PM UTC 24 |
10048733717 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.730601543 |
|
|
Sep 18 07:49:55 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
49319026 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.1227594728 |
|
|
Sep 18 07:49:55 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
159677816 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.277616351 |
|
|
Sep 18 07:49:48 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
1598338643 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.3428629138 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
30242498 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.622555537 |
|
|
Sep 18 07:49:50 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
41624287 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.1481924808 |
|
|
Sep 18 07:49:55 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
111111408 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.2191143322 |
|
|
Sep 18 07:49:56 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
47594044 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.148051155 |
|
|
Sep 18 07:49:55 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
30496148 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_17/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.3057038878 |
|
|
Sep 18 07:49:56 PM UTC 24 |
Sep 18 07:49:58 PM UTC 24 |
66409054 ps |