| T326 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.4126441619 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
46634335 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.2910052506 |
|
|
Oct 09 09:04:40 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
42568170 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.2110040110 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
33386935 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.639960771 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
66407114 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.2842739777 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
31687536 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.1141705792 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
51277060 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.347171764 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
81143557 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.985862628 |
|
|
Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
57010449 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.3637950466 |
|
|
Oct 09 09:04:40 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
66175684 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.1852842806 |
|
|
Oct 09 09:04:51 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
39747294 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.2528720959 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
84581075 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.1452892734 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
116001096 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.88585423 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
128365875 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.3653035241 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
55300836 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.1522315581 |
|
|
Oct 09 09:04:39 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
1659940653 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.3736075157 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
50272292 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.718158807 |
|
|
Oct 09 09:04:38 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
993994300 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.3128308050 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
27504474 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.3270551115 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
148530990 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.3851963709 |
|
|
Oct 09 09:04:34 PM UTC 24 |
Oct 09 09:04:43 PM UTC 24 |
4673205033 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.3053685654 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
118459934 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2331372617 |
|
|
Oct 09 09:04:40 PM UTC 24 |
Oct 09 09:04:44 PM UTC 24 |
1365229542 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.2639319245 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:44 PM UTC 24 |
359235636 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.2968684122 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:48 PM UTC 24 |
129927992 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.1219229355 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
49350803 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.1061826072 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
47227185 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.887497019 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
67228593 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.2001934963 |
|
|
Oct 09 09:04:42 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
86243133 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.2017097789 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
211536908 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all_with_rand_reset.858352414 |
|
|
Oct 09 09:04:27 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
4763351020 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1179881782 |
|
|
Oct 09 09:04:40 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
808039136 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.1835885341 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
134297674 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.1851279203 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
219752248 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.3749721355 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
44864357 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.1672970232 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
37090177 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.35709920 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
58813595 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.906369870 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
432999554 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.3665750165 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
172427546 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all_with_rand_reset.746664782 |
|
|
Oct 09 09:04:29 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
7348755015 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.2789473075 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:45 PM UTC 24 |
46313897 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.2077797008 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:46 PM UTC 24 |
278190729 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1908348957 |
|
|
Oct 09 09:04:42 PM UTC 24 |
Oct 09 09:04:46 PM UTC 24 |
2046328245 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.3871629879 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:46 PM UTC 24 |
1385012964 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.4214213730 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
34762400 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.4151689297 |
|
|
Oct 09 09:04:41 PM UTC 24 |
Oct 09 09:04:49 PM UTC 24 |
1865868317 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.1172060143 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
121340559 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.3682309276 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
89242167 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.3044828362 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
29819387 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.3834885807 |
|
|
Oct 09 09:04:44 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
147519165 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.389583814 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
64979032 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.88509029 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
124709270 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.2218276450 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
208211652 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.544381656 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
246112989 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.2313733345 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:47 PM UTC 24 |
113779998 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.260150517 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:48 PM UTC 24 |
62132021 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.427433287 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:48 PM UTC 24 |
158641513 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1265431741 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:48 PM UTC 24 |
885507012 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2785127463 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:48 PM UTC 24 |
1753652185 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.236848635 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:48 PM UTC 24 |
829228633 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.1157249090 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:49 PM UTC 24 |
2564838169 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2072520892 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:49 PM UTC 24 |
1141520377 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.1692456484 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:49 PM UTC 24 |
929851867 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.4218574505 |
|
|
Oct 09 09:04:37 PM UTC 24 |
Oct 09 09:04:49 PM UTC 24 |
7280937167 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1733268469 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:49 PM UTC 24 |
1014391442 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.3649291453 |
|
|
Oct 09 09:04:43 PM UTC 24 |
Oct 09 09:04:50 PM UTC 24 |
3761960286 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.2200648358 |
|
|
Oct 09 09:04:39 PM UTC 24 |
Oct 09 09:04:54 PM UTC 24 |
7348466708 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.179460106 |
|
|
Oct 09 09:04:51 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
56928898 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.1803068107 |
|
|
Oct 09 09:04:51 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
125831975 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.737686564 |
|
|
Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
33422125 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.2360439642 |
|
|
Oct 09 09:04:51 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
65303375 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.3166128151 |
|
|
Oct 09 09:05:17 PM UTC 24 |
Oct 09 09:05:27 PM UTC 24 |
78268426 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.2823097419 |
|
|
Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
68727724 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.2265091480 |
|
|
Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
63265374 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.647560002 |
|
|
Oct 09 09:04:51 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
204799335 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.2617227570 |
|
|
Oct 09 09:04:51 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
199899159 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.1120636450 |
|
|
Oct 09 09:04:51 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
120490962 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.188194656 |
|
|
Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
81877168 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.1150665991 |
|
|
Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:56 PM UTC 24 |
84846443 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.957978084 |
|
|
Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:57 PM UTC 24 |
369498774 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.1173279454 |
|
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Oct 09 09:04:47 PM UTC 24 |
Oct 09 09:04:57 PM UTC 24 |
109829189 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.4271258898 |
|
|
Oct 09 09:04:45 PM UTC 24 |
Oct 09 09:04:59 PM UTC 24 |
4295962145 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.1427305220 |
|
|
Oct 09 09:04:58 PM UTC 24 |
Oct 09 09:05:01 PM UTC 24 |
40075572 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.1696887733 |
|
|
Oct 09 09:04:58 PM UTC 24 |
Oct 09 09:05:01 PM UTC 24 |
110131484 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.3747020813 |
|
|
Oct 09 09:04:49 PM UTC 24 |
Oct 09 09:05:01 PM UTC 24 |
29896680 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.1459590335 |
|
|
Oct 09 09:04:49 PM UTC 24 |
Oct 09 09:05:01 PM UTC 24 |
137606062 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.343202899 |
|
|
Oct 09 09:04:49 PM UTC 24 |
Oct 09 09:05:01 PM UTC 24 |
57364870 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.3270867815 |
|
|
Oct 09 09:04:49 PM UTC 24 |
Oct 09 09:05:01 PM UTC 24 |
113351411 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.480127199 |
|
|
Oct 09 09:05:01 PM UTC 24 |
Oct 09 09:05:06 PM UTC 24 |
88318135 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.2596612776 |
|
|
Oct 09 09:04:58 PM UTC 24 |
Oct 09 09:05:07 PM UTC 24 |
30386053 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.3085947273 |
|
|
Oct 09 09:05:02 PM UTC 24 |
Oct 09 09:05:11 PM UTC 24 |
32203205 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.370355100 |
|
|
Oct 09 09:05:02 PM UTC 24 |
Oct 09 09:05:11 PM UTC 24 |
39129682 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.3254674103 |
|
|
Oct 09 09:04:56 PM UTC 24 |
Oct 09 09:05:11 PM UTC 24 |
31022067 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.1251961044 |
|
|
Oct 09 09:04:49 PM UTC 24 |
Oct 09 09:05:11 PM UTC 24 |
45155050 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.548063341 |
|
|
Oct 09 09:05:02 PM UTC 24 |
Oct 09 09:05:12 PM UTC 24 |
69034128 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.260974147 |
|
|
Oct 09 09:04:49 PM UTC 24 |
Oct 09 09:05:12 PM UTC 24 |
36088167 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.3479956251 |
|
|
Oct 09 09:04:56 PM UTC 24 |
Oct 09 09:05:12 PM UTC 24 |
1019924772 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.2842249251 |
|
|
Oct 09 09:05:02 PM UTC 24 |
Oct 09 09:05:12 PM UTC 24 |
1232218356 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1931016356 |
|
|
Oct 09 09:04:50 PM UTC 24 |
Oct 09 09:05:13 PM UTC 24 |
1310641416 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.3421794772 |
|
|
Oct 09 09:05:13 PM UTC 24 |
Oct 09 09:05:16 PM UTC 24 |
50215086 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.2128559680 |
|
|
Oct 09 09:05:13 PM UTC 24 |
Oct 09 09:05:16 PM UTC 24 |
43922213 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.1019177366 |
|
|
Oct 09 09:05:13 PM UTC 24 |
Oct 09 09:05:16 PM UTC 24 |
114028152 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.294637788 |
|
|
Oct 09 09:05:14 PM UTC 24 |
Oct 09 09:05:16 PM UTC 24 |
76616256 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.1451472033 |
|
|
Oct 09 09:05:13 PM UTC 24 |
Oct 09 09:05:16 PM UTC 24 |
390532167 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.1060845440 |
|
|
Oct 09 09:04:58 PM UTC 24 |
Oct 09 09:05:16 PM UTC 24 |
89045927 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.3707601264 |
|
|
Oct 09 09:05:02 PM UTC 24 |
Oct 09 09:05:16 PM UTC 24 |
2438592097 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.3453194701 |
|
|
Oct 09 09:04:58 PM UTC 24 |
Oct 09 09:05:17 PM UTC 24 |
51952371 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.952661478 |
|
|
Oct 09 09:05:07 PM UTC 24 |
Oct 09 09:05:17 PM UTC 24 |
300734774 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.2363067225 |
|
|
Oct 09 09:04:58 PM UTC 24 |
Oct 09 09:05:17 PM UTC 24 |
323981732 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.1853955529 |
|
|
Oct 09 09:05:07 PM UTC 24 |
Oct 09 09:05:17 PM UTC 24 |
303483918 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2319385053 |
|
|
Oct 09 09:04:58 PM UTC 24 |
Oct 09 09:05:18 PM UTC 24 |
1242361504 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3369968854 |
|
|
Oct 09 09:05:12 PM UTC 24 |
Oct 09 09:05:19 PM UTC 24 |
942286808 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.4226380788 |
|
|
Oct 09 09:05:17 PM UTC 24 |
Oct 09 09:05:20 PM UTC 24 |
30758545 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.1779086 |
|
|
Oct 09 09:05:18 PM UTC 24 |
Oct 09 09:05:21 PM UTC 24 |
139927702 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.3778717808 |
|
|
Oct 09 09:05:18 PM UTC 24 |
Oct 09 09:05:21 PM UTC 24 |
310890526 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.4116929396 |
|
|
Oct 09 09:05:16 PM UTC 24 |
Oct 09 09:05:21 PM UTC 24 |
133319479 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.2459152203 |
|
|
Oct 09 09:05:16 PM UTC 24 |
Oct 09 09:05:21 PM UTC 24 |
191086441 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2707610046 |
|
|
Oct 09 09:05:18 PM UTC 24 |
Oct 09 09:05:22 PM UTC 24 |
1016731236 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.2201600904 |
|
|
Oct 09 09:05:16 PM UTC 24 |
Oct 09 09:05:23 PM UTC 24 |
1880736870 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.1043650200 |
|
|
Oct 09 09:05:22 PM UTC 24 |
Oct 09 09:05:24 PM UTC 24 |
36282720 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.861298856 |
|
|
Oct 09 09:05:21 PM UTC 24 |
Oct 09 09:05:26 PM UTC 24 |
49124062 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.4176218210 |
|
|
Oct 09 09:05:21 PM UTC 24 |
Oct 09 09:05:26 PM UTC 24 |
68141678 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.2673613952 |
|
|
Oct 09 09:05:21 PM UTC 24 |
Oct 09 09:05:26 PM UTC 24 |
119610471 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.3646100160 |
|
|
Oct 09 09:05:21 PM UTC 24 |
Oct 09 09:05:26 PM UTC 24 |
57712532 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.2064138776 |
|
|
Oct 09 09:05:21 PM UTC 24 |
Oct 09 09:05:26 PM UTC 24 |
115951157 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.261025563 |
|
|
Oct 09 09:05:21 PM UTC 24 |
Oct 09 09:05:26 PM UTC 24 |
106816916 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.812986869 |
|
|
Oct 09 09:05:24 PM UTC 24 |
Oct 09 09:05:26 PM UTC 24 |
220671831 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.97995480 |
|
|
Oct 09 09:05:12 PM UTC 24 |
Oct 09 09:05:27 PM UTC 24 |
53523622 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.2565391391 |
|
|
Oct 09 09:05:17 PM UTC 24 |
Oct 09 09:05:27 PM UTC 24 |
212695546 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.4276228176 |
|
|
Oct 09 09:05:24 PM UTC 24 |
Oct 09 09:05:27 PM UTC 24 |
434863005 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.4130422832 |
|
|
Oct 09 09:05:17 PM UTC 24 |
Oct 09 09:05:27 PM UTC 24 |
345257186 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.3465890639 |
|
|
Oct 09 09:05:28 PM UTC 24 |
Oct 09 09:05:31 PM UTC 24 |
38630754 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.1426954580 |
|
|
Oct 09 09:05:28 PM UTC 24 |
Oct 09 09:05:31 PM UTC 24 |
67264063 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.1080230907 |
|
|
Oct 09 09:05:28 PM UTC 24 |
Oct 09 09:05:31 PM UTC 24 |
192954314 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.4188762195 |
|
|
Oct 09 09:05:28 PM UTC 24 |
Oct 09 09:05:33 PM UTC 24 |
411178340 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.2005875006 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
56282571 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.3820530621 |
|
|
Oct 09 09:06:06 PM UTC 24 |
Oct 09 09:06:11 PM UTC 24 |
32176482 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.1349359635 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
30232329 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.3431042575 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
81295981 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.1346720868 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
33404527 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.165543918 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
113660317 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.360369152 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
51982054 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.51514065 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
44440068 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.2513819054 |
|
|
Oct 09 09:05:56 PM UTC 24 |
Oct 09 09:06:07 PM UTC 24 |
5860812148 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.3561513657 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:36 PM UTC 24 |
161667484 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.260976939 |
|
|
Oct 09 09:05:21 PM UTC 24 |
Oct 09 09:05:41 PM UTC 24 |
5142664763 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.226931759 |
|
|
Oct 09 09:05:36 PM UTC 24 |
Oct 09 09:05:41 PM UTC 24 |
85878547 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.725243997 |
|
|
Oct 09 09:05:36 PM UTC 24 |
Oct 09 09:05:41 PM UTC 24 |
60882391 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.2912526440 |
|
|
Oct 09 09:05:36 PM UTC 24 |
Oct 09 09:05:41 PM UTC 24 |
31761638 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.3039305479 |
|
|
Oct 09 09:05:36 PM UTC 24 |
Oct 09 09:05:41 PM UTC 24 |
518883856 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.2694760170 |
|
|
Oct 09 09:05:36 PM UTC 24 |
Oct 09 09:05:41 PM UTC 24 |
108232038 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3491592390 |
|
|
Oct 09 09:05:27 PM UTC 24 |
Oct 09 09:05:43 PM UTC 24 |
1494387828 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.1725330146 |
|
|
Oct 09 09:05:22 PM UTC 24 |
Oct 09 09:05:45 PM UTC 24 |
1177502404 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.2309569824 |
|
|
Oct 09 09:05:41 PM UTC 24 |
Oct 09 09:05:46 PM UTC 24 |
58268555 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.2548703602 |
|
|
Oct 09 09:05:41 PM UTC 24 |
Oct 09 09:05:46 PM UTC 24 |
382828350 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.3197771701 |
|
|
Oct 09 09:05:36 PM UTC 24 |
Oct 09 09:05:48 PM UTC 24 |
5723656774 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.2503880349 |
|
|
Oct 09 09:05:36 PM UTC 24 |
Oct 09 09:05:48 PM UTC 24 |
2617757182 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.2438526905 |
|
|
Oct 09 09:05:47 PM UTC 24 |
Oct 09 09:05:55 PM UTC 24 |
108360825 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.2949802280 |
|
|
Oct 09 09:05:51 PM UTC 24 |
Oct 09 09:05:56 PM UTC 24 |
48653288 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.515279757 |
|
|
Oct 09 09:05:51 PM UTC 24 |
Oct 09 09:05:56 PM UTC 24 |
201457054 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.3304492282 |
|
|
Oct 09 09:05:43 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
97152758 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.1268164940 |
|
|
Oct 09 09:05:38 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
38406979 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.819291040 |
|
|
Oct 09 09:05:38 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
116645317 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.3064270979 |
|
|
Oct 09 09:05:38 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
85654280 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.1063948596 |
|
|
Oct 09 09:05:35 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
48978192 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.2751991008 |
|
|
Oct 09 09:05:38 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
71443338 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.1959971195 |
|
|
Oct 09 09:05:38 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
411005177 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.2208590540 |
|
|
Oct 09 09:05:52 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
71190662 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.1707682689 |
|
|
Oct 09 09:05:34 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
207417566 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.1711273066 |
|
|
Oct 09 09:05:45 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
83509150 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.3518365990 |
|
|
Oct 09 09:05:42 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
27829943 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.413420617 |
|
|
Oct 09 09:05:52 PM UTC 24 |
Oct 09 09:05:57 PM UTC 24 |
112539000 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.2370292320 |
|
|
Oct 09 09:05:45 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
189535512 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3845541506 |
|
|
Oct 09 09:05:47 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
811533139 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.2619576109 |
|
|
Oct 09 09:05:26 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
56531001 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.3534445663 |
|
|
Oct 09 09:05:49 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
40649043 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.3601265929 |
|
|
Oct 09 09:05:56 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
48194864 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.3839672462 |
|
|
Oct 09 09:05:42 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
93479151 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.697150779 |
|
|
Oct 09 09:05:49 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
439511640 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.1922919318 |
|
|
Oct 09 09:05:42 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
147389534 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2496400208 |
|
|
Oct 09 09:05:38 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
1063953219 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.3700851821 |
|
|
Oct 09 09:05:42 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
82249133 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2172673158 |
|
|
Oct 09 09:05:38 PM UTC 24 |
Oct 09 09:05:58 PM UTC 24 |
808030155 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.4163365777 |
|
|
Oct 09 09:05:47 PM UTC 24 |
Oct 09 09:05:59 PM UTC 24 |
28786663 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.3186063007 |
|
|
Oct 09 09:05:47 PM UTC 24 |
Oct 09 09:05:59 PM UTC 24 |
175889853 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.4251897113 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:00 PM UTC 24 |
54132424 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.1194055121 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:00 PM UTC 24 |
350079036 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.998162479 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:00 PM UTC 24 |
90047584 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.2225229953 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
35601816 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.1084290645 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
42668122 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.3199922303 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
50018025 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.1408749316 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
673389450 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.3438898252 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
59675749 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.1849929899 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
114478569 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.2606924471 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
29231943 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.3970763079 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
60008935 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.1653502385 |
|
|
Oct 09 09:05:42 PM UTC 24 |
Oct 09 09:06:01 PM UTC 24 |
712952585 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.479740038 |
|
|
Oct 09 09:05:56 PM UTC 24 |
Oct 09 09:06:02 PM UTC 24 |
514826303 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.1175783127 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:02 PM UTC 24 |
977098669 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.3901884513 |
|
|
Oct 09 09:05:42 PM UTC 24 |
Oct 09 09:06:04 PM UTC 24 |
4736514488 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.707243234 |
|
|
Oct 09 09:06:06 PM UTC 24 |
Oct 09 09:06:08 PM UTC 24 |
230481856 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.1618423331 |
|
|
Oct 09 09:05:56 PM UTC 24 |
Oct 09 09:06:05 PM UTC 24 |
63406809 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.809826446 |
|
|
Oct 09 09:05:56 PM UTC 24 |
Oct 09 09:06:06 PM UTC 24 |
513691479 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.3574150579 |
|
|
Oct 09 09:05:56 PM UTC 24 |
Oct 09 09:06:06 PM UTC 24 |
186393452 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.896291473 |
|
|
Oct 09 09:05:47 PM UTC 24 |
Oct 09 09:06:06 PM UTC 24 |
114586990 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.1190816813 |
|
|
Oct 09 09:06:06 PM UTC 24 |
Oct 09 09:06:11 PM UTC 24 |
126826320 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3703684560 |
|
|
Oct 09 09:05:47 PM UTC 24 |
Oct 09 09:06:08 PM UTC 24 |
888530242 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.819727910 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:10 PM UTC 24 |
182539702 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.3109011187 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:11 PM UTC 24 |
113015334 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.3084772282 |
|
|
Oct 09 09:06:08 PM UTC 24 |
Oct 09 09:06:11 PM UTC 24 |
134737162 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.1278506284 |
|
|
Oct 09 09:06:14 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
71252937 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.964759208 |
|
|
Oct 09 09:06:08 PM UTC 24 |
Oct 09 09:06:11 PM UTC 24 |
98600236 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.2293373781 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:11 PM UTC 24 |
235913526 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.305672574 |
|
|
Oct 09 09:06:06 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
314729038 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.513143369 |
|
|
Oct 09 09:06:03 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
46052036 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.2467557899 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
430585726 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.843990658 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
43125817 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.479888036 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
33238953 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.699580407 |
|
|
Oct 09 09:06:03 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
187148765 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.282651858 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
53705317 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.2708816311 |
|
|
Oct 09 09:06:03 PM UTC 24 |
Oct 09 09:06:12 PM UTC 24 |
248671902 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2775835702 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:13 PM UTC 24 |
882612287 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.2807041250 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:14 PM UTC 24 |
3858213216 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.437074030 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:14 PM UTC 24 |
759699454 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2030706650 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:14 PM UTC 24 |
827087398 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.969153292 |
|
|
Oct 09 09:06:07 PM UTC 24 |
Oct 09 09:06:15 PM UTC 24 |
55596162 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.1809174609 |
|
|
Oct 09 09:06:03 PM UTC 24 |
Oct 09 09:06:16 PM UTC 24 |
55649102 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.3443449089 |
|
|
Oct 09 09:06:03 PM UTC 24 |
Oct 09 09:06:16 PM UTC 24 |
70576147 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.1235396337 |
|
|
Oct 09 09:06:03 PM UTC 24 |
Oct 09 09:06:16 PM UTC 24 |
162840894 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.374922998 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:16 PM UTC 24 |
27275071 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.3720893960 |
|
|
Oct 09 09:06:01 PM UTC 24 |
Oct 09 09:06:16 PM UTC 24 |
41680070 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.814066731 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:17 PM UTC 24 |
37632413 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.2702196237 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:19 PM UTC 24 |
847501297 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.1544218763 |
|
|
Oct 09 09:06:16 PM UTC 24 |
Oct 09 09:06:21 PM UTC 24 |
205337859 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.4059141962 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:21 PM UTC 24 |
59647505 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.2688901166 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:21 PM UTC 24 |
68172629 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.3386615903 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:21 PM UTC 24 |
84660394 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.1005908991 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:21 PM UTC 24 |
149980867 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.2285061441 |
|
|
Oct 09 09:06:03 PM UTC 24 |
Oct 09 09:06:22 PM UTC 24 |
34875037 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.3144947982 |
|
|
Oct 09 09:06:01 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
86368540 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.3810203721 |
|
|
Oct 09 09:06:24 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
210576255 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.3876130898 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
52383356 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.997163878 |
|
|
Oct 09 09:06:17 PM UTC 24 |
Oct 09 09:06:22 PM UTC 24 |
66608792 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.1175004745 |
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Oct 09 09:06:20 PM UTC 24 |
Oct 09 09:06:22 PM UTC 24 |
43290809 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1001551789 |
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Oct 09 09:06:17 PM UTC 24 |
Oct 09 09:06:22 PM UTC 24 |
60567603 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.103646545 |
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Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:22 PM UTC 24 |
31735172 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.311378102 |
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Oct 09 09:06:17 PM UTC 24 |
Oct 09 09:06:22 PM UTC 24 |
41334335 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.1830646436 |
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Oct 09 09:06:17 PM UTC 24 |
Oct 09 09:06:22 PM UTC 24 |
100489087 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.619707108 |
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Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:23 PM UTC 24 |
600854465 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.2311849171 |
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Oct 09 09:06:21 PM UTC 24 |
Oct 09 09:06:23 PM UTC 24 |
47177849 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.2389112464 |
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Oct 09 09:06:21 PM UTC 24 |
Oct 09 09:06:23 PM UTC 24 |
33944032 ps |