| T560 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.1347641227 |
|
|
Oct 09 09:06:21 PM UTC 24 |
Oct 09 09:06:23 PM UTC 24 |
89555198 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.3199784867 |
|
|
Oct 09 09:06:21 PM UTC 24 |
Oct 09 09:06:23 PM UTC 24 |
189792097 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.158477125 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:23 PM UTC 24 |
102129460 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.1582245055 |
|
|
Oct 09 09:06:01 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
117996986 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.1361577424 |
|
|
Oct 09 09:06:21 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
211967362 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.4040333255 |
|
|
Oct 09 09:06:01 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
144260850 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.2305190874 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
30882863 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.3579247248 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
537798812 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.1026427540 |
|
|
Oct 09 09:06:01 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
327112152 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.2319159681 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
5255628045 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1753059758 |
|
|
Oct 09 09:06:11 PM UTC 24 |
Oct 09 09:06:24 PM UTC 24 |
794346885 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.2834163941 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
47795738 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.317843014 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
442636601 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.3556011605 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
112465923 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.2307739724 |
|
|
Oct 09 09:06:17 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
3008183350 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.255143141 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
411160690 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.2387143855 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
48969847 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.368263023 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
77202484 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.3665612061 |
|
|
Oct 09 09:06:37 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
24629015 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.234132083 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
20031063 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.2854062562 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
47210873 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.2869501431 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
95197241 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.2364262576 |
|
|
Oct 09 09:06:24 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
88651501 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.3929704495 |
|
|
Oct 09 09:06:24 PM UTC 24 |
Oct 09 09:06:26 PM UTC 24 |
175500268 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.1465236476 |
|
|
Oct 09 09:06:02 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
70606821 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.3036328709 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
67943033 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.4024221570 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
31894291 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.4196570488 |
|
|
Oct 09 09:06:24 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
30697972 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.3792312692 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
64945694 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.2366102374 |
|
|
Oct 09 09:06:15 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
70235456 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.383870738 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
132718541 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.4006843869 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
99057299 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.3368147294 |
|
|
Oct 09 09:06:15 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
37116203 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.3650245811 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
165225714 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.2872769934 |
|
|
Oct 09 09:06:02 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
38307074 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.3182660949 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
45196729 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.3855358447 |
|
|
Oct 09 09:06:15 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
136140887 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.2099376674 |
|
|
Oct 09 09:06:13 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
261871848 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.2690045424 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
402188176 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.890566812 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
206673131 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1456779995 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
133616879 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.2046031197 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:27 PM UTC 24 |
751063693 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.1737782103 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
50333655 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.1319797585 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
37842967 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2361916782 |
|
|
Oct 09 09:06:01 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
1577089908 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3432351475 |
|
|
Oct 09 09:06:02 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
1820309592 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.993153758 |
|
|
Oct 09 09:06:14 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
1120321189 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.2509485459 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
125678156 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1129711531 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
925174809 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.25166950 |
|
|
Oct 09 09:06:00 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
2181651159 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.4205943865 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:28 PM UTC 24 |
195086804 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1473918 |
|
|
Oct 09 09:06:25 PM UTC 24 |
Oct 09 09:06:29 PM UTC 24 |
797972473 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2556627649 |
|
|
Oct 09 09:05:58 PM UTC 24 |
Oct 09 09:06:29 PM UTC 24 |
930608071 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2351275531 |
|
|
Oct 09 09:06:14 PM UTC 24 |
Oct 09 09:06:29 PM UTC 24 |
797608069 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3315290372 |
|
|
Oct 09 09:06:12 PM UTC 24 |
Oct 09 09:06:29 PM UTC 24 |
907049906 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.754910800 |
|
|
Oct 09 09:06:17 PM UTC 24 |
Oct 09 09:06:29 PM UTC 24 |
2343193667 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.450845224 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:30 PM UTC 24 |
993354424 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.92422014 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:30 PM UTC 24 |
2773280198 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.1969624158 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:30 PM UTC 24 |
113698224 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.2220614857 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
24634188 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.3480222020 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
79731635 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.2303311018 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
223273780 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.2934010407 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
69648169 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.524930986 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
50792395 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.1770584181 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
39208386 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.1062761302 |
|
|
Oct 09 09:06:26 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
54888837 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.3834802780 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
131410585 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.1656627175 |
|
|
Oct 09 09:06:26 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
57476273 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.1070665098 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:31 PM UTC 24 |
36212001 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.4026762514 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
43858105 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.263778110 |
|
|
Oct 09 09:06:26 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
171716984 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.2882471766 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
29357373 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.3687463066 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
23837974 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.4261830241 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
41663038 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.3621687135 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
36144245 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.2250915060 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
182657711 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.2363583934 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
91529732 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.2363957544 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
420450689 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.861552982 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
55311900 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.3415859365 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
50805061 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.2920354326 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
107080346 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.1468194658 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
158755153 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.1136218529 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
180304058 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.742937586 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:32 PM UTC 24 |
73130651 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.1567239854 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
54033195 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.3095847961 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
30711539 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.1357513546 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
48572438 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.3672956188 |
|
|
Oct 09 09:06:27 PM UTC 24 |
Oct 09 09:06:34 PM UTC 24 |
1468814307 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4203521351 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
1300188745 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.930183099 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
228453557 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.1166926892 |
|
|
Oct 09 09:06:27 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
28201207 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.1656698708 |
|
|
Oct 09 09:06:27 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
74272889 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.884424104 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
98900945 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.903965031 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
181481886 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.1879507484 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
185563662 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.51712567 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
43959398 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.343855433 |
|
|
Oct 09 09:06:31 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
120204478 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3273506292 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
1544060425 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.3728415662 |
|
|
Oct 09 09:06:31 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
47603564 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.221696742 |
|
|
Oct 09 09:06:27 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
135058388 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3294428614 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:33 PM UTC 24 |
1020908710 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.1139886294 |
|
|
Oct 09 09:06:05 PM UTC 24 |
Oct 09 09:06:34 PM UTC 24 |
3395804870 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.3979313583 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:34 PM UTC 24 |
70112971 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.253482099 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:34 PM UTC 24 |
29431057 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.650818302 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:34 PM UTC 24 |
36024443 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.2140324906 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:34 PM UTC 24 |
72302486 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.1774679736 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:34 PM UTC 24 |
94160422 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.328133793 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
1168890423 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.1824449334 |
|
|
Oct 09 09:06:27 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
1504589784 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.3720988676 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
153731113 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.2520114223 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
59906446 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.3806556253 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
211728675 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.830979142 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
121314087 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.1412450337 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
962656100 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.65547545 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
876845601 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.1406655916 |
|
|
Oct 09 09:06:23 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
7108756059 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1531460586 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:35 PM UTC 24 |
1925417162 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.726738472 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
43852163 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.3355130395 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
46770831 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.2925537659 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
58856977 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.3850608898 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
4507602985 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.2997973857 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
139177915 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2156332361 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
999839314 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.3795174053 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
233391645 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.346009134 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
30627873 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.2287602535 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
58349187 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.2659862785 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
109616034 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.149743379 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
42886238 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.752679324 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:36 PM UTC 24 |
244151992 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.852914947 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
60890780 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.359477870 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
254219804 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.3391836395 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
110838446 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.1512729422 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
53792021 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.2131952735 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
42121069 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.46467248 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
72619752 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.822384040 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
109875612 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.925469691 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:37 PM UTC 24 |
889237122 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.3118900943 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:38 PM UTC 24 |
329310033 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.3317624444 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:38 PM UTC 24 |
22103291 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.435082453 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:38 PM UTC 24 |
32221876 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.1869607300 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:38 PM UTC 24 |
82145410 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.1237392455 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:38 PM UTC 24 |
181143226 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.1676590653 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:38 PM UTC 24 |
148480668 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.131670274 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:39 PM UTC 24 |
209151759 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.581218852 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:39 PM UTC 24 |
861638139 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2890500234 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:39 PM UTC 24 |
1165244738 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.4116501320 |
|
|
Oct 09 09:06:33 PM UTC 24 |
Oct 09 09:06:40 PM UTC 24 |
1278750922 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.192331217 |
|
|
Oct 09 09:06:34 PM UTC 24 |
Oct 09 09:06:40 PM UTC 24 |
1271269513 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2459257643 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
826059951 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.71908881 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
29939574 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.860006261 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
50624615 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.2821446546 |
|
|
Oct 09 09:06:28 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
9037667676 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.3138476289 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
33335525 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.2618651774 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
120522843 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.2340747331 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
38345689 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.3192009462 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
235299825 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.2840054353 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
65219342 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.1853796376 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
86530008 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.133510086 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
91612892 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.2528884682 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:41 PM UTC 24 |
402708309 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.2526124755 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
30351912 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.3047166428 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
93498513 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.159540301 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
608078954 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.1640967121 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
114670132 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.2109201517 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
50409932 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.249710810 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
220418483 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.2875880929 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
24763582 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.737351522 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
76439834 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.1706879668 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
72867026 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.3851386004 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
41680214 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.1850853832 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
262220864 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.3522531038 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
194816573 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.2795314300 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
111774210 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.196657279 |
|
|
Oct 09 09:06:37 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
377805796 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.1298508599 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
151769215 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.624722791 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
184767044 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1811731041 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
53982029 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.965456020 |
|
|
Oct 09 09:06:37 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
112101970 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.70579886 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
211670533 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.3679173929 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:42 PM UTC 24 |
73411222 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.1228386237 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:43 PM UTC 24 |
257975410 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.2721815142 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:43 PM UTC 24 |
172824881 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.3179247565 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:43 PM UTC 24 |
69906559 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.3538634606 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:43 PM UTC 24 |
89632419 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.1518590101 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:43 PM UTC 24 |
152382530 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.344010397 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:43 PM UTC 24 |
80708446 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3871823993 |
|
|
Oct 09 09:06:37 PM UTC 24 |
Oct 09 09:06:44 PM UTC 24 |
1002576553 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3432230845 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:44 PM UTC 24 |
823679452 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.3646379578 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:44 PM UTC 24 |
701613354 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.571326928 |
|
|
Oct 09 09:06:46 PM UTC 24 |
Oct 09 09:06:52 PM UTC 24 |
440010498 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1694051048 |
|
|
Oct 09 09:06:39 PM UTC 24 |
Oct 09 09:06:44 PM UTC 24 |
819381214 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.1067097991 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:44 PM UTC 24 |
1341127540 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.3601973169 |
|
|
Oct 09 09:06:36 PM UTC 24 |
Oct 09 09:06:44 PM UTC 24 |
3855247779 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.2062394987 |
|
|
Oct 09 09:06:30 PM UTC 24 |
Oct 09 09:06:45 PM UTC 24 |
3171390753 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.447077493 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:45 PM UTC 24 |
818635002 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1800840803 |
|
|
Oct 09 09:06:37 PM UTC 24 |
Oct 09 09:06:45 PM UTC 24 |
876034853 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.3582442162 |
|
|
Oct 09 09:06:40 PM UTC 24 |
Oct 09 09:06:45 PM UTC 24 |
2103072820 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.42484541 |
|
|
Oct 09 09:06:38 PM UTC 24 |
Oct 09 09:06:45 PM UTC 24 |
10732233305 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.1332415362 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
59324047 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.4257504523 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
285064999 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_global_esc.4188416598 |
|
|
Oct 09 09:06:48 PM UTC 24 |
Oct 09 09:06:52 PM UTC 24 |
74986681 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.1520989531 |
|
|
Oct 09 09:06:46 PM UTC 24 |
Oct 09 09:06:52 PM UTC 24 |
120149057 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.3677235040 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
45114170 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.3010030488 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
48168773 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.594080093 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
1334421629 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.662929764 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
35655758 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.3857329604 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
51460064 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.3666239278 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
41485369 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.628046575 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
29496845 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.2627625327 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
73595711 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.2994071229 |
|
|
Oct 09 09:06:46 PM UTC 24 |
Oct 09 09:06:52 PM UTC 24 |
49302515 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.2132105739 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:46 PM UTC 24 |
96087901 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.3610740085 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
384332691 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.185854824 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
85411651 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.1223895681 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
208539767 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.1655775593 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
177009314 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.1486467579 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
103074329 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.1904971983 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
45485453 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.3114995478 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
408582639 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.4077951220 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
136251160 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.520702861 |
|
|
Oct 09 09:06:48 PM UTC 24 |
Oct 09 09:06:51 PM UTC 24 |
32128640 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.2209339284 |
|
|
Oct 09 09:06:48 PM UTC 24 |
Oct 09 09:06:51 PM UTC 24 |
143702303 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.1085865469 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
145972566 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.221463859 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
31737353 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.2107882989 |
|
|
Oct 09 09:06:42 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
129685403 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.2248786563 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
368327572 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.302763340 |
|
|
Oct 09 09:06:42 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
110598509 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.2060234503 |
|
|
Oct 09 09:06:42 PM UTC 24 |
Oct 09 09:06:47 PM UTC 24 |
36063368 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.3553972133 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
718235590 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.1584150792 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
54509989 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.2155238270 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
173801045 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.3607970460 |
|
|
Oct 09 09:06:41 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
173882483 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.3591116191 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
38931516 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.601387172 |
|
|
Oct 09 09:06:32 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
4456170223 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.3257215205 |
|
|
Oct 09 09:06:42 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
149217688 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.2331307753 |
|
|
Oct 09 09:06:44 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
79641863 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.2386875334 |
|
|
Oct 09 09:06:42 PM UTC 24 |
Oct 09 09:06:48 PM UTC 24 |
273526283 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.335199968 |
|
|
Oct 09 09:06:42 PM UTC 24 |
Oct 09 09:06:49 PM UTC 24 |
1536329155 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.3006800359 |
|
|
Oct 09 09:06:43 PM UTC 24 |
Oct 09 09:06:49 PM UTC 24 |
787182321 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.224051432 |
|
|
Oct 09 09:06:42 PM UTC 24 |
Oct 09 09:06:50 PM UTC 24 |
905909311 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3932096778 |
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Oct 09 09:06:44 PM UTC 24 |
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1021173759 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4047953484 |
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902796451 ps |
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/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.3278396245 |
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Oct 09 09:06:46 PM UTC 24 |
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32489414 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.1892626778 |
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14704241459 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.228313091 |
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53102466 ps |
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/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.3519496192 |
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/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.2148492606 |
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Oct 09 09:06:48 PM UTC 24 |
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319249870 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.1381365270 |
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Oct 09 09:06:43 PM UTC 24 |
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1638150564 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.622522107 |
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Oct 09 09:06:44 PM UTC 24 |
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2176760832 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.46192084 |
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Oct 09 09:06:46 PM UTC 24 |
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921196929 ps |