| T317 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_disable_rom_integrity_check.1184355583 |
|
|
Oct 12 12:39:48 AM UTC 24 |
Oct 12 12:39:50 AM UTC 24 |
71216163 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.4187118502 |
|
|
Oct 12 12:39:39 AM UTC 24 |
Oct 12 12:39:50 AM UTC 24 |
4527045483 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.1097428238 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:03 AM UTC 24 |
259932592 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.4195107002 |
|
|
Oct 12 12:39:48 AM UTC 24 |
Oct 12 12:39:50 AM UTC 24 |
84391114 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.762118624 |
|
|
Oct 12 12:39:48 AM UTC 24 |
Oct 12 12:39:50 AM UTC 24 |
167109849 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.3354981736 |
|
|
Oct 12 12:39:49 AM UTC 24 |
Oct 12 12:39:50 AM UTC 24 |
68824692 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset.3964498986 |
|
|
Oct 12 12:39:48 AM UTC 24 |
Oct 12 12:39:51 AM UTC 24 |
82261123 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.3690472559 |
|
|
Oct 12 12:39:49 AM UTC 24 |
Oct 12 12:39:51 AM UTC 24 |
74792383 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.1194560167 |
|
|
Oct 12 12:39:49 AM UTC 24 |
Oct 12 12:39:51 AM UTC 24 |
29692498 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_wakeup_race.1486834647 |
|
|
Oct 12 12:39:48 AM UTC 24 |
Oct 12 12:39:51 AM UTC 24 |
782523674 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.3716116077 |
|
|
Oct 12 12:39:49 AM UTC 24 |
Oct 12 12:39:51 AM UTC 24 |
172208919 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.3404284849 |
|
|
Oct 12 12:39:49 AM UTC 24 |
Oct 12 12:39:51 AM UTC 24 |
97938465 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2977002310 |
|
|
Oct 12 12:39:49 AM UTC 24 |
Oct 12 12:39:52 AM UTC 24 |
1186403636 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3411110834 |
|
|
Oct 12 12:39:49 AM UTC 24 |
Oct 12 12:39:52 AM UTC 24 |
748554479 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.1560852152 |
|
|
Oct 12 12:39:48 AM UTC 24 |
Oct 12 12:39:54 AM UTC 24 |
1597984477 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.1827375651 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:03 AM UTC 24 |
349939984 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.2049247102 |
|
|
Oct 12 12:39:44 AM UTC 24 |
Oct 12 12:39:56 AM UTC 24 |
3308408003 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.3386187558 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:56 AM UTC 24 |
67013643 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.3980066102 |
|
|
Oct 12 12:39:54 AM UTC 24 |
Oct 12 12:39:56 AM UTC 24 |
40189219 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.3288114422 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:56 AM UTC 24 |
54476654 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.1034241842 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
69420976 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.1521510735 |
|
|
Oct 12 12:39:54 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
110220351 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.3681845564 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
49581184 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.1340663213 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
49361338 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.2280547158 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:03 AM UTC 24 |
65226809 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.2379853584 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
98409712 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.2707957118 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
25224687 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.4212129527 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
32174992 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.3625699677 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
196846315 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.1632460474 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
213364275 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.2722648517 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
32039238 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.3354634445 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
119923910 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.2004018314 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
206253439 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.2660733504 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
35240361 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.3149059570 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
207903904 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.371255623 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:57 AM UTC 24 |
119096592 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.1246937837 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:58 AM UTC 24 |
53363697 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3256760648 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:59 AM UTC 24 |
891766960 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.234707021 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:59 AM UTC 24 |
875872227 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1800151443 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:39:59 AM UTC 24 |
999071419 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.2488233274 |
|
|
Oct 12 12:39:48 AM UTC 24 |
Oct 12 12:40:01 AM UTC 24 |
2755342229 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.1140874369 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:07 AM UTC 24 |
37698643 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.328254629 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
99786646 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.1278213455 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
258456086 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.2046031695 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
31212383 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.3776120960 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
169149895 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.2321059667 |
|
|
Oct 12 12:40:01 AM UTC 24 |
Oct 12 12:40:03 AM UTC 24 |
100210931 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.1281580357 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
86992640 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.2461453165 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
22571321 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.3461547984 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:07 AM UTC 24 |
41445666 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.2452707951 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
236772653 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.628131246 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:02 AM UTC 24 |
43861331 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.3546997854 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:03 AM UTC 24 |
42824121 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.300596169 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:04 AM UTC 24 |
1015639841 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3815288440 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:04 AM UTC 24 |
1022641753 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.143233012 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:07 AM UTC 24 |
162629957 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.1615681322 |
|
|
Oct 12 12:39:55 AM UTC 24 |
Oct 12 12:40:07 AM UTC 24 |
8022998405 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.3442659107 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:07 AM UTC 24 |
124498766 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.2611154719 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
21825691 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2846789422 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
13394978615 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.3530340860 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
32391563 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.2782560815 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
35324536 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.3596711465 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
211424864 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.284301621 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
41319990 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.1149565134 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
204418291 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.543260270 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
96426721 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.2122369920 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
346911799 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.3215193268 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
64500581 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.955006989 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
92116543 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.2319459530 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
108145891 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.2705835915 |
|
|
Oct 12 12:40:06 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
196167914 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.2986094509 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:08 AM UTC 24 |
335333164 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.1723385613 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:09 AM UTC 24 |
1358999963 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.1635363182 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:09 AM UTC 24 |
1313712934 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1021124341 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:10 AM UTC 24 |
819900028 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.422532756 |
|
|
Oct 12 12:40:05 AM UTC 24 |
Oct 12 12:40:11 AM UTC 24 |
804656733 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.3157935481 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:12 AM UTC 24 |
72759983 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.3159426715 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
106238319 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.3796634929 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:12 AM UTC 24 |
39688708 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset.3372177613 |
|
|
Oct 12 12:40:28 AM UTC 24 |
Oct 12 12:40:30 AM UTC 24 |
97159042 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.4210628752 |
|
|
Oct 12 12:40:00 AM UTC 24 |
Oct 12 12:40:12 AM UTC 24 |
3196535960 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.4150569027 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:12 AM UTC 24 |
394154020 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.1798691030 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:12 AM UTC 24 |
33353241 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.517699406 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:26 AM UTC 24 |
106914316 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.3477627397 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:12 AM UTC 24 |
61652006 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.3509270205 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:12 AM UTC 24 |
256077058 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.3757058015 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
46976910 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_invalid.3646201540 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
44278366 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.2624864696 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
53771781 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_disable_rom_integrity_check.1644263984 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
89871555 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_invalid.1904042396 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
42577524 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset_invalid.1206659877 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
162947396 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.1352263380 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
278397767 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.3742202530 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
141328912 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.2829157270 |
|
|
Oct 12 12:40:11 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
392735599 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.3719191126 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:13 AM UTC 24 |
183712737 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.368161265 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:14 AM UTC 24 |
929255875 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1920643918 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:15 AM UTC 24 |
842014566 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.819300822 |
|
|
Oct 12 12:40:10 AM UTC 24 |
Oct 12 12:40:17 AM UTC 24 |
1614192091 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_smoke.1924116765 |
|
|
Oct 12 12:40:16 AM UTC 24 |
Oct 12 12:40:18 AM UTC 24 |
170675997 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.726495482 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
35054247 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset.3127174440 |
|
|
Oct 12 12:40:16 AM UTC 24 |
Oct 12 12:40:18 AM UTC 24 |
41763276 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.3774797278 |
|
|
Oct 12 12:40:16 AM UTC 24 |
Oct 12 12:40:18 AM UTC 24 |
365140856 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.4228316426 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
30896854 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.1588407873 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
250991690 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.1451386602 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
33051594 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.2951392867 |
|
|
Oct 12 12:40:16 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
201179960 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.156238884 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
67066235 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.2148629672 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
203804491 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.4135963857 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
44610751 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.455967003 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
42455115 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.1447967622 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
164943856 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.705704101 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
55009936 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.3635501164 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
1883672813 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.3001443168 |
|
|
Oct 12 12:40:16 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
258239099 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.3832845256 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:19 AM UTC 24 |
307856350 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.3617327421 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:20 AM UTC 24 |
520806582 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1415392397 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:21 AM UTC 24 |
895630391 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1934609594 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:21 AM UTC 24 |
857384074 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.462060346 |
|
|
Oct 12 12:40:22 AM UTC 24 |
Oct 12 12:40:24 AM UTC 24 |
137357908 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.520330450 |
|
|
Oct 12 12:40:22 AM UTC 24 |
Oct 12 12:40:24 AM UTC 24 |
36905530 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.3426138781 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
30257201 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.1070333667 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
112395524 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.1618260794 |
|
|
Oct 12 12:40:22 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
226163076 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.2165805067 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:26 AM UTC 24 |
717047104 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.3863672576 |
|
|
Oct 12 12:40:22 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
400251363 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.485194648 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
32918470 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.1823996085 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
32123823 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.995668016 |
|
|
Oct 12 12:40:22 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
336804718 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_disable_rom_integrity_check.2447772202 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:25 AM UTC 24 |
85566190 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.110078949 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:26 AM UTC 24 |
256321678 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3344803143 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:27 AM UTC 24 |
1275246046 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.2629612928 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:27 AM UTC 24 |
548201245 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4193590924 |
|
|
Oct 12 12:40:23 AM UTC 24 |
Oct 12 12:40:27 AM UTC 24 |
874584009 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all_with_rand_reset.629250416 |
|
|
Oct 12 12:40:16 AM UTC 24 |
Oct 12 12:40:28 AM UTC 24 |
11960694002 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_aborted_low_power.2151774581 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:30 AM UTC 24 |
59505746 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all.300170858 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:50 AM UTC 24 |
1633798501 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_wakeup_race.658547829 |
|
|
Oct 12 12:40:28 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
319250689 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.2632072825 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
31560719 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.915121334 |
|
|
Oct 12 12:40:28 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
142099670 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3217742775 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:48 AM UTC 24 |
1075367688 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.1904674286 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
30813258 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.2273698445 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
27212008 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.445498331 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
87659337 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.714073895 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
107114235 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.910827240 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
41635621 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_ctrl_config_regwen.3196780768 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
312312600 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.2571660114 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
38373259 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.63848496 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
55762802 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.3603429714 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
380587921 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.1060489972 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
520926118 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup.292639924 |
|
|
Oct 12 12:40:28 AM UTC 24 |
Oct 12 12:40:31 AM UTC 24 |
283984179 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.19127856 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:32 AM UTC 24 |
896176978 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.628923965 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:33 AM UTC 24 |
513320793 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3841744794 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:33 AM UTC 24 |
790899905 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.1875985841 |
|
|
Oct 12 12:40:17 AM UTC 24 |
Oct 12 12:40:34 AM UTC 24 |
4445977642 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.1340811953 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:37 AM UTC 24 |
92405673 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.2031592114 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:37 AM UTC 24 |
30875310 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup_reset.1662976682 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:37 AM UTC 24 |
227924324 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.280578840 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
78538505 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.1728488646 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
156991800 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.1208046157 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
43969100 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.2444337242 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
65275163 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.3469904353 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
72671344 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.2493825290 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
37712179 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.3381716531 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
51509191 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.3332059102 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
108815720 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.3292853122 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
39489067 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.2917120939 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
32826063 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_wakeup.1704179247 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
262727714 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.1584952265 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
322869805 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.2700735746 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
143675170 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.2471547214 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
162276186 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.121990472 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
155250606 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.1631426711 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
425774068 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.1784656744 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:38 AM UTC 24 |
211210866 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.741960170 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:39 AM UTC 24 |
273576209 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3945925137 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:39 AM UTC 24 |
1375817482 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1592870537 |
|
|
Oct 12 12:40:35 AM UTC 24 |
Oct 12 12:40:40 AM UTC 24 |
873133971 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.1226089675 |
|
|
Oct 12 12:40:36 AM UTC 24 |
Oct 12 12:40:42 AM UTC 24 |
1332611676 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.1376951312 |
|
|
Oct 12 12:40:29 AM UTC 24 |
Oct 12 12:40:45 AM UTC 24 |
26698870446 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.1891191612 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:45 AM UTC 24 |
30507278 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.3961618672 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
38555440 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.2827704420 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
23879971 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.3050344560 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
28634098 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.545705598 |
|
|
Oct 12 12:40:43 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
128869642 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.2030627064 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
51267617 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.2441152164 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
166144631 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.2622751741 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
44257616 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_disable_rom_integrity_check.1055558816 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
58532874 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_smoke.4244707246 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
31351271 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1554283465 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:49 AM UTC 24 |
849426280 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_escalation_timeout.4257854407 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
355009331 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.2592684659 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
37595466 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.130281901 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
121484600 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.3436868890 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
48417037 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset.3846501483 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
92817739 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_wakeup_race.1455480907 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
185613885 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.3770692629 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:46 AM UTC 24 |
63587327 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2375446906 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:47 AM UTC 24 |
1478268070 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup.1214238457 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:47 AM UTC 24 |
255561466 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.3853893477 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:47 AM UTC 24 |
69895406 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2875094227 |
|
|
Oct 12 12:40:43 AM UTC 24 |
Oct 12 12:40:47 AM UTC 24 |
880426536 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.673854861 |
|
|
Oct 12 12:40:44 AM UTC 24 |
Oct 12 12:40:51 AM UTC 24 |
1468823910 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.2200796124 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
33868727 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.4114910559 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
60106431 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.168295961 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
161071984 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.1970761094 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
111537093 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.2791436936 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
70891345 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.4103690931 |
|
|
Oct 12 12:40:52 AM UTC 24 |
Oct 12 12:40:53 AM UTC 24 |
38958185 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.4197090869 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:54 AM UTC 24 |
36158877 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.3792580759 |
|
|
Oct 12 12:40:52 AM UTC 24 |
Oct 12 12:40:54 AM UTC 24 |
50621033 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.346535629 |
|
|
Oct 12 12:40:52 AM UTC 24 |
Oct 12 12:40:54 AM UTC 24 |
141007701 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.2076799977 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:54 AM UTC 24 |
128942784 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.3895257497 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:54 AM UTC 24 |
266712279 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.3997485038 |
|
|
Oct 12 12:40:52 AM UTC 24 |
Oct 12 12:40:54 AM UTC 24 |
77616125 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.1394109430 |
|
|
Oct 12 12:40:52 AM UTC 24 |
Oct 12 12:40:54 AM UTC 24 |
68485683 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2752952244 |
|
|
Oct 12 12:40:52 AM UTC 24 |
Oct 12 12:40:55 AM UTC 24 |
2026799732 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.2600964401 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:56 AM UTC 24 |
1565219001 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2004838122 |
|
|
Oct 12 12:40:52 AM UTC 24 |
Oct 12 12:40:56 AM UTC 24 |
761718544 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.3453038340 |
|
|
Oct 12 12:40:51 AM UTC 24 |
Oct 12 12:40:59 AM UTC 24 |
3949663807 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.3159148013 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
45887363 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.1993580880 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
39307258 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.2651121031 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
115271842 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.735934745 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
172518412 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.1873112198 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
61423426 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.4057609035 |
|
|
Oct 12 12:42:17 AM UTC 24 |
Oct 12 12:42:19 AM UTC 24 |
30464753 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.2670342685 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
71656144 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.1332703069 |
|
|
Oct 12 12:42:17 AM UTC 24 |
Oct 12 12:42:19 AM UTC 24 |
41907756 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.2890441308 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
96431729 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_aborted_low_power.2633918966 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:01 AM UTC 24 |
20688212 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.3620858061 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
118023821 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.1925421458 |
|
|
Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
33536412 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.3940115604 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
303089151 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.3853686623 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
101508138 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.1618232167 |
|
|
Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
35836093 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.950333922 |
|
|
Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
158060235 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.3582223281 |
|
|
Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
278666136 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.3553202163 |
|
|
Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
94578274 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.1874973323 |
|
|
Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
48317976 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.2739358500 |
|
|
Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
112280163 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.2383787637 |
|
|
Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
160317988 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.158713514 |
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Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:02 AM UTC 24 |
236820827 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1455837304 |
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Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:03 AM UTC 24 |
993694012 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.169815285 |
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Oct 12 12:41:00 AM UTC 24 |
Oct 12 12:41:03 AM UTC 24 |
1948916251 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.792952029 |
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Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:05 AM UTC 24 |
2477591730 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.2225355571 |
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Oct 12 12:40:59 AM UTC 24 |
Oct 12 12:41:07 AM UTC 24 |
2041247816 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.2504883894 |
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Oct 12 12:41:07 AM UTC 24 |
Oct 12 12:41:09 AM UTC 24 |
115061066 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.2912434648 |
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Oct 12 12:41:07 AM UTC 24 |
Oct 12 12:41:09 AM UTC 24 |
89048146 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.1557770835 |
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Oct 12 12:41:15 AM UTC 24 |
Oct 12 12:41:17 AM UTC 24 |
28538865 ps |