| T799 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.1975669342 |
|
|
Oct 12 12:42:54 AM UTC 24 |
Oct 12 12:42:56 AM UTC 24 |
233201659 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.1897806781 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
165938554 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.2869455493 |
|
|
Oct 12 12:42:54 AM UTC 24 |
Oct 12 12:42:56 AM UTC 24 |
70338768 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_global_esc.4162626215 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
38698319 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.2802296748 |
|
|
Oct 12 12:42:54 AM UTC 24 |
Oct 12 12:42:56 AM UTC 24 |
113502983 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.3223842529 |
|
|
Oct 12 12:42:54 AM UTC 24 |
Oct 12 12:42:56 AM UTC 24 |
31078024 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.891145003 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
53337057 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.2870443716 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
79648499 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.3650712971 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
30444992 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.1534550827 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
39013787 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.3142019034 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
49218704 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_smoke.247635946 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
79540516 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.1505808013 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
376843479 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1070754416 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
221008077 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.104395749 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
111729892 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.588445202 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
31733737 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.1968512014 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
105797783 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.1184163687 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
45389147 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.365862407 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
341938036 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.3037767807 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
38830333 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.810258271 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:57 AM UTC 24 |
66641199 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3154973265 |
|
|
Oct 12 12:42:54 AM UTC 24 |
Oct 12 12:42:58 AM UTC 24 |
1130191448 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.885215125 |
|
|
Oct 12 12:42:54 AM UTC 24 |
Oct 12 12:42:58 AM UTC 24 |
1458339631 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.503978083 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:59 AM UTC 24 |
1145363293 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2240468559 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:42:59 AM UTC 24 |
756727328 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.2630181362 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:43:03 AM UTC 24 |
2041964294 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.1879735960 |
|
|
Oct 12 12:42:43 AM UTC 24 |
Oct 12 12:43:03 AM UTC 24 |
14123180436 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.1395796338 |
|
|
Oct 12 12:42:55 AM UTC 24 |
Oct 12 12:43:08 AM UTC 24 |
8954944280 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.1073628853 |
|
|
Oct 12 12:43:08 AM UTC 24 |
Oct 12 12:43:10 AM UTC 24 |
74929153 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.4029317698 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:10 AM UTC 24 |
213769194 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.2093534461 |
|
|
Oct 12 12:43:08 AM UTC 24 |
Oct 12 12:43:10 AM UTC 24 |
526853762 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.497596825 |
|
|
Oct 12 12:43:08 AM UTC 24 |
Oct 12 12:43:10 AM UTC 24 |
88434226 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.2431875341 |
|
|
Oct 12 12:43:08 AM UTC 24 |
Oct 12 12:43:10 AM UTC 24 |
57056399 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_invalid.353338369 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
67528552 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.2733966280 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:10 AM UTC 24 |
216754510 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.2881585924 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:10 AM UTC 24 |
116470516 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.3536777914 |
|
|
Oct 12 12:43:08 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
255687541 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.4050744878 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
102103909 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.2249234207 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
334641708 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.3295651699 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
92758016 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_escalation_timeout.2898273573 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
399455444 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_glitch.1857813466 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
80702860 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.2215024792 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
277549385 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.3052581279 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
87018479 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.1289032814 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
439989527 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.471781719 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
140374776 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.989707175 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
46954235 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.91937298 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
47928366 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.1981678324 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
114716936 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.3960270403 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
147281361 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.114422532 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
66694084 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.2252869772 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
91696184 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.3685610961 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
42878941 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.618990095 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:11 AM UTC 24 |
33333690 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.905137305 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:12 AM UTC 24 |
96926289 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.13830049 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:12 AM UTC 24 |
979791388 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.2529754006 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:13 AM UTC 24 |
783378920 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3243329667 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:13 AM UTC 24 |
869456444 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.2240857658 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:13 AM UTC 24 |
960617361 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.276887286 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:17 AM UTC 24 |
2755104282 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.2982077830 |
|
|
Oct 12 12:43:09 AM UTC 24 |
Oct 12 12:43:21 AM UTC 24 |
5420547438 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.3877585359 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
61686939 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.703239842 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
279930692 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.2725429259 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
121776126 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_aborted_low_power.4259926183 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
97312778 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.4102079723 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
87137007 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.266016660 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
29682741 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.2443551526 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:24 AM UTC 24 |
29107565 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_disable_rom_integrity_check.2837631577 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
69473875 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.1697676316 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
36647595 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.2961438107 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
38261701 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_wakeup_race.1345650347 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
398811179 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup_reset.2714802598 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
198838281 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.1759366877 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
149070694 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.3805250304 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:25 AM UTC 24 |
183095501 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup.4047578998 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:26 AM UTC 24 |
239415596 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4235933876 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:26 AM UTC 24 |
770981028 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2961016008 |
|
|
Oct 12 12:43:22 AM UTC 24 |
Oct 12 12:43:26 AM UTC 24 |
758493037 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.621068033 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:26 AM UTC 24 |
1021064315 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1629517669 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:26 AM UTC 24 |
757818633 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all.2819844497 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:27 AM UTC 24 |
817520868 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all_with_rand_reset.1441729732 |
|
|
Oct 12 12:43:23 AM UTC 24 |
Oct 12 12:43:31 AM UTC 24 |
4753062813 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.664672150 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
1235413772 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.838206117 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:38 AM UTC 24 |
109526059 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_glitch.1205039894 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:38 AM UTC 24 |
38290184 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_disable_rom_integrity_check.1410570272 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:38 AM UTC 24 |
65023359 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_invalid.2223238148 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
46474719 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset_invalid.4209200350 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
126946880 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_smoke.3610985777 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
29091575 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.3503082289 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
49699169 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_aborted_low_power.4234265578 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
44277327 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.1087455467 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
30511330 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup.3963027735 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
271844374 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup_reset.510601154 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
96044454 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset_invalid.2471580377 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
126193391 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset.260191040 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
93749945 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_global_esc.429070126 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
43742771 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_disable_rom_integrity_check.2772473764 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
128946630 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_glitch.1533361263 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
71881643 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_wakeup_race.3722924006 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
359501513 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_invalid.664965732 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
42736239 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_escalation_timeout.274580524 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
114712339 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_smoke.2577827691 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
56942667 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_wakeup_race.667586128 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
76999602 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup.3617925185 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
119904023 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.3834399174 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
73461810 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset.2497943795 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:39 AM UTC 24 |
258751229 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all.161374502 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:40 AM UTC 24 |
1228235204 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2924602493 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:41 AM UTC 24 |
991222026 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all.849732588 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:41 AM UTC 24 |
1059127075 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3731432111 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:41 AM UTC 24 |
905873701 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all_with_rand_reset.3049042551 |
|
|
Oct 12 12:43:37 AM UTC 24 |
Oct 12 12:43:43 AM UTC 24 |
4175836293 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all_with_rand_reset.1235214214 |
|
|
Oct 12 12:43:36 AM UTC 24 |
Oct 12 12:43:47 AM UTC 24 |
2708917013 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup_reset.3920668781 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:58 AM UTC 24 |
32240253 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset_invalid.103981146 |
|
|
Oct 12 12:43:58 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
98772927 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.2023673730 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:58 AM UTC 24 |
39447896 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_aborted_low_power.412934568 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:58 AM UTC 24 |
108945272 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_global_esc.656419991 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:58 AM UTC 24 |
34209996 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_glitch.1456793861 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
49881080 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_disable_rom_integrity_check.3067061718 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
76663346 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_escalation_timeout.2598506965 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
411393520 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.3623251317 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
75620961 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_invalid.1531093263 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
243813335 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_smoke.1859361524 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
53099368 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset_invalid.3468820568 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
105069513 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_wakeup_race.3595980813 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
91926989 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1338306218 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:01 AM UTC 24 |
1069193702 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.1658053826 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
287836946 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup.4233771966 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
94037598 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_global_esc.267862277 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
27431875 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup_reset.167556754 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
169990906 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset.2539197250 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
403178019 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.2617591168 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
33403078 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_aborted_low_power.333497185 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:43:59 AM UTC 24 |
36679875 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.3936822518 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
83819785 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.3778867208 |
|
|
Oct 12 12:43:58 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
35303109 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1341536541 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
1357056080 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.2738036832 |
|
|
Oct 12 12:43:58 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
339147965 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rstmgr_intersig_mubi.75578720 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
66325871 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_disable_rom_integrity_check.1867124609 |
|
|
Oct 12 12:43:58 AM UTC 24 |
Oct 12 12:44:00 AM UTC 24 |
66962994 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1590179869 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:02 AM UTC 24 |
794954688 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all.2398047607 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:03 AM UTC 24 |
1528826068 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all_with_rand_reset.3206646288 |
|
|
Oct 12 12:43:57 AM UTC 24 |
Oct 12 12:44:12 AM UTC 24 |
3567057458 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_smoke.2135947579 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:13 AM UTC 24 |
56715817 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_invalid.35242902 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:13 AM UTC 24 |
53917251 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup_reset.2611943417 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
146500393 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset.1368068375 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
40174769 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup.318419979 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
202985205 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_global_esc.540455208 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
56321589 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.2633333516 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
29270866 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_wakeup_race.2879879262 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
194531685 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_aborted_low_power.3039326035 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
35764465 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.1578747024 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
51924140 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_glitch.171584574 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
187744666 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.2515620298 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
104928980 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_disable_rom_integrity_check.1025805992 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
59497684 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_escalation_timeout.1339489748 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
1149663488 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_invalid.3165743262 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
38318721 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_smoke.2107018394 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:14 AM UTC 24 |
46833717 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset_invalid.3579636375 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
151709586 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset.1975271712 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
145055654 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_aborted_low_power.1471524762 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
209498253 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup_reset.482982992 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
155888670 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_wakeup_race.265922427 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
689321478 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rstmgr_intersig_mubi.1721461644 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
76356573 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup.3973634621 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
216911852 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all.344119314 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:15 AM UTC 24 |
1114786782 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2521747359 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:16 AM UTC 24 |
1450459528 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4222613776 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:16 AM UTC 24 |
1263365924 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.197063270 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:16 AM UTC 24 |
1036361842 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3411815519 |
|
|
Oct 12 12:44:13 AM UTC 24 |
Oct 12 12:44:16 AM UTC 24 |
963169148 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all.1806588989 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:18 AM UTC 24 |
3477672108 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all_with_rand_reset.1551019902 |
|
|
Oct 12 12:44:12 AM UTC 24 |
Oct 12 12:44:29 AM UTC 24 |
6140660727 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_glitch.3615582918 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
103766314 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.1715989689 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
30520885 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_global_esc.3773548036 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
46426844 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_invalid.2596128752 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
47898241 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_escalation_timeout.2559100240 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
199053349 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_disable_rom_integrity_check.3196860671 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
65276960 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_smoke.880515783 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
66382437 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset_invalid.1350973188 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
99949185 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.2908937781 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
255619765 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup.3555522457 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
110876006 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_wakeup_race.957818418 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
495752540 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.17119123 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
105233067 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset.67742355 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
66502527 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_glitch.1380966200 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
70335645 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup_reset.4203597599 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:34 AM UTC 24 |
65643709 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_aborted_low_power.3791149475 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
66814515 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_disable_rom_integrity_check.1472877545 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
112209604 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.3078113809 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
96128360 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all.4200285463 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
121004906 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_global_esc.985548951 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
50055943 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_invalid.2953279603 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
41795455 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_escalation_timeout.35285572 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
201840537 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset_invalid.1782341435 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
124811222 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.2946052175 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:35 AM UTC 24 |
249193239 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1801439334 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:36 AM UTC 24 |
1376673455 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.683836716 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:36 AM UTC 24 |
1041622682 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all.1106141624 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:38 AM UTC 24 |
2846519073 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all_with_rand_reset.2838034197 |
|
|
Oct 12 12:44:32 AM UTC 24 |
Oct 12 12:44:41 AM UTC 24 |
4380493128 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all_with_rand_reset.752213943 |
|
|
Oct 12 12:44:33 AM UTC 24 |
Oct 12 12:44:42 AM UTC 24 |
2401179337 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.723269920 |
|
|
Oct 12 12:04:19 AM UTC 24 |
Oct 12 12:04:22 AM UTC 24 |
489897853 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_errors.2314000131 |
|
|
Oct 12 12:04:19 AM UTC 24 |
Oct 12 12:04:22 AM UTC 24 |
88408992 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_intr_test.2888351201 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:26 AM UTC 24 |
79827878 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.1992045119 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:26 AM UTC 24 |
109550461 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_rw.4239166103 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:26 AM UTC 24 |
39735044 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.2161511461 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:27 AM UTC 24 |
86291483 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.3280218098 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:27 AM UTC 24 |
62741600 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.2361094502 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:27 AM UTC 24 |
65994007 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.3200319352 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:28 AM UTC 24 |
119446198 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.3825808987 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:28 AM UTC 24 |
218358401 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_errors.4219412429 |
|
|
Oct 12 12:04:24 AM UTC 24 |
Oct 12 12:04:29 AM UTC 24 |
814104667 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_rw.216379510 |
|
|
Oct 12 12:04:46 AM UTC 24 |
Oct 12 12:04:48 AM UTC 24 |
21065323 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_intr_test.299914989 |
|
|
Oct 12 12:04:28 AM UTC 24 |
Oct 12 12:04:30 AM UTC 24 |
51661541 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.1481938658 |
|
|
Oct 12 12:04:28 AM UTC 24 |
Oct 12 12:04:30 AM UTC 24 |
73490838 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.3595370711 |
|
|
Oct 12 12:04:28 AM UTC 24 |
Oct 12 12:04:30 AM UTC 24 |
50687330 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.2264748355 |
|
|
Oct 12 12:04:28 AM UTC 24 |
Oct 12 12:04:31 AM UTC 24 |
22724291 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.947336169 |
|
|
Oct 12 12:04:28 AM UTC 24 |
Oct 12 12:04:31 AM UTC 24 |
26472222 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.4151672296 |
|
|
Oct 12 12:04:28 AM UTC 24 |
Oct 12 12:04:31 AM UTC 24 |
41928584 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.1361378269 |
|
|
Oct 12 12:04:28 AM UTC 24 |
Oct 12 12:04:31 AM UTC 24 |
44502408 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_intr_test.3872124296 |
|
|
Oct 12 12:04:30 AM UTC 24 |
Oct 12 12:04:33 AM UTC 24 |
43627112 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.2510437911 |
|
|
Oct 12 12:04:30 AM UTC 24 |
Oct 12 12:04:33 AM UTC 24 |
51853522 ps |
| T59 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.1229668232 |
|
|
Oct 12 12:04:30 AM UTC 24 |
Oct 12 12:04:33 AM UTC 24 |
237755218 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_rw.3786184785 |
|
|
Oct 12 12:04:30 AM UTC 24 |
Oct 12 12:04:33 AM UTC 24 |
67501543 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_errors.4160045400 |
|
|
Oct 12 12:04:30 AM UTC 24 |
Oct 12 12:04:34 AM UTC 24 |
200838082 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.257357039 |
|
|
Oct 12 12:04:32 AM UTC 24 |
Oct 12 12:04:35 AM UTC 24 |
186057677 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_intr_test.735885031 |
|
|
Oct 12 12:04:33 AM UTC 24 |
Oct 12 12:04:35 AM UTC 24 |
21271151 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.524547425 |
|
|
Oct 12 12:04:32 AM UTC 24 |
Oct 12 12:04:35 AM UTC 24 |
55990399 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_rw.2307896788 |
|
|
Oct 12 12:04:33 AM UTC 24 |
Oct 12 12:04:35 AM UTC 24 |
17843020 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.1149758688 |
|
|
Oct 12 12:04:32 AM UTC 24 |
Oct 12 12:04:35 AM UTC 24 |
177892537 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.2591326823 |
|
|
Oct 12 12:04:33 AM UTC 24 |
Oct 12 12:04:35 AM UTC 24 |
30632639 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_errors.2560825539 |
|
|
Oct 12 12:04:32 AM UTC 24 |
Oct 12 12:04:36 AM UTC 24 |
250664486 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.3844176300 |
|
|
Oct 12 12:04:33 AM UTC 24 |
Oct 12 12:04:36 AM UTC 24 |
873920860 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.2823588542 |
|
|
Oct 12 12:04:34 AM UTC 24 |
Oct 12 12:04:36 AM UTC 24 |
35539337 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.2786063777 |
|
|
Oct 12 12:04:34 AM UTC 24 |
Oct 12 12:04:36 AM UTC 24 |
48683816 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.2655413871 |
|
|
Oct 12 12:04:34 AM UTC 24 |
Oct 12 12:04:36 AM UTC 24 |
108843753 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.587059681 |
|
|
Oct 12 12:04:31 AM UTC 24 |
Oct 12 12:04:36 AM UTC 24 |
1792050780 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_intr_test.2016145460 |
|
|
Oct 12 12:04:35 AM UTC 24 |
Oct 12 12:04:37 AM UTC 24 |
27050510 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.2488859533 |
|
|
Oct 12 12:04:35 AM UTC 24 |
Oct 12 12:04:37 AM UTC 24 |
26791486 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_rw.1524892474 |
|
|
Oct 12 12:04:35 AM UTC 24 |
Oct 12 12:04:37 AM UTC 24 |
83288930 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.2010437750 |
|
|
Oct 12 12:04:34 AM UTC 24 |
Oct 12 12:04:38 AM UTC 24 |
306897702 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_errors.3851260518 |
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|
Oct 12 12:04:35 AM UTC 24 |
Oct 12 12:04:38 AM UTC 24 |
45307689 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.1322554476 |
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|
Oct 12 12:04:36 AM UTC 24 |
Oct 12 12:04:38 AM UTC 24 |
50002711 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.1922566664 |
|
|
Oct 12 12:04:35 AM UTC 24 |
Oct 12 12:04:39 AM UTC 24 |
525005047 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.2253642598 |
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|
Oct 12 12:04:37 AM UTC 24 |
Oct 12 12:04:39 AM UTC 24 |
25767950 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.3072896492 |
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|
Oct 12 12:04:37 AM UTC 24 |
Oct 12 12:04:39 AM UTC 24 |
66024593 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_errors.2399338302 |
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|
Oct 12 12:04:37 AM UTC 24 |
Oct 12 12:04:39 AM UTC 24 |
190149409 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.1326793639 |
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|
Oct 12 12:04:37 AM UTC 24 |
Oct 12 12:04:39 AM UTC 24 |
204972101 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_10_11/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.2002062584 |
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|
Oct 12 12:04:36 AM UTC 24 |
Oct 12 12:04:40 AM UTC 24 |
160251091 ps |