Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.46 99.40 99.31 100.00 99.83 99.46 98.77


Total tests in report: 609
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
82.06 82.06 95.85 95.85 77.52 77.52 80.52 80.52 95.78 95.78 89.50 89.50 53.20 53.20 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_smoke.3667516335
89.01 6.95 97.24 1.38 84.39 6.87 91.24 10.72 97.81 2.02 92.46 2.96 70.94 17.73 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_sw_rst.2811042578
91.71 2.70 97.36 0.12 93.55 9.16 91.75 0.50 97.81 0.00 93.94 1.48 75.86 4.93 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_stress_all.256288674
93.68 1.97 97.96 0.60 95.00 1.46 92.08 0.34 98.65 0.84 94.62 0.67 83.74 7.88 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_mem_rw_with_rand_reset.1074562215
95.36 1.68 98.38 0.42 95.35 0.35 95.73 3.64 98.99 0.34 95.02 0.40 88.67 4.93 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_cnsty.2938226538
97.03 1.67 98.98 0.60 95.98 0.62 98.83 3.10 99.83 0.84 98.65 3.63 89.90 1.23 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm.3075590626
97.66 0.63 98.98 0.00 96.81 0.83 98.83 0.00 99.83 0.00 98.65 0.00 92.86 2.96 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_intg_err.3246986466
98.00 0.34 98.98 0.00 96.81 0.00 99.50 0.67 99.83 0.00 98.79 0.13 94.09 1.23 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_leaf_rst_cnsty.532001579
98.26 0.26 99.28 0.30 97.22 0.42 99.83 0.34 99.83 0.00 98.79 0.00 94.58 0.49 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_alert_test.263494963
98.50 0.25 99.28 0.00 97.22 0.00 99.83 0.00 99.83 0.00 98.79 0.00 96.06 1.48 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_sw_rst_reset_race.3857993049
98.72 0.21 99.28 0.00 98.27 1.04 99.83 0.00 99.83 0.00 98.79 0.00 96.31 0.25 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_tl_errors.2275594156
98.88 0.16 99.28 0.00 98.27 0.00 99.83 0.00 99.83 0.00 98.79 0.00 97.29 0.99 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm_scan_intersig_mubi.3122513125
99.05 0.16 99.28 0.00 98.27 0.00 99.83 0.00 99.83 0.00 98.79 0.00 98.28 0.99 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_sw_rst_reset_race.967808951
99.14 0.09 99.28 0.00 98.82 0.56 99.83 0.00 99.83 0.00 98.79 0.00 98.28 0.00 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_tl_errors.3887107519
99.23 0.09 99.40 0.12 99.10 0.28 99.83 0.00 99.83 0.00 98.92 0.13 98.28 0.00 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_rw.3551365066
99.29 0.06 99.40 0.00 99.10 0.00 99.83 0.00 99.83 0.00 99.06 0.13 98.52 0.25 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_por_stretcher.3164011569
99.35 0.06 99.40 0.00 99.17 0.07 99.83 0.00 99.83 0.00 99.33 0.27 98.52 0.00 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_stress_all.1672349740
99.40 0.05 99.40 0.00 99.24 0.07 99.83 0.00 99.83 0.00 99.33 0.00 98.77 0.25 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_tl_intg_err.3741486036
99.45 0.05 99.40 0.00 99.24 0.00 100.00 0.17 99.83 0.00 99.46 0.13 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_cnsty.2955330315
99.46 0.01 99.40 0.00 99.31 0.07 100.00 0.00 99.83 0.00 99.46 0.00 98.77 0.00 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_tl_intg_err.475571799

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_aliasing.107605113
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_bit_bash.554468780
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_csr_hw_reset.2427214980
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_same_csr_outstanding.3709630755
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_errors.1275793178
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/0.rstmgr_tl_intg_err.3089025369
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_aliasing.3518274503
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_bit_bash.2981396507
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_hw_reset.318247690
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_mem_rw_with_rand_reset.4053604469
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_csr_rw.357668961
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_same_csr_outstanding.1359059709
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/1.rstmgr_tl_errors.1410098547
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_csr_mem_rw_with_rand_reset.1885730671
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_csr_rw.426513231
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_same_csr_outstanding.1367886468
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_tl_errors.2054609049
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/10.rstmgr_tl_intg_err.1729666184
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_csr_mem_rw_with_rand_reset.1786696585
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_csr_rw.1952946727
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_same_csr_outstanding.2425758926
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/11.rstmgr_tl_intg_err.2478854217
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_csr_mem_rw_with_rand_reset.1271080102
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_csr_rw.3905714542
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_same_csr_outstanding.674603902
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_tl_errors.184937152
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/12.rstmgr_tl_intg_err.2548953164
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_csr_mem_rw_with_rand_reset.3718486158
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_csr_rw.2892760831
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_same_csr_outstanding.3912271451
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/13.rstmgr_tl_errors.2694974368
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_csr_mem_rw_with_rand_reset.3284928004
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_csr_rw.2177401326
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_same_csr_outstanding.1938861962
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_tl_errors.2925076946
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/14.rstmgr_tl_intg_err.1981401812
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_csr_mem_rw_with_rand_reset.395219331
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_csr_rw.2571342821
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_same_csr_outstanding.2100550176
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_tl_errors.3927503449
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/15.rstmgr_tl_intg_err.3495991489
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_csr_mem_rw_with_rand_reset.268767795
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_csr_rw.3268586018
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_same_csr_outstanding.2301513622
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_tl_errors.385507725
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/16.rstmgr_tl_intg_err.1601161544
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_csr_mem_rw_with_rand_reset.1256569222
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_csr_rw.3279151149
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_same_csr_outstanding.419438939
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_tl_errors.2253385681
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/17.rstmgr_tl_intg_err.3304685379
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_csr_mem_rw_with_rand_reset.3461531177
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_csr_rw.1489312888
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_same_csr_outstanding.744111304
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_tl_errors.3311167386
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/18.rstmgr_tl_intg_err.1569857408
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_csr_mem_rw_with_rand_reset.1869777694
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_csr_rw.4147457134
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_same_csr_outstanding.1157259250
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_tl_errors.4101081241
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/19.rstmgr_tl_intg_err.4033832332
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_aliasing.898918991
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_bit_bash.3375711051
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_hw_reset.2050907268
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_mem_rw_with_rand_reset.2057599803
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_csr_rw.4147769590
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_same_csr_outstanding.4022802483
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/2.rstmgr_tl_intg_err.1254905571
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_aliasing.2256367059
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_bit_bash.3270923955
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_hw_reset.3708925607
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_mem_rw_with_rand_reset.3715326136
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_csr_rw.4272194959
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_same_csr_outstanding.461225778
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/3.rstmgr_tl_errors.30186260
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_aliasing.1128562651
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_bit_bash.1828329804
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_hw_reset.941484311
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_mem_rw_with_rand_reset.2055828472
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_csr_rw.1733922165
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_same_csr_outstanding.4145175029
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_tl_errors.962522302
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/4.rstmgr_tl_intg_err.4015180148
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_mem_rw_with_rand_reset.1436306406
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_csr_rw.365184605
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_same_csr_outstanding.1644146797
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_tl_errors.1125205355
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/5.rstmgr_tl_intg_err.1012511228
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_csr_mem_rw_with_rand_reset.2650377780
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_csr_rw.3212431402
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_same_csr_outstanding.3977558395
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_tl_errors.3019216559
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/6.rstmgr_tl_intg_err.884567967
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_csr_mem_rw_with_rand_reset.1176001468
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_csr_rw.4171794184
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_same_csr_outstanding.3903342093
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_tl_errors.3030294501
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/7.rstmgr_tl_intg_err.1086237053
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_csr_mem_rw_with_rand_reset.1518819058
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_csr_rw.3386712221
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_same_csr_outstanding.3953490504
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/cover_reg_top/8.rstmgr_tl_errors.1860750681
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/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst_reset_race.247434832
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_alert_test.4086363573
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_shadow_attack.2763369171
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_por_stretcher.662628981
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_reset.3105861559
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_sec_cm_scan_intersig_mubi.1727065342
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_smoke.2908690576
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_stress_all.2887850086
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst.2717959680
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst_reset_race.4058268379
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_alert_test.3913645013
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_cnsty.56439862
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_shadow_attack.3358799193
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_por_stretcher.673956034
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_reset.2325260745
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_sec_cm_scan_intersig_mubi.2212856119
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_smoke.2838728230
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_stress_all.2629402125
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst.239756118
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst_reset_race.3980545653
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_alert_test.3916515362
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_cnsty.974883427
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_shadow_attack.3106379366
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_por_stretcher.2123196332
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_reset.434889761
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_sec_cm_scan_intersig_mubi.3157358067
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_smoke.2444153484
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_stress_all.1138801164
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst.4203647170
/workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst_reset_race.1558353541



Total test records in report: 609
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_por_stretcher.2506166103 Oct 12 12:50:27 AM UTC 24 Oct 12 12:50:29 AM UTC 24 95033910 ps
T2 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_smoke.2321182777 Oct 12 12:50:27 AM UTC 24 Oct 12 12:50:30 AM UTC 24 189454427 ps
T3 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm_scan_intersig_mubi.3122513125 Oct 12 12:50:29 AM UTC 24 Oct 12 12:50:31 AM UTC 24 111871516 ps
T4 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst_reset_race.2962010363 Oct 12 12:50:29 AM UTC 24 Oct 12 12:50:31 AM UTC 24 114119214 ps
T5 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_shadow_attack.30322445 Oct 12 12:50:29 AM UTC 24 Oct 12 12:50:32 AM UTC 24 302034546 ps
T6 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_sw_rst.3039721001 Oct 12 12:50:29 AM UTC 24 Oct 12 12:50:32 AM UTC 24 125916095 ps
T7 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_por_stretcher.3164011569 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:33 AM UTC 24 156246617 ps
T8 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_alert_test.436838198 Oct 12 12:50:30 AM UTC 24 Oct 12 12:50:33 AM UTC 24 65314871 ps
T9 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_sw_rst_reset_race.1391142776 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:33 AM UTC 24 107861843 ps
T10 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_smoke.3667516335 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:33 AM UTC 24 119525728 ps
T11 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm_scan_intersig_mubi.388304430 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:33 AM UTC 24 105283321 ps
T14 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_shadow_attack.2768560205 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:34 AM UTC 24 301566469 ps
T12 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_reset.1938062906 Oct 12 12:50:27 AM UTC 24 Oct 12 12:50:34 AM UTC 24 1040075289 ps
T54 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_alert_test.263494963 Oct 12 12:50:32 AM UTC 24 Oct 12 12:50:34 AM UTC 24 61655359 ps
T60 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_sw_rst.2801969467 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:34 AM UTC 24 132813563 ps
T13 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_smoke.2912299479 Oct 12 12:50:32 AM UTC 24 Oct 12 12:50:35 AM UTC 24 206197028 ps
T15 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_por_stretcher.1853453946 Oct 12 12:50:33 AM UTC 24 Oct 12 12:50:35 AM UTC 24 207249690 ps
T23 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_sec_cm_scan_intersig_mubi.4210680904 Oct 12 12:50:34 AM UTC 24 Oct 12 12:50:36 AM UTC 24 111784646 ps
T24 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_sw_rst_reset_race.2365102867 Oct 12 12:50:34 AM UTC 24 Oct 12 12:50:36 AM UTC 24 179695474 ps
T55 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_shadow_attack.1059504605 Oct 12 12:50:34 AM UTC 24 Oct 12 12:50:36 AM UTC 24 301573280 ps
T61 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_leaf_rst_cnsty.2938226538 Oct 12 12:50:29 AM UTC 24 Oct 12 12:50:37 AM UTC 24 1277461203 ps
T66 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_alert_test.3576849662 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:37 AM UTC 24 64904028 ps
T16 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_por_stretcher.185311322 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:37 AM UTC 24 169774133 ps
T67 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_smoke.2104894422 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:38 AM UTC 24 193862086 ps
T68 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_leaf_rst_shadow_attack.2264271171 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:38 AM UTC 24 301994399 ps
T69 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_sw_rst.2811042578 Oct 12 12:50:34 AM UTC 24 Oct 12 12:50:38 AM UTC 24 483243504 ps
T70 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_sw_rst.484156711 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:38 AM UTC 24 119452297 ps
T71 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_sec_cm_scan_intersig_mubi.1220244560 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:38 AM UTC 24 156662970 ps
T72 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_sw_rst_reset_race.967808951 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:39 AM UTC 24 279283688 ps
T73 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_alert_test.373980020 Oct 12 12:50:37 AM UTC 24 Oct 12 12:50:39 AM UTC 24 84022210 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_reset.3926335605 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:39 AM UTC 24 1543253075 ps
T56 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_stress_all.256288674 Oct 12 12:50:29 AM UTC 24 Oct 12 12:50:39 AM UTC 24 2487666090 ps
T17 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_por_stretcher.2707227901 Oct 12 12:50:37 AM UTC 24 Oct 12 12:50:39 AM UTC 24 189455484 ps
T93 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_smoke.2771704140 Oct 12 12:50:37 AM UTC 24 Oct 12 12:50:39 AM UTC 24 115665220 ps
T57 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_reset.3352168624 Oct 12 12:50:33 AM UTC 24 Oct 12 12:50:39 AM UTC 24 1045416906 ps
T94 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_sw_rst_reset_race.2890206664 Oct 12 12:50:38 AM UTC 24 Oct 12 12:50:40 AM UTC 24 111904033 ps
T58 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_sec_cm_scan_intersig_mubi.2958894599 Oct 12 12:50:38 AM UTC 24 Oct 12 12:50:40 AM UTC 24 95166395 ps
T59 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_leaf_rst_cnsty.104451578 Oct 12 12:50:31 AM UTC 24 Oct 12 12:50:41 AM UTC 24 2456250958 ps
T111 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_leaf_rst_shadow_attack.1085745747 Oct 12 12:50:38 AM UTC 24 Oct 12 12:50:41 AM UTC 24 302570361 ps
T112 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_alert_test.4086363573 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 74563696 ps
T95 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_sw_rst.598564458 Oct 12 12:50:38 AM UTC 24 Oct 12 12:50:41 AM UTC 24 148077644 ps
T162 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_alert_test.3879011859 Oct 12 12:50:39 AM UTC 24 Oct 12 12:50:41 AM UTC 24 63820347 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_reset.4181577872 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:42 AM UTC 24 876081600 ps
T18 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_por_stretcher.3521470528 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:42 AM UTC 24 197443603 ps
T98 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_smoke.879951978 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:42 AM UTC 24 237205292 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst_reset_race.1105846982 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:42 AM UTC 24 142862005 ps
T163 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_leaf_rst_shadow_attack.439098528 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:42 AM UTC 24 301986374 ps
T96 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_sw_rst.2323150727 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:42 AM UTC 24 124731282 ps
T164 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_sec_cm_scan_intersig_mubi.3008277363 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:42 AM UTC 24 142446740 ps
T165 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_alert_test.4111889467 Oct 12 12:50:41 AM UTC 24 Oct 12 12:50:43 AM UTC 24 73900260 ps
T19 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_por_stretcher.3060369641 Oct 12 12:50:41 AM UTC 24 Oct 12 12:50:43 AM UTC 24 204986800 ps
T166 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst_reset_race.247434832 Oct 12 12:50:41 AM UTC 24 Oct 12 12:50:43 AM UTC 24 145285886 ps
T62 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_leaf_rst_cnsty.148147718 Oct 12 12:50:34 AM UTC 24 Oct 12 12:50:44 AM UTC 24 2442765682 ps
T43 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_leaf_rst_cnsty.991985755 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:44 AM UTC 24 1951131079 ps
T47 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_reset.618501036 Oct 12 12:50:37 AM UTC 24 Oct 12 12:50:44 AM UTC 24 1419082687 ps
T48 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_smoke.2663188436 Oct 12 12:50:41 AM UTC 24 Oct 12 12:50:44 AM UTC 24 194745650 ps
T49 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_alert_test.3621342785 Oct 12 12:50:43 AM UTC 24 Oct 12 12:50:45 AM UTC 24 65248782 ps
T44 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_leaf_rst_cnsty.532001579 Oct 12 12:50:38 AM UTC 24 Oct 12 12:50:45 AM UTC 24 1266578812 ps
T50 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_sw_rst.1754690868 Oct 12 12:50:41 AM UTC 24 Oct 12 12:50:45 AM UTC 24 315203532 ps
T20 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_por_stretcher.662628981 Oct 12 12:50:43 AM UTC 24 Oct 12 12:50:45 AM UTC 24 149330224 ps
T51 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_reset.1409223092 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:45 AM UTC 24 984294712 ps
T52 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_shadow_attack.1975674803 Oct 12 12:50:43 AM UTC 24 Oct 12 12:50:45 AM UTC 24 301824941 ps
T53 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_sec_cm_scan_intersig_mubi.2119680189 Oct 12 12:50:43 AM UTC 24 Oct 12 12:50:45 AM UTC 24 160157221 ps
T167 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_smoke.2908690576 Oct 12 12:50:43 AM UTC 24 Oct 12 12:50:45 AM UTC 24 120289582 ps
T168 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_sec_cm_scan_intersig_mubi.1727065342 Oct 12 12:50:44 AM UTC 24 Oct 12 12:50:47 AM UTC 24 107107801 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_reset.4261061342 Oct 12 12:50:41 AM UTC 24 Oct 12 12:50:47 AM UTC 24 923337585 ps
T97 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst.2717959680 Oct 12 12:50:44 AM UTC 24 Oct 12 12:50:47 AM UTC 24 131369113 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_sw_rst_reset_race.4058268379 Oct 12 12:50:44 AM UTC 24 Oct 12 12:50:47 AM UTC 24 247944094 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_shadow_attack.2763369171 Oct 12 12:50:44 AM UTC 24 Oct 12 12:50:47 AM UTC 24 301533619 ps
T78 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_sec_cm.3075590626 Oct 12 12:50:32 AM UTC 24 Oct 12 12:50:47 AM UTC 24 8500816743 ps
T21 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_por_stretcher.673956034 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 180369402 ps
T22 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_por_stretcher.2123196332 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 71654863 ps
T88 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_alert_test.3913645013 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 78079302 ps
T89 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst_reset_race.3980545653 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 116870720 ps
T90 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_sec_cm_scan_intersig_mubi.2212856119 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 104440457 ps
T91 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_smoke.2838728230 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 188361710 ps
T25 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_leaf_rst_cnsty.3707824337 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:48 AM UTC 24 1283045903 ps
T35 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_smoke.2444153484 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:48 AM UTC 24 188492028 ps
T36 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_reset.3105861559 Oct 12 12:50:43 AM UTC 24 Oct 12 12:50:49 AM UTC 24 951750797 ps
T37 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_shadow_attack.3358799193 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:49 AM UTC 24 302581225 ps
T26 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/6.rstmgr_leaf_rst_cnsty.2863776248 Oct 12 12:50:43 AM UTC 24 Oct 12 12:50:50 AM UTC 24 1273712018 ps
T38 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_sw_rst.239756118 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:50 AM UTC 24 496626245 ps
T39 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_sec_cm_scan_intersig_mubi.3157358067 Oct 12 12:50:47 AM UTC 24 Oct 12 12:50:50 AM UTC 24 147110405 ps
T40 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst_reset_race.1558353541 Oct 12 12:50:47 AM UTC 24 Oct 12 12:50:50 AM UTC 24 242777090 ps
T41 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_shadow_attack.3106379366 Oct 12 12:50:48 AM UTC 24 Oct 12 12:50:50 AM UTC 24 300706324 ps
T42 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_sec_cm.2439235612 Oct 12 12:50:35 AM UTC 24 Oct 12 12:50:51 AM UTC 24 8389092641 ps
T114 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_alert_test.3916515362 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:51 AM UTC 24 87575891 ps
T115 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_por_stretcher.2626653083 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:51 AM UTC 24 172480620 ps
T170 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_sw_rst_reset_race.3784416712 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:51 AM UTC 24 83124329 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_sw_rst.4203647170 Oct 12 12:50:47 AM UTC 24 Oct 12 12:50:51 AM UTC 24 444329005 ps
T171 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_sec_cm_scan_intersig_mubi.1485928003 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:51 AM UTC 24 97412347 ps
T172 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_smoke.1255407721 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:51 AM UTC 24 203125430 ps
T108 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_reset.2325260745 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:52 AM UTC 24 1221453562 ps
T173 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_alert_test.4175061378 Oct 12 12:50:50 AM UTC 24 Oct 12 12:50:52 AM UTC 24 73241944 ps
T174 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_sw_rst_reset_race.704862328 Oct 12 12:50:50 AM UTC 24 Oct 12 12:50:53 AM UTC 24 103529689 ps
T27 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/7.rstmgr_leaf_rst_cnsty.2955330315 Oct 12 12:50:44 AM UTC 24 Oct 12 12:50:53 AM UTC 24 1269127759 ps
T175 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_sw_rst.2597876991 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:53 AM UTC 24 304917722 ps
T176 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_por_stretcher.2641207647 Oct 12 12:50:50 AM UTC 24 Oct 12 12:50:53 AM UTC 24 211732210 ps
T177 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_leaf_rst_shadow_attack.2905618554 Oct 12 12:50:50 AM UTC 24 Oct 12 12:50:53 AM UTC 24 301491268 ps
T178 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_smoke.3341488575 Oct 12 12:50:50 AM UTC 24 Oct 12 12:50:53 AM UTC 24 112952098 ps
T45 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_leaf_rst_cnsty.56439862 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:53 AM UTC 24 1267450126 ps
T109 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_reset.1039984483 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:54 AM UTC 24 810331909 ps
T179 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_sec_cm_scan_intersig_mubi.3550252734 Oct 12 12:50:52 AM UTC 24 Oct 12 12:50:54 AM UTC 24 155152850 ps
T180 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_leaf_rst_shadow_attack.692164437 Oct 12 12:50:52 AM UTC 24 Oct 12 12:50:54 AM UTC 24 303815434 ps
T181 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_alert_test.1416209834 Oct 12 12:50:52 AM UTC 24 Oct 12 12:50:54 AM UTC 24 77606976 ps
T182 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_por_stretcher.1395163421 Oct 12 12:50:52 AM UTC 24 Oct 12 12:50:54 AM UTC 24 221196435 ps
T183 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_sw_rst.1305761000 Oct 12 12:50:51 AM UTC 24 Oct 12 12:50:54 AM UTC 24 372233589 ps
T184 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_smoke.1790575390 Oct 12 12:50:52 AM UTC 24 Oct 12 12:50:55 AM UTC 24 120733514 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_sw_rst_reset_race.2015784039 Oct 12 12:50:52 AM UTC 24 Oct 12 12:50:55 AM UTC 24 147117417 ps
T185 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_alert_test.522484117 Oct 12 12:51:04 AM UTC 24 Oct 12 12:51:06 AM UTC 24 57317145 ps
T110 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/5.rstmgr_stress_all.2633114738 Oct 12 12:50:40 AM UTC 24 Oct 12 12:50:55 AM UTC 24 2420016252 ps
T63 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_leaf_rst_cnsty.974883427 Oct 12 12:50:47 AM UTC 24 Oct 12 12:50:55 AM UTC 24 1270966218 ps
T186 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_por_stretcher.3089353768 Oct 12 12:50:54 AM UTC 24 Oct 12 12:50:56 AM UTC 24 150991439 ps
T187 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_sec_cm_scan_intersig_mubi.1457044302 Oct 12 12:50:53 AM UTC 24 Oct 12 12:50:56 AM UTC 24 140823498 ps
T188 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_alert_test.68724273 Oct 12 12:50:53 AM UTC 24 Oct 12 12:50:56 AM UTC 24 67829186 ps
T113 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_reset.434889761 Oct 12 12:50:46 AM UTC 24 Oct 12 12:50:56 AM UTC 24 1652081470 ps
T189 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_leaf_rst_shadow_attack.969689987 Oct 12 12:50:53 AM UTC 24 Oct 12 12:50:56 AM UTC 24 301784838 ps
T79 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/0.rstmgr_sec_cm.4022829915 Oct 12 12:50:29 AM UTC 24 Oct 12 12:50:56 AM UTC 24 16588339663 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_smoke.1025583645 Oct 12 12:50:53 AM UTC 24 Oct 12 12:50:56 AM UTC 24 252748111 ps
T190 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_reset.2570486400 Oct 12 12:50:50 AM UTC 24 Oct 12 12:50:56 AM UTC 24 1136741146 ps
T191 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_sw_rst.2331160968 Oct 12 12:50:53 AM UTC 24 Oct 12 12:50:57 AM UTC 24 269036690 ps
T192 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_sw_rst_reset_race.2283423714 Oct 12 12:50:55 AM UTC 24 Oct 12 12:50:57 AM UTC 24 76737435 ps
T193 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_sec_cm_scan_intersig_mubi.646284661 Oct 12 12:50:55 AM UTC 24 Oct 12 12:50:57 AM UTC 24 93581042 ps
T194 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_leaf_rst_shadow_attack.4168880886 Oct 12 12:50:55 AM UTC 24 Oct 12 12:50:57 AM UTC 24 301120744 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_sw_rst.2366959274 Oct 12 12:50:55 AM UTC 24 Oct 12 12:50:58 AM UTC 24 303903984 ps
T195 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_por_stretcher.552220536 Oct 12 12:50:56 AM UTC 24 Oct 12 12:50:58 AM UTC 24 107898546 ps
T196 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_alert_test.2007586177 Oct 12 12:50:56 AM UTC 24 Oct 12 12:50:58 AM UTC 24 78581377 ps
T197 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_sw_rst_reset_race.958376713 Oct 12 12:50:56 AM UTC 24 Oct 12 12:50:58 AM UTC 24 95660263 ps
T198 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_smoke.3328217696 Oct 12 12:50:56 AM UTC 24 Oct 12 12:50:59 AM UTC 24 111732300 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/1.rstmgr_stress_all.1672349740 Oct 12 12:50:32 AM UTC 24 Oct 12 12:50:59 AM UTC 24 4938993874 ps
T28 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_leaf_rst_cnsty.1211236047 Oct 12 12:50:49 AM UTC 24 Oct 12 12:50:59 AM UTC 24 2451675521 ps
T199 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_sec_cm_scan_intersig_mubi.659613935 Oct 12 12:50:56 AM UTC 24 Oct 12 12:50:59 AM UTC 24 148108444 ps
T200 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_sw_rst.2637539417 Oct 12 12:50:56 AM UTC 24 Oct 12 12:50:59 AM UTC 24 156149564 ps
T124 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_stress_all.1513821341 Oct 12 12:50:37 AM UTC 24 Oct 12 12:51:00 AM UTC 24 4262640964 ps
T29 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_leaf_rst_cnsty.1155376485 Oct 12 12:50:53 AM UTC 24 Oct 12 12:51:00 AM UTC 24 1272865169 ps
T201 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_por_stretcher.3870915780 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:00 AM UTC 24 218289964 ps
T202 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_alert_test.1637205361 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:00 AM UTC 24 87576064 ps
T117 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_reset.399546161 Oct 12 12:50:55 AM UTC 24 Oct 12 12:51:00 AM UTC 24 936332552 ps
T203 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_leaf_rst_shadow_attack.2839220124 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:00 AM UTC 24 301834019 ps
T204 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_sec_cm_scan_intersig_mubi.3224327625 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:00 AM UTC 24 108196140 ps
T205 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_leaf_rst_cnsty.3570985414 Oct 12 12:50:52 AM UTC 24 Oct 12 12:51:01 AM UTC 24 1971707452 ps
T206 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_sw_rst_reset_race.2808069007 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:01 AM UTC 24 112281187 ps
T125 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_reset.3172647171 Oct 12 12:50:52 AM UTC 24 Oct 12 12:51:01 AM UTC 24 2008792981 ps
T207 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_smoke.3221564025 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:01 AM UTC 24 192746518 ps
T156 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_sw_rst.1553333840 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:02 AM UTC 24 379501454 ps
T208 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_por_stretcher.1316878766 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:02 AM UTC 24 213984640 ps
T209 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_alert_test.1483661172 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:02 AM UTC 24 58525907 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_leaf_rst_shadow_attack.2522452043 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:02 AM UTC 24 302566449 ps
T30 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_leaf_rst_cnsty.1608254676 Oct 12 12:50:55 AM UTC 24 Oct 12 12:51:03 AM UTC 24 1273503275 ps
T211 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_reset.3372778961 Oct 12 12:50:56 AM UTC 24 Oct 12 12:51:03 AM UTC 24 1251545489 ps
T212 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_sw_rst_reset_race.3857993049 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:03 AM UTC 24 254326362 ps
T213 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_smoke.3567306421 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:03 AM UTC 24 189814312 ps
T214 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_alert_test.1183832018 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:04 AM UTC 24 61113498 ps
T31 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_leaf_rst_cnsty.1984510034 Oct 12 12:50:56 AM UTC 24 Oct 12 12:51:04 AM UTC 24 1273130056 ps
T86 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/3.rstmgr_sec_cm.2560624780 Oct 12 12:50:37 AM UTC 24 Oct 12 12:51:04 AM UTC 24 16588488011 ps
T215 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_sec_cm_scan_intersig_mubi.510097013 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:04 AM UTC 24 140028613 ps
T216 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_por_stretcher.3378864051 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:04 AM UTC 24 117572821 ps
T217 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_leaf_rst_shadow_attack.3030283949 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:04 AM UTC 24 302320192 ps
T218 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_sw_rst_reset_race.1948134699 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:04 AM UTC 24 186625121 ps
T219 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_sw_rst.2197785152 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:05 AM UTC 24 116624533 ps
T220 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_smoke.3927001806 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:05 AM UTC 24 126446351 ps
T221 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_reset.618076589 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:05 AM UTC 24 1186613963 ps
T118 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/10.rstmgr_stress_all.1533086854 Oct 12 12:50:50 AM UTC 24 Oct 12 12:51:05 AM UTC 24 2841813291 ps
T222 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_sw_rst.155963913 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:05 AM UTC 24 129779778 ps
T223 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_smoke.1573408341 Oct 12 12:51:04 AM UTC 24 Oct 12 12:51:06 AM UTC 24 111284369 ps
T224 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_sec_cm_scan_intersig_mubi.3589290286 Oct 12 12:51:03 AM UTC 24 Oct 12 12:51:06 AM UTC 24 156897066 ps
T225 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_por_stretcher.1241459071 Oct 12 12:51:04 AM UTC 24 Oct 12 12:51:06 AM UTC 24 166278559 ps
T226 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_leaf_rst_shadow_attack.2857953837 Oct 12 12:51:03 AM UTC 24 Oct 12 12:51:06 AM UTC 24 301985684 ps
T126 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_reset.2165387547 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:06 AM UTC 24 994238312 ps
T227 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_sw_rst_reset_race.669174746 Oct 12 12:51:04 AM UTC 24 Oct 12 12:51:06 AM UTC 24 129624449 ps
T228 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_sec_cm_scan_intersig_mubi.176876090 Oct 12 12:51:05 AM UTC 24 Oct 12 12:51:07 AM UTC 24 95786814 ps
T229 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_alert_test.1252856857 Oct 12 12:51:05 AM UTC 24 Oct 12 12:51:08 AM UTC 24 64536598 ps
T230 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_leaf_rst_shadow_attack.3622253812 Oct 12 12:51:05 AM UTC 24 Oct 12 12:51:08 AM UTC 24 301500281 ps
T231 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_por_stretcher.1176120109 Oct 12 12:51:06 AM UTC 24 Oct 12 12:51:08 AM UTC 24 137573488 ps
T232 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_sw_rst.4108901420 Oct 12 12:51:05 AM UTC 24 Oct 12 12:51:08 AM UTC 24 152985455 ps
T233 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_sec_cm_scan_intersig_mubi.3371033446 Oct 12 12:51:06 AM UTC 24 Oct 12 12:51:08 AM UTC 24 151439042 ps
T234 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_sw_rst_reset_race.3298320193 Oct 12 12:51:06 AM UTC 24 Oct 12 12:51:08 AM UTC 24 122243118 ps
T235 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_smoke.413655413 Oct 12 12:51:05 AM UTC 24 Oct 12 12:51:09 AM UTC 24 198618451 ps
T236 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_sw_rst.1017106815 Oct 12 12:51:06 AM UTC 24 Oct 12 12:51:09 AM UTC 24 262410957 ps
T237 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_alert_test.1748961704 Oct 12 12:51:07 AM UTC 24 Oct 12 12:51:10 AM UTC 24 57872071 ps
T127 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_reset.876606586 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:10 AM UTC 24 1693959026 ps
T238 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_leaf_rst_shadow_attack.2211947494 Oct 12 12:51:07 AM UTC 24 Oct 12 12:51:10 AM UTC 24 302231804 ps
T239 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_por_stretcher.3819025732 Oct 12 12:51:08 AM UTC 24 Oct 12 12:51:10 AM UTC 24 153151350 ps
T32 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_leaf_rst_cnsty.3832909638 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:10 AM UTC 24 2468676870 ps
T240 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_smoke.4061963781 Oct 12 12:51:07 AM UTC 24 Oct 12 12:51:10 AM UTC 24 115359008 ps
T241 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_reset.3475803604 Oct 12 12:51:04 AM UTC 24 Oct 12 12:51:11 AM UTC 24 1295574649 ps
T242 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/9.rstmgr_stress_all.1138801164 Oct 12 12:50:48 AM UTC 24 Oct 12 12:51:11 AM UTC 24 4948273359 ps
T243 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/17.rstmgr_leaf_rst_cnsty.2950098454 Oct 12 12:51:03 AM UTC 24 Oct 12 12:51:11 AM UTC 24 1281876524 ps
T46 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_leaf_rst_cnsty.1734725080 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:11 AM UTC 24 1970958354 ps
T244 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_sec_cm_scan_intersig_mubi.2324458694 Oct 12 12:51:09 AM UTC 24 Oct 12 12:51:11 AM UTC 24 166827687 ps
T245 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_sw_rst_reset_race.2467493233 Oct 12 12:51:09 AM UTC 24 Oct 12 12:51:11 AM UTC 24 193112831 ps
T119 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/2.rstmgr_stress_all.435529881 Oct 12 12:50:34 AM UTC 24 Oct 12 12:51:11 AM UTC 24 9378933695 ps
T246 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_alert_test.598431348 Oct 12 12:51:09 AM UTC 24 Oct 12 12:51:12 AM UTC 24 63532859 ps
T87 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_sec_cm.1958600179 Oct 12 12:50:39 AM UTC 24 Oct 12 12:51:12 AM UTC 24 16567583903 ps
T247 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_leaf_rst_shadow_attack.2091541222 Oct 12 12:51:09 AM UTC 24 Oct 12 12:51:12 AM UTC 24 302824955 ps
T248 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/13.rstmgr_stress_all.2942389079 Oct 12 12:50:55 AM UTC 24 Oct 12 12:51:12 AM UTC 24 3821188274 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_reset.3880786400 Oct 12 12:51:06 AM UTC 24 Oct 12 12:51:13 AM UTC 24 1475958710 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_sw_rst.24159237 Oct 12 12:51:09 AM UTC 24 Oct 12 12:51:13 AM UTC 24 416414198 ps
T148 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/15.rstmgr_stress_all.1474360356 Oct 12 12:51:00 AM UTC 24 Oct 12 12:51:13 AM UTC 24 2676473920 ps
T251 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_por_stretcher.4185571403 Oct 12 12:51:11 AM UTC 24 Oct 12 12:51:14 AM UTC 24 170496844 ps
T252 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_sec_cm_scan_intersig_mubi.2214936838 Oct 12 12:51:12 AM UTC 24 Oct 12 12:51:14 AM UTC 24 101774046 ps
T253 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_sw_rst_reset_race.3501946183 Oct 12 12:51:11 AM UTC 24 Oct 12 12:51:14 AM UTC 24 198906553 ps
T254 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_smoke.2201249196 Oct 12 12:51:11 AM UTC 24 Oct 12 12:51:14 AM UTC 24 199568277 ps
T255 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_sw_rst.3524994417 Oct 12 12:51:11 AM UTC 24 Oct 12 12:51:15 AM UTC 24 267694013 ps
T256 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_leaf_rst_shadow_attack.4277907285 Oct 12 12:51:19 AM UTC 24 Oct 12 12:51:21 AM UTC 24 303156133 ps
T257 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/25.rstmgr_smoke.1022901572 Oct 12 12:51:19 AM UTC 24 Oct 12 12:51:21 AM UTC 24 199367330 ps
T258 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_stress_all.346281332 Oct 12 12:51:19 AM UTC 24 Oct 12 12:51:21 AM UTC 24 249371094 ps
T120 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_reset.719833041 Oct 12 12:51:08 AM UTC 24 Oct 12 12:51:15 AM UTC 24 1622037084 ps
T259 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/8.rstmgr_stress_all.2629402125 Oct 12 12:50:46 AM UTC 24 Oct 12 12:51:15 AM UTC 24 8248933871 ps
T64 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_leaf_rst_cnsty.2572726938 Oct 12 12:51:05 AM UTC 24 Oct 12 12:51:16 AM UTC 24 2447935339 ps
T260 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_por_stretcher.2010758901 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:16 AM UTC 24 100331410 ps
T261 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_alert_test.3140921308 Oct 12 12:51:13 AM UTC 24 Oct 12 12:51:16 AM UTC 24 87482830 ps
T33 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/19.rstmgr_leaf_rst_cnsty.4024003570 Oct 12 12:51:07 AM UTC 24 Oct 12 12:51:16 AM UTC 24 1272547252 ps
T149 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_reset.4107743758 Oct 12 12:51:16 AM UTC 24 Oct 12 12:51:23 AM UTC 24 1776717904 ps
T262 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_sec_cm_scan_intersig_mubi.545106152 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:16 AM UTC 24 107749951 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_sw_rst_reset_race.2029112724 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:16 AM UTC 24 129446481 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_leaf_rst_shadow_attack.101313842 Oct 12 12:51:13 AM UTC 24 Oct 12 12:51:16 AM UTC 24 301565811 ps
T265 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_por_stretcher.33250623 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:16 AM UTC 24 157832538 ps
T266 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_alert_test.1076779445 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:16 AM UTC 24 63814939 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_leaf_rst_shadow_attack.3434433023 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:16 AM UTC 24 302204406 ps
T268 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_smoke.2615263159 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:16 AM UTC 24 205065996 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_smoke.1390136684 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:17 AM UTC 24 194827357 ps
T121 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/12.rstmgr_stress_all.1732270914 Oct 12 12:50:53 AM UTC 24 Oct 12 12:51:17 AM UTC 24 4862685379 ps
T122 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/4.rstmgr_stress_all.1500875627 Oct 12 12:50:38 AM UTC 24 Oct 12 12:51:17 AM UTC 24 8253810821 ps
T270 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_sw_rst.1675491010 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:18 AM UTC 24 264024111 ps
T271 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_sw_rst_reset_race.537048721 Oct 12 12:51:16 AM UTC 24 Oct 12 12:51:18 AM UTC 24 207078993 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_sec_cm_scan_intersig_mubi.779390980 Oct 12 12:51:16 AM UTC 24 Oct 12 12:51:18 AM UTC 24 112196592 ps
T65 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_leaf_rst_cnsty.3649468495 Oct 12 12:51:12 AM UTC 24 Oct 12 12:51:18 AM UTC 24 1270050684 ps
T273 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_leaf_rst_shadow_attack.4087426071 Oct 12 12:51:16 AM UTC 24 Oct 12 12:51:18 AM UTC 24 301860369 ps
T274 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/20.rstmgr_leaf_rst_cnsty.2963265211 Oct 12 12:51:09 AM UTC 24 Oct 12 12:51:18 AM UTC 24 2433182763 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/14.rstmgr_stress_all.796303384 Oct 12 12:50:58 AM UTC 24 Oct 12 12:51:19 AM UTC 24 5496459001 ps
T150 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_reset.3987201159 Oct 12 12:51:11 AM UTC 24 Oct 12 12:51:19 AM UTC 24 1857248511 ps
T275 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_sw_rst.3860773054 Oct 12 12:51:16 AM UTC 24 Oct 12 12:51:19 AM UTC 24 331989810 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_reset.1686520862 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:19 AM UTC 24 1177963583 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/18.rstmgr_stress_all.2413474759 Oct 12 12:51:05 AM UTC 24 Oct 12 12:51:20 AM UTC 24 2569210638 ps
T278 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/23.rstmgr_alert_test.801640562 Oct 12 12:51:18 AM UTC 24 Oct 12 12:51:20 AM UTC 24 74999684 ps
T279 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/22.rstmgr_leaf_rst_cnsty.3244111099 Oct 12 12:51:14 AM UTC 24 Oct 12 12:51:21 AM UTC 24 1270128184 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_por_stretcher.4152374321 Oct 12 12:51:18 AM UTC 24 Oct 12 12:51:20 AM UTC 24 117615458 ps
T281 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/25.rstmgr_por_stretcher.1920481196 Oct 12 12:51:19 AM UTC 24 Oct 12 12:51:21 AM UTC 24 139706683 ps
T282 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_alert_test.2904628209 Oct 12 12:51:19 AM UTC 24 Oct 12 12:51:21 AM UTC 24 74362472 ps
T283 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_sw_rst_reset_race.3582259247 Oct 12 12:51:18 AM UTC 24 Oct 12 12:51:21 AM UTC 24 179281067 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/16.rstmgr_stress_all.248362700 Oct 12 12:51:02 AM UTC 24 Oct 12 12:51:21 AM UTC 24 4195186521 ps
T285 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_smoke.3691165949 Oct 12 12:51:18 AM UTC 24 Oct 12 12:51:21 AM UTC 24 207654975 ps
T286 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/25.rstmgr_sw_rst_reset_race.3283266992 Oct 12 12:51:19 AM UTC 24 Oct 12 12:51:21 AM UTC 24 74118064 ps
T287 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_sec_cm_scan_intersig_mubi.3743489108 Oct 12 12:51:18 AM UTC 24 Oct 12 12:51:21 AM UTC 24 161861000 ps
T288 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_sw_rst.1071671167 Oct 12 12:51:18 AM UTC 24 Oct 12 12:51:21 AM UTC 24 144618177 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/25.rstmgr_reset.3150706509 Oct 12 12:51:19 AM UTC 24 Oct 12 12:51:23 AM UTC 24 784952871 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/11.rstmgr_stress_all.4041883914 Oct 12 12:50:52 AM UTC 24 Oct 12 12:51:24 AM UTC 24 9146349777 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/21.rstmgr_stress_all.969871145 Oct 12 12:51:13 AM UTC 24 Oct 12 12:51:24 AM UTC 24 2151874226 ps
T291 /workspaces/repo/scratch/os_regression_2024_10_11/rstmgr-sim-vcs/coverage/default/24.rstmgr_reset.197374175 Oct 12 12:51:18 AM UTC 24 Oct 12 12:51:24 AM UTC 24 911627113 ps
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