Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.67 99.07 96.67 100.00 100.00 98.82 98.33 90.79


Total test records in report: 901
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T251 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.1747206462 Oct 09 06:25:29 AM UTC 24 Oct 09 06:30:18 AM UTC 24 509014248122 ps
T438 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.3016501 Oct 09 06:28:47 AM UTC 24 Oct 09 06:30:28 AM UTC 24 43913610541 ps
T439 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.775837733 Oct 09 06:30:07 AM UTC 24 Oct 09 06:30:29 AM UTC 24 42915535569 ps
T440 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.1277195488 Oct 09 06:30:29 AM UTC 24 Oct 09 06:30:31 AM UTC 24 571913907 ps
T441 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.2856537523 Oct 09 06:25:06 AM UTC 24 Oct 09 06:30:38 AM UTC 24 204950954904 ps
T442 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.2625143604 Oct 09 06:30:32 AM UTC 24 Oct 09 06:30:43 AM UTC 24 6069306840 ps
T222 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup.3611573015 Oct 09 06:23:45 AM UTC 24 Oct 09 06:30:46 AM UTC 24 552477546612 ps
T69 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.380038751 Oct 09 06:30:19 AM UTC 24 Oct 09 06:30:55 AM UTC 24 52323058783 ps
T83 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_wakeup_fixed.3600568610 Oct 09 06:17:04 AM UTC 24 Oct 09 06:31:04 AM UTC 24 617017548728 ps
T84 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_polled_fixed.1505236555 Oct 09 06:07:56 AM UTC 24 Oct 09 06:31:08 AM UTC 24 485706198025 ps
T85 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.3813266305 Oct 09 06:29:02 AM UTC 24 Oct 09 06:31:16 AM UTC 24 325188914348 ps
T86 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.260110937 Oct 09 06:23:53 AM UTC 24 Oct 09 06:31:23 AM UTC 24 335801814932 ps
T87 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_both.2476354398 Oct 09 06:26:40 AM UTC 24 Oct 09 06:31:34 AM UTC 24 385557821949 ps
T88 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled.2234789988 Oct 09 06:19:41 AM UTC 24 Oct 09 06:31:38 AM UTC 24 490977059503 ps
T89 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.4259331927 Oct 09 06:31:35 AM UTC 24 Oct 09 06:31:38 AM UTC 24 4765520227 ps
T90 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.3388490892 Oct 09 06:31:38 AM UTC 24 Oct 09 06:31:46 AM UTC 24 23657300178 ps
T91 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.3611043544 Oct 09 06:26:35 AM UTC 24 Oct 09 06:31:49 AM UTC 24 404501438785 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.380587952 Oct 09 06:22:30 AM UTC 24 Oct 09 06:31:56 AM UTC 24 183404030408 ps
T443 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.2855027803 Oct 09 06:31:56 AM UTC 24 Oct 09 06:32:01 AM UTC 24 329214358 ps
T261 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.2166130954 Oct 09 06:31:47 AM UTC 24 Oct 09 06:32:10 AM UTC 24 16834597268 ps
T444 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.3739478336 Oct 09 06:32:01 AM UTC 24 Oct 09 06:32:10 AM UTC 24 5969989027 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.1054847756 Oct 09 06:29:02 AM UTC 24 Oct 09 06:32:13 AM UTC 24 494891602166 ps
T445 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.1913130040 Oct 09 06:27:29 AM UTC 24 Oct 09 06:32:15 AM UTC 24 323235452599 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.2031280564 Oct 09 06:29:28 AM UTC 24 Oct 09 06:32:25 AM UTC 24 166643709820 ps
T270 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.1434565693 Oct 09 06:31:17 AM UTC 24 Oct 09 06:32:25 AM UTC 24 161840757240 ps
T446 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/3.adc_ctrl_filters_polled_fixed.507572695 Oct 09 06:07:07 AM UTC 24 Oct 09 06:32:32 AM UTC 24 498493878246 ps
T262 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.2691768918 Oct 09 06:30:46 AM UTC 24 Oct 09 06:32:36 AM UTC 24 165248162123 ps
T246 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.489068393 Oct 09 06:30:00 AM UTC 24 Oct 09 06:32:44 AM UTC 24 161958270306 ps
T447 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.3824645161 Oct 09 06:32:44 AM UTC 24 Oct 09 06:32:57 AM UTC 24 4641812682 ps
T448 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.474415105 Oct 09 06:26:06 AM UTC 24 Oct 09 06:33:04 AM UTC 24 255235432114 ps
T449 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.2754280150 Oct 09 06:30:55 AM UTC 24 Oct 09 06:33:09 AM UTC 24 168741075988 ps
T329 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_both.842135194 Oct 09 06:28:38 AM UTC 24 Oct 09 06:33:17 AM UTC 24 166734476013 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.586236447 Oct 09 06:33:10 AM UTC 24 Oct 09 06:33:28 AM UTC 24 4383742381 ps
T228 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.1752747012 Oct 09 06:30:29 AM UTC 24 Oct 09 06:33:29 AM UTC 24 392833310392 ps
T450 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.1238034217 Oct 09 06:27:04 AM UTC 24 Oct 09 06:33:30 AM UTC 24 90699103905 ps
T451 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.3810199414 Oct 09 06:26:22 AM UTC 24 Oct 09 06:33:32 AM UTC 24 166423382729 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.3041254999 Oct 09 06:33:29 AM UTC 24 Oct 09 06:33:32 AM UTC 24 457681080 ps
T234 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.1058810191 Oct 09 06:20:09 AM UTC 24 Oct 09 06:33:49 AM UTC 24 506806977999 ps
T453 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup_fixed.3856544727 Oct 09 06:29:28 AM UTC 24 Oct 09 06:33:52 AM UTC 24 195898778909 ps
T164 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_both.3454649487 Oct 09 06:10:27 AM UTC 24 Oct 09 06:33:54 AM UTC 24 505724589808 ps
T454 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.2524436888 Oct 09 06:33:30 AM UTC 24 Oct 09 06:33:56 AM UTC 24 5876712583 ps
T455 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.2765470092 Oct 09 06:32:58 AM UTC 24 Oct 09 06:33:58 AM UTC 24 35942096117 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_interrupt_fixed.4190387048 Oct 09 06:22:26 AM UTC 24 Oct 09 06:34:08 AM UTC 24 489150260021 ps
T457 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.1601238846 Oct 09 06:31:09 AM UTC 24 Oct 09 06:34:09 AM UTC 24 210575319944 ps
T254 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/2.adc_ctrl_filters_wakeup.2876573338 Oct 09 06:07:07 AM UTC 24 Oct 09 06:34:11 AM UTC 24 554176983329 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.3831350461 Oct 09 06:29:20 AM UTC 24 Oct 09 06:34:13 AM UTC 24 369090887132 ps
T458 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.3412766829 Oct 09 06:34:08 AM UTC 24 Oct 09 06:34:21 AM UTC 24 3061090287 ps
T459 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.1225291552 Oct 09 06:24:01 AM UTC 24 Oct 09 06:34:22 AM UTC 24 111996695305 ps
T165 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.1530487110 Oct 09 06:32:26 AM UTC 24 Oct 09 06:34:23 AM UTC 24 347356163399 ps
T460 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.1438947352 Oct 09 06:34:15 AM UTC 24 Oct 09 06:34:23 AM UTC 24 2715801980 ps
T461 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.3366126526 Oct 09 06:34:23 AM UTC 24 Oct 09 06:34:26 AM UTC 24 504166235 ps
T462 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.4075000929 Oct 09 06:32:26 AM UTC 24 Oct 09 06:34:35 AM UTC 24 191862557048 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_clock_gating.1603403321 Oct 09 06:22:56 AM UTC 24 Oct 09 06:34:38 AM UTC 24 338184539883 ps
T463 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.1927782964 Oct 09 06:34:24 AM UTC 24 Oct 09 06:34:38 AM UTC 24 5851610162 ps
T464 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.3496728209 Oct 09 06:26:27 AM UTC 24 Oct 09 06:34:42 AM UTC 24 166473747955 ps
T465 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.320577888 Oct 09 06:27:35 AM UTC 24 Oct 09 06:34:52 AM UTC 24 327802854641 ps
T466 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.1702135231 Oct 09 06:35:23 AM UTC 24 Oct 09 06:35:45 AM UTC 24 5866861477 ps
T467 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.125405772 Oct 09 06:28:49 AM UTC 24 Oct 09 06:34:56 AM UTC 24 94073548856 ps
T468 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.1463979730 Oct 09 06:26:01 AM UTC 24 Oct 09 06:35:02 AM UTC 24 91264391865 ps
T297 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.4253282763 Oct 09 06:32:14 AM UTC 24 Oct 09 06:35:12 AM UTC 24 164247217944 ps
T469 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.1211874739 Oct 09 06:35:03 AM UTC 24 Oct 09 06:35:12 AM UTC 24 3885891015 ps
T470 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.301921262 Oct 09 06:23:19 AM UTC 24 Oct 09 06:35:18 AM UTC 24 118966277751 ps
T201 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.1964595066 Oct 09 06:34:36 AM UTC 24 Oct 09 06:35:19 AM UTC 24 159687396448 ps
T471 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.1741623945 Oct 09 06:34:10 AM UTC 24 Oct 09 06:35:19 AM UTC 24 31868680559 ps
T472 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.2420541468 Oct 09 06:35:20 AM UTC 24 Oct 09 06:35:22 AM UTC 24 364625291 ps
T473 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.222858447 Oct 09 06:23:46 AM UTC 24 Oct 09 06:35:23 AM UTC 24 604482018486 ps
T240 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup.2239538130 Oct 09 06:18:29 AM UTC 24 Oct 09 06:35:23 AM UTC 24 363652069075 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.1276172772 Oct 09 06:35:19 AM UTC 24 Oct 09 06:35:32 AM UTC 24 65197526912 ps
T474 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.849667971 Oct 09 06:29:02 AM UTC 24 Oct 09 06:35:39 AM UTC 24 489857555375 ps
T475 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.1708289727 Oct 09 06:33:33 AM UTC 24 Oct 09 06:35:46 AM UTC 24 163050434149 ps
T332 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.605498692 Oct 09 06:29:00 AM UTC 24 Oct 09 06:35:55 AM UTC 24 164724931928 ps
T476 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_interrupt_fixed.3983970328 Oct 09 06:13:07 AM UTC 24 Oct 09 06:35:56 AM UTC 24 485790541131 ps
T477 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.975847054 Oct 09 06:35:57 AM UTC 24 Oct 09 06:36:16 AM UTC 24 3934444134 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.164611021 Oct 09 06:32:33 AM UTC 24 Oct 09 06:36:21 AM UTC 24 335263443789 ps
T478 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.1114462431 Oct 09 06:35:24 AM UTC 24 Oct 09 06:36:38 AM UTC 24 166203919144 ps
T177 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.343851120 Oct 09 06:24:21 AM UTC 24 Oct 09 06:36:39 AM UTC 24 328721067380 ps
T479 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.3071957715 Oct 09 06:27:55 AM UTC 24 Oct 09 06:36:39 AM UTC 24 612400216011 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.4135359298 Oct 09 06:36:40 AM UTC 24 Oct 09 06:36:43 AM UTC 24 401249870 ps
T255 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled.4162791386 Oct 09 06:33:31 AM UTC 24 Oct 09 06:36:43 AM UTC 24 166044577346 ps
T205 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.843550913 Oct 09 06:24:25 AM UTC 24 Oct 09 06:36:48 AM UTC 24 324776021150 ps
T178 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.377548151 Oct 09 06:31:05 AM UTC 24 Oct 09 06:36:52 AM UTC 24 540010468692 ps
T481 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.3136243925 Oct 09 06:35:13 AM UTC 24 Oct 09 06:36:52 AM UTC 24 42410148028 ps
T286 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.1419558395 Oct 09 06:36:38 AM UTC 24 Oct 09 06:36:54 AM UTC 24 10756333988 ps
T482 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.634289318 Oct 09 06:36:43 AM UTC 24 Oct 09 06:37:10 AM UTC 24 5945182186 ps
T241 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_clock_gating.153238302 Oct 09 06:19:09 AM UTC 24 Oct 09 06:37:22 AM UTC 24 477563409847 ps
T483 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/4.adc_ctrl_filters_wakeup_fixed.3313290580 Oct 09 06:07:37 AM UTC 24 Oct 09 06:37:28 AM UTC 24 615887932287 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.4164602430 Oct 09 06:30:44 AM UTC 24 Oct 09 06:37:29 AM UTC 24 159483125974 ps
T485 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.1731653491 Oct 09 06:37:30 AM UTC 24 Oct 09 06:37:36 AM UTC 24 3564257516 ps
T486 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.4007469240 Oct 09 06:31:39 AM UTC 24 Oct 09 06:37:38 AM UTC 24 73340367058 ps
T487 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.131049074 Oct 09 06:33:59 AM UTC 24 Oct 09 06:37:43 AM UTC 24 166418060513 ps
T488 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.2805206178 Oct 09 06:37:36 AM UTC 24 Oct 09 06:37:48 AM UTC 24 36223617000 ps
T489 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_filters_wakeup_fixed.2487827153 Oct 09 06:12:02 AM UTC 24 Oct 09 06:37:50 AM UTC 24 601261436833 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.3382265493 Oct 09 06:34:58 AM UTC 24 Oct 09 06:37:51 AM UTC 24 578393437091 ps
T490 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.3097070017 Oct 09 06:35:24 AM UTC 24 Oct 09 06:37:53 AM UTC 24 170840944950 ps
T491 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.2179341135 Oct 09 06:37:51 AM UTC 24 Oct 09 06:37:54 AM UTC 24 350132165 ps
T38 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.3464635537 Oct 09 06:37:44 AM UTC 24 Oct 09 06:37:54 AM UTC 24 2337012717 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.3014440344 Oct 09 06:37:53 AM UTC 24 Oct 09 06:37:57 AM UTC 24 5732902720 ps
T167 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.2058116413 Oct 09 06:36:53 AM UTC 24 Oct 09 06:37:57 AM UTC 24 329991137313 ps
T168 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.3217792034 Oct 09 06:27:18 AM UTC 24 Oct 09 06:38:07 AM UTC 24 496789557150 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.474429532 Oct 09 06:30:39 AM UTC 24 Oct 09 06:38:13 AM UTC 24 485892298497 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.3367816351 Oct 09 06:36:17 AM UTC 24 Oct 09 06:38:21 AM UTC 24 40678763497 ps
T247 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_both.3714256759 Oct 09 06:35:56 AM UTC 24 Oct 09 06:38:45 AM UTC 24 159529733363 ps
T494 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.536591142 Oct 09 06:37:11 AM UTC 24 Oct 09 06:38:55 AM UTC 24 198131360933 ps
T495 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.307482199 Oct 09 06:38:46 AM UTC 24 Oct 09 06:39:06 AM UTC 24 4153722045 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.4018101661 Oct 09 06:37:23 AM UTC 24 Oct 09 06:39:09 AM UTC 24 159755448461 ps
T349 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.943304313 Oct 09 06:34:12 AM UTC 24 Oct 09 06:39:11 AM UTC 24 67750082251 ps
T39 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.3599237001 Oct 09 06:39:09 AM UTC 24 Oct 09 06:39:20 AM UTC 24 2012886422 ps
T496 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.159093616 Oct 09 06:39:21 AM UTC 24 Oct 09 06:39:24 AM UTC 24 506376949 ps
T497 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.3479788524 Oct 09 06:39:26 AM UTC 24 Oct 09 06:39:50 AM UTC 24 5708353732 ps
T498 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled_fixed.712555133 Oct 09 06:18:10 AM UTC 24 Oct 09 06:40:02 AM UTC 24 486745617942 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.593115007 Oct 09 06:38:55 AM UTC 24 Oct 09 06:40:13 AM UTC 24 35674517961 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.1139432762 Oct 09 06:32:37 AM UTC 24 Oct 09 06:40:23 AM UTC 24 166082391782 ps
T501 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.431189034 Oct 09 06:32:11 AM UTC 24 Oct 09 06:40:30 AM UTC 24 333881713393 ps
T199 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.4137223314 Oct 09 06:34:23 AM UTC 24 Oct 09 06:40:47 AM UTC 24 541927867459 ps
T317 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.2568967132 Oct 09 06:37:54 AM UTC 24 Oct 09 06:40:48 AM UTC 24 327329025515 ps
T166 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.3628974250 Oct 09 06:33:34 AM UTC 24 Oct 09 06:40:48 AM UTC 24 160924668766 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.1633957018 Oct 09 06:35:47 AM UTC 24 Oct 09 06:40:53 AM UTC 24 440900226053 ps
T295 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.1750016032 Oct 09 06:34:53 AM UTC 24 Oct 09 06:40:55 AM UTC 24 495919997546 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.3984529868 Oct 09 06:23:36 AM UTC 24 Oct 09 06:40:57 AM UTC 24 336115556260 ps
T503 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.2156931858 Oct 09 06:40:55 AM UTC 24 Oct 09 06:41:02 AM UTC 24 2731279177 ps
T504 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.263653448 Oct 09 06:36:50 AM UTC 24 Oct 09 06:41:07 AM UTC 24 495773754822 ps
T505 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.3072656440 Oct 09 06:41:03 AM UTC 24 Oct 09 06:41:20 AM UTC 24 3199976136 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.950849152 Oct 09 06:39:51 AM UTC 24 Oct 09 06:41:21 AM UTC 24 168834437965 ps
T507 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt_fixed.4010889148 Oct 09 06:33:50 AM UTC 24 Oct 09 06:41:23 AM UTC 24 163584586926 ps
T508 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.2739183078 Oct 09 06:41:21 AM UTC 24 Oct 09 06:41:24 AM UTC 24 498119264 ps
T509 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.4258140944 Oct 09 06:40:56 AM UTC 24 Oct 09 06:41:30 AM UTC 24 31085248918 ps
T510 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.2996170518 Oct 09 06:41:22 AM UTC 24 Oct 09 06:41:30 AM UTC 24 5644336089 ps
T511 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.2902738077 Oct 09 06:34:27 AM UTC 24 Oct 09 06:41:49 AM UTC 24 496510019140 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup.2048846605 Oct 09 06:36:55 AM UTC 24 Oct 09 06:41:55 AM UTC 24 432368806016 ps
T291 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.1169996194 Oct 09 06:34:39 AM UTC 24 Oct 09 06:41:56 AM UTC 24 690385333732 ps
T512 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup_fixed.4000560645 Oct 09 06:33:54 AM UTC 24 Oct 09 06:42:00 AM UTC 24 201242865579 ps
T265 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.9487266 Oct 09 06:24:50 AM UTC 24 Oct 09 06:42:02 AM UTC 24 381321882465 ps
T513 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.1583595413 Oct 09 06:42:03 AM UTC 24 Oct 09 06:42:06 AM UTC 24 3854681482 ps
T514 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.3223855209 Oct 09 06:35:40 AM UTC 24 Oct 09 06:42:07 AM UTC 24 487831432049 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled.925301131 Oct 09 06:18:10 AM UTC 24 Oct 09 06:42:30 AM UTC 24 495067688478 ps
T278 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.1466574124 Oct 09 06:37:55 AM UTC 24 Oct 09 06:42:44 AM UTC 24 161955471056 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.2674893108 Oct 09 06:42:31 AM UTC 24 Oct 09 06:42:47 AM UTC 24 2514249407 ps
T516 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.560120916 Oct 09 06:42:48 AM UTC 24 Oct 09 06:42:52 AM UTC 24 347351644 ps
T517 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.3257164430 Oct 09 06:42:52 AM UTC 24 Oct 09 06:42:58 AM UTC 24 6038001637 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_stress_all.703291995 Oct 09 06:24:15 AM UTC 24 Oct 09 06:43:06 AM UTC 24 367280266030 ps
T268 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all.4094694887 Oct 09 06:37:48 AM UTC 24 Oct 09 06:43:06 AM UTC 24 329462445083 ps
T518 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.3453385194 Oct 09 06:34:43 AM UTC 24 Oct 09 06:43:07 AM UTC 24 401626057215 ps
T519 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.3369444047 Oct 09 06:35:46 AM UTC 24 Oct 09 06:43:22 AM UTC 24 199658598989 ps
T304 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.399428344 Oct 09 06:38:14 AM UTC 24 Oct 09 06:43:29 AM UTC 24 419944808836 ps
T520 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.2031096783 Oct 09 06:42:07 AM UTC 24 Oct 09 06:43:32 AM UTC 24 22523836162 ps
T521 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.136536920 Oct 09 06:36:44 AM UTC 24 Oct 09 06:43:42 AM UTC 24 160415695565 ps
T308 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.3426346093 Oct 09 06:31:24 AM UTC 24 Oct 09 06:43:47 AM UTC 24 328090534427 ps
T522 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.235679899 Oct 09 06:35:14 AM UTC 24 Oct 09 06:43:48 AM UTC 24 96173219665 ps
T523 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.691338275 Oct 09 06:28:51 AM UTC 24 Oct 09 06:43:52 AM UTC 24 340336722153 ps
T524 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.809693929 Oct 09 06:43:47 AM UTC 24 Oct 09 06:43:56 AM UTC 24 3205767952 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.885841714 Oct 09 06:33:18 AM UTC 24 Oct 09 06:43:58 AM UTC 24 556829773055 ps
T525 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.2319562115 Oct 09 06:43:56 AM UTC 24 Oct 09 06:44:04 AM UTC 24 32652935939 ps
T526 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled_fixed.3686078388 Oct 09 06:24:22 AM UTC 24 Oct 09 06:44:05 AM UTC 24 481031722647 ps
T527 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.2599818361 Oct 09 06:44:05 AM UTC 24 Oct 09 06:44:07 AM UTC 24 435932993 ps
T260 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_both.3004782122 Oct 09 06:43:42 AM UTC 24 Oct 09 06:44:11 AM UTC 24 179533146374 ps
T528 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.235425185 Oct 09 06:44:06 AM UTC 24 Oct 09 06:44:19 AM UTC 24 5919017405 ps
T190 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.52932230 Oct 09 06:33:04 AM UTC 24 Oct 09 06:44:40 AM UTC 24 123764349623 ps
T529 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.238902662 Oct 09 06:32:11 AM UTC 24 Oct 09 06:44:48 AM UTC 24 329526218209 ps
T530 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.3450437673 Oct 09 06:36:53 AM UTC 24 Oct 09 06:44:55 AM UTC 24 167424125446 ps
T226 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_clock_gating.2785338025 Oct 09 06:40:48 AM UTC 24 Oct 09 06:45:04 AM UTC 24 349713079812 ps
T531 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.2795408892 Oct 09 06:37:55 AM UTC 24 Oct 09 06:45:07 AM UTC 24 330992583177 ps
T532 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all.2034205526 Oct 09 06:42:44 AM UTC 24 Oct 09 06:45:20 AM UTC 24 173791946392 ps
T533 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.1829046248 Oct 09 06:36:22 AM UTC 24 Oct 09 06:45:28 AM UTC 24 113731848623 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.707419374 Oct 09 06:40:49 AM UTC 24 Oct 09 06:45:32 AM UTC 24 328231518782 ps
T534 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.1454314402 Oct 09 06:45:20 AM UTC 24 Oct 09 06:45:36 AM UTC 24 2821027632 ps
T193 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.1713842661 Oct 09 06:37:39 AM UTC 24 Oct 09 06:45:37 AM UTC 24 63152675961 ps
T535 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_wakeup_fixed.397687865 Oct 09 06:18:34 AM UTC 24 Oct 09 06:45:55 AM UTC 24 588391080145 ps
T536 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.4030813497 Oct 09 06:45:29 AM UTC 24 Oct 09 06:45:56 AM UTC 24 44222949334 ps
T537 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.1933501609 Oct 09 06:34:24 AM UTC 24 Oct 09 06:45:56 AM UTC 24 328871072607 ps
T538 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.1845726722 Oct 09 06:45:37 AM UTC 24 Oct 09 06:45:57 AM UTC 24 3391550749 ps
T539 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.3338242587 Oct 09 06:45:56 AM UTC 24 Oct 09 06:45:59 AM UTC 24 533924122 ps
T540 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all.694517657 Oct 09 06:45:38 AM UTC 24 Oct 09 06:46:03 AM UTC 24 11080899797 ps
T541 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.3516724420 Oct 09 06:40:47 AM UTC 24 Oct 09 06:46:07 AM UTC 24 192881661893 ps
T542 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.2800653978 Oct 09 06:44:08 AM UTC 24 Oct 09 06:46:09 AM UTC 24 165949571808 ps
T543 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.1552565012 Oct 09 06:45:57 AM UTC 24 Oct 09 06:46:11 AM UTC 24 5686948362 ps
T544 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.4109202985 Oct 09 06:43:49 AM UTC 24 Oct 09 06:46:21 AM UTC 24 40091291402 ps
T545 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.1757957701 Oct 09 06:30:10 AM UTC 24 Oct 09 06:46:26 AM UTC 24 142888425257 ps
T338 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.4217149327 Oct 09 06:37:58 AM UTC 24 Oct 09 06:46:34 AM UTC 24 190921360681 ps
T546 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.1878645335 Oct 09 06:46:28 AM UTC 24 Oct 09 06:46:48 AM UTC 24 4460568758 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.2285904621 Oct 09 06:33:53 AM UTC 24 Oct 09 06:47:12 AM UTC 24 666655280478 ps
T547 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_clock_gating.3692328059 Oct 09 06:41:58 AM UTC 24 Oct 09 06:47:12 AM UTC 24 188037378511 ps
T548 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.4131167488 Oct 09 06:38:21 AM UTC 24 Oct 09 06:47:26 AM UTC 24 199028980037 ps
T549 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.2054328345 Oct 09 06:47:26 AM UTC 24 Oct 09 06:47:28 AM UTC 24 331437439 ps
T550 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.3818762915 Oct 09 06:47:13 AM UTC 24 Oct 09 06:47:29 AM UTC 24 1966233854 ps
T279 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.178361046 Oct 09 06:43:33 AM UTC 24 Oct 09 06:47:31 AM UTC 24 328325251677 ps
T551 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup.121023652 Oct 09 06:41:50 AM UTC 24 Oct 09 06:47:32 AM UTC 24 371807143599 ps
T552 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.1305670432 Oct 09 06:47:29 AM UTC 24 Oct 09 06:47:37 AM UTC 24 5815142460 ps
T248 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.81668966 Oct 09 06:23:39 AM UTC 24 Oct 09 06:47:46 AM UTC 24 503316529192 ps
T334 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.898345562 Oct 09 06:21:22 AM UTC 24 Oct 09 06:47:49 AM UTC 24 492994130962 ps
T553 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.3722091450 Oct 09 06:43:23 AM UTC 24 Oct 09 06:47:49 AM UTC 24 377182386423 ps
T554 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.3706241805 Oct 09 06:46:35 AM UTC 24 Oct 09 06:47:53 AM UTC 24 21839300810 ps
T179 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup.1841931370 Oct 09 06:46:07 AM UTC 24 Oct 09 06:47:56 AM UTC 24 656291682094 ps
T156 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.3414184639 Oct 09 06:27:52 AM UTC 24 Oct 09 06:47:57 AM UTC 24 369557661183 ps
T555 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.3796799349 Oct 09 06:47:57 AM UTC 24 Oct 09 06:48:02 AM UTC 24 3927764510 ps
T556 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.1127630128 Oct 09 06:42:08 AM UTC 24 Oct 09 06:48:09 AM UTC 24 98560175418 ps
T196 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.889888576 Oct 09 06:41:08 AM UTC 24 Oct 09 06:48:09 AM UTC 24 105540043565 ps
T238 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.1785824622 Oct 09 06:26:28 AM UTC 24 Oct 09 06:48:11 AM UTC 24 438662192008 ps
T557 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.266758844 Oct 09 06:48:12 AM UTC 24 Oct 09 06:48:16 AM UTC 24 287700168 ps
T558 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled_fixed.1017557704 Oct 09 06:44:12 AM UTC 24 Oct 09 06:48:17 AM UTC 24 331203988427 ps
T559 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.328305491 Oct 09 06:48:16 AM UTC 24 Oct 09 06:48:25 AM UTC 24 6031474120 ps
T560 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.999276309 Oct 09 06:47:58 AM UTC 24 Oct 09 06:48:36 AM UTC 24 33781744384 ps
T561 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt_fixed.284182933 Oct 09 06:41:31 AM UTC 24 Oct 09 06:48:40 AM UTC 24 479559089038 ps
T562 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.1061242654 Oct 09 06:32:16 AM UTC 24 Oct 09 06:48:52 AM UTC 24 329562640633 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.3121565500 Oct 09 06:40:58 AM UTC 24 Oct 09 06:48:52 AM UTC 24 77063890830 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.2209083439 Oct 09 06:41:25 AM UTC 24 Oct 09 06:49:05 AM UTC 24 163485023225 ps
T565 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.3750163675 Oct 09 06:48:09 AM UTC 24 Oct 09 06:49:09 AM UTC 24 165141220337 ps
T256 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_clock_gating.3522847271 Oct 09 06:46:12 AM UTC 24 Oct 09 06:49:15 AM UTC 24 332725765920 ps
T566 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.2572261453 Oct 09 06:49:16 AM UTC 24 Oct 09 06:49:21 AM UTC 24 3023482025 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.115707444 Oct 09 06:31:49 AM UTC 24 Oct 09 06:49:21 AM UTC 24 357875269994 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all.3775963456 Oct 09 06:48:10 AM UTC 24 Oct 09 06:49:29 AM UTC 24 35811752016 ps
T569 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup_fixed.4040669210 Oct 09 06:47:50 AM UTC 24 Oct 09 06:49:22 AM UTC 24 593595367556 ps
T313 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_both.3378628645 Oct 09 06:45:08 AM UTC 24 Oct 09 06:49:29 AM UTC 24 377448575644 ps
T570 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.2360374279 Oct 09 06:49:30 AM UTC 24 Oct 09 06:49:33 AM UTC 24 462523151 ps
T571 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.3131554012 Oct 09 06:49:35 AM UTC 24 Oct 09 06:49:40 AM UTC 24 5889948022 ps
T300 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.974927715 Oct 09 06:36:40 AM UTC 24 Oct 09 06:49:40 AM UTC 24 325845172251 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.1238080425 Oct 09 06:23:32 AM UTC 24 Oct 09 06:49:42 AM UTC 24 4728572519412 ps
T572 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.3148368206 Oct 09 06:47:38 AM UTC 24 Oct 09 06:49:44 AM UTC 24 164968597349 ps
T573 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_both.3033820087 Oct 09 06:42:01 AM UTC 24 Oct 09 06:49:48 AM UTC 24 175404995595 ps
T574 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.4024111811 Oct 09 06:42:59 AM UTC 24 Oct 09 06:49:49 AM UTC 24 496218257083 ps
T575 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.1912135285 Oct 09 06:49:22 AM UTC 24 Oct 09 06:49:49 AM UTC 24 15710935698 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.1782308174 Oct 09 06:27:40 AM UTC 24 Oct 09 06:50:16 AM UTC 24 493354688398 ps
T576 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.2533404097 Oct 09 06:49:22 AM UTC 24 Oct 09 06:50:17 AM UTC 24 45330991436 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled.4273649091 Oct 09 06:49:41 AM UTC 24 Oct 09 06:50:19 AM UTC 24 162919086869 ps
T577 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.972232751 Oct 09 06:50:17 AM UTC 24 Oct 09 06:50:31 AM UTC 24 2782841287 ps
T578 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_lowpower_counter.394172915 Oct 09 06:50:20 AM UTC 24 Oct 09 06:50:32 AM UTC 24 41289263555 ps
T579 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.727958980 Oct 09 06:41:30 AM UTC 24 Oct 09 06:50:32 AM UTC 24 160246726738 ps
T328 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup.3380937360 Oct 09 06:40:30 AM UTC 24 Oct 09 06:50:33 AM UTC 24 383330344361 ps
T580 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.1570302337 Oct 09 06:50:33 AM UTC 24 Oct 09 06:50:36 AM UTC 24 1413434810 ps
T581 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.3646989581 Oct 09 06:50:34 AM UTC 24 Oct 09 06:50:38 AM UTC 24 469816145 ps
T582 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled_fixed.853649428 Oct 09 06:43:07 AM UTC 24 Oct 09 06:50:40 AM UTC 24 163765511010 ps
T583 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_smoke.1165547008 Oct 09 06:50:37 AM UTC 24 Oct 09 06:50:46 AM UTC 24 6188297691 ps
T584 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.2559618915 Oct 09 06:47:50 AM UTC 24 Oct 09 06:50:53 AM UTC 24 328417201951 ps
T585 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.32436237 Oct 09 06:43:08 AM UTC 24 Oct 09 06:50:58 AM UTC 24 323847490671 ps
T157 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.3285080471 Oct 09 06:26:23 AM UTC 24 Oct 09 06:50:59 AM UTC 24 486422109574 ps
T586 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.1055791018 Oct 09 06:35:20 AM UTC 24 Oct 09 06:51:10 AM UTC 24 978204382398 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt.2005705799 Oct 09 06:47:33 AM UTC 24 Oct 09 06:51:14 AM UTC 24 325994197902 ps
T587 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all.2946348921 Oct 09 06:50:33 AM UTC 24 Oct 09 06:51:20 AM UTC 24 336206142245 ps
T302 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup.805145120 Oct 09 06:49:49 AM UTC 24 Oct 09 06:51:27 AM UTC 24 179924986527 ps
T588 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_poweron_counter.3214883975 Oct 09 06:51:21 AM UTC 24 Oct 09 06:51:30 AM UTC 24 3562892751 ps
T158 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled.1638571106 Oct 09 06:45:57 AM UTC 24 Oct 09 06:51:55 AM UTC 24 483726069183 ps
T589 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup_fixed.829384329 Oct 09 06:43:30 AM UTC 24 Oct 09 06:52:02 AM UTC 24 583285889038 ps
T590 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_lowpower_counter.1299559978 Oct 09 06:51:28 AM UTC 24 Oct 09 06:52:03 AM UTC 24 35978408922 ps
T591 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.3932388419 Oct 09 06:43:08 AM UTC 24 Oct 09 06:56:16 AM UTC 24 324981655045 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all.1573772540 Oct 09 06:47:13 AM UTC 24 Oct 09 06:52:05 AM UTC 24 504182049112 ps
T592 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_alert_test.3469229790 Oct 09 06:52:03 AM UTC 24 Oct 09 06:52:05 AM UTC 24 316447613 ps
T593 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.2679134294 Oct 09 06:39:07 AM UTC 24 Oct 09 06:52:08 AM UTC 24 124451957574 ps
T594 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_smoke.1697589225 Oct 09 06:52:05 AM UTC 24 Oct 09 06:52:11 AM UTC 24 6020432727 ps
T293 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.3075098919 Oct 09 06:41:24 AM UTC 24 Oct 09 06:52:11 AM UTC 24 502723804848 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all_with_rand_reset.4216051867 Oct 09 06:51:56 AM UTC 24 Oct 09 06:52:31 AM UTC 24 50404153878 ps
T595 /workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled.274585393 Oct 09 06:47:30 AM UTC 24 Oct 09 06:52:31 AM UTC 24 501489668907 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%