T320 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_clock_gating.415204895 |
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|
Oct 09 06:49:06 AM UTC 24 |
Oct 09 06:52:36 AM UTC 24 |
156170124330 ps |
T181 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_both.1338538300 |
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|
Oct 09 06:49:10 AM UTC 24 |
Oct 09 06:52:57 AM UTC 24 |
328041013742 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_polled_fixed.392231280 |
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|
Oct 09 06:47:31 AM UTC 24 |
Oct 09 06:53:01 AM UTC 24 |
159005154229 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt.1521291417 |
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|
Oct 09 06:49:43 AM UTC 24 |
Oct 09 06:53:21 AM UTC 24 |
161279040733 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_both.1367302690 |
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|
Oct 09 06:51:15 AM UTC 24 |
Oct 09 06:53:21 AM UTC 24 |
330255191591 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_poweron_counter.2156279207 |
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|
Oct 09 06:53:02 AM UTC 24 |
Oct 09 06:53:22 AM UTC 24 |
4398716993 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt_fixed.4038671106 |
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|
Oct 09 06:46:03 AM UTC 24 |
Oct 09 06:53:23 AM UTC 24 |
161342797203 ps |
T220 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.168208193 |
|
|
Oct 09 06:45:04 AM UTC 24 |
Oct 09 06:53:29 AM UTC 24 |
346486128702 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_alert_test.3364435023 |
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|
Oct 09 06:53:29 AM UTC 24 |
Oct 09 06:53:32 AM UTC 24 |
437788653 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_fsm_reset.1789784506 |
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|
Oct 09 06:46:49 AM UTC 24 |
Oct 09 06:53:34 AM UTC 24 |
82305560698 ps |
T182 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup.530775083 |
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|
Oct 09 06:35:43 AM UTC 24 |
Oct 09 06:53:35 AM UTC 24 |
370964062470 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt_fixed.4086726838 |
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|
Oct 09 06:50:53 AM UTC 24 |
Oct 09 06:53:36 AM UTC 24 |
165491309005 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_smoke.293238220 |
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|
Oct 09 06:53:32 AM UTC 24 |
Oct 09 06:53:38 AM UTC 24 |
5795997403 ps |
T258 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.1099907194 |
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|
Oct 09 06:40:14 AM UTC 24 |
Oct 09 06:53:39 AM UTC 24 |
506954957913 ps |
T294 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.2830092045 |
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|
Oct 09 06:48:18 AM UTC 24 |
Oct 09 06:53:46 AM UTC 24 |
498521069032 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all_with_rand_reset.606364499 |
|
|
Oct 09 06:53:23 AM UTC 24 |
Oct 09 06:54:04 AM UTC 24 |
32557136492 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt_fixed.3178255298 |
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|
Oct 09 06:48:41 AM UTC 24 |
Oct 09 06:54:26 AM UTC 24 |
337112642809 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_interrupt.2479043759 |
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|
Oct 09 06:46:00 AM UTC 24 |
Oct 09 06:54:36 AM UTC 24 |
162356667328 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled.1532633833 |
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|
Oct 09 06:53:34 AM UTC 24 |
Oct 09 06:54:42 AM UTC 24 |
331073201803 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_fsm_reset.1031578801 |
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|
Oct 09 06:45:33 AM UTC 24 |
Oct 09 06:54:43 AM UTC 24 |
129319543161 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_poweron_counter.1412376482 |
|
|
Oct 09 06:54:37 AM UTC 24 |
Oct 09 06:54:48 AM UTC 24 |
3802479933 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_fsm_reset.1522755424 |
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|
Oct 09 06:43:53 AM UTC 24 |
Oct 09 06:54:52 AM UTC 24 |
108755460238 ps |
T303 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all_with_rand_reset.1392788335 |
|
|
Oct 09 06:54:49 AM UTC 24 |
Oct 09 06:55:02 AM UTC 24 |
11020922116 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_alert_test.4028691906 |
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|
Oct 09 06:55:03 AM UTC 24 |
Oct 09 06:55:05 AM UTC 24 |
451888224 ps |
T613 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_smoke.612961968 |
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|
Oct 09 06:55:06 AM UTC 24 |
Oct 09 06:55:09 AM UTC 24 |
5830567174 ps |
T333 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.627921697 |
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|
Oct 09 06:35:32 AM UTC 24 |
Oct 09 06:55:36 AM UTC 24 |
503753277453 ps |
T614 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_interrupt.3986070411 |
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|
Oct 09 06:50:46 AM UTC 24 |
Oct 09 06:55:37 AM UTC 24 |
162443060184 ps |
T615 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup_fixed.3393661132 |
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|
Oct 09 06:48:53 AM UTC 24 |
Oct 09 06:55:40 AM UTC 24 |
603061025161 ps |
T616 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup_fixed.1806502585 |
|
|
Oct 09 06:53:47 AM UTC 24 |
Oct 09 06:55:55 AM UTC 24 |
393891152840 ps |
T617 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_lowpower_counter.3755846530 |
|
|
Oct 09 06:54:43 AM UTC 24 |
Oct 09 06:55:56 AM UTC 24 |
32228353372 ps |
T618 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.1541143625 |
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|
Oct 09 06:37:58 AM UTC 24 |
Oct 09 06:55:59 AM UTC 24 |
326656992814 ps |
T619 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_lowpower_counter.1491465089 |
|
|
Oct 09 06:53:21 AM UTC 24 |
Oct 09 06:55:59 AM UTC 24 |
41786480479 ps |
T620 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled.844265155 |
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|
Oct 09 06:50:39 AM UTC 24 |
Oct 09 06:56:03 AM UTC 24 |
321119145900 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_poweron_counter.400698056 |
|
|
Oct 09 06:56:04 AM UTC 24 |
Oct 09 06:56:11 AM UTC 24 |
4758799922 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled_fixed.2348765523 |
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|
Oct 09 06:55:37 AM UTC 24 |
Oct 09 06:56:18 AM UTC 24 |
165269387760 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_wakeup_fixed.3950191906 |
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|
Oct 09 06:49:50 AM UTC 24 |
Oct 09 06:56:20 AM UTC 24 |
392133634519 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_lowpower_counter.3639971760 |
|
|
Oct 09 06:56:12 AM UTC 24 |
Oct 09 06:56:37 AM UTC 24 |
32451789365 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_both.1252592003 |
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|
Oct 09 06:54:27 AM UTC 24 |
Oct 09 06:56:38 AM UTC 24 |
166075503608 ps |
T626 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_alert_test.1545274558 |
|
|
Oct 09 06:56:37 AM UTC 24 |
Oct 09 06:56:40 AM UTC 24 |
372221557 ps |
T627 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_smoke.4211880500 |
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|
Oct 09 06:56:38 AM UTC 24 |
Oct 09 06:56:48 AM UTC 24 |
5755296505 ps |
T330 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all_with_rand_reset.922079069 |
|
|
Oct 09 06:56:19 AM UTC 24 |
Oct 09 06:56:52 AM UTC 24 |
67469206089 ps |
T628 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_fsm_reset.3763912297 |
|
|
Oct 09 06:48:03 AM UTC 24 |
Oct 09 06:56:55 AM UTC 24 |
105840157822 ps |
T629 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.1984346631 |
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|
Oct 09 06:48:37 AM UTC 24 |
Oct 09 06:56:58 AM UTC 24 |
161580829021 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_clock_gating.1576415255 |
|
|
Oct 09 06:49:50 AM UTC 24 |
Oct 09 06:57:07 AM UTC 24 |
181731053909 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_polled.3717487330 |
|
|
Oct 09 06:55:10 AM UTC 24 |
Oct 09 06:57:08 AM UTC 24 |
159410042976 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.2852198135 |
|
|
Oct 09 06:40:24 AM UTC 24 |
Oct 09 06:57:10 AM UTC 24 |
332141117896 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.4230740261 |
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|
Oct 09 06:41:56 AM UTC 24 |
Oct 09 06:57:11 AM UTC 24 |
613213938308 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_wakeup_fixed.3139720584 |
|
|
Oct 09 06:46:10 AM UTC 24 |
Oct 09 06:57:22 AM UTC 24 |
621224204165 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_poweron_counter.292476038 |
|
|
Oct 09 06:57:12 AM UTC 24 |
Oct 09 06:57:24 AM UTC 24 |
4810750401 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.836489314 |
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|
Oct 09 06:34:39 AM UTC 24 |
Oct 09 06:57:36 AM UTC 24 |
499886331009 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_lowpower_counter.926811305 |
|
|
Oct 09 06:57:23 AM UTC 24 |
Oct 09 06:57:48 AM UTC 24 |
38947069086 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup_fixed.13379072 |
|
|
Oct 09 06:52:33 AM UTC 24 |
Oct 09 06:57:51 AM UTC 24 |
592121688132 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.999694158 |
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|
Oct 09 06:44:40 AM UTC 24 |
Oct 09 06:57:52 AM UTC 24 |
323101032391 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_alert_test.3893907253 |
|
|
Oct 09 06:57:51 AM UTC 24 |
Oct 09 06:57:54 AM UTC 24 |
473804530 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_clock_gating.2896429040 |
|
|
Oct 09 06:57:09 AM UTC 24 |
Oct 09 06:57:56 AM UTC 24 |
162395811728 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_smoke.861622471 |
|
|
Oct 09 06:57:52 AM UTC 24 |
Oct 09 06:58:04 AM UTC 24 |
5754957453 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_clock_gating.829034071 |
|
|
Oct 09 06:52:38 AM UTC 24 |
Oct 09 06:58:24 AM UTC 24 |
163900011084 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt_fixed.1378961299 |
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|
Oct 09 06:52:11 AM UTC 24 |
Oct 09 06:58:30 AM UTC 24 |
161740935650 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_interrupt.3518675307 |
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|
Oct 09 06:52:11 AM UTC 24 |
Oct 09 06:59:04 AM UTC 24 |
318483910268 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_wakeup.1632674620 |
|
|
Oct 09 06:52:33 AM UTC 24 |
Oct 09 06:59:05 AM UTC 24 |
529584150782 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.2490711706 |
|
|
Oct 09 06:33:57 AM UTC 24 |
Oct 09 06:59:21 AM UTC 24 |
511193533498 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.1332204311 |
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|
Oct 09 06:45:58 AM UTC 24 |
Oct 09 06:59:45 AM UTC 24 |
327526287153 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_wakeup.3854138086 |
|
|
Oct 09 06:53:40 AM UTC 24 |
Oct 09 07:00:02 AM UTC 24 |
188631210753 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_poweron_counter.4004385061 |
|
|
Oct 09 06:59:46 AM UTC 24 |
Oct 09 07:00:08 AM UTC 24 |
4147999143 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt_fixed.2328394936 |
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|
Oct 09 06:55:41 AM UTC 24 |
Oct 09 07:00:11 AM UTC 24 |
323846315027 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_lowpower_counter.2286941736 |
|
|
Oct 09 07:00:09 AM UTC 24 |
Oct 09 07:00:21 AM UTC 24 |
43175869405 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all_with_rand_reset.3587953453 |
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|
Oct 09 06:57:36 AM UTC 24 |
Oct 09 07:00:31 AM UTC 24 |
440683352372 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all_with_rand_reset.1639448010 |
|
|
Oct 09 07:00:12 AM UTC 24 |
Oct 09 07:00:32 AM UTC 24 |
39840041783 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_alert_test.2192303665 |
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|
Oct 09 07:00:31 AM UTC 24 |
Oct 09 07:00:33 AM UTC 24 |
403325425 ps |
T347 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_fsm_reset.3274377144 |
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|
Oct 09 06:54:43 AM UTC 24 |
Oct 09 07:00:37 AM UTC 24 |
82137452216 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_fsm_reset.3197598016 |
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|
Oct 09 06:53:22 AM UTC 24 |
Oct 09 07:00:44 AM UTC 24 |
120080048393 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_interrupt_fixed.2304442479 |
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|
Oct 09 06:49:45 AM UTC 24 |
Oct 09 07:00:50 AM UTC 24 |
505986912863 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_fsm_reset.1956157237 |
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|
Oct 09 06:51:31 AM UTC 24 |
Oct 09 07:00:55 AM UTC 24 |
105015105522 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_smoke.4193740708 |
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|
Oct 09 07:00:33 AM UTC 24 |
Oct 09 07:01:01 AM UTC 24 |
5930283588 ps |
T274 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_both.3037009646 |
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|
Oct 09 06:47:54 AM UTC 24 |
Oct 09 07:01:03 AM UTC 24 |
576483405129 ps |
T346 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_fsm_reset.203021608 |
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|
Oct 09 06:50:32 AM UTC 24 |
Oct 09 07:01:05 AM UTC 24 |
111818345851 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_polled_fixed.3560868206 |
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|
Oct 09 06:53:36 AM UTC 24 |
Oct 09 07:01:41 AM UTC 24 |
334309319601 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_poweron_counter.3281202017 |
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|
Oct 09 07:01:42 AM UTC 24 |
Oct 09 07:01:47 AM UTC 24 |
4837903989 ps |
T340 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_both.2267587707 |
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|
Oct 09 06:59:21 AM UTC 24 |
Oct 09 07:02:08 AM UTC 24 |
186461600751 ps |
T344 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_fsm_reset.3388714811 |
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|
Oct 09 06:49:22 AM UTC 24 |
Oct 09 07:02:18 AM UTC 24 |
128945165526 ps |
T219 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_interrupt.1253895014 |
|
|
Oct 09 06:55:38 AM UTC 24 |
Oct 09 07:02:23 AM UTC 24 |
164567441906 ps |
T259 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_clock_gating.3595700735 |
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|
Oct 09 06:59:05 AM UTC 24 |
Oct 09 07:02:32 AM UTC 24 |
368899338510 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all_with_rand_reset.450948169 |
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|
Oct 09 07:02:18 AM UTC 24 |
Oct 09 07:02:33 AM UTC 24 |
20117137787 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_alert_test.1510758512 |
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|
Oct 09 07:02:32 AM UTC 24 |
Oct 09 07:02:37 AM UTC 24 |
496050562 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_smoke.321248822 |
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|
Oct 09 07:02:33 AM UTC 24 |
Oct 09 07:02:42 AM UTC 24 |
5643950484 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup.1992760471 |
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|
Oct 09 06:55:55 AM UTC 24 |
Oct 09 07:02:45 AM UTC 24 |
236272247690 ps |
T169 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all.3110651014 |
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|
Oct 09 06:43:58 AM UTC 24 |
Oct 09 07:02:53 AM UTC 24 |
294907645417 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_lowpower_counter.1068146876 |
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|
Oct 09 07:01:48 AM UTC 24 |
Oct 09 07:02:59 AM UTC 24 |
33089538155 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup_fixed.3589201379 |
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|
Oct 09 06:51:00 AM UTC 24 |
Oct 09 07:03:00 AM UTC 24 |
201387777378 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_stress_all.1201369101 |
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|
Oct 09 06:52:03 AM UTC 24 |
Oct 09 07:03:11 AM UTC 24 |
336929381382 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt.4262639166 |
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|
Oct 09 07:00:44 AM UTC 24 |
Oct 09 07:03:12 AM UTC 24 |
328607158407 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.4156367588 |
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|
Oct 09 06:37:28 AM UTC 24 |
Oct 09 07:03:12 AM UTC 24 |
516421712527 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt_fixed.3094561135 |
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|
Oct 09 06:53:39 AM UTC 24 |
Oct 09 07:03:13 AM UTC 24 |
165120043510 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_interrupt_fixed.1501842078 |
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|
Oct 09 07:00:51 AM UTC 24 |
Oct 09 07:03:15 AM UTC 24 |
160406822250 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_stress_all.3000651359 |
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|
Oct 09 06:54:54 AM UTC 24 |
Oct 09 07:03:19 AM UTC 24 |
296463172669 ps |
T331 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_wakeup.664505924 |
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|
Oct 09 06:50:59 AM UTC 24 |
Oct 09 07:03:24 AM UTC 24 |
466872225314 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled_fixed.3375472015 |
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|
Oct 09 06:57:57 AM UTC 24 |
Oct 09 07:03:30 AM UTC 24 |
497861713585 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled.1724096471 |
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|
Oct 09 06:56:41 AM UTC 24 |
Oct 09 07:03:33 AM UTC 24 |
162324147218 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_alert_test.2208567782 |
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|
Oct 09 07:03:31 AM UTC 24 |
Oct 09 07:03:33 AM UTC 24 |
391857903 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_poweron_counter.1298708129 |
|
|
Oct 09 07:03:13 AM UTC 24 |
Oct 09 07:03:37 AM UTC 24 |
4788274249 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all.2414904520 |
|
|
Oct 09 06:49:29 AM UTC 24 |
Oct 09 07:03:46 AM UTC 24 |
291316274863 ps |
T287 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all_with_rand_reset.3573115736 |
|
|
Oct 09 07:03:20 AM UTC 24 |
Oct 09 07:03:47 AM UTC 24 |
4308488713 ps |
T273 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_wakeup.996913230 |
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|
Oct 09 06:47:47 AM UTC 24 |
Oct 09 07:03:50 AM UTC 24 |
337937154287 ps |
T298 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt.2888292278 |
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|
Oct 09 06:58:05 AM UTC 24 |
Oct 09 07:03:51 AM UTC 24 |
499578382450 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_smoke.3227686066 |
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|
Oct 09 07:03:34 AM UTC 24 |
Oct 09 07:04:00 AM UTC 24 |
5574060289 ps |
T310 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_clock_gating.3397294733 |
|
|
Oct 09 06:55:59 AM UTC 24 |
Oct 09 07:04:01 AM UTC 24 |
528354289937 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled.4138326383 |
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|
Oct 09 07:00:34 AM UTC 24 |
Oct 09 07:04:34 AM UTC 24 |
324019156749 ps |
T236 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.1961504506 |
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|
Oct 09 06:44:49 AM UTC 24 |
Oct 09 07:04:46 AM UTC 24 |
403055511825 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_both.2844650269 |
|
|
Oct 09 06:57:11 AM UTC 24 |
Oct 09 07:04:47 AM UTC 24 |
170784629399 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_poweron_counter.3227648186 |
|
|
Oct 09 07:04:35 AM UTC 24 |
Oct 09 07:04:53 AM UTC 24 |
3729061148 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_lowpower_counter.878913592 |
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|
Oct 09 07:03:14 AM UTC 24 |
Oct 09 07:04:57 AM UTC 24 |
37841596203 ps |
T316 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.2396894116 |
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|
Oct 09 06:39:13 AM UTC 24 |
Oct 09 07:04:57 AM UTC 24 |
315967552128 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_lowpower_counter.3545170733 |
|
|
Oct 09 07:04:46 AM UTC 24 |
Oct 09 07:04:59 AM UTC 24 |
43225602566 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_alert_test.1622753605 |
|
|
Oct 09 07:04:58 AM UTC 24 |
Oct 09 07:05:00 AM UTC 24 |
317563815 ps |
T345 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all_with_rand_reset.840891597 |
|
|
Oct 09 07:04:54 AM UTC 24 |
Oct 09 07:05:07 AM UTC 24 |
7812816093 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_polled_fixed.956041122 |
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|
Oct 09 06:49:41 AM UTC 24 |
Oct 09 07:05:08 AM UTC 24 |
329898531427 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup_fixed.496851843 |
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|
Oct 09 07:03:01 AM UTC 24 |
Oct 09 07:05:09 AM UTC 24 |
199382581125 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_smoke.4157061847 |
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|
Oct 09 07:05:00 AM UTC 24 |
Oct 09 07:05:15 AM UTC 24 |
5653066726 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.1915229344 |
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|
Oct 09 06:40:03 AM UTC 24 |
Oct 09 07:05:15 AM UTC 24 |
500669520919 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup.651384539 |
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|
Oct 09 06:56:59 AM UTC 24 |
Oct 09 07:05:31 AM UTC 24 |
169774534112 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_filters_polled_fixed.1194294135 |
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|
Oct 09 06:50:41 AM UTC 24 |
Oct 09 07:05:43 AM UTC 24 |
328875949601 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled_fixed.3237129451 |
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|
Oct 09 07:02:43 AM UTC 24 |
Oct 09 07:05:48 AM UTC 24 |
328592108357 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled.4169826059 |
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|
Oct 09 06:52:06 AM UTC 24 |
Oct 09 07:05:55 AM UTC 24 |
320678576267 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_poweron_counter.3298115189 |
|
|
Oct 09 07:05:49 AM UTC 24 |
Oct 09 07:05:55 AM UTC 24 |
4816424134 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_fsm_reset.2004569006 |
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|
Oct 09 07:00:09 AM UTC 24 |
Oct 09 07:05:57 AM UTC 24 |
73485424235 ps |
T218 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/37.adc_ctrl_clock_gating.3812596318 |
|
|
Oct 09 06:51:10 AM UTC 24 |
Oct 09 07:05:59 AM UTC 24 |
534933951172 ps |
T335 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_stress_all.3582717471 |
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|
Oct 09 07:03:26 AM UTC 24 |
Oct 09 07:06:13 AM UTC 24 |
193712592515 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_wakeup_fixed.3365913307 |
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|
Oct 09 06:55:57 AM UTC 24 |
Oct 09 07:06:16 AM UTC 24 |
209997128192 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_alert_test.2216950934 |
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|
Oct 09 07:06:14 AM UTC 24 |
Oct 09 07:06:16 AM UTC 24 |
390665592 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_filters_both.3101220622 |
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|
Oct 09 06:56:00 AM UTC 24 |
Oct 09 07:06:23 AM UTC 24 |
176333889667 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt.318588639 |
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|
Oct 09 07:03:47 AM UTC 24 |
Oct 09 07:06:28 AM UTC 24 |
325964705195 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_smoke.3103150153 |
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|
Oct 09 07:06:16 AM UTC 24 |
Oct 09 07:06:30 AM UTC 24 |
5777227966 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_lowpower_counter.16899096 |
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|
Oct 09 07:05:56 AM UTC 24 |
Oct 09 07:06:38 AM UTC 24 |
40389880033 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup_fixed.1871183528 |
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|
Oct 09 07:01:03 AM UTC 24 |
Oct 09 07:06:41 AM UTC 24 |
210928620939 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all_with_rand_reset.3702293564 |
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|
Oct 09 07:05:58 AM UTC 24 |
Oct 09 07:06:44 AM UTC 24 |
19661400933 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_fsm_reset.1788374745 |
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|
Oct 09 06:56:17 AM UTC 24 |
Oct 09 07:06:56 AM UTC 24 |
92982315330 ps |
T321 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt.3675397128 |
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|
Oct 09 07:05:08 AM UTC 24 |
Oct 09 07:06:58 AM UTC 24 |
162488197707 ps |
T342 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup.27910463 |
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|
Oct 09 07:05:15 AM UTC 24 |
Oct 09 07:07:01 AM UTC 24 |
357517038454 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_poweron_counter.680710431 |
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|
Oct 09 07:06:59 AM UTC 24 |
Oct 09 07:07:04 AM UTC 24 |
2696675859 ps |
T336 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt.1048292602 |
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|
Oct 09 06:56:52 AM UTC 24 |
Oct 09 07:07:37 AM UTC 24 |
165418939563 ps |
T319 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_clock_gating.399040652 |
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|
Oct 09 07:01:04 AM UTC 24 |
Oct 09 07:07:38 AM UTC 24 |
490668280177 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_polled_fixed.220388479 |
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|
Oct 09 07:00:38 AM UTC 24 |
Oct 09 07:07:41 AM UTC 24 |
169515429116 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_alert_test.411725945 |
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|
Oct 09 07:07:42 AM UTC 24 |
Oct 09 07:07:44 AM UTC 24 |
443264754 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_lowpower_counter.3920972783 |
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|
Oct 09 07:07:02 AM UTC 24 |
Oct 09 07:07:45 AM UTC 24 |
42356008138 ps |
T93 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all_with_rand_reset.890782968 |
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|
Oct 09 07:07:37 AM UTC 24 |
Oct 09 07:07:48 AM UTC 24 |
1835596931 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_smoke.4110324970 |
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|
Oct 09 07:07:45 AM UTC 24 |
Oct 09 07:07:52 AM UTC 24 |
5794814402 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_filters_both.2524820275 |
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|
Oct 09 06:50:16 AM UTC 24 |
Oct 09 07:07:53 AM UTC 24 |
367088656738 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.3029284432 |
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|
Oct 09 06:38:08 AM UTC 24 |
Oct 09 07:07:54 AM UTC 24 |
622028021368 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/40.adc_ctrl_stress_all.3699392535 |
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|
Oct 09 06:56:21 AM UTC 24 |
Oct 09 07:08:00 AM UTC 24 |
317253408894 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_interrupt_fixed.1204293550 |
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|
Oct 09 07:05:10 AM UTC 24 |
Oct 09 07:08:05 AM UTC 24 |
332349793567 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.2769261823 |
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|
Oct 09 06:44:20 AM UTC 24 |
Oct 09 07:08:08 AM UTC 24 |
490707824708 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_interrupt_fixed.2618848645 |
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|
Oct 09 06:56:55 AM UTC 24 |
Oct 09 07:08:11 AM UTC 24 |
494771498540 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_poweron_counter.929300225 |
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|
Oct 09 07:08:12 AM UTC 24 |
Oct 09 07:08:26 AM UTC 24 |
3322329047 ps |
T337 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_stress_all.952547443 |
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|
Oct 09 06:57:48 AM UTC 24 |
Oct 09 07:08:36 AM UTC 24 |
198662080403 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled.2444882433 |
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|
Oct 09 07:06:17 AM UTC 24 |
Oct 09 07:09:08 AM UTC 24 |
162310334537 ps |
T197 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_fsm_reset.3758009135 |
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|
Oct 09 06:57:25 AM UTC 24 |
Oct 09 07:09:09 AM UTC 24 |
137681778299 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all.206634797 |
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|
Oct 09 07:09:09 AM UTC 24 |
Oct 09 07:09:20 AM UTC 24 |
34788734202 ps |
T306 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_stress_all_with_rand_reset.1955105350 |
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|
Oct 09 07:09:09 AM UTC 24 |
Oct 09 07:09:23 AM UTC 24 |
5787844392 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_alert_test.554109038 |
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|
Oct 09 07:09:22 AM UTC 24 |
Oct 09 07:09:24 AM UTC 24 |
323863973 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt.3217307206 |
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|
Oct 09 07:06:28 AM UTC 24 |
Oct 09 07:09:24 AM UTC 24 |
327689938200 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup_fixed.1248766571 |
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|
Oct 09 06:59:05 AM UTC 24 |
Oct 09 07:09:33 AM UTC 24 |
393354258870 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_smoke.1579216331 |
|
|
Oct 09 07:09:24 AM UTC 24 |
Oct 09 07:09:36 AM UTC 24 |
6092506078 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_lowpower_counter.2982108920 |
|
|
Oct 09 07:08:27 AM UTC 24 |
Oct 09 07:09:40 AM UTC 24 |
33440777803 ps |
T285 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_stress_all.2471305167 |
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|
Oct 09 07:04:58 AM UTC 24 |
Oct 09 07:09:48 AM UTC 24 |
548424613664 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_wakeup.567034505 |
|
|
Oct 09 07:03:00 AM UTC 24 |
Oct 09 07:10:01 AM UTC 24 |
165072893531 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_filters_interrupt.1193108122 |
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|
Oct 09 06:53:38 AM UTC 24 |
Oct 09 07:10:16 AM UTC 24 |
324789794219 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/39.adc_ctrl_clock_gating.1246323061 |
|
|
Oct 09 06:54:05 AM UTC 24 |
Oct 09 07:10:31 AM UTC 24 |
495604921300 ps |
T221 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_both.3881960884 |
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|
Oct 09 06:52:58 AM UTC 24 |
Oct 09 07:10:33 AM UTC 24 |
376762760477 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled_fixed.228330122 |
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|
Oct 09 06:48:26 AM UTC 24 |
Oct 09 07:10:35 AM UTC 24 |
501918240503 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_fsm_reset.3126415923 |
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|
Oct 09 07:02:09 AM UTC 24 |
Oct 09 07:10:36 AM UTC 24 |
112895376372 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled_fixed.734421951 |
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|
Oct 09 07:03:38 AM UTC 24 |
Oct 09 07:10:41 AM UTC 24 |
322572129606 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_poweron_counter.618002511 |
|
|
Oct 09 07:10:32 AM UTC 24 |
Oct 09 07:10:45 AM UTC 24 |
5099754506 ps |
T309 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_polled.2560129125 |
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|
Oct 09 07:02:38 AM UTC 24 |
Oct 09 07:10:48 AM UTC 24 |
326966326409 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_alert_test.14655789 |
|
|
Oct 09 07:10:46 AM UTC 24 |
Oct 09 07:10:49 AM UTC 24 |
452708975 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_lowpower_counter.173247773 |
|
|
Oct 09 07:10:33 AM UTC 24 |
Oct 09 07:10:50 AM UTC 24 |
23459715064 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_wakeup.3194870952 |
|
|
Oct 09 07:00:56 AM UTC 24 |
Oct 09 07:10:54 AM UTC 24 |
175603726661 ps |
T323 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all_with_rand_reset.355864576 |
|
|
Oct 09 07:10:37 AM UTC 24 |
Oct 09 07:11:08 AM UTC 24 |
2518929703 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_filters_both.1930205779 |
|
|
Oct 09 07:01:06 AM UTC 24 |
Oct 09 07:11:09 AM UTC 24 |
366958420582 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_clock_gating.795301951 |
|
|
Oct 09 07:06:45 AM UTC 24 |
Oct 09 07:11:10 AM UTC 24 |
174031747813 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled.1181321228 |
|
|
Oct 09 07:09:25 AM UTC 24 |
Oct 09 07:11:12 AM UTC 24 |
163803268512 ps |
T170 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled.1471190640 |
|
|
Oct 09 07:07:45 AM UTC 24 |
Oct 09 07:11:13 AM UTC 24 |
325537238536 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup_fixed.2575050130 |
|
|
Oct 09 07:03:52 AM UTC 24 |
Oct 09 07:11:16 AM UTC 24 |
593043549173 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_polled.3846222186 |
|
|
Oct 09 06:57:55 AM UTC 24 |
Oct 09 07:11:26 AM UTC 24 |
503102072195 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt_fixed.82022756 |
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|
Oct 09 07:07:54 AM UTC 24 |
Oct 09 07:11:33 AM UTC 24 |
166651141846 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_interrupt_fixed.3287138439 |
|
|
Oct 09 07:06:30 AM UTC 24 |
Oct 09 07:11:35 AM UTC 24 |
161367948877 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.2435885177 |
|
|
Oct 09 06:44:56 AM UTC 24 |
Oct 09 07:12:02 AM UTC 24 |
601761082140 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled.1182543481 |
|
|
Oct 09 07:05:01 AM UTC 24 |
Oct 09 07:12:05 AM UTC 24 |
329376998669 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_polled_fixed.362677291 |
|
|
Oct 09 07:06:24 AM UTC 24 |
Oct 09 07:12:25 AM UTC 24 |
162543090365 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt_fixed.2743378581 |
|
|
Oct 09 07:02:54 AM UTC 24 |
Oct 09 07:12:30 AM UTC 24 |
160977816278 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_stress_all.230488967 |
|
|
Oct 09 07:07:39 AM UTC 24 |
Oct 09 07:13:00 AM UTC 24 |
333916463142 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_stress_all.2114692205 |
|
|
Oct 09 07:06:00 AM UTC 24 |
Oct 09 07:13:05 AM UTC 24 |
86540023166 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_both.3796887630 |
|
|
Oct 09 07:08:09 AM UTC 24 |
Oct 09 07:13:21 AM UTC 24 |
485634610801 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_polled_fixed.793976647 |
|
|
Oct 09 07:09:25 AM UTC 24 |
Oct 09 07:13:26 AM UTC 24 |
329766556362 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_both.2612228005 |
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|
Oct 09 06:46:22 AM UTC 24 |
Oct 09 07:13:33 AM UTC 24 |
553862477525 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt_fixed.2175812562 |
|
|
Oct 09 07:09:37 AM UTC 24 |
Oct 09 07:13:34 AM UTC 24 |
332856052135 ps |
T322 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup.1311612959 |
|
|
Oct 09 07:07:55 AM UTC 24 |
Oct 09 07:13:35 AM UTC 24 |
166342574136 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_fsm_reset.1449643873 |
|
|
Oct 09 07:04:48 AM UTC 24 |
Oct 09 07:13:37 AM UTC 24 |
111012516856 ps |
T171 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_both.2195607542 |
|
|
Oct 09 07:05:44 AM UTC 24 |
Oct 09 07:13:45 AM UTC 24 |
489497527264 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_interrupt_fixed.3713125793 |
|
|
Oct 09 06:58:26 AM UTC 24 |
Oct 09 07:13:56 AM UTC 24 |
339055482207 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup.801660604 |
|
|
Oct 09 07:09:41 AM UTC 24 |
Oct 09 07:14:07 AM UTC 24 |
178205040639 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_fsm_reset.3137331933 |
|
|
Oct 09 07:03:15 AM UTC 24 |
Oct 09 07:14:09 AM UTC 24 |
100638855628 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_fsm_reset.543290548 |
|
|
Oct 09 07:08:37 AM UTC 24 |
Oct 09 07:14:21 AM UTC 24 |
64904424489 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_wakeup.1149352317 |
|
|
Oct 09 06:48:53 AM UTC 24 |
Oct 09 07:14:27 AM UTC 24 |
583940989897 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/43.adc_ctrl_stress_all.2115748791 |
|
|
Oct 09 07:02:24 AM UTC 24 |
Oct 09 07:14:35 AM UTC 24 |
245009715446 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_stress_all.1413267893 |
|
|
Oct 09 07:10:42 AM UTC 24 |
Oct 09 07:14:46 AM UTC 24 |
381536938899 ps |
T301 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_clock_gating.1672858032 |
|
|
Oct 09 07:08:06 AM UTC 24 |
Oct 09 07:15:00 AM UTC 24 |
337439743391 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_wakeup_fixed.3026892374 |
|
|
Oct 09 07:05:15 AM UTC 24 |
Oct 09 07:15:02 AM UTC 24 |
403624017379 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_clock_gating.3278764929 |
|
|
Oct 09 07:10:02 AM UTC 24 |
Oct 09 07:15:06 AM UTC 24 |
356461511082 ps |
T292 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_wakeup.266848885 |
|
|
Oct 09 07:03:51 AM UTC 24 |
Oct 09 07:15:14 AM UTC 24 |
357648679236 ps |
T252 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_stress_all.3077266629 |
|
|
Oct 09 06:53:24 AM UTC 24 |
Oct 09 07:15:27 AM UTC 24 |
550814629200 ps |
T237 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_clock_gating.2214846540 |
|
|
Oct 09 07:04:01 AM UTC 24 |
Oct 09 07:15:40 AM UTC 24 |
581554980511 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_both.3495314813 |
|
|
Oct 09 07:06:57 AM UTC 24 |
Oct 09 07:15:53 AM UTC 24 |
512734715645 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_wakeup_fixed.1708260534 |
|
|
Oct 09 06:57:08 AM UTC 24 |
Oct 09 07:16:04 AM UTC 24 |
404657901233 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/38.adc_ctrl_filters_polled_fixed.3271467615 |
|
|
Oct 09 06:52:08 AM UTC 24 |
Oct 09 07:16:18 AM UTC 24 |
484044769583 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup.2566081369 |
|
|
Oct 09 07:06:38 AM UTC 24 |
Oct 09 07:16:19 AM UTC 24 |
403694993720 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_polled_fixed.2654445645 |
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|
Oct 09 07:07:49 AM UTC 24 |
Oct 09 07:16:45 AM UTC 24 |
495585736336 ps |
T191 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_fsm_reset.3241186921 |
|
|
Oct 09 07:07:04 AM UTC 24 |
Oct 09 07:16:50 AM UTC 24 |
102179628653 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_fsm_reset.3394935769 |
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|
Oct 09 07:10:37 AM UTC 24 |
Oct 09 07:17:34 AM UTC 24 |
77370332580 ps |
T299 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_clock_gating.1836198113 |
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|
Oct 09 07:03:12 AM UTC 24 |
Oct 09 07:18:00 AM UTC 24 |
352458591940 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/41.adc_ctrl_filters_polled_fixed.2244548259 |
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|
Oct 09 06:56:48 AM UTC 24 |
Oct 09 07:18:16 AM UTC 24 |
481801087964 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_wakeup_fixed.1785744963 |
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|
Oct 09 07:09:48 AM UTC 24 |
Oct 09 07:19:07 AM UTC 24 |
204764073258 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_clock_gating.2820729418 |
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|
Oct 09 07:05:31 AM UTC 24 |
Oct 09 07:19:37 AM UTC 24 |
334315845651 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_fsm_reset.586749413 |
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|
Oct 09 07:05:57 AM UTC 24 |
Oct 09 07:19:50 AM UTC 24 |
120060994735 ps |
T242 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_both.1805012627 |
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|
Oct 09 07:04:02 AM UTC 24 |
Oct 09 07:22:07 AM UTC 24 |
510791826101 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_both.3060902832 |
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|
Oct 09 07:10:17 AM UTC 24 |
Oct 09 07:23:23 AM UTC 24 |
371486629417 ps |
T311 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_both.1394595919 |
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|
Oct 09 07:03:13 AM UTC 24 |
Oct 09 07:23:55 AM UTC 24 |
504959207632 ps |
T341 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/44.adc_ctrl_filters_interrupt.1248779877 |
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|
Oct 09 07:02:47 AM UTC 24 |
Oct 09 07:24:43 AM UTC 24 |
491926994714 ps |
T339 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_filters_wakeup.3657100781 |
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|
Oct 09 06:58:31 AM UTC 24 |
Oct 09 07:25:17 AM UTC 24 |
575100600987 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_polled.3644062101 |
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|
Oct 09 07:03:34 AM UTC 24 |
Oct 09 07:25:48 AM UTC 24 |
478102561667 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/46.adc_ctrl_filters_polled_fixed.3709935843 |
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|
Oct 09 07:05:07 AM UTC 24 |
Oct 09 07:26:56 AM UTC 24 |
491774346878 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/45.adc_ctrl_filters_interrupt_fixed.593015117 |
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|
Oct 09 07:03:47 AM UTC 24 |
Oct 09 07:27:20 AM UTC 24 |
492111195805 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/49.adc_ctrl_filters_interrupt.3625716849 |
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|
Oct 09 07:09:34 AM UTC 24 |
Oct 09 07:27:53 AM UTC 24 |
479258820196 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_interrupt.2886705726 |
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|
Oct 09 07:07:53 AM UTC 24 |
Oct 09 07:29:36 AM UTC 24 |
496153036873 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/48.adc_ctrl_filters_wakeup_fixed.3958319093 |
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|
Oct 09 07:08:01 AM UTC 24 |
Oct 09 07:30:45 AM UTC 24 |
613924353470 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/47.adc_ctrl_filters_wakeup_fixed.1915875563 |
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|
Oct 09 07:06:43 AM UTC 24 |
Oct 09 07:35:23 AM UTC 24 |
604300917049 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/default/42.adc_ctrl_stress_all.1628509538 |
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|
Oct 09 07:00:22 AM UTC 24 |
Oct 09 08:23:41 AM UTC 24 |
3096357893925 ps |
T70 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_tl_errors.1924290586 |
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|
Oct 09 07:10:49 AM UTC 24 |
Oct 09 07:10:53 AM UTC 24 |
1121501681 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_intr_test.2184467285 |
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|
Oct 09 07:10:50 AM UTC 24 |
Oct 09 07:10:54 AM UTC 24 |
367158074 ps |
T118 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_rw.1716300678 |
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|
Oct 09 07:10:54 AM UTC 24 |
Oct 09 07:10:57 AM UTC 24 |
500478153 ps |
T123 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_hw_reset.3520338111 |
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|
Oct 09 07:10:54 AM UTC 24 |
Oct 09 07:11:00 AM UTC 24 |
990173108 ps |
T105 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_aliasing.586304974 |
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|
Oct 09 07:10:57 AM UTC 24 |
Oct 09 07:11:05 AM UTC 24 |
817597090 ps |
T106 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_bit_bash.1891835158 |
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|
Oct 09 07:10:55 AM UTC 24 |
Oct 09 07:11:06 AM UTC 24 |
1109222959 ps |
T119 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_same_csr_outstanding.3766877103 |
|
|
Oct 09 07:11:00 AM UTC 24 |
Oct 09 07:11:09 AM UTC 24 |
2268877139 ps |
T71 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/0.adc_ctrl_csr_mem_rw_with_rand_reset.119444422 |
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|
Oct 09 07:11:05 AM UTC 24 |
Oct 09 07:11:09 AM UTC 24 |
551644407 ps |
T73 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_tl_errors.2488882080 |
|
|
Oct 09 07:11:08 AM UTC 24 |
Oct 09 07:11:11 AM UTC 24 |
510306128 ps |
T107 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_rw.3125877030 |
|
|
Oct 09 07:11:10 AM UTC 24 |
Oct 09 07:11:12 AM UTC 24 |
380852935 ps |
T124 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_hw_reset.1864719553 |
|
|
Oct 09 07:11:10 AM UTC 24 |
Oct 09 07:11:13 AM UTC 24 |
794704654 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_intr_test.2255391447 |
|
|
Oct 09 07:11:10 AM UTC 24 |
Oct 09 07:11:13 AM UTC 24 |
367490495 ps |
T81 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_csr_mem_rw_with_rand_reset.639363487 |
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|
Oct 09 07:11:13 AM UTC 24 |
Oct 09 07:11:17 AM UTC 24 |
456125086 ps |
T61 |
/workspaces/repo/scratch/os_regression_2024_10_08/adc_ctrl-sim-vcs/coverage/cover_reg_top/1.adc_ctrl_same_csr_outstanding.3492243839 |
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|
Oct 09 07:11:13 AM UTC 24 |
Oct 09 07:11:17 AM UTC 24 |
4734876972 ps |