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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.67 99.07 96.67 100.00 100.00 98.82 98.33 90.82


Total test records in report: 919
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T271 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt.1339223369 Oct 14 10:49:24 PM UTC 24 Oct 14 10:53:59 PM UTC 24 326855957110 ps
T445 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_polled_fixed.3097705091 Oct 14 10:32:45 PM UTC 24 Oct 14 10:54:04 PM UTC 24 492195946831 ps
T446 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/6.adc_ctrl_filters_interrupt_fixed.606833444 Oct 14 10:30:24 PM UTC 24 Oct 14 10:54:10 PM UTC 24 498656503942 ps
T447 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_poweron_counter.1792444403 Oct 14 10:54:11 PM UTC 24 Oct 14 10:54:16 PM UTC 24 4913996857 ps
T224 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_fsm_reset.2177028569 Oct 14 10:43:34 PM UTC 24 Oct 14 10:54:26 PM UTC 24 136320911569 ps
T175 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt.3052309863 Oct 14 10:53:09 PM UTC 24 Oct 14 10:54:46 PM UTC 24 162345890135 ps
T448 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_interrupt_fixed.3080000061 Oct 14 10:53:12 PM UTC 24 Oct 14 10:54:48 PM UTC 24 169613718250 ps
T86 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all_with_rand_reset.1612629587 Oct 14 10:54:46 PM UTC 24 Oct 14 10:55:11 PM UTC 24 16976501092 ps
T449 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_lowpower_counter.2573823873 Oct 14 10:52:19 PM UTC 24 Oct 14 10:55:12 PM UTC 24 44628843766 ps
T450 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_alert_test.3740540403 Oct 14 10:55:12 PM UTC 24 Oct 14 10:55:14 PM UTC 24 387058226 ps
T451 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_smoke.1671747224 Oct 14 10:55:13 PM UTC 24 Oct 14 10:55:29 PM UTC 24 6105990521 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_interrupt_fixed.1781579991 Oct 14 10:32:49 PM UTC 24 Oct 14 10:55:36 PM UTC 24 495959796169 ps
T453 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup_fixed.2353165667 Oct 14 10:47:21 PM UTC 24 Oct 14 10:55:37 PM UTC 24 598267363428 ps
T55 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/5.adc_ctrl_stress_all.3347016959 Oct 14 10:30:06 PM UTC 24 Oct 14 10:55:38 PM UTC 24 1257259104516 ps
T454 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_lowpower_counter.1429934886 Oct 14 10:54:16 PM UTC 24 Oct 14 10:55:54 PM UTC 24 31340781553 ps
T455 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_fsm_reset.3583204529 Oct 14 10:47:42 PM UTC 24 Oct 14 10:56:00 PM UTC 24 75888152444 ps
T339 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_stress_all.3296904492 Oct 14 10:51:04 PM UTC 24 Oct 14 10:56:05 PM UTC 24 370862222711 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled.2444136721 Oct 14 10:52:53 PM UTC 24 Oct 14 10:56:05 PM UTC 24 326473144262 ps
T225 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_fsm_reset.2315106195 Oct 14 10:45:18 PM UTC 24 Oct 14 10:56:13 PM UTC 24 131320006446 ps
T457 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_poweron_counter.4045776361 Oct 14 10:56:05 PM UTC 24 Oct 14 10:56:13 PM UTC 24 5609526535 ps
T458 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup_fixed.1676635217 Oct 14 10:51:52 PM UTC 24 Oct 14 10:56:16 PM UTC 24 385210965412 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup.3575627241 Oct 14 10:49:40 PM UTC 24 Oct 14 10:56:22 PM UTC 24 350807665957 ps
T215 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled.2296971767 Oct 14 10:55:15 PM UTC 24 Oct 14 10:56:22 PM UTC 24 327445874852 ps
T459 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_alert_test.388339181 Oct 14 10:56:23 PM UTC 24 Oct 14 10:56:27 PM UTC 24 496428152 ps
T460 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled.2626841012 Oct 14 10:51:24 PM UTC 24 Oct 14 10:56:28 PM UTC 24 340224396262 ps
T461 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_smoke.1429146264 Oct 14 10:56:28 PM UTC 24 Oct 14 10:56:35 PM UTC 24 6225103017 ps
T462 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_interrupt_fixed.495739473 Oct 14 10:49:26 PM UTC 24 Oct 14 10:56:38 PM UTC 24 484269737226 ps
T230 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_fsm_reset.496142863 Oct 14 10:46:56 PM UTC 24 Oct 14 10:56:41 PM UTC 24 90552171206 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_clock_gating.2108992123 Oct 14 10:40:51 PM UTC 24 Oct 14 10:56:44 PM UTC 24 503796119192 ps
T32 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all_with_rand_reset.327243979 Oct 14 10:56:17 PM UTC 24 Oct 14 10:56:47 PM UTC 24 17419290859 ps
T463 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_lowpower_counter.3809565642 Oct 14 10:56:14 PM UTC 24 Oct 14 10:56:55 PM UTC 24 33299120155 ps
T371 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_fsm_reset.1624533543 Oct 14 10:50:30 PM UTC 24 Oct 14 10:57:43 PM UTC 24 119319264401 ps
T253 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_clock_gating.169810963 Oct 14 10:36:56 PM UTC 24 Oct 14 10:57:47 PM UTC 24 502308200719 ps
T464 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_polled_fixed.1558992873 Oct 14 10:44:29 PM UTC 24 Oct 14 10:57:48 PM UTC 24 496276195785 ps
T465 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_poweron_counter.4272336807 Oct 14 10:57:44 PM UTC 24 Oct 14 10:57:53 PM UTC 24 3784731668 ps
T275 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_interrupt.1059790906 Oct 14 10:38:10 PM UTC 24 Oct 14 10:58:14 PM UTC 24 333137721262 ps
T466 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt_fixed.1923027703 Oct 14 10:51:43 PM UTC 24 Oct 14 10:58:40 PM UTC 24 487276816940 ps
T467 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_alert_test.3071198323 Oct 14 10:58:40 PM UTC 24 Oct 14 10:58:43 PM UTC 24 454531442 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all_with_rand_reset.1402846024 Oct 14 10:57:54 PM UTC 24 Oct 14 10:58:58 PM UTC 24 53413147439 ps
T468 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_smoke.3355077419 Oct 14 10:58:43 PM UTC 24 Oct 14 10:59:04 PM UTC 24 5861850309 ps
T274 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_stress_all.1135778387 Oct 14 10:56:23 PM UTC 24 Oct 14 10:59:04 PM UTC 24 367181656524 ps
T469 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_lowpower_counter.2634675939 Oct 14 10:57:48 PM UTC 24 Oct 14 10:59:15 PM UTC 24 45904761519 ps
T470 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_polled_fixed.1471537767 Oct 14 10:55:30 PM UTC 24 Oct 14 10:59:33 PM UTC 24 166625335438 ps
T220 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_fsm_reset.3502819339 Oct 14 10:52:39 PM UTC 24 Oct 14 10:59:44 PM UTC 24 92852551175 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_interrupt.3450786988 Oct 14 10:45:58 PM UTC 24 Oct 14 10:59:47 PM UTC 24 325699560220 ps
T265 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_wakeup.2469755389 Oct 14 10:51:48 PM UTC 24 Oct 14 10:59:54 PM UTC 24 599670271858 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_stress_all.2186706335 Oct 14 10:37:31 PM UTC 24 Oct 14 11:00:25 PM UTC 24 332660474417 ps
T471 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled_fixed.3022627737 Oct 14 10:56:36 PM UTC 24 Oct 14 11:00:30 PM UTC 24 505521021436 ps
T472 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_poweron_counter.4191447803 Oct 14 11:00:26 PM UTC 24 Oct 14 11:00:35 PM UTC 24 3478660779 ps
T158 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_both.389065290 Oct 14 10:50:02 PM UTC 24 Oct 14 11:00:38 PM UTC 24 520117866886 ps
T297 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_wakeup.2788107727 Oct 14 10:44:40 PM UTC 24 Oct 14 11:00:41 PM UTC 24 374342674036 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_clock_gating.4226439525 Oct 14 10:56:55 PM UTC 24 Oct 14 11:00:42 PM UTC 24 364862639219 ps
T473 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_filters_interrupt_fixed.4009879168 Oct 14 10:38:11 PM UTC 24 Oct 14 11:00:43 PM UTC 24 487704504552 ps
T33 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all_with_rand_reset.2586572287 Oct 14 11:00:38 PM UTC 24 Oct 14 11:00:44 PM UTC 24 1918104063 ps
T474 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_alert_test.1497528123 Oct 14 11:00:42 PM UTC 24 Oct 14 11:00:46 PM UTC 24 466106210 ps
T475 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_wakeup_fixed.1339708428 Oct 14 10:48:24 PM UTC 24 Oct 14 11:00:48 PM UTC 24 605590478442 ps
T176 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt.831955481 Oct 14 10:48:18 PM UTC 24 Oct 14 11:00:48 PM UTC 24 322613228979 ps
T476 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_smoke.296606022 Oct 14 11:00:43 PM UTC 24 Oct 14 11:00:51 PM UTC 24 5731013245 ps
T477 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_lowpower_counter.1930507530 Oct 14 11:00:31 PM UTC 24 Oct 14 11:00:54 PM UTC 24 45496930297 ps
T347 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_clock_gating.2073280360 Oct 14 10:54:00 PM UTC 24 Oct 14 11:01:02 PM UTC 24 163197911080 ps
T478 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/8.adc_ctrl_filters_wakeup_fixed.3079368712 Oct 14 10:32:57 PM UTC 24 Oct 14 11:01:05 PM UTC 24 604267751760 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_both.3624269074 Oct 14 10:48:27 PM UTC 24 Oct 14 11:01:09 PM UTC 24 331847963370 ps
T479 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt.232137677 Oct 14 10:55:37 PM UTC 24 Oct 14 11:01:13 PM UTC 24 165535049480 ps
T159 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_both.961805046 Oct 14 10:56:05 PM UTC 24 Oct 14 11:01:14 PM UTC 24 329130921404 ps
T266 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_clock_gating.1059808136 Oct 14 10:46:23 PM UTC 24 Oct 14 11:01:17 PM UTC 24 485692823625 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_poweron_counter.2011017670 Oct 14 11:01:09 PM UTC 24 Oct 14 11:01:29 PM UTC 24 4691630701 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_polled.3299394598 Oct 14 10:48:06 PM UTC 24 Oct 14 11:01:34 PM UTC 24 488529687386 ps
T481 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_alert_test.3378441497 Oct 14 11:01:35 PM UTC 24 Oct 14 11:01:38 PM UTC 24 287253352 ps
T482 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_smoke.1259552980 Oct 14 11:01:39 PM UTC 24 Oct 14 11:01:43 PM UTC 24 5911132478 ps
T340 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all_with_rand_reset.246564944 Oct 14 11:01:18 PM UTC 24 Oct 14 11:01:44 PM UTC 24 86645654467 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_both.1853794623 Oct 14 10:47:24 PM UTC 24 Oct 14 11:01:46 PM UTC 24 347118164597 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/12.adc_ctrl_filters_polled.1958221493 Oct 14 10:40:02 PM UTC 24 Oct 14 11:02:02 PM UTC 24 491109845866 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_polled.146320967 Oct 14 10:56:29 PM UTC 24 Oct 14 11:02:06 PM UTC 24 492172355998 ps
T483 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt_fixed.3955688570 Oct 14 10:59:16 PM UTC 24 Oct 14 11:02:28 PM UTC 24 325290754780 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled_fixed.1677362663 Oct 14 10:59:05 PM UTC 24 Oct 14 11:02:34 PM UTC 24 492145603465 ps
T485 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_lowpower_counter.666045548 Oct 14 11:01:14 PM UTC 24 Oct 14 11:02:42 PM UTC 24 43161622619 ps
T287 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_stress_all.81510072 Oct 14 11:01:30 PM UTC 24 Oct 14 11:02:51 PM UTC 24 211149982708 ps
T486 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_poweron_counter.1434744533 Oct 14 11:02:51 PM UTC 24 Oct 14 11:02:57 PM UTC 24 3688121976 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_polled.3451112706 Oct 14 10:58:59 PM UTC 24 Oct 14 11:03:04 PM UTC 24 323764350265 ps
T487 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt_fixed.3721514730 Oct 14 10:44:31 PM UTC 24 Oct 14 11:03:13 PM UTC 24 483000128251 ps
T488 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/10.adc_ctrl_filters_polled_fixed.4051432397 Oct 14 10:36:20 PM UTC 24 Oct 14 11:03:22 PM UTC 24 495669428669 ps
T489 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all_with_rand_reset.3213434587 Oct 14 11:03:14 PM UTC 24 Oct 14 11:03:27 PM UTC 24 1976995697 ps
T490 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_alert_test.2244939895 Oct 14 11:03:28 PM UTC 24 Oct 14 11:03:31 PM UTC 24 305242444 ps
T491 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_smoke.3828528027 Oct 14 11:03:32 PM UTC 24 Oct 14 11:03:36 PM UTC 24 5878423429 ps
T370 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_fsm_reset.468517243 Oct 14 10:56:14 PM UTC 24 Oct 14 11:03:45 PM UTC 24 110413531160 ps
T273 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_stress_all.4092182074 Oct 14 10:52:40 PM UTC 24 Oct 14 11:04:00 PM UTC 24 399171786331 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt.3791414163 Oct 14 10:56:38 PM UTC 24 Oct 14 11:04:02 PM UTC 24 493781358808 ps
T299 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup.2276518531 Oct 14 10:46:08 PM UTC 24 Oct 14 11:04:06 PM UTC 24 344673367632 ps
T231 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_fsm_reset.1412851320 Oct 14 10:57:49 PM UTC 24 Oct 14 11:04:13 PM UTC 24 86947256366 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_lowpower_counter.3131278303 Oct 14 11:02:58 PM UTC 24 Oct 14 11:04:15 PM UTC 24 34488816521 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_stress_all.889668170 Oct 14 11:00:42 PM UTC 24 Oct 14 11:04:23 PM UTC 24 371522245163 ps
T329 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_both.3320761090 Oct 14 11:01:06 PM UTC 24 Oct 14 11:04:30 PM UTC 24 191089493377 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_poweron_counter.1600815849 Oct 14 11:04:31 PM UTC 24 Oct 14 11:04:36 PM UTC 24 3622539209 ps
T494 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_interrupt_fixed.446133403 Oct 14 10:56:42 PM UTC 24 Oct 14 11:04:49 PM UTC 24 160782404897 ps
T495 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_stress_all.1490842793 Oct 14 10:54:50 PM UTC 24 Oct 14 11:04:51 PM UTC 24 195417880615 ps
T496 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled_fixed.2691547217 Oct 14 11:01:45 PM UTC 24 Oct 14 11:04:52 PM UTC 24 159722085736 ps
T288 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_clock_gating.3856512774 Oct 14 11:02:34 PM UTC 24 Oct 14 11:04:56 PM UTC 24 162790818144 ps
T497 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_alert_test.1475367038 Oct 14 11:04:57 PM UTC 24 Oct 14 11:05:01 PM UTC 24 430035899 ps
T295 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/14.adc_ctrl_filters_interrupt.853456631 Oct 14 10:44:30 PM UTC 24 Oct 14 11:05:07 PM UTC 24 483978549110 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup.2228605214 Oct 14 11:02:07 PM UTC 24 Oct 14 11:05:10 PM UTC 24 165877429888 ps
T498 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_smoke.1777296986 Oct 14 11:05:02 PM UTC 24 Oct 14 11:05:11 PM UTC 24 5951200055 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all_with_rand_reset.1620726254 Oct 14 11:04:52 PM UTC 24 Oct 14 11:05:14 PM UTC 24 98798945182 ps
T333 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup.3699590031 Oct 14 10:56:45 PM UTC 24 Oct 14 11:05:15 PM UTC 24 428522701080 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/15.adc_ctrl_filters_wakeup_fixed.657913932 Oct 14 10:46:09 PM UTC 24 Oct 14 11:05:23 PM UTC 24 390697044679 ps
T501 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt_fixed.1390826245 Oct 14 11:02:03 PM UTC 24 Oct 14 11:05:24 PM UTC 24 324833740257 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_lowpower_counter.4101485999 Oct 14 11:04:37 PM UTC 24 Oct 14 11:05:43 PM UTC 24 31118469623 ps
T216 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_clock_gating.2938491702 Oct 14 11:01:03 PM UTC 24 Oct 14 11:05:47 PM UTC 24 495071427616 ps
T503 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt_fixed.2463807055 Oct 14 11:04:02 PM UTC 24 Oct 14 11:05:55 PM UTC 24 334311049248 ps
T504 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_polled_fixed.2038567480 Oct 14 11:00:47 PM UTC 24 Oct 14 11:05:56 PM UTC 24 167816649704 ps
T336 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_interrupt.1730884308 Oct 14 11:00:49 PM UTC 24 Oct 14 11:05:57 PM UTC 24 328678751763 ps
T291 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_both.3459236180 Oct 14 11:02:42 PM UTC 24 Oct 14 11:06:08 PM UTC 24 177115272588 ps
T505 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_stress_all_with_rand_reset.1165692260 Oct 14 11:05:58 PM UTC 24 Oct 14 11:06:11 PM UTC 24 3949199876 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_poweron_counter.2742579935 Oct 14 11:05:48 PM UTC 24 Oct 14 11:06:13 PM UTC 24 5419747185 ps
T507 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_alert_test.1003726921 Oct 14 11:06:11 PM UTC 24 Oct 14 11:06:14 PM UTC 24 294939426 ps
T508 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_smoke.2394667756 Oct 14 11:06:13 PM UTC 24 Oct 14 11:06:27 PM UTC 24 5716565340 ps
T509 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/13.adc_ctrl_filters_polled_fixed.3285159696 Oct 14 10:42:28 PM UTC 24 Oct 14 11:06:49 PM UTC 24 490581815611 ps
T510 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_fsm_reset.1032363340 Oct 14 10:48:49 PM UTC 24 Oct 14 11:07:23 PM UTC 24 129160590652 ps
T511 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_polled_fixed.1262426436 Oct 14 10:53:07 PM UTC 24 Oct 14 11:07:35 PM UTC 24 336000252061 ps
T228 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_fsm_reset.1389946291 Oct 14 10:54:27 PM UTC 24 Oct 14 11:07:46 PM UTC 24 121229546360 ps
T512 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_wakeup_fixed.949308783 Oct 14 11:02:29 PM UTC 24 Oct 14 11:07:56 PM UTC 24 399702137105 ps
T513 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_lowpower_counter.2165243257 Oct 14 11:05:56 PM UTC 24 Oct 14 11:08:03 PM UTC 24 37150433817 ps
T514 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_poweron_counter.1739123410 Oct 14 11:08:03 PM UTC 24 Oct 14 11:08:07 PM UTC 24 4238305659 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_lowpower_counter.665304169 Oct 14 11:08:07 PM UTC 24 Oct 14 11:08:21 PM UTC 24 24157275635 ps
T516 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_interrupt_fixed.968977432 Oct 14 10:55:38 PM UTC 24 Oct 14 11:08:30 PM UTC 24 338376473912 ps
T285 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_stress_all.664290374 Oct 14 11:03:23 PM UTC 24 Oct 14 11:08:39 PM UTC 24 517065862611 ps
T517 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled.3897341858 Oct 14 11:06:15 PM UTC 24 Oct 14 11:08:44 PM UTC 24 166308237911 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all_with_rand_reset.2029702858 Oct 14 11:08:31 PM UTC 24 Oct 14 11:08:47 PM UTC 24 56041626355 ps
T177 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled.470022165 Oct 14 11:05:08 PM UTC 24 Oct 14 11:08:47 PM UTC 24 488963809133 ps
T187 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_filters_wakeup.2321658355 Oct 14 11:00:52 PM UTC 24 Oct 14 11:08:48 PM UTC 24 566570548909 ps
T518 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_alert_test.3348247875 Oct 14 11:08:45 PM UTC 24 Oct 14 11:08:48 PM UTC 24 283881646 ps
T519 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_smoke.137186937 Oct 14 11:08:48 PM UTC 24 Oct 14 11:08:51 PM UTC 24 5903188162 ps
T520 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_smoke.1813411350 Oct 14 11:10:50 PM UTC 24 Oct 14 11:10:58 PM UTC 24 5746321802 ps
T221 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/24.adc_ctrl_fsm_reset.1893251074 Oct 14 11:01:14 PM UTC 24 Oct 14 11:08:59 PM UTC 24 84847138652 ps
T521 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_filters_interrupt_fixed.108802614 Oct 14 10:48:19 PM UTC 24 Oct 14 11:09:45 PM UTC 24 502711889835 ps
T331 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_clock_gating.2223259681 Oct 14 11:05:25 PM UTC 24 Oct 14 11:09:54 PM UTC 24 159926005111 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_stress_all.181464264 Oct 14 11:04:53 PM UTC 24 Oct 14 11:09:59 PM UTC 24 497633542358 ps
T234 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup.2758549054 Oct 14 10:53:31 PM UTC 24 Oct 14 11:10:21 PM UTC 24 337221010960 ps
T522 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_poweron_counter.996896312 Oct 14 11:10:22 PM UTC 24 Oct 14 11:10:44 PM UTC 24 5174094782 ps
T523 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/20.adc_ctrl_filters_wakeup_fixed.3137934550 Oct 14 10:53:40 PM UTC 24 Oct 14 11:10:44 PM UTC 24 407070562633 ps
T524 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_interrupt.878804901 Oct 14 11:01:47 PM UTC 24 Oct 14 11:10:46 PM UTC 24 163661649104 ps
T351 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_interrupt.3492239048 Oct 14 10:51:37 PM UTC 24 Oct 14 11:17:17 PM UTC 24 494851612627 ps
T525 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_polled_fixed.1531798632 Oct 14 11:06:20 PM UTC 24 Oct 14 11:10:46 PM UTC 24 331391851323 ps
T526 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_polled_fixed.432218923 Oct 14 11:05:10 PM UTC 24 Oct 14 11:10:46 PM UTC 24 488136443149 ps
T527 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_alert_test.4051379152 Oct 14 11:10:47 PM UTC 24 Oct 14 11:10:49 PM UTC 24 438695268 ps
T528 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled_fixed.1535979204 Oct 14 11:08:49 PM UTC 24 Oct 14 11:11:09 PM UTC 24 494962505932 ps
T36 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_stress_all.1794704455 Oct 14 10:47:49 PM UTC 24 Oct 14 11:11:09 PM UTC 24 519128592328 ps
T34 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all_with_rand_reset.150631789 Oct 14 11:10:47 PM UTC 24 Oct 14 11:11:22 PM UTC 24 27380110994 ps
T202 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/9.adc_ctrl_stress_all.3893630547 Oct 14 10:36:00 PM UTC 24 Oct 14 11:11:26 PM UTC 24 477188498331 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_interrupt.2401063843 Oct 14 11:04:01 PM UTC 24 Oct 14 11:11:36 PM UTC 24 489307263106 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_filters_wakeup.2884593570 Oct 14 10:55:39 PM UTC 24 Oct 14 11:11:38 PM UTC 24 390088803377 ps
T529 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_polled.1185006069 Oct 14 10:49:14 PM UTC 24 Oct 14 11:11:40 PM UTC 24 497590465120 ps
T530 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt_fixed.853931074 Oct 14 11:05:14 PM UTC 24 Oct 14 11:12:07 PM UTC 24 492851116334 ps
T531 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_poweron_counter.1140995652 Oct 14 11:12:03 PM UTC 24 Oct 14 11:12:07 PM UTC 24 3882398892 ps
T282 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_clock_gating.4206969120 Oct 14 10:47:22 PM UTC 24 Oct 14 11:12:34 PM UTC 24 512182939034 ps
T178 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/16.adc_ctrl_filters_wakeup.1107159221 Oct 14 10:47:16 PM UTC 24 Oct 14 11:12:35 PM UTC 24 637668021909 ps
T532 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled_fixed.2217068828 Oct 14 11:11:10 PM UTC 24 Oct 14 11:12:37 PM UTC 24 498279043857 ps
T533 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_alert_test.3628746615 Oct 14 11:12:38 PM UTC 24 Oct 14 11:12:40 PM UTC 24 321313031 ps
T534 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_clock_gating.2496018768 Oct 14 11:07:47 PM UTC 24 Oct 14 11:12:40 PM UTC 24 174330287929 ps
T535 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/19.adc_ctrl_filters_polled_fixed.732321495 Oct 14 10:51:28 PM UTC 24 Oct 14 11:12:45 PM UTC 24 495711066903 ps
T368 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_fsm_reset.4262050820 Oct 14 11:00:36 PM UTC 24 Oct 14 11:12:50 PM UTC 24 128172008051 ps
T536 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_smoke.3039651841 Oct 14 11:12:41 PM UTC 24 Oct 14 11:12:55 PM UTC 24 5976856082 ps
T537 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_lowpower_counter.3619094683 Oct 14 11:10:45 PM UTC 24 Oct 14 11:12:56 PM UTC 24 35676792169 ps
T538 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_stress_all_with_rand_reset.709903078 Oct 14 11:12:35 PM UTC 24 Oct 14 11:12:56 PM UTC 24 2170087632 ps
T179 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup.4151038466 Oct 14 11:07:24 PM UTC 24 Oct 14 11:13:02 PM UTC 24 542215896756 ps
T180 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_polled.2690144234 Oct 14 11:10:59 PM UTC 24 Oct 14 11:13:03 PM UTC 24 333701344216 ps
T539 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt_fixed.3675658367 Oct 14 11:06:51 PM UTC 24 Oct 14 11:13:15 PM UTC 24 490711395285 ps
T540 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_poweron_counter.2848858021 Oct 14 11:13:16 PM UTC 24 Oct 14 11:13:19 PM UTC 24 5108045861 ps
T541 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_wakeup_fixed.1103771405 Oct 14 11:07:36 PM UTC 24 Oct 14 11:13:21 PM UTC 24 405146343919 ps
T542 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled.1132890748 Oct 14 11:03:36 PM UTC 24 Oct 14 11:13:24 PM UTC 24 168842809891 ps
T543 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_polled.1121908051 Oct 14 11:12:41 PM UTC 24 Oct 14 11:13:27 PM UTC 24 164965607384 ps
T188 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_polled.2776911578 Oct 14 11:08:48 PM UTC 24 Oct 14 11:13:28 PM UTC 24 323952010421 ps
T544 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_lowpower_counter.3842087163 Oct 14 11:13:20 PM UTC 24 Oct 14 11:13:30 PM UTC 24 22614579166 ps
T306 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_both.3627106154 Oct 14 11:07:57 PM UTC 24 Oct 14 11:13:30 PM UTC 24 516294844292 ps
T545 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_alert_test.220181603 Oct 14 11:13:29 PM UTC 24 Oct 14 11:13:33 PM UTC 24 319028554 ps
T546 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_lowpower_counter.143467375 Oct 14 11:12:08 PM UTC 24 Oct 14 11:13:35 PM UTC 24 30893479206 ps
T254 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_stress_all.1695227498 Oct 14 10:58:15 PM UTC 24 Oct 14 11:13:44 PM UTC 24 369154385773 ps
T356 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_stress_all_with_rand_reset.2220073934 Oct 14 11:13:25 PM UTC 24 Oct 14 11:13:48 PM UTC 24 23901999735 ps
T547 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_smoke.3975676080 Oct 14 11:13:31 PM UTC 24 Oct 14 11:13:59 PM UTC 24 5717466381 ps
T548 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_fsm_reset.1902207875 Oct 14 11:04:50 PM UTC 24 Oct 14 11:14:12 PM UTC 24 114044461020 ps
T549 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_wakeup_fixed.3801068637 Oct 14 11:05:24 PM UTC 24 Oct 14 11:14:35 PM UTC 24 203804442297 ps
T550 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_wakeup_fixed.1134460743 Oct 14 11:04:13 PM UTC 24 Oct 14 11:14:45 PM UTC 24 209048665452 ps
T551 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_poweron_counter.1567041449 Oct 14 11:14:46 PM UTC 24 Oct 14 11:14:58 PM UTC 24 4365679146 ps
T552 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt.462359136 Oct 14 11:12:51 PM UTC 24 Oct 14 11:15:15 PM UTC 24 162616136679 ps
T553 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_clock_gating.1409725775 Oct 14 11:13:03 PM UTC 24 Oct 14 11:15:15 PM UTC 24 163358620857 ps
T181 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_interrupt.1630374306 Oct 14 11:11:10 PM UTC 24 Oct 14 11:15:22 PM UTC 24 493715041127 ps
T301 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_clock_gating.3168497787 Oct 14 11:04:15 PM UTC 24 Oct 14 11:15:29 PM UTC 24 504024630063 ps
T554 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_alert_test.324233782 Oct 14 11:15:29 PM UTC 24 Oct 14 11:15:33 PM UTC 24 410028518 ps
T555 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_wakeup.2057728193 Oct 14 11:12:56 PM UTC 24 Oct 14 11:15:40 PM UTC 24 218510035852 ps
T556 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_smoke.948756507 Oct 14 11:15:33 PM UTC 24 Oct 14 11:15:41 PM UTC 24 6091394094 ps
T294 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/17.adc_ctrl_clock_gating.3421771982 Oct 14 10:48:24 PM UTC 24 Oct 14 11:15:45 PM UTC 24 513758925963 ps
T321 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_stress_all_with_rand_reset.2623960821 Oct 14 11:15:16 PM UTC 24 Oct 14 11:15:50 PM UTC 24 8858819756 ps
T361 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt.3970717804 Oct 14 11:13:36 PM UTC 24 Oct 14 11:15:52 PM UTC 24 324611968790 ps
T557 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_fsm_reset.1252871253 Oct 14 11:03:05 PM UTC 24 Oct 14 11:15:55 PM UTC 24 114146976890 ps
T313 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_polled.2087861287 Oct 14 11:13:31 PM UTC 24 Oct 14 11:15:59 PM UTC 24 161007538771 ps
T558 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_lowpower_counter.968104024 Oct 14 11:15:00 PM UTC 24 Oct 14 11:16:09 PM UTC 24 28221001515 ps
T559 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt_fixed.2840323673 Oct 14 11:08:52 PM UTC 24 Oct 14 11:16:24 PM UTC 24 325439093462 ps
T308 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_both.3024801488 Oct 14 11:09:59 PM UTC 24 Oct 14 11:16:40 PM UTC 24 521014017593 ps
T560 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_poweron_counter.2929122486 Oct 14 11:16:25 PM UTC 24 Oct 14 11:16:42 PM UTC 24 3691693305 ps
T561 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup_fixed.152367703 Oct 14 11:14:00 PM UTC 24 Oct 14 11:16:43 PM UTC 24 201166561893 ps
T562 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_stress_all_with_rand_reset.1973129570 Oct 14 11:16:44 PM UTC 24 Oct 14 11:16:57 PM UTC 24 10106218735 ps
T189 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/11.adc_ctrl_stress_all.687087348 Oct 14 10:39:52 PM UTC 24 Oct 14 11:17:02 PM UTC 24 750657490619 ps
T367 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_fsm_reset.3593925769 Oct 14 11:05:57 PM UTC 24 Oct 14 11:17:06 PM UTC 24 114883800566 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_alert_test.108765880 Oct 14 11:17:03 PM UTC 24 Oct 14 11:17:06 PM UTC 24 450937813 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_smoke.1158982870 Oct 14 11:17:07 PM UTC 24 Oct 14 11:17:10 PM UTC 24 5879251928 ps
T346 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_wakeup.1114447794 Oct 14 11:13:48 PM UTC 24 Oct 14 11:17:11 PM UTC 24 205530633989 ps
T298 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_both.2768623796 Oct 14 10:59:55 PM UTC 24 Oct 14 11:17:15 PM UTC 24 358435870251 ps
T565 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_lowpower_counter.3845266736 Oct 14 11:16:40 PM UTC 24 Oct 14 11:17:17 PM UTC 24 29749813387 ps
T566 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_filters_interrupt.3690356370 Oct 14 11:06:29 PM UTC 24 Oct 14 11:17:18 PM UTC 24 323579625318 ps
T293 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_interrupt.982882874 Oct 14 10:59:05 PM UTC 24 Oct 14 11:18:01 PM UTC 24 497604656256 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_clock_gating.451263770 Oct 14 10:59:48 PM UTC 24 Oct 14 11:18:02 PM UTC 24 463150597340 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_poweron_counter.3568481437 Oct 14 11:18:03 PM UTC 24 Oct 14 11:18:07 PM UTC 24 4230998317 ps
T569 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/18.adc_ctrl_filters_wakeup_fixed.3098170040 Oct 14 10:49:43 PM UTC 24 Oct 14 11:18:16 PM UTC 24 586691430833 ps
T570 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_clock_gating.2437795915 Oct 14 11:14:13 PM UTC 24 Oct 14 11:18:16 PM UTC 24 353610534717 ps
T571 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_stress_all_with_rand_reset.211425937 Oct 14 11:18:18 PM UTC 24 Oct 14 11:18:26 PM UTC 24 1503690039 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/21.adc_ctrl_clock_gating.483695502 Oct 14 10:56:01 PM UTC 24 Oct 14 11:18:32 PM UTC 24 514089534343 ps
T572 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_alert_test.2980776524 Oct 14 11:18:33 PM UTC 24 Oct 14 11:18:35 PM UTC 24 309403147 ps
T573 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_lowpower_counter.1322561344 Oct 14 11:18:09 PM UTC 24 Oct 14 11:18:40 PM UTC 24 25751489358 ps
T574 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_smoke.891033559 Oct 14 11:18:36 PM UTC 24 Oct 14 11:18:46 PM UTC 24 5633320151 ps
T575 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/31.adc_ctrl_filters_interrupt_fixed.1481448233 Oct 14 11:12:56 PM UTC 24 Oct 14 11:18:51 PM UTC 24 163333050109 ps
T576 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/25.adc_ctrl_filters_polled.1523799629 Oct 14 11:01:44 PM UTC 24 Oct 14 11:19:15 PM UTC 24 328632652007 ps
T577 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_filters_wakeup_fixed.2365160811 Oct 14 11:11:36 PM UTC 24 Oct 14 11:19:15 PM UTC 24 602949411292 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_both.3881694559 Oct 14 10:57:13 PM UTC 24 Oct 14 11:19:34 PM UTC 24 498693309070 ps
T578 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_interrupt.3400677488 Oct 14 11:08:49 PM UTC 24 Oct 14 11:19:35 PM UTC 24 336238878282 ps
T286 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup.683136316 Oct 14 10:59:34 PM UTC 24 Oct 14 11:19:41 PM UTC 24 543474929568 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_clock_gating.174542937 Oct 14 11:17:18 PM UTC 24 Oct 14 11:19:44 PM UTC 24 163838176536 ps
T579 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_poweron_counter.2460360367 Oct 14 11:19:45 PM UTC 24 Oct 14 11:19:48 PM UTC 24 5097913295 ps
T229 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_fsm_reset.3351514998 Oct 14 11:10:45 PM UTC 24 Oct 14 11:19:50 PM UTC 24 109994854665 ps
T343 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_both.663853779 Oct 14 11:05:44 PM UTC 24 Oct 14 11:19:50 PM UTC 24 381241024657 ps
T349 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_stress_all_with_rand_reset.3528067976 Oct 14 11:19:52 PM UTC 24 Oct 14 11:19:58 PM UTC 24 8640458224 ps
T580 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/33.adc_ctrl_filters_polled_fixed.613386437 Oct 14 11:15:42 PM UTC 24 Oct 14 11:20:08 PM UTC 24 326389879788 ps
T581 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/26.adc_ctrl_filters_polled_fixed.812274168 Oct 14 11:03:46 PM UTC 24 Oct 14 11:20:09 PM UTC 24 327748262986 ps
T582 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_alert_test.3289215222 Oct 14 11:20:09 PM UTC 24 Oct 14 11:20:11 PM UTC 24 490354059 ps
T583 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_stress_all.2502662149 Oct 14 11:08:40 PM UTC 24 Oct 14 11:20:19 PM UTC 24 214797250697 ps
T584 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/28.adc_ctrl_fsm_reset.1194646928 Oct 14 11:08:22 PM UTC 24 Oct 14 11:20:19 PM UTC 24 116403632626 ps
T585 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_smoke.2177413356 Oct 14 11:20:10 PM UTC 24 Oct 14 11:20:20 PM UTC 24 5689091424 ps
T357 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_stress_all.3265521627 Oct 14 11:10:47 PM UTC 24 Oct 14 11:20:25 PM UTC 24 321279439847 ps
T586 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/22.adc_ctrl_filters_wakeup_fixed.1789838817 Oct 14 10:56:48 PM UTC 24 Oct 14 11:20:32 PM UTC 24 597830567372 ps
T587 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_interrupt.100823039 Oct 14 11:18:52 PM UTC 24 Oct 14 11:20:36 PM UTC 24 166313356238 ps
T588 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/30.adc_ctrl_fsm_reset.1226763403 Oct 14 11:12:09 PM UTC 24 Oct 14 11:20:47 PM UTC 24 78966047016 ps
T589 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt_fixed.3505009239 Oct 14 11:17:16 PM UTC 24 Oct 14 11:20:50 PM UTC 24 326719689065 ps
T590 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_lowpower_counter.1927126525 Oct 14 11:19:49 PM UTC 24 Oct 14 11:20:50 PM UTC 24 27453112411 ps
T353 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/34.adc_ctrl_filters_interrupt.3872317660 Oct 14 11:17:12 PM UTC 24 Oct 14 11:20:53 PM UTC 24 324137815542 ps
T591 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/32.adc_ctrl_filters_interrupt_fixed.3843397764 Oct 14 11:13:44 PM UTC 24 Oct 14 11:20:56 PM UTC 24 173433960106 ps
T211 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/27.adc_ctrl_filters_interrupt.3606835979 Oct 14 11:05:12 PM UTC 24 Oct 14 11:20:58 PM UTC 24 485519240825 ps
T592 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_stress_all_with_rand_reset.3638217636 Oct 14 11:20:57 PM UTC 24 Oct 14 11:21:04 PM UTC 24 4449048724 ps
T593 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_poweron_counter.3313793212 Oct 14 11:20:51 PM UTC 24 Oct 14 11:21:07 PM UTC 24 4035411971 ps
T594 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/36.adc_ctrl_alert_test.3034659135 Oct 14 11:21:05 PM UTC 24 Oct 14 11:21:07 PM UTC 24 333272596 ps
T595 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/29.adc_ctrl_filters_wakeup_fixed.3802649346 Oct 14 11:09:46 PM UTC 24 Oct 14 11:21:09 PM UTC 24 412752504026 ps
T596 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/23.adc_ctrl_filters_wakeup_fixed.698176758 Oct 14 10:59:46 PM UTC 24 Oct 14 11:21:09 PM UTC 24 403025612364 ps
T597 /workspaces/repo/scratch/os_regression_2024_10_14/adc_ctrl-sim-vcs/coverage/default/35.adc_ctrl_filters_polled.2049352424 Oct 14 11:18:41 PM UTC 24 Oct 14 11:21:09 PM UTC 24 326116781837 ps
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