Total Groups Coverage Summary 

COVERED	EXPECTED	SCORE	COVERED	EXPECTED	INST SCORE	WEIGHT
578	585	98.80	578	585	98.80	1

Total groups in report: 18

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NAME	COVERED	EXPECTED	SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING	COMMENT
tl_agent_pkg::pending_req_on_rst_cg	1	2	50.00	50.00	1	100	1	1	64	64
cip_base_pkg::tl_errors_cg_wrap::tl_errors_cg	12	15	80.00	100.00	1	100	1	1	64	64
cip_base_pkg::tl_intg_err_cg_wrap::tl_intg_err_cg	13	14	92.86	100.00	1	100	1	1	64	64
alert_esc_agent_pkg::alert_handshake_complete_cg	3	3	100.00	100.00	1	100	1	1	64	64
clkmgr_env_pkg::clkmgr_env_cov::extclk_cg	42	42	100.00		1	100	1	0	64	64
clkmgr_env_pkg::clkmgr_env_cov::fatal_err_cg	6	6	100.00		1	100	1	0	64	64
clkmgr_env_pkg::clkmgr_env_cov::recov_err_cg	22	22	100.00		1	100	1	0	64	64
clkmgr_env_pkg::clkmgr_peri_cg_wrap::peri_cg	12	12	100.00	100.00	1	100	1	1	64	64
clkmgr_env_pkg::clkmgr_trans_cg_wrap::trans_cg	18	18	100.00	100.00	1	100	1	1	64	64
clkmgr_env_pkg::freq_measure_cg_wrap::freq_measure_cg	8	8	100.00	100.00	1	100	1	1	64	64
dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg	2	2	100.00	100.00	1	100	1	1	64	64
dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg	2	2	100.00	100.00	1	100	1	1	64	64
dv_base_reg_pkg::mubi_cov#(4,32'sb00000000000000000000000000000101,32'sb00000000000000000000000000001010)::mubi_cg	6	6	100.00	100.00	1	100	1	1	64	64
dv_base_reg_pkg::mubi_cov#(4,32'sh00000006,32'sh00000009)::mubi_cg	6	6	100.00	93.75	1	100	1	1	64	64
dv_lib_pkg::bit_toggle_cg_wrap::bit_toggle_cg	4	4	100.00	100.00	1	100	1	1	64	64
tb.dut.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg	2	2	100.00	100.00	1	100	1	1	64	64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=1}	1	1	100.00	100.00	1	100	1	1	64	64
tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}	137	137	100.00	100.00	1	100	1	1	64	64