Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
4184 |
1 |
|
T11 |
136 |
|
T4 |
3 |
|
T12 |
155 |
instr_types[0] |
4273 |
1 |
|
T11 |
126 |
|
T12 |
165 |
|
T14 |
194 |
instr_types[1] |
25663 |
1 |
|
T11 |
916 |
|
T4 |
7 |
|
T12 |
1122 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for key_cp
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER |
[auto[1]] |
0 |
1 |
1 |
Covered bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
34120 |
1 |
|
T11 |
1178 |
|
T4 |
10 |
|
T12 |
1442 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
3 |
3 |
50.00 |
3 |
Automatically Generated Cross Bins for key_instr_cross
Element holes
key_cp | instr_type_cp | COUNT | AT LEAST | NUMBER |
[auto[1]] |
* |
-- |
-- |
3 |
Covered bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4184 |
1 |
|
T11 |
136 |
|
T4 |
3 |
|
T12 |
155 |
auto[0] |
instr_types[0] |
4273 |
1 |
|
T11 |
126 |
|
T12 |
165 |
|
T14 |
194 |
auto[0] |
instr_types[1] |
25663 |
1 |
|
T11 |
916 |
|
T4 |
7 |
|
T12 |
1122 |