Design Hierarchy
dashboard | hierarchy | modlist | groups | tests | asserts

NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb 96.25 98.93 91.44 99.76 91.30 97.69 98.39
dut 96.25 98.93 91.44 99.76 91.30 97.69 98.39
gen_alert_tx[0].u_prim_alert_sender 100.00 100.00
i2c_core 93.27 98.52 80.63 91.30 95.91 100.00
intr_hw_acq_overflow 84.17 90.00 66.67 80.00 100.00
intr_hw_cmd_complete 91.67 100.00 66.67 100.00 100.00
intr_hw_fmt_overflow 91.67 100.00 66.67 100.00 100.00
intr_hw_fmt_threshold 91.67 100.00 66.67 100.00 100.00
intr_hw_host_timeout 91.67 100.00 66.67 100.00 100.00
intr_hw_nak 83.33 100.00 33.33 100.00 100.00
intr_hw_rx_overflow 91.67 100.00 66.67 100.00 100.00
intr_hw_rx_threshold 91.67 100.00 66.67 100.00 100.00
intr_hw_scl_interference 83.33 100.00 33.33 100.00 100.00
intr_hw_sda_interference 91.67 100.00 66.67 100.00 100.00
intr_hw_sda_unstable 91.67 100.00 66.67 100.00 100.00
intr_hw_stretch_timeout 91.67 100.00 66.67 100.00 100.00
intr_hw_tx_overflow 91.67 100.00 66.67 100.00 100.00
intr_hw_tx_stretch 84.17 90.00 66.67 80.00 100.00
intr_hw_unexp_stop 91.67 100.00 66.67 100.00 100.00
u_i2c_acqfifo 96.15 100.00 84.62 100.00 100.00
gen_normal_fifo.u_fifo_cnt 100.00 100.00 100.00
u_i2c_fmtfifo 97.12 100.00 88.46 100.00 100.00
gen_normal_fifo.u_fifo_cnt 100.00 100.00 100.00
u_i2c_fsm 95.52 98.38 92.98 91.30 94.96 100.00
u_i2c_rxfifo 96.15 100.00 84.62 100.00 100.00
gen_normal_fifo.u_fifo_cnt 100.00 100.00 100.00
u_i2c_sync_scl 100.00 100.00 100.00
u_sync_1 100.00 100.00 100.00
gen_generic.u_impl_generic 100.00 100.00 100.00
u_sync_2 100.00 100.00 100.00
gen_generic.u_impl_generic 100.00 100.00 100.00
u_i2c_sync_sda 100.00 100.00 100.00
u_sync_1 100.00 100.00 100.00
gen_generic.u_impl_generic 100.00 100.00 100.00
u_sync_2 100.00 100.00 100.00
gen_generic.u_impl_generic 100.00 100.00 100.00
u_i2c_txfifo 96.15 100.00 84.62 100.00 100.00
gen_normal_fifo.u_fifo_cnt 100.00 100.00 100.00
i2c_csr_assert 100.00 100.00
tlul_assert_device 99.30 100.00 100.00 97.90
u_reg 99.44 99.26 98.77 100.00 99.18 100.00
subtree...
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%