Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.12 98.93 91.44 99.76 91.30 97.69 98.39 81.30


Total tests in report: 1672
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
60.07 60.07 50.00 50.00 52.47 52.47 88.59 88.59 91.30 91.30 52.47 52.47 80.43 80.43 5.25 5.25 /workspace/coverage/cover_reg_top/17.i2c_same_csr_outstanding.46739952864349892336533390337319578340784844652178339707824289841191029803204
80.12 20.05 88.77 38.77 76.27 23.80 92.60 4.00 91.30 0.00 85.07 32.60 95.44 15.01 31.41 26.16 /workspace/coverage/default/21.i2c_host_rx_oversample.107449519808108165548537904158963843788792860419133235443729480081570569051632
85.46 5.33 96.00 7.23 83.62 7.35 93.69 1.09 91.30 0.00 95.94 10.87 96.78 1.34 40.86 9.45 /workspace/coverage/default/15.i2c_target_stress_all.75388401031468778231359053656900669517163345549537054893112256227749732125091
89.55 4.10 97.66 1.66 86.10 2.47 96.36 2.67 91.30 0.00 96.38 0.44 96.78 0.00 62.29 21.43 /workspace/coverage/cover_reg_top/11.i2c_intr_test.86639782591007373864612292486652498645390476626838751172422545473541918135892
91.30 1.75 97.75 0.10 87.17 1.07 98.06 1.70 91.30 0.00 96.49 0.11 97.86 1.07 70.48 8.19 /workspace/coverage/cover_reg_top/12.i2c_tl_intg_err.19629058556044000190874551319273507727452424951067453569698429124665678564396
92.06 0.76 97.75 0.00 88.70 1.54 98.54 0.49 91.30 0.00 96.60 0.11 98.12 0.27 73.42 2.94 /workspace/coverage/cover_reg_top/15.i2c_tl_errors.86857081786788154023810753061435251066600129568491988709181414941689475156244
92.60 0.54 97.80 0.05 89.24 0.53 98.54 0.00 91.30 0.00 97.04 0.44 98.12 0.00 76.16 2.73 /workspace/coverage/default/34.i2c_host_stress_all.83436687373893347957025150983749513461386332453043500736708941455120914513282
92.90 0.30 97.80 0.00 89.37 0.13 98.79 0.24 91.30 0.00 97.26 0.22 98.12 0.00 77.63 1.47 /workspace/coverage/default/14.i2c_host_override.25275406214749576294043326345755556224330923414830186538828205029558371843843
93.10 0.20 97.80 0.00 90.44 1.07 99.03 0.24 91.30 0.00 97.26 0.00 98.12 0.00 77.73 0.11 /workspace/coverage/default/23.i2c_host_fifo_overflow.105649725708160498090859928432930251391623500467989800081563863431079303406238
93.29 0.19 97.80 0.00 90.57 0.13 99.76 0.73 91.30 0.00 97.26 0.00 98.39 0.27 77.94 0.21 /workspace/coverage/default/0.i2c_sec_cm.29252051190289394936650980530580445289517510678752941948386444577591279914342
93.46 0.17 97.80 0.00 90.71 0.13 99.76 0.00 91.30 0.00 97.26 0.00 98.39 0.00 78.99 1.05 /workspace/coverage/default/0.i2c_target_glitch.78965506719259910728118164885970527169731836384616232690654291989554149719275
93.62 0.16 98.49 0.68 90.84 0.13 99.76 0.00 91.30 0.00 97.26 0.00 98.39 0.00 79.31 0.32 /workspace/coverage/cover_reg_top/0.i2c_csr_mem_rw_with_rand_reset.103538993142427349873455843448818029601356564045089016534909301710923994904919
93.77 0.14 98.83 0.34 90.98 0.13 99.76 0.00 91.30 0.00 97.59 0.33 98.39 0.00 79.52 0.21 /workspace/coverage/default/15.i2c_host_mode_toggle.86990612965355529980646797618830963495931796526717365314047002402242052184471
93.87 0.11 98.83 0.00 90.98 0.00 99.76 0.00 91.30 0.00 97.59 0.00 98.39 0.00 80.25 0.74 /workspace/coverage/default/11.i2c_host_perf.61078387869687322328188250875382815407586406224611222774818088431990212090726
93.93 0.05 98.83 0.00 91.04 0.07 99.76 0.00 91.30 0.00 97.59 0.00 98.39 0.00 80.57 0.32 /workspace/coverage/default/26.i2c_target_tx_ovf.36394429573567007030922612755164348918484448752936729548202499865675381595592
93.98 0.05 98.88 0.05 91.24 0.20 99.76 0.00 91.30 0.00 97.69 0.11 98.39 0.00 80.57 0.00 /workspace/coverage/default/10.i2c_target_bad_addr.59300529105701765945997840838052344951237024990953230321166871863688629462229
94.03 0.05 98.88 0.00 91.38 0.13 99.76 0.00 91.30 0.00 97.69 0.00 98.39 0.00 80.78 0.21 /workspace/coverage/default/18.i2c_host_fifo_reset_fmt.25579034510241233767932419263303325817714588058518077429154020683107529509404
94.07 0.05 98.88 0.00 91.38 0.00 99.76 0.00 91.30 0.00 97.69 0.00 98.39 0.00 81.09 0.32 /workspace/coverage/cover_reg_top/0.i2c_csr_rw.10117143501534438764910928537319227400285838248199026355086483708075937294988
94.09 0.02 98.93 0.05 91.44 0.07 99.76 0.00 91.30 0.00 97.69 0.00 98.39 0.00 81.09 0.00 /workspace/coverage/default/11.i2c_alert_test.103356070198035900163712171167784764534308967840954462840124944520256633924544
94.10 0.02 98.93 0.00 91.44 0.00 99.76 0.00 91.30 0.00 97.69 0.00 98.39 0.00 81.20 0.11 /workspace/coverage/default/10.i2c_host_fifo_reset_rx.85961216465471895713300488302327528666528872678278019681920858957268092271182
94.12 0.02 98.93 0.00 91.44 0.00 99.76 0.00 91.30 0.00 97.69 0.00 98.39 0.00 81.30 0.11 /workspace/coverage/default/16.i2c_target_fifo_reset_tx.47643450400962185798473186184175996539531051362431306103193086706408643942878


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.i2c_csr_aliasing.11494324840893110887246647493710682364607908228193867125619104390071314936848
/workspace/coverage/cover_reg_top/0.i2c_csr_bit_bash.103690746236288054544093316088996158775042481690740665339870934756478440578996
/workspace/coverage/cover_reg_top/0.i2c_csr_hw_reset.93410883516989527614766902065692854795548410769688528410712690695834578913596
/workspace/coverage/cover_reg_top/0.i2c_intr_test.49332284218726808366450433273346736760370211553809727022553554243303089442267
/workspace/coverage/cover_reg_top/0.i2c_same_csr_outstanding.73859880017432316056777855416143677501875601390963015690373287660218610513737
/workspace/coverage/cover_reg_top/0.i2c_tl_errors.84325811898926019839133230212587412911849696822819540196871016240354295541787
/workspace/coverage/cover_reg_top/0.i2c_tl_intg_err.96419850889939122965026889160490761092899627924813565277951787726316509153675
/workspace/coverage/cover_reg_top/1.i2c_csr_aliasing.95016362545550485013534667225469449416353327772912966014645762104563907415010
/workspace/coverage/cover_reg_top/1.i2c_csr_bit_bash.89228922592396428455960947179832981212223211958308554168726660698829055734955
/workspace/coverage/cover_reg_top/1.i2c_csr_hw_reset.4425310642207328071313547854216436095178681175137074217101411530238600647178
/workspace/coverage/cover_reg_top/1.i2c_csr_mem_rw_with_rand_reset.56075887547278694320177350206345035717529792509343033938153213689320427165794
/workspace/coverage/cover_reg_top/1.i2c_csr_rw.16139711133302342350186290846426844521733061404480728647855648587206453339321
/workspace/coverage/cover_reg_top/1.i2c_intr_test.105067253560764698685364809958905005372328886523800513964456540644296035739212
/workspace/coverage/cover_reg_top/1.i2c_same_csr_outstanding.98398756469579679214330505956046706549892856518807044714505168264890127656135
/workspace/coverage/cover_reg_top/1.i2c_tl_errors.108650063979758821558898735277186138068987762954124841682316921527431603044650
/workspace/coverage/cover_reg_top/1.i2c_tl_intg_err.103947923989448932760620955376185712356917339076667264566429565020488346664989
/workspace/coverage/cover_reg_top/10.i2c_csr_mem_rw_with_rand_reset.8087713713254000717911558166062325010673419566281365494206906411049829885277
/workspace/coverage/cover_reg_top/10.i2c_csr_rw.95853523211580501744996760447628107402986736458381231241093400174363649476258
/workspace/coverage/cover_reg_top/10.i2c_intr_test.83161752718363420643144813480035665655118492655995810410553761061784546223097
/workspace/coverage/cover_reg_top/10.i2c_same_csr_outstanding.87310199627095132271108118157205639658537161048766410229119487068061565598719
/workspace/coverage/cover_reg_top/10.i2c_tl_errors.27355702358420651318978658810168895418223946707127693576103157198652505735562
/workspace/coverage/cover_reg_top/10.i2c_tl_intg_err.90669620610093363906776910302139945070160486890533447341432584100373101998368
/workspace/coverage/cover_reg_top/11.i2c_csr_mem_rw_with_rand_reset.23487727518856174814626482956050897793854418746745532736455169780142620133031
/workspace/coverage/cover_reg_top/11.i2c_csr_rw.84733396851217515044886183153282341117045189281187529199629629235966911864762
/workspace/coverage/cover_reg_top/11.i2c_same_csr_outstanding.97523541216325804182668780517912915502039790384567804092500821911653254441918
/workspace/coverage/cover_reg_top/11.i2c_tl_errors.51190172897394155595735810245392998258317056513241928597889905099935297000100
/workspace/coverage/cover_reg_top/11.i2c_tl_intg_err.49327527128696032085895465736689826328226522349667139711563497918735094638889
/workspace/coverage/cover_reg_top/12.i2c_csr_mem_rw_with_rand_reset.92925334259991613589534022106284688873575421154529960327097834555874666548876
/workspace/coverage/cover_reg_top/12.i2c_csr_rw.105455119801758232808145341624808628422778433640045522430541223610933425695260
/workspace/coverage/cover_reg_top/12.i2c_intr_test.100659693568527159679994029092209257797796421883880216190112242264565916100785
/workspace/coverage/cover_reg_top/12.i2c_same_csr_outstanding.59511648968676601906403182239991602310065948506172370659982830088914921413545
/workspace/coverage/cover_reg_top/12.i2c_tl_errors.14298794635006810907453432388382474051580993965184652608023300510281887726452
/workspace/coverage/cover_reg_top/13.i2c_csr_mem_rw_with_rand_reset.63985045590435792057636878540920855876061873194050612101964643419753968621523
/workspace/coverage/cover_reg_top/13.i2c_csr_rw.16820383808382278046940313500911535933945737620246781210120865249465141897736
/workspace/coverage/cover_reg_top/13.i2c_intr_test.100325239855341841050832580653533987798751438148798716063170342066722383771734
/workspace/coverage/cover_reg_top/13.i2c_same_csr_outstanding.22112809441422771667484104662354161245857967325968536363826214927130166767405
/workspace/coverage/cover_reg_top/13.i2c_tl_errors.275403314364209567721246707119654798951221476149666098015250098229653527251
/workspace/coverage/cover_reg_top/13.i2c_tl_intg_err.34211416672987898451363155776097568500347786759544283209174577512721671563423
/workspace/coverage/cover_reg_top/14.i2c_csr_mem_rw_with_rand_reset.21912213814040599217880520996138610291304012167221930605878179865779837879695
/workspace/coverage/cover_reg_top/14.i2c_csr_rw.52175216614952995723252133411129567899094207955053982177036206042213097622407
/workspace/coverage/cover_reg_top/14.i2c_intr_test.25603673982243776701882899580970877027582565761013260143992193612068655539898
/workspace/coverage/cover_reg_top/14.i2c_same_csr_outstanding.55613691564370841511440147750727776952248551070853981746008386840211396442312
/workspace/coverage/cover_reg_top/14.i2c_tl_errors.78092954056262999319154690501623491519138765191178324567280203069873038262541
/workspace/coverage/cover_reg_top/14.i2c_tl_intg_err.103755608010594515730761537215475513274283673108976884010824293794620497906832
/workspace/coverage/cover_reg_top/15.i2c_csr_mem_rw_with_rand_reset.22800401047037697458416510111608386433586095649113731525282652490835823377572
/workspace/coverage/cover_reg_top/15.i2c_csr_rw.101982850839025789972325024237207843869988701931094365063415894364671905339035
/workspace/coverage/cover_reg_top/15.i2c_intr_test.31546576145135511160609994837740592797893169874924884399133331003727657113741
/workspace/coverage/cover_reg_top/15.i2c_same_csr_outstanding.63103607856140513609345829196207787411151394394581750667429036378845672789036
/workspace/coverage/cover_reg_top/15.i2c_tl_intg_err.86839594476578638572218063528349802868015231502625402451522128897028312597046
/workspace/coverage/cover_reg_top/16.i2c_csr_mem_rw_with_rand_reset.55323096550702284971090381793930559986805375890210970904075440712399403385445
/workspace/coverage/cover_reg_top/16.i2c_csr_rw.34443682801484983161001100752512614858459085372665902768215967796235363156059
/workspace/coverage/cover_reg_top/16.i2c_intr_test.15578695042866623221536586170116686827459464340700126598389878895054618573610
/workspace/coverage/cover_reg_top/16.i2c_same_csr_outstanding.29060440222027705382916355829652401711849607484588600715023080752653719360067
/workspace/coverage/cover_reg_top/16.i2c_tl_errors.39154893968668273880825384205127600792026051919338812977279076732131609633235
/workspace/coverage/cover_reg_top/16.i2c_tl_intg_err.51549013345973508346760368277004950219136187801548773883338063431851133349895
/workspace/coverage/cover_reg_top/17.i2c_csr_mem_rw_with_rand_reset.74668799772292610944158688834532819850469148206772834362296263311956890439943
/workspace/coverage/cover_reg_top/17.i2c_csr_rw.62281600814644780083279936214011884609603143792237658133713438694943417419026
/workspace/coverage/cover_reg_top/17.i2c_intr_test.103139595129143696228844039720494840088949563377599189088772754486656134482615
/workspace/coverage/cover_reg_top/17.i2c_tl_errors.64540032892474616682378230923114436398801077298037661506329782703879492869488
/workspace/coverage/cover_reg_top/17.i2c_tl_intg_err.83573643554529154115214838310833338007074968352853683511939071797535313234917
/workspace/coverage/cover_reg_top/18.i2c_csr_mem_rw_with_rand_reset.34609889533738390698495984732464768089210851685748376765676061339031393550692
/workspace/coverage/cover_reg_top/18.i2c_csr_rw.13496759211401441653858973122905741571013320076069480999466148410324215676737
/workspace/coverage/cover_reg_top/18.i2c_intr_test.11364754668567059985162661420272803040655623222572249063689512006720960360374
/workspace/coverage/cover_reg_top/18.i2c_same_csr_outstanding.19376280489043507779320925928762704633255494982741374743442807435054191914349
/workspace/coverage/cover_reg_top/18.i2c_tl_errors.46429599490575354948659327883996638097566443850169138730014217710685752010989
/workspace/coverage/cover_reg_top/18.i2c_tl_intg_err.38727969264710945276496800668138937704208365961751794299806783888072460204889
/workspace/coverage/cover_reg_top/19.i2c_csr_mem_rw_with_rand_reset.62225358117713277680193024223670480056910566398879682473427743389785221146840
/workspace/coverage/cover_reg_top/19.i2c_csr_rw.46370356172064342440166349011286274893422505025448241652513165117527606033966
/workspace/coverage/cover_reg_top/19.i2c_intr_test.43859960660157590368634483694802321518952878684241750868668910299867669133352
/workspace/coverage/cover_reg_top/19.i2c_same_csr_outstanding.41812011804001220373418671452120850048133326537975125382364435755387657341096
/workspace/coverage/cover_reg_top/19.i2c_tl_errors.24344314839591607881121461539393664737770214986415420983590307308745400848185
/workspace/coverage/cover_reg_top/19.i2c_tl_intg_err.7838379337643659906087795834158396130768966523856467705017409311663611265568
/workspace/coverage/cover_reg_top/2.i2c_csr_aliasing.13854330342467103463462098584786067704033862501654387575827003738186225107007
/workspace/coverage/cover_reg_top/2.i2c_csr_bit_bash.21099387945517068175084874810890637916265098203888292620285267633490523842591
/workspace/coverage/cover_reg_top/2.i2c_csr_hw_reset.15092490215964864023218256060798396735136703919958443165906929280710906000826
/workspace/coverage/cover_reg_top/2.i2c_csr_mem_rw_with_rand_reset.23731242901853145390037828519102608799865011137235504556837257934569135687164
/workspace/coverage/cover_reg_top/2.i2c_csr_rw.15923676789844313180381529098491449046953602471384392786392248431975192472861
/workspace/coverage/cover_reg_top/2.i2c_intr_test.115778616048941641454350455473051789825992496589066947805172167048923080967102
/workspace/coverage/cover_reg_top/2.i2c_same_csr_outstanding.4277497851842420045812720028074891224953905162945724220626676171297716347487
/workspace/coverage/cover_reg_top/2.i2c_tl_errors.23781614037248258703840563460778162616338471287189141960288985599125188098055
/workspace/coverage/cover_reg_top/2.i2c_tl_intg_err.43822482440822266918171236191276070614836414452049842379328288199525436179983
/workspace/coverage/cover_reg_top/20.i2c_intr_test.18095035893972196990775274011666408724616878246427364723713873341939020525641
/workspace/coverage/cover_reg_top/21.i2c_intr_test.16141857268132856749245844319931682405415341202034180646668882389718247888042
/workspace/coverage/cover_reg_top/22.i2c_intr_test.108383702825355252536589204379556075731614613395407467253302460879396304295205
/workspace/coverage/cover_reg_top/23.i2c_intr_test.45485095243843050652136346646044056062454532994833961575361082697379407592377
/workspace/coverage/cover_reg_top/24.i2c_intr_test.4865355834807315787252762606943669273972578940314417996284784709144632913827
/workspace/coverage/cover_reg_top/25.i2c_intr_test.47772860738930087523611836485149769902284324403650054770659093526874701670908
/workspace/coverage/cover_reg_top/26.i2c_intr_test.32636594868802515509588601211738774823197630624176606349048681282356159790221
/workspace/coverage/cover_reg_top/27.i2c_intr_test.56600574105545547101220225562687371677594244686329955831902354825045056966399
/workspace/coverage/cover_reg_top/28.i2c_intr_test.84955118048146715458237535011711618032775574495790907944750513959933434734821
/workspace/coverage/cover_reg_top/29.i2c_intr_test.77514067883264465884152825160389605090251894564341931379045578868113217702270
/workspace/coverage/cover_reg_top/3.i2c_csr_aliasing.76039505959325185160026638535781394555791234808749214866726269089814128107904
/workspace/coverage/cover_reg_top/3.i2c_csr_bit_bash.93400265347288338098314344534874603727863625013897261724421109680915893201310
/workspace/coverage/cover_reg_top/3.i2c_csr_hw_reset.40189970085480553320964190070402890229578072994379536125727994232805241562160
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Total test records in report: 1672
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T26 /workspace/coverage/cover_reg_top/17.i2c_same_csr_outstanding.46739952864349892336533390337319578340784844652178339707824289841191029803204 Nov 22 01:03:47 PM PST 23 Nov 22 01:03:49 PM PST 23 48993455 ps
T27 /workspace/coverage/cover_reg_top/4.i2c_csr_bit_bash.90374405052433347012865147633233466479324366975023905933496146590093726292056 Nov 22 01:03:00 PM PST 23 Nov 22 01:03:03 PM PST 23 336669725 ps
T28 /workspace/coverage/cover_reg_top/11.i2c_intr_test.86639782591007373864612292486652498645390476626838751172422545473541918135892 Nov 22 01:03:08 PM PST 23 Nov 22 01:03:09 PM PST 23 24422223 ps
T34 /workspace/coverage/cover_reg_top/16.i2c_same_csr_outstanding.29060440222027705382916355829652401711849607484588600715023080752653719360067 Nov 22 01:03:51 PM PST 23 Nov 22 01:03:53 PM PST 23 48993455 ps
T33 /workspace/coverage/cover_reg_top/30.i2c_intr_test.88692170709156444055582164584209745935899927866174139142548842334343892345640 Nov 22 01:03:47 PM PST 23 Nov 22 01:03:49 PM PST 23 24422223 ps
T35 /workspace/coverage/cover_reg_top/45.i2c_intr_test.87407807258244568448581788786409621670561103350122037568833594285890284824601 Nov 22 01:03:55 PM PST 23 Nov 22 01:03:58 PM PST 23 24422223 ps
T36 /workspace/coverage/cover_reg_top/0.i2c_csr_rw.10117143501534438764910928537319227400285838248199026355086483708075937294988 Nov 22 01:01:41 PM PST 23 Nov 22 01:01:43 PM PST 23 28136479 ps
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