| | | | | | | |
tb |
59.94 |
52.44 |
59.16 |
94.90 |
0.00 |
53.13 |
100.00 |
| dut |
59.94 |
52.44 |
59.16 |
94.90 |
0.00 |
53.13 |
100.00 |
| gen_alert_tx[0].u_prim_alert_sender |
100.00 |
|
|
100.00 |
|
|
|
| i2c_core |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| intr_hw_acq_overflow |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_cmd_complete |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_fmt_overflow |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_fmt_threshold |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_host_timeout |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_nak |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_rx_overflow |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_rx_threshold |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_scl_interference |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_sda_interference |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_sda_unstable |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_stretch_timeout |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_tx_overflow |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_tx_stretch |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| intr_hw_unexp_stop |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| u_i2c_acqfifo |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_normal_fifo.u_fifo_cnt |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_i2c_fmtfifo |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_normal_fifo.u_fifo_cnt |
0.00 |
0.00 |
|
|
|
0.00 |
|
u_i2c_fsm |
0.00 |
0.00 |
0.00 |
|
0.00 |
0.00 |
|
| u_i2c_rxfifo |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_normal_fifo.u_fifo_cnt |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_i2c_sync_scl |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_1 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_2 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_i2c_sync_sda |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_1 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_sync_2 |
0.00 |
0.00 |
|
|
|
0.00 |
|
| gen_generic.u_impl_generic |
0.00 |
0.00 |
|
|
|
0.00 |
|
| u_i2c_txfifo |
0.00 |
0.00 |
0.00 |
|
|
0.00 |
|
| gen_normal_fifo.u_fifo_cnt |
0.00 |
0.00 |
|
|
|
0.00 |
|
| i2c_csr_assert |
100.00 |
|
|
|
|
|
100.00 |
| tlul_assert_device |
33.33 |
0.00 |
|
|
|
0.00 |
100.00 |
| u_reg |
97.50 |
98.99 |
98.99 |
90.32 |
|
99.18 |
100.00 |
| subtree... |
|
|
|
|
|
|
|