| T387 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.1125670768 |
|
|
Sep 01 07:13:43 AM UTC 24 |
Sep 01 07:13:55 AM UTC 24 |
4897720547 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.3549832984 |
|
|
Sep 01 07:13:36 AM UTC 24 |
Sep 01 07:13:56 AM UTC 24 |
1222044700 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_hrst.3190163651 |
|
|
Sep 01 07:13:53 AM UTC 24 |
Sep 01 07:13:58 AM UTC 24 |
970532212 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_host_stretch_timeout.4151610225 |
|
|
Sep 01 07:13:13 AM UTC 24 |
Sep 01 07:13:59 AM UTC 24 |
844216839 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_watermark.3287958542 |
|
|
Sep 01 07:12:45 AM UTC 24 |
Sep 01 07:13:59 AM UTC 24 |
12102394578 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.1023696510 |
|
|
Sep 01 07:13:47 AM UTC 24 |
Sep 01 07:13:59 AM UTC 24 |
2598235640 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_host_perf_precise.402361815 |
|
|
Sep 01 07:13:11 AM UTC 24 |
Sep 01 07:14:00 AM UTC 24 |
6825536048 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_perf.4151281990 |
|
|
Sep 01 07:13:51 AM UTC 24 |
Sep 01 07:14:00 AM UTC 24 |
1519158130 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.665254165 |
|
|
Sep 01 07:13:58 AM UTC 24 |
Sep 01 07:14:01 AM UTC 24 |
482130756 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.41600644 |
|
|
Sep 01 07:13:52 AM UTC 24 |
Sep 01 07:14:01 AM UTC 24 |
792117121 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.1700030793 |
|
|
Sep 01 07:13:42 AM UTC 24 |
Sep 01 07:14:02 AM UTC 24 |
1122231038 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.3217157853 |
|
|
Sep 01 07:14:31 AM UTC 24 |
Sep 01 07:14:41 AM UTC 24 |
4289682442 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.2285452948 |
|
|
Sep 01 07:13:56 AM UTC 24 |
Sep 01 07:14:02 AM UTC 24 |
414714010 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.3483577894 |
|
|
Sep 01 07:13:57 AM UTC 24 |
Sep 01 07:14:03 AM UTC 24 |
887073191 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_perf.3887943941 |
|
|
Sep 01 07:14:35 AM UTC 24 |
Sep 01 07:14:43 AM UTC 24 |
723144861 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.3489472867 |
|
|
Sep 01 07:13:39 AM UTC 24 |
Sep 01 07:14:04 AM UTC 24 |
2814869527 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_alert_test.1133623106 |
|
|
Sep 01 07:14:02 AM UTC 24 |
Sep 01 07:14:04 AM UTC 24 |
53742949 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_override.2154203856 |
|
|
Sep 01 07:14:02 AM UTC 24 |
Sep 01 07:14:04 AM UTC 24 |
28945893 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_nack_txstretch.474877414 |
|
|
Sep 01 07:14:01 AM UTC 24 |
Sep 01 07:14:04 AM UTC 24 |
185813007 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.13463844 |
|
|
Sep 01 07:13:58 AM UTC 24 |
Sep 01 07:14:04 AM UTC 24 |
128088244 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.736398675 |
|
|
Sep 01 07:13:59 AM UTC 24 |
Sep 01 07:14:05 AM UTC 24 |
981348303 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.3740130476 |
|
|
Sep 01 07:14:03 AM UTC 24 |
Sep 01 07:14:06 AM UTC 24 |
142167027 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.2464361420 |
|
|
Sep 01 07:14:01 AM UTC 24 |
Sep 01 07:14:06 AM UTC 24 |
2101961037 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/6.i2c_host_smoke.2662492954 |
|
|
Sep 01 07:12:44 AM UTC 24 |
Sep 01 07:14:38 AM UTC 24 |
2334206598 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.1823355766 |
|
|
Sep 01 07:14:29 AM UTC 24 |
Sep 01 07:14:39 AM UTC 24 |
384865154 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.466348548 |
|
|
Sep 01 07:14:01 AM UTC 24 |
Sep 01 07:14:06 AM UTC 24 |
3046434114 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.746328696 |
|
|
Sep 01 07:14:32 AM UTC 24 |
Sep 01 07:14:43 AM UTC 24 |
10960303674 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.3620057916 |
|
|
Sep 01 07:14:06 AM UTC 24 |
Sep 01 07:14:09 AM UTC 24 |
65658019 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.1908153654 |
|
|
Sep 01 07:14:04 AM UTC 24 |
Sep 01 07:14:12 AM UTC 24 |
2057877204 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_host_smoke.2865664828 |
|
|
Sep 01 07:13:07 AM UTC 24 |
Sep 01 07:14:12 AM UTC 24 |
12660806212 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.1301568803 |
|
|
Sep 01 07:14:33 AM UTC 24 |
Sep 01 07:14:44 AM UTC 24 |
1785908273 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_perf_precise.2617169699 |
|
|
Sep 01 07:14:05 AM UTC 24 |
Sep 01 07:14:17 AM UTC 24 |
550718810 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.3564623431 |
|
|
Sep 01 07:14:14 AM UTC 24 |
Sep 01 07:14:17 AM UTC 24 |
515228392 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.1043291953 |
|
|
Sep 01 07:14:03 AM UTC 24 |
Sep 01 07:14:17 AM UTC 24 |
2713662078 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.72488811 |
|
|
Sep 01 07:13:44 AM UTC 24 |
Sep 01 07:14:18 AM UTC 24 |
2851275436 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_watermark.1171956345 |
|
|
Sep 01 07:11:52 AM UTC 24 |
Sep 01 07:14:19 AM UTC 24 |
10089507853 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.2445936468 |
|
|
Sep 01 07:14:09 AM UTC 24 |
Sep 01 07:14:19 AM UTC 24 |
3854854353 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.3486110974 |
|
|
Sep 01 07:14:17 AM UTC 24 |
Sep 01 07:14:19 AM UTC 24 |
118215293 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/4.i2c_host_perf_precise.1684910479 |
|
|
Sep 01 07:11:56 AM UTC 24 |
Sep 01 07:14:21 AM UTC 24 |
24538345898 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.2935884099 |
|
|
Sep 01 07:13:35 AM UTC 24 |
Sep 01 07:14:22 AM UTC 24 |
5295122062 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/1.i2c_target_stress_wr.908720896 |
|
|
Sep 01 07:10:30 AM UTC 24 |
Sep 01 07:14:23 AM UTC 24 |
45138120757 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_hrst.1491785494 |
|
|
Sep 01 07:14:19 AM UTC 24 |
Sep 01 07:14:23 AM UTC 24 |
1036286407 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.3515060341 |
|
|
Sep 01 07:14:11 AM UTC 24 |
Sep 01 07:14:24 AM UTC 24 |
1190960627 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_perf.1693286030 |
|
|
Sep 01 07:14:18 AM UTC 24 |
Sep 01 07:14:24 AM UTC 24 |
3445714429 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.4140880622 |
|
|
Sep 01 07:14:23 AM UTC 24 |
Sep 01 07:14:25 AM UTC 24 |
157981491 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.3223363341 |
|
|
Sep 01 07:14:07 AM UTC 24 |
Sep 01 07:14:26 AM UTC 24 |
3848275459 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.1564779410 |
|
|
Sep 01 07:14:07 AM UTC 24 |
Sep 01 07:14:26 AM UTC 24 |
1769923726 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.1793871856 |
|
|
Sep 01 07:14:22 AM UTC 24 |
Sep 01 07:14:26 AM UTC 24 |
356605446 ps |
| T23 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_mode_toggle.2730088761 |
|
|
Sep 01 07:14:20 AM UTC 24 |
Sep 01 07:14:27 AM UTC 24 |
136715466 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.3924026398 |
|
|
Sep 01 07:14:10 AM UTC 24 |
Sep 01 07:14:27 AM UTC 24 |
3974407507 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.1915228746 |
|
|
Sep 01 07:14:07 AM UTC 24 |
Sep 01 07:14:27 AM UTC 24 |
666523769 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.3558838917 |
|
|
Sep 01 07:13:40 AM UTC 24 |
Sep 01 07:14:41 AM UTC 24 |
27154592086 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.1964735703 |
|
|
Sep 01 07:14:24 AM UTC 24 |
Sep 01 07:14:28 AM UTC 24 |
1766263375 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_target_stress_all.2031534559 |
|
|
Sep 01 07:13:23 AM UTC 24 |
Sep 01 07:14:29 AM UTC 24 |
66390612951 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.362064940 |
|
|
Sep 01 07:14:22 AM UTC 24 |
Sep 01 07:14:29 AM UTC 24 |
342532147 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_alert_test.3674596547 |
|
|
Sep 01 07:14:27 AM UTC 24 |
Sep 01 07:14:29 AM UTC 24 |
36879492 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_override.1462429287 |
|
|
Sep 01 07:14:27 AM UTC 24 |
Sep 01 07:14:29 AM UTC 24 |
101831063 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/3.i2c_target_intr_stress_wr.2943928740 |
|
|
Sep 01 07:11:29 AM UTC 24 |
Sep 01 07:14:29 AM UTC 24 |
14323310357 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.3177348195 |
|
|
Sep 01 07:13:37 AM UTC 24 |
Sep 01 07:14:30 AM UTC 24 |
2571172399 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_hrst.3340451333 |
|
|
Sep 01 07:14:37 AM UTC 24 |
Sep 01 07:14:42 AM UTC 24 |
263223750 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.1777122120 |
|
|
Sep 01 07:14:25 AM UTC 24 |
Sep 01 07:14:30 AM UTC 24 |
490895482 ps |
| T46 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.1136707187 |
|
|
Sep 01 07:14:25 AM UTC 24 |
Sep 01 07:14:31 AM UTC 24 |
1783599398 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_full.2042751371 |
|
|
Sep 01 07:11:18 AM UTC 24 |
Sep 01 07:14:31 AM UTC 24 |
20653272065 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.4249226018 |
|
|
Sep 01 07:14:02 AM UTC 24 |
Sep 01 07:14:32 AM UTC 24 |
1905198220 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.3544925572 |
|
|
Sep 01 07:14:29 AM UTC 24 |
Sep 01 07:14:32 AM UTC 24 |
786966069 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.1670290009 |
|
|
Sep 01 07:13:11 AM UTC 24 |
Sep 01 07:14:32 AM UTC 24 |
5465157169 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.484217117 |
|
|
Sep 01 07:14:18 AM UTC 24 |
Sep 01 07:14:32 AM UTC 24 |
1513750676 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.496029080 |
|
|
Sep 01 07:13:34 AM UTC 24 |
Sep 01 07:14:33 AM UTC 24 |
2587224446 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.3657277703 |
|
|
Sep 01 07:14:07 AM UTC 24 |
Sep 01 07:14:34 AM UTC 24 |
23636318000 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/6.i2c_target_stress_all.1419501659 |
|
|
Sep 01 07:12:57 AM UTC 24 |
Sep 01 07:14:35 AM UTC 24 |
41905962778 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/6.i2c_target_stress_wr.4264923345 |
|
|
Sep 01 07:12:50 AM UTC 24 |
Sep 01 07:14:37 AM UTC 24 |
22160354859 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.2545260316 |
|
|
Sep 01 07:14:34 AM UTC 24 |
Sep 01 07:14:37 AM UTC 24 |
142217703 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.2390590427 |
|
|
Sep 01 07:14:34 AM UTC 24 |
Sep 01 07:14:37 AM UTC 24 |
215247292 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.2144943332 |
|
|
Sep 01 07:14:24 AM UTC 24 |
Sep 01 07:14:39 AM UTC 24 |
531983507 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.2401284317 |
|
|
Sep 01 07:14:40 AM UTC 24 |
Sep 01 07:14:43 AM UTC 24 |
202084792 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.4018743211 |
|
|
Sep 01 07:14:06 AM UTC 24 |
Sep 01 07:14:43 AM UTC 24 |
839513644 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.3113842866 |
|
|
Sep 01 07:14:40 AM UTC 24 |
Sep 01 07:14:44 AM UTC 24 |
2465723217 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.315262121 |
|
|
Sep 01 07:14:41 AM UTC 24 |
Sep 01 07:14:45 AM UTC 24 |
1835466272 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.2959048724 |
|
|
Sep 01 07:14:37 AM UTC 24 |
Sep 01 07:14:45 AM UTC 24 |
3240837701 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_alert_test.3319792593 |
|
|
Sep 01 07:14:43 AM UTC 24 |
Sep 01 07:14:45 AM UTC 24 |
17480621 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.109061464 |
|
|
Sep 01 07:14:29 AM UTC 24 |
Sep 01 07:14:45 AM UTC 24 |
253454084 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_nack_txstretch.3633013291 |
|
|
Sep 01 07:14:42 AM UTC 24 |
Sep 01 07:14:45 AM UTC 24 |
263194051 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.3724028132 |
|
|
Sep 01 07:14:42 AM UTC 24 |
Sep 01 07:14:46 AM UTC 24 |
441722920 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.4244299614 |
|
|
Sep 01 07:14:41 AM UTC 24 |
Sep 01 07:14:47 AM UTC 24 |
622958121 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_override.3195394903 |
|
|
Sep 01 07:14:44 AM UTC 24 |
Sep 01 07:14:47 AM UTC 24 |
104609280 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.2132932030 |
|
|
Sep 01 07:14:38 AM UTC 24 |
Sep 01 07:14:47 AM UTC 24 |
433455616 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.4138321482 |
|
|
Sep 01 07:14:44 AM UTC 24 |
Sep 01 07:14:48 AM UTC 24 |
913815446 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.803044395 |
|
|
Sep 01 07:14:41 AM UTC 24 |
Sep 01 07:14:50 AM UTC 24 |
406556976 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.1383290557 |
|
|
Sep 01 07:14:46 AM UTC 24 |
Sep 01 07:14:51 AM UTC 24 |
547386306 ps |
| T28 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.3000833454 |
|
|
Sep 01 07:14:47 AM UTC 24 |
Sep 01 07:14:51 AM UTC 24 |
455690803 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.2100874060 |
|
|
Sep 01 07:14:31 AM UTC 24 |
Sep 01 07:14:53 AM UTC 24 |
1465292129 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.3475959421 |
|
|
Sep 01 07:14:46 AM UTC 24 |
Sep 01 07:14:53 AM UTC 24 |
827767418 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.3032212610 |
|
|
Sep 01 07:14:46 AM UTC 24 |
Sep 01 07:14:55 AM UTC 24 |
180482694 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.2810583076 |
|
|
Sep 01 07:14:27 AM UTC 24 |
Sep 01 07:14:55 AM UTC 24 |
6213064922 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_target_stress_all.3749830988 |
|
|
Sep 01 07:14:18 AM UTC 24 |
Sep 01 07:14:56 AM UTC 24 |
22025993923 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.4129299537 |
|
|
Sep 01 07:14:32 AM UTC 24 |
Sep 01 07:14:56 AM UTC 24 |
2648620666 ps |
| T29 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.3798446245 |
|
|
Sep 01 07:14:30 AM UTC 24 |
Sep 01 07:14:56 AM UTC 24 |
2122965497 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/6.i2c_target_intr_stress_wr.1966133578 |
|
|
Sep 01 07:12:54 AM UTC 24 |
Sep 01 07:14:57 AM UTC 24 |
20143271341 ps |
| T16 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/3.i2c_host_stress_all.1859859246 |
|
|
Sep 01 07:11:22 AM UTC 24 |
Sep 01 07:14:57 AM UTC 24 |
20400615524 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.4232031707 |
|
|
Sep 01 07:13:10 AM UTC 24 |
Sep 01 07:15:41 AM UTC 24 |
2041873294 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.3824352268 |
|
|
Sep 01 07:14:30 AM UTC 24 |
Sep 01 07:14:58 AM UTC 24 |
5909599777 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.3211162911 |
|
|
Sep 01 07:14:56 AM UTC 24 |
Sep 01 07:14:59 AM UTC 24 |
281476453 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.499373446 |
|
|
Sep 01 07:14:56 AM UTC 24 |
Sep 01 07:14:59 AM UTC 24 |
318489579 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.4200984744 |
|
|
Sep 01 07:14:51 AM UTC 24 |
Sep 01 07:14:59 AM UTC 24 |
4690463155 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_hrst.317630302 |
|
|
Sep 01 07:14:58 AM UTC 24 |
Sep 01 07:15:02 AM UTC 24 |
787136824 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.1162252449 |
|
|
Sep 01 07:14:51 AM UTC 24 |
Sep 01 07:15:02 AM UTC 24 |
4790674886 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.2632971473 |
|
|
Sep 01 07:15:00 AM UTC 24 |
Sep 01 07:15:03 AM UTC 24 |
148270577 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.3357693495 |
|
|
Sep 01 07:14:59 AM UTC 24 |
Sep 01 07:15:03 AM UTC 24 |
698955892 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_mode_toggle.3077820693 |
|
|
Sep 01 07:14:58 AM UTC 24 |
Sep 01 07:15:04 AM UTC 24 |
119849932 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_perf.808045545 |
|
|
Sep 01 07:14:57 AM UTC 24 |
Sep 01 07:15:04 AM UTC 24 |
537088569 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.1411437595 |
|
|
Sep 01 07:14:59 AM UTC 24 |
Sep 01 07:15:05 AM UTC 24 |
891400743 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.1727290017 |
|
|
Sep 01 07:14:57 AM UTC 24 |
Sep 01 07:15:05 AM UTC 24 |
834462860 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.2757603813 |
|
|
Sep 01 07:15:01 AM UTC 24 |
Sep 01 07:15:05 AM UTC 24 |
525857557 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.907283986 |
|
|
Sep 01 07:14:05 AM UTC 24 |
Sep 01 07:15:05 AM UTC 24 |
9601439530 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.444831538 |
|
|
Sep 01 07:14:59 AM UTC 24 |
Sep 01 07:15:06 AM UTC 24 |
3816190945 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.1352497275 |
|
|
Sep 01 07:15:01 AM UTC 24 |
Sep 01 07:15:07 AM UTC 24 |
528891859 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_alert_test.1322463650 |
|
|
Sep 01 07:15:04 AM UTC 24 |
Sep 01 07:15:07 AM UTC 24 |
19920531 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_override.2984623553 |
|
|
Sep 01 07:15:04 AM UTC 24 |
Sep 01 07:15:07 AM UTC 24 |
50064439 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.2899898570 |
|
|
Sep 01 07:14:54 AM UTC 24 |
Sep 01 07:15:08 AM UTC 24 |
5919114838 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.1799877468 |
|
|
Sep 01 07:15:03 AM UTC 24 |
Sep 01 07:15:09 AM UTC 24 |
5796265494 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.3845074970 |
|
|
Sep 01 07:14:48 AM UTC 24 |
Sep 01 07:15:09 AM UTC 24 |
2418258664 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.160089238 |
|
|
Sep 01 07:15:07 AM UTC 24 |
Sep 01 07:15:09 AM UTC 24 |
96943808 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.3178982209 |
|
|
Sep 01 07:14:46 AM UTC 24 |
Sep 01 07:15:12 AM UTC 24 |
531530510 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.328479048 |
|
|
Sep 01 07:15:08 AM UTC 24 |
Sep 01 07:15:12 AM UTC 24 |
708027015 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.4119825989 |
|
|
Sep 01 07:15:07 AM UTC 24 |
Sep 01 07:15:13 AM UTC 24 |
263416374 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.2618138955 |
|
|
Sep 01 07:15:07 AM UTC 24 |
Sep 01 07:15:18 AM UTC 24 |
1648389270 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_stretch.1318940428 |
|
|
Sep 01 07:15:11 AM UTC 24 |
Sep 01 07:15:19 AM UTC 24 |
3222860973 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.3035293053 |
|
|
Sep 01 07:13:52 AM UTC 24 |
Sep 01 07:15:20 AM UTC 24 |
40455128851 ps |
| T21 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_stress_all.455112966 |
|
|
Sep 01 07:14:06 AM UTC 24 |
Sep 01 07:15:44 AM UTC 24 |
3183278764 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.1498823267 |
|
|
Sep 01 07:15:14 AM UTC 24 |
Sep 01 07:15:23 AM UTC 24 |
3413348486 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.2828069599 |
|
|
Sep 01 07:15:20 AM UTC 24 |
Sep 01 07:15:23 AM UTC 24 |
681530648 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_full.2783774071 |
|
|
Sep 01 07:12:46 AM UTC 24 |
Sep 01 07:15:24 AM UTC 24 |
12650239705 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_stress_all.2924015515 |
|
|
Sep 01 07:14:47 AM UTC 24 |
Sep 01 07:15:24 AM UTC 24 |
6325442736 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.2194148457 |
|
|
Sep 01 07:15:21 AM UTC 24 |
Sep 01 07:15:25 AM UTC 24 |
430897720 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.1806506616 |
|
|
Sep 01 07:15:14 AM UTC 24 |
Sep 01 07:15:27 AM UTC 24 |
10052182124 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.1870874206 |
|
|
Sep 01 07:15:08 AM UTC 24 |
Sep 01 07:15:28 AM UTC 24 |
2711580917 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.2524371400 |
|
|
Sep 01 07:15:29 AM UTC 24 |
Sep 01 07:15:31 AM UTC 24 |
96600308 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.1454226739 |
|
|
Sep 01 07:15:26 AM UTC 24 |
Sep 01 07:15:32 AM UTC 24 |
1121826057 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_overflow.2230982969 |
|
|
Sep 01 07:12:45 AM UTC 24 |
Sep 01 07:15:33 AM UTC 24 |
4949914137 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.2909844611 |
|
|
Sep 01 07:15:24 AM UTC 24 |
Sep 01 07:15:33 AM UTC 24 |
1208247760 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.4242549383 |
|
|
Sep 01 07:15:28 AM UTC 24 |
Sep 01 07:15:34 AM UTC 24 |
1099852219 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.2140171455 |
|
|
Sep 01 07:15:40 AM UTC 24 |
Sep 01 07:15:43 AM UTC 24 |
132033378 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.2315926146 |
|
|
Sep 01 07:15:32 AM UTC 24 |
Sep 01 07:15:35 AM UTC 24 |
61543448 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.2986884839 |
|
|
Sep 01 07:14:48 AM UTC 24 |
Sep 01 07:15:35 AM UTC 24 |
20880399067 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.48989879 |
|
|
Sep 01 07:14:33 AM UTC 24 |
Sep 01 07:15:35 AM UTC 24 |
23231271980 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.2900287230 |
|
|
Sep 01 07:14:30 AM UTC 24 |
Sep 01 07:15:36 AM UTC 24 |
1095091703 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_perf.4126094479 |
|
|
Sep 01 07:15:23 AM UTC 24 |
Sep 01 07:15:36 AM UTC 24 |
1800079721 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_alert_test.650151624 |
|
|
Sep 01 07:15:35 AM UTC 24 |
Sep 01 07:15:37 AM UTC 24 |
15934867 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.3811993146 |
|
|
Sep 01 07:14:03 AM UTC 24 |
Sep 01 07:15:38 AM UTC 24 |
11375169307 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.1805534197 |
|
|
Sep 01 07:15:33 AM UTC 24 |
Sep 01 07:15:38 AM UTC 24 |
739221769 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.2664610471 |
|
|
Sep 01 07:14:44 AM UTC 24 |
Sep 01 07:15:38 AM UTC 24 |
3688501851 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_override.3724511838 |
|
|
Sep 01 07:15:36 AM UTC 24 |
Sep 01 07:15:38 AM UTC 24 |
33044939 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.3254899336 |
|
|
Sep 01 07:15:10 AM UTC 24 |
Sep 01 07:15:39 AM UTC 24 |
5584381616 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.1889244796 |
|
|
Sep 01 07:15:34 AM UTC 24 |
Sep 01 07:15:41 AM UTC 24 |
561787531 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.2566706760 |
|
|
Sep 01 07:15:34 AM UTC 24 |
Sep 01 07:15:39 AM UTC 24 |
5424345706 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.2350028266 |
|
|
Sep 01 07:15:37 AM UTC 24 |
Sep 01 07:15:39 AM UTC 24 |
253387720 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.3355301462 |
|
|
Sep 01 07:15:39 AM UTC 24 |
Sep 01 07:15:45 AM UTC 24 |
141629978 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.1148728236 |
|
|
Sep 01 07:14:53 AM UTC 24 |
Sep 01 07:15:46 AM UTC 24 |
4861392784 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.637989664 |
|
|
Sep 01 07:15:09 AM UTC 24 |
Sep 01 07:15:47 AM UTC 24 |
6903621558 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_full.1849795515 |
|
|
Sep 01 07:11:54 AM UTC 24 |
Sep 01 07:15:47 AM UTC 24 |
9969431714 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_perf.3095879555 |
|
|
Sep 01 07:14:30 AM UTC 24 |
Sep 01 07:15:48 AM UTC 24 |
5781198116 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_stretch.2601809456 |
|
|
Sep 01 07:15:45 AM UTC 24 |
Sep 01 07:15:48 AM UTC 24 |
2070918805 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.2715389685 |
|
|
Sep 01 07:15:38 AM UTC 24 |
Sep 01 07:15:49 AM UTC 24 |
2068444528 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.84235918 |
|
|
Sep 01 07:15:08 AM UTC 24 |
Sep 01 07:15:49 AM UTC 24 |
1673312263 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.3570157305 |
|
|
Sep 01 07:15:39 AM UTC 24 |
Sep 01 07:15:50 AM UTC 24 |
220075987 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.1282102933 |
|
|
Sep 01 07:15:48 AM UTC 24 |
Sep 01 07:15:51 AM UTC 24 |
161704835 ps |
| T35 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_host_stress_all.3176846469 |
|
|
Sep 01 07:13:13 AM UTC 24 |
Sep 01 07:16:29 AM UTC 24 |
53296269828 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.382506822 |
|
|
Sep 01 07:14:48 AM UTC 24 |
Sep 01 07:15:51 AM UTC 24 |
5846984648 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.953520683 |
|
|
Sep 01 07:15:09 AM UTC 24 |
Sep 01 07:15:51 AM UTC 24 |
4724407116 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.1008917921 |
|
|
Sep 01 07:15:49 AM UTC 24 |
Sep 01 07:15:51 AM UTC 24 |
172562602 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.1797683796 |
|
|
Sep 01 07:15:45 AM UTC 24 |
Sep 01 07:15:52 AM UTC 24 |
1805885714 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.550224860 |
|
|
Sep 01 07:15:40 AM UTC 24 |
Sep 01 07:15:53 AM UTC 24 |
8065697528 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.557782482 |
|
|
Sep 01 07:14:03 AM UTC 24 |
Sep 01 07:15:53 AM UTC 24 |
9626222698 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_perf.3108898875 |
|
|
Sep 01 07:15:39 AM UTC 24 |
Sep 01 07:15:54 AM UTC 24 |
3082696717 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.4146658219 |
|
|
Sep 01 07:15:52 AM UTC 24 |
Sep 01 07:15:54 AM UTC 24 |
523608606 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_stretch.379654317 |
|
|
Sep 01 07:16:23 AM UTC 24 |
Sep 01 07:16:28 AM UTC 24 |
4221889094 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_perf.2075687236 |
|
|
Sep 01 07:15:49 AM UTC 24 |
Sep 01 07:15:56 AM UTC 24 |
634223459 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_alert_test.3751511395 |
|
|
Sep 01 07:15:55 AM UTC 24 |
Sep 01 07:15:57 AM UTC 24 |
31766197 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.2595842767 |
|
|
Sep 01 07:15:47 AM UTC 24 |
Sep 01 07:15:57 AM UTC 24 |
5248216914 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.4216838882 |
|
|
Sep 01 07:16:23 AM UTC 24 |
Sep 01 07:16:33 AM UTC 24 |
3724442892 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.2361033356 |
|
|
Sep 01 07:15:52 AM UTC 24 |
Sep 01 07:15:58 AM UTC 24 |
490680794 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.2436003417 |
|
|
Sep 01 07:15:54 AM UTC 24 |
Sep 01 07:15:58 AM UTC 24 |
161150990 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_override.212198853 |
|
|
Sep 01 07:15:56 AM UTC 24 |
Sep 01 07:15:58 AM UTC 24 |
19219287 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.3963758814 |
|
|
Sep 01 07:15:53 AM UTC 24 |
Sep 01 07:15:58 AM UTC 24 |
1007278631 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.2386301302 |
|
|
Sep 01 07:15:50 AM UTC 24 |
Sep 01 07:15:59 AM UTC 24 |
2835084576 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.1845907650 |
|
|
Sep 01 07:15:54 AM UTC 24 |
Sep 01 07:16:00 AM UTC 24 |
2059126408 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.1716536085 |
|
|
Sep 01 07:15:04 AM UTC 24 |
Sep 01 07:16:00 AM UTC 24 |
1223528955 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.939645024 |
|
|
Sep 01 07:15:54 AM UTC 24 |
Sep 01 07:16:00 AM UTC 24 |
2354449550 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.3413655962 |
|
|
Sep 01 07:15:14 AM UTC 24 |
Sep 01 07:16:00 AM UTC 24 |
15904796769 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.2104926353 |
|
|
Sep 01 07:15:59 AM UTC 24 |
Sep 01 07:16:01 AM UTC 24 |
114644245 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.2106017273 |
|
|
Sep 01 07:15:59 AM UTC 24 |
Sep 01 07:16:04 AM UTC 24 |
347010807 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.3164844982 |
|
|
Sep 01 07:16:00 AM UTC 24 |
Sep 01 07:16:05 AM UTC 24 |
434767498 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.2586214026 |
|
|
Sep 01 07:15:59 AM UTC 24 |
Sep 01 07:16:06 AM UTC 24 |
1652316012 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_overflow.68954243 |
|
|
Sep 01 07:15:05 AM UTC 24 |
Sep 01 07:16:09 AM UTC 24 |
9566516932 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.217902967 |
|
|
Sep 01 07:14:29 AM UTC 24 |
Sep 01 07:16:09 AM UTC 24 |
12733740654 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.410098126 |
|
|
Sep 01 07:15:39 AM UTC 24 |
Sep 01 07:16:09 AM UTC 24 |
2065386137 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.3410714891 |
|
|
Sep 01 07:15:42 AM UTC 24 |
Sep 01 07:16:09 AM UTC 24 |
5288624739 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.3670056023 |
|
|
Sep 01 07:15:52 AM UTC 24 |
Sep 01 07:16:11 AM UTC 24 |
1466168840 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.449369109 |
|
|
Sep 01 07:13:37 AM UTC 24 |
Sep 01 07:16:11 AM UTC 24 |
3107988682 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.2888520339 |
|
|
Sep 01 07:16:24 AM UTC 24 |
Sep 01 07:16:34 AM UTC 24 |
2167469447 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_stress_all.2463627673 |
|
|
Sep 01 07:14:36 AM UTC 24 |
Sep 01 07:16:11 AM UTC 24 |
63720233518 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.2394042157 |
|
|
Sep 01 07:16:02 AM UTC 24 |
Sep 01 07:16:12 AM UTC 24 |
644203290 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.821605321 |
|
|
Sep 01 07:16:09 AM UTC 24 |
Sep 01 07:16:12 AM UTC 24 |
217623272 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.883517400 |
|
|
Sep 01 07:15:59 AM UTC 24 |
Sep 01 07:16:12 AM UTC 24 |
801602397 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.2127766501 |
|
|
Sep 01 07:16:10 AM UTC 24 |
Sep 01 07:16:13 AM UTC 24 |
154656704 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.462776839 |
|
|
Sep 01 07:16:00 AM UTC 24 |
Sep 01 07:16:13 AM UTC 24 |
2170614903 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.1711413505 |
|
|
Sep 01 07:16:08 AM UTC 24 |
Sep 01 07:16:16 AM UTC 24 |
2230929540 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.3598761770 |
|
|
Sep 01 07:16:13 AM UTC 24 |
Sep 01 07:16:16 AM UTC 24 |
187693087 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.2169672086 |
|
|
Sep 01 07:16:13 AM UTC 24 |
Sep 01 07:16:18 AM UTC 24 |
123120529 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_perf.2085643047 |
|
|
Sep 01 07:16:10 AM UTC 24 |
Sep 01 07:16:18 AM UTC 24 |
2003441829 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.3763826109 |
|
|
Sep 01 07:15:37 AM UTC 24 |
Sep 01 07:16:18 AM UTC 24 |
6857450495 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.2874137630 |
|
|
Sep 01 07:16:32 AM UTC 24 |
Sep 01 07:16:40 AM UTC 24 |
570878991 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.3706057946 |
|
|
Sep 01 07:16:14 AM UTC 24 |
Sep 01 07:16:19 AM UTC 24 |
457026722 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.2447197864 |
|
|
Sep 01 07:16:13 AM UTC 24 |
Sep 01 07:16:19 AM UTC 24 |
584946925 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.3789472958 |
|
|
Sep 01 07:16:13 AM UTC 24 |
Sep 01 07:16:19 AM UTC 24 |
511794273 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.2275536127 |
|
|
Sep 01 07:16:06 AM UTC 24 |
Sep 01 07:16:19 AM UTC 24 |
1746649083 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.772370854 |
|
|
Sep 01 07:16:14 AM UTC 24 |
Sep 01 07:16:20 AM UTC 24 |
970750452 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_alert_test.601256298 |
|
|
Sep 01 07:16:18 AM UTC 24 |
Sep 01 07:16:20 AM UTC 24 |
126505637 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_nack_txstretch.1199998724 |
|
|
Sep 01 07:16:17 AM UTC 24 |
Sep 01 07:16:20 AM UTC 24 |
150069959 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.3798604241 |
|
|
Sep 01 07:16:21 AM UTC 24 |
Sep 01 07:16:34 AM UTC 24 |
160466534 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.1785155099 |
|
|
Sep 01 07:13:09 AM UTC 24 |
Sep 01 07:16:20 AM UTC 24 |
12648975506 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_full.1415034545 |
|
|
Sep 01 07:15:07 AM UTC 24 |
Sep 01 07:16:21 AM UTC 24 |
2476433695 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.1467656204 |
|
|
Sep 01 07:16:11 AM UTC 24 |
Sep 01 07:16:21 AM UTC 24 |
1468541423 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.16425925 |
|
|
Sep 01 07:14:43 AM UTC 24 |
Sep 01 07:16:21 AM UTC 24 |
7683280469 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.3411783733 |
|
|
Sep 01 07:16:01 AM UTC 24 |
Sep 01 07:16:22 AM UTC 24 |
6667815431 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_host_override.401845565 |
|
|
Sep 01 07:16:19 AM UTC 24 |
Sep 01 07:16:22 AM UTC 24 |
28221025 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.1130844586 |
|
|
Sep 01 07:16:17 AM UTC 24 |
Sep 01 07:16:22 AM UTC 24 |
516955011 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.3783601766 |
|
|
Sep 01 07:16:20 AM UTC 24 |
Sep 01 07:16:22 AM UTC 24 |
220279045 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.1920909025 |
|
|
Sep 01 07:15:05 AM UTC 24 |
Sep 01 07:16:22 AM UTC 24 |
7053755436 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_perf.2396418726 |
|
|
Sep 01 07:16:28 AM UTC 24 |
Sep 01 07:16:37 AM UTC 24 |
2898769437 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/12.i2c_target_stress_all.198394148 |
|
|
Sep 01 07:15:24 AM UTC 24 |
Sep 01 07:16:24 AM UTC 24 |
27770369633 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.4131822770 |
|
|
Sep 01 07:16:05 AM UTC 24 |
Sep 01 07:16:25 AM UTC 24 |
3359346598 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.2764474555 |
|
|
Sep 01 07:16:22 AM UTC 24 |
Sep 01 07:16:26 AM UTC 24 |
217941992 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.1352448324 |
|
|
Sep 01 07:16:26 AM UTC 24 |
Sep 01 07:16:28 AM UTC 24 |
383959526 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.1726283608 |
|
|
Sep 01 07:16:21 AM UTC 24 |
Sep 01 07:16:29 AM UTC 24 |
301981313 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.1237914982 |
|
|
Sep 01 07:16:27 AM UTC 24 |
Sep 01 07:16:30 AM UTC 24 |
1460681148 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_tx.3441404209 |
|
|
Sep 01 07:16:34 AM UTC 24 |
Sep 01 07:16:37 AM UTC 24 |
126226613 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.3929140591 |
|
|
Sep 01 07:16:34 AM UTC 24 |
Sep 01 07:16:38 AM UTC 24 |
524803966 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.777290456 |
|
|
Sep 01 07:16:35 AM UTC 24 |
Sep 01 07:16:40 AM UTC 24 |
947982936 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.749495963 |
|
|
Sep 01 07:16:29 AM UTC 24 |
Sep 01 07:16:41 AM UTC 24 |
3288596989 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.2247438933 |
|
|
Sep 01 07:16:22 AM UTC 24 |
Sep 01 07:17:41 AM UTC 24 |
9650275751 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.3010638479 |
|
|
Sep 01 07:16:35 AM UTC 24 |
Sep 01 07:16:41 AM UTC 24 |
201788997 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.1972533008 |
|
|
Sep 01 07:16:38 AM UTC 24 |
Sep 01 07:16:43 AM UTC 24 |
1784801991 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.829425845 |
|
|
Sep 01 07:16:39 AM UTC 24 |
Sep 01 07:16:43 AM UTC 24 |
882328820 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_alert_test.2701503232 |
|
|
Sep 01 07:16:41 AM UTC 24 |
Sep 01 07:16:43 AM UTC 24 |
37463912 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_host_perf.571892136 |
|
|
Sep 01 07:16:21 AM UTC 24 |
Sep 01 07:16:43 AM UTC 24 |
2706767460 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/16.i2c_host_override.3734535844 |
|
|
Sep 01 07:16:41 AM UTC 24 |
Sep 01 07:16:43 AM UTC 24 |
26336676 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.2797047369 |
|
|
Sep 01 07:16:38 AM UTC 24 |
Sep 01 07:16:44 AM UTC 24 |
744377380 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_watermark.2438838786 |
|
|
Sep 01 07:13:35 AM UTC 24 |
Sep 01 07:16:45 AM UTC 24 |
2853622820 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.968535413 |
|
|
Sep 01 07:16:44 AM UTC 24 |
Sep 01 07:16:46 AM UTC 24 |
473468377 ps |