| T1076 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.2387975291 |
|
|
Sep 01 07:23:36 AM UTC 24 |
Sep 01 07:24:49 AM UTC 24 |
16024548998 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_override.110848735 |
|
|
Sep 01 07:24:48 AM UTC 24 |
Sep 01 07:24:50 AM UTC 24 |
29035994 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.1564634519 |
|
|
Sep 01 07:24:44 AM UTC 24 |
Sep 01 07:24:50 AM UTC 24 |
524642000 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_nack_txstretch.1913670504 |
|
|
Sep 01 07:24:47 AM UTC 24 |
Sep 01 07:24:50 AM UTC 24 |
534974727 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.1927387692 |
|
|
Sep 01 07:24:37 AM UTC 24 |
Sep 01 07:24:50 AM UTC 24 |
581060309 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.2724219923 |
|
|
Sep 01 07:24:46 AM UTC 24 |
Sep 01 07:24:51 AM UTC 24 |
2099109175 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.3554961634 |
|
|
Sep 01 07:24:44 AM UTC 24 |
Sep 01 07:24:51 AM UTC 24 |
237405991 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.2325367517 |
|
|
Sep 01 07:24:45 AM UTC 24 |
Sep 01 07:24:52 AM UTC 24 |
3533299412 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.2637898473 |
|
|
Sep 01 07:19:13 AM UTC 24 |
Sep 01 07:24:52 AM UTC 24 |
24316723452 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.1633309650 |
|
|
Sep 01 07:24:50 AM UTC 24 |
Sep 01 07:24:53 AM UTC 24 |
200544363 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.3543957458 |
|
|
Sep 01 07:24:52 AM UTC 24 |
Sep 01 07:24:54 AM UTC 24 |
100341758 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.3271736589 |
|
|
Sep 01 07:24:22 AM UTC 24 |
Sep 01 07:24:55 AM UTC 24 |
9968308569 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.3827705038 |
|
|
Sep 01 07:24:15 AM UTC 24 |
Sep 01 07:24:55 AM UTC 24 |
1340756217 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.346210063 |
|
|
Sep 01 07:24:53 AM UTC 24 |
Sep 01 07:24:58 AM UTC 24 |
68474591 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_perf.1404875541 |
|
|
Sep 01 07:21:37 AM UTC 24 |
Sep 01 07:24:59 AM UTC 24 |
13166584310 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.1378793750 |
|
|
Sep 01 07:20:42 AM UTC 24 |
Sep 01 07:25:03 AM UTC 24 |
16604378960 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.2856316417 |
|
|
Sep 01 07:24:56 AM UTC 24 |
Sep 01 07:25:04 AM UTC 24 |
1515870844 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.3066728094 |
|
|
Sep 01 07:24:51 AM UTC 24 |
Sep 01 07:25:04 AM UTC 24 |
611827433 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.1702117317 |
|
|
Sep 01 07:25:03 AM UTC 24 |
Sep 01 07:25:05 AM UTC 24 |
219438781 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.1289269456 |
|
|
Sep 01 07:24:51 AM UTC 24 |
Sep 01 07:25:05 AM UTC 24 |
555514956 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.2199265751 |
|
|
Sep 01 07:25:04 AM UTC 24 |
Sep 01 07:25:07 AM UTC 24 |
215628752 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.793081126 |
|
|
Sep 01 07:24:58 AM UTC 24 |
Sep 01 07:25:09 AM UTC 24 |
4826943287 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/1.i2c_host_stress_all.692230416 |
|
|
Sep 01 07:10:26 AM UTC 24 |
Sep 01 07:25:10 AM UTC 24 |
38852414235 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.1443650419 |
|
|
Sep 01 07:24:53 AM UTC 24 |
Sep 01 07:25:10 AM UTC 24 |
781352177 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.4124139590 |
|
|
Sep 01 07:24:54 AM UTC 24 |
Sep 01 07:25:11 AM UTC 24 |
1445200693 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.1211698221 |
|
|
Sep 01 07:25:06 AM UTC 24 |
Sep 01 07:25:13 AM UTC 24 |
1480578033 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_perf.672651135 |
|
|
Sep 01 07:25:05 AM UTC 24 |
Sep 01 07:25:14 AM UTC 24 |
1277309290 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.3613522339 |
|
|
Sep 01 07:24:48 AM UTC 24 |
Sep 01 07:25:14 AM UTC 24 |
1416971406 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.2103809865 |
|
|
Sep 01 07:25:11 AM UTC 24 |
Sep 01 07:25:15 AM UTC 24 |
501577067 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.802437184 |
|
|
Sep 01 07:25:10 AM UTC 24 |
Sep 01 07:25:15 AM UTC 24 |
1952119878 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_perf.1740989953 |
|
|
Sep 01 07:24:52 AM UTC 24 |
Sep 01 07:25:16 AM UTC 24 |
445763382 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.3201632693 |
|
|
Sep 01 07:23:49 AM UTC 24 |
Sep 01 07:25:17 AM UTC 24 |
1616387065 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.438493702 |
|
|
Sep 01 07:25:11 AM UTC 24 |
Sep 01 07:25:17 AM UTC 24 |
144668765 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_alert_test.2317543695 |
|
|
Sep 01 07:25:16 AM UTC 24 |
Sep 01 07:25:18 AM UTC 24 |
65624830 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.1016879241 |
|
|
Sep 01 07:25:14 AM UTC 24 |
Sep 01 07:25:19 AM UTC 24 |
3248222548 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.3325571404 |
|
|
Sep 01 07:22:17 AM UTC 24 |
Sep 01 07:25:19 AM UTC 24 |
37496908035 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_override.3394668168 |
|
|
Sep 01 07:25:17 AM UTC 24 |
Sep 01 07:25:19 AM UTC 24 |
30033423 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.1775228099 |
|
|
Sep 01 07:14:31 AM UTC 24 |
Sep 01 07:25:19 AM UTC 24 |
45595034333 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.1882427384 |
|
|
Sep 01 07:25:16 AM UTC 24 |
Sep 01 07:25:19 AM UTC 24 |
149602626 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.3113230385 |
|
|
Sep 01 07:25:16 AM UTC 24 |
Sep 01 07:25:21 AM UTC 24 |
561607001 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.4285616917 |
|
|
Sep 01 07:25:18 AM UTC 24 |
Sep 01 07:25:21 AM UTC 24 |
194536350 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.941201002 |
|
|
Sep 01 07:25:15 AM UTC 24 |
Sep 01 07:25:21 AM UTC 24 |
586368815 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.2065406859 |
|
|
Sep 01 07:22:15 AM UTC 24 |
Sep 01 07:25:21 AM UTC 24 |
5654005292 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.3304064468 |
|
|
Sep 01 07:24:14 AM UTC 24 |
Sep 01 07:25:23 AM UTC 24 |
1385483928 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.3164129487 |
|
|
Sep 01 07:25:22 AM UTC 24 |
Sep 01 07:25:26 AM UTC 24 |
79583173 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.2650336372 |
|
|
Sep 01 07:25:19 AM UTC 24 |
Sep 01 07:25:26 AM UTC 24 |
2001454183 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.343504113 |
|
|
Sep 01 07:25:19 AM UTC 24 |
Sep 01 07:25:29 AM UTC 24 |
4960778926 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.1854964473 |
|
|
Sep 01 07:25:10 AM UTC 24 |
Sep 01 07:25:30 AM UTC 24 |
371016477 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/20.i2c_host_perf.3541431858 |
|
|
Sep 01 07:18:38 AM UTC 24 |
Sep 01 07:25:30 AM UTC 24 |
27627768679 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.3143804557 |
|
|
Sep 01 07:23:47 AM UTC 24 |
Sep 01 07:25:30 AM UTC 24 |
3971737881 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.814731188 |
|
|
Sep 01 07:25:21 AM UTC 24 |
Sep 01 07:25:30 AM UTC 24 |
674463136 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.2154941009 |
|
|
Sep 01 07:20:29 AM UTC 24 |
Sep 01 07:25:31 AM UTC 24 |
4576949949 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.3111315173 |
|
|
Sep 01 07:21:06 AM UTC 24 |
Sep 01 07:25:34 AM UTC 24 |
4136681595 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.946187473 |
|
|
Sep 01 07:25:32 AM UTC 24 |
Sep 01 07:25:35 AM UTC 24 |
208590680 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.719006006 |
|
|
Sep 01 07:25:33 AM UTC 24 |
Sep 01 07:25:36 AM UTC 24 |
286833116 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.2027029586 |
|
|
Sep 01 07:25:27 AM UTC 24 |
Sep 01 07:25:36 AM UTC 24 |
5318624947 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.3929765287 |
|
|
Sep 01 07:25:26 AM UTC 24 |
Sep 01 07:25:38 AM UTC 24 |
1819535028 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.2679412377 |
|
|
Sep 01 07:25:30 AM UTC 24 |
Sep 01 07:25:40 AM UTC 24 |
889721641 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_hrst.745830350 |
|
|
Sep 01 07:25:37 AM UTC 24 |
Sep 01 07:25:41 AM UTC 24 |
205615950 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.3431055617 |
|
|
Sep 01 07:25:47 AM UTC 24 |
Sep 01 07:26:21 AM UTC 24 |
1759974276 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.2580790687 |
|
|
Sep 01 07:25:31 AM UTC 24 |
Sep 01 07:25:42 AM UTC 24 |
1258784791 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.3865599770 |
|
|
Sep 01 07:25:41 AM UTC 24 |
Sep 01 07:25:44 AM UTC 24 |
158020107 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.1804788626 |
|
|
Sep 01 07:24:55 AM UTC 24 |
Sep 01 07:25:44 AM UTC 24 |
8625930318 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_perf.2583415013 |
|
|
Sep 01 07:25:34 AM UTC 24 |
Sep 01 07:25:45 AM UTC 24 |
2445518293 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.1067731945 |
|
|
Sep 01 07:25:41 AM UTC 24 |
Sep 01 07:25:45 AM UTC 24 |
3632424310 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.1044683148 |
|
|
Sep 01 07:23:19 AM UTC 24 |
Sep 01 07:25:46 AM UTC 24 |
12171953320 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_alert_test.1988548048 |
|
|
Sep 01 07:25:46 AM UTC 24 |
Sep 01 07:25:48 AM UTC 24 |
44885808 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.3962237457 |
|
|
Sep 01 07:25:36 AM UTC 24 |
Sep 01 07:25:48 AM UTC 24 |
2481676080 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.1892610620 |
|
|
Sep 01 07:25:44 AM UTC 24 |
Sep 01 07:25:49 AM UTC 24 |
2222662537 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.1869898926 |
|
|
Sep 01 07:25:43 AM UTC 24 |
Sep 01 07:25:49 AM UTC 24 |
337216566 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.3417553262 |
|
|
Sep 01 07:26:15 AM UTC 24 |
Sep 01 07:26:20 AM UTC 24 |
894570342 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.1405347079 |
|
|
Sep 01 07:25:38 AM UTC 24 |
Sep 01 07:25:50 AM UTC 24 |
230732637 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.709565962 |
|
|
Sep 01 07:25:45 AM UTC 24 |
Sep 01 07:25:50 AM UTC 24 |
415343362 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.3604277773 |
|
|
Sep 01 07:25:45 AM UTC 24 |
Sep 01 07:25:50 AM UTC 24 |
1752442666 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_override.3264455817 |
|
|
Sep 01 07:25:48 AM UTC 24 |
Sep 01 07:25:50 AM UTC 24 |
40023845 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.1144816642 |
|
|
Sep 01 07:24:17 AM UTC 24 |
Sep 01 07:25:50 AM UTC 24 |
2860285126 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.1617596495 |
|
|
Sep 01 07:14:57 AM UTC 24 |
Sep 01 07:25:53 AM UTC 24 |
36097975752 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.2380433243 |
|
|
Sep 01 07:25:50 AM UTC 24 |
Sep 01 07:25:53 AM UTC 24 |
656904185 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.4238980982 |
|
|
Sep 01 07:25:17 AM UTC 24 |
Sep 01 07:25:54 AM UTC 24 |
18236704502 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_perf.3732201256 |
|
|
Sep 01 07:25:21 AM UTC 24 |
Sep 01 07:25:55 AM UTC 24 |
27864980065 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/7.i2c_target_stress_wr.1766846308 |
|
|
Sep 01 07:13:13 AM UTC 24 |
Sep 01 07:25:56 AM UTC 24 |
46971546627 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.1233283743 |
|
|
Sep 01 07:25:22 AM UTC 24 |
Sep 01 07:25:56 AM UTC 24 |
569718841 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.3820364394 |
|
|
Sep 01 07:25:53 AM UTC 24 |
Sep 01 07:25:56 AM UTC 24 |
106764814 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.64947574 |
|
|
Sep 01 07:25:22 AM UTC 24 |
Sep 01 07:25:58 AM UTC 24 |
3361449147 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.721049916 |
|
|
Sep 01 07:25:51 AM UTC 24 |
Sep 01 07:26:01 AM UTC 24 |
156928286 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.3530427080 |
|
|
Sep 01 07:25:51 AM UTC 24 |
Sep 01 07:26:03 AM UTC 24 |
888025625 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_perf.2931085264 |
|
|
Sep 01 07:25:51 AM UTC 24 |
Sep 01 07:26:06 AM UTC 24 |
803465851 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.872592258 |
|
|
Sep 01 07:25:30 AM UTC 24 |
Sep 01 07:26:08 AM UTC 24 |
9407924809 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.398131213 |
|
|
Sep 01 07:24:15 AM UTC 24 |
Sep 01 07:26:08 AM UTC 24 |
14195552393 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.1870057226 |
|
|
Sep 01 07:25:55 AM UTC 24 |
Sep 01 07:26:09 AM UTC 24 |
715758658 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.3731358582 |
|
|
Sep 01 07:26:07 AM UTC 24 |
Sep 01 07:26:10 AM UTC 24 |
518565292 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.524582983 |
|
|
Sep 01 07:26:07 AM UTC 24 |
Sep 01 07:26:10 AM UTC 24 |
337879532 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.3875637124 |
|
|
Sep 01 07:25:17 AM UTC 24 |
Sep 01 07:26:11 AM UTC 24 |
1581276778 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.3852732802 |
|
|
Sep 01 07:25:58 AM UTC 24 |
Sep 01 07:26:12 AM UTC 24 |
10091732326 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.492516399 |
|
|
Sep 01 07:25:57 AM UTC 24 |
Sep 01 07:26:12 AM UTC 24 |
1317490782 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.3448899277 |
|
|
Sep 01 07:24:49 AM UTC 24 |
Sep 01 07:26:12 AM UTC 24 |
9860647372 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.1460192791 |
|
|
Sep 01 07:25:52 AM UTC 24 |
Sep 01 07:26:14 AM UTC 24 |
1566519393 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_hrst.788914288 |
|
|
Sep 01 07:26:10 AM UTC 24 |
Sep 01 07:26:15 AM UTC 24 |
234951784 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.2249687667 |
|
|
Sep 01 07:23:48 AM UTC 24 |
Sep 01 07:26:15 AM UTC 24 |
8761302376 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.3186979850 |
|
|
Sep 01 07:26:13 AM UTC 24 |
Sep 01 07:26:16 AM UTC 24 |
447584762 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.2329802704 |
|
|
Sep 01 07:26:03 AM UTC 24 |
Sep 01 07:26:16 AM UTC 24 |
6046958342 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.2342640675 |
|
|
Sep 01 07:26:13 AM UTC 24 |
Sep 01 07:26:17 AM UTC 24 |
851584530 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.3967987087 |
|
|
Sep 01 07:26:14 AM UTC 24 |
Sep 01 07:26:18 AM UTC 24 |
117998320 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.2486607504 |
|
|
Sep 01 07:24:35 AM UTC 24 |
Sep 01 07:26:18 AM UTC 24 |
36616243750 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_perf.2659128581 |
|
|
Sep 01 07:26:09 AM UTC 24 |
Sep 01 07:26:19 AM UTC 24 |
9392044589 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_nack_txstretch.3517122375 |
|
|
Sep 01 07:26:16 AM UTC 24 |
Sep 01 07:26:19 AM UTC 24 |
481056299 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_alert_test.679229120 |
|
|
Sep 01 07:26:17 AM UTC 24 |
Sep 01 07:26:19 AM UTC 24 |
16377964 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_override.3672370954 |
|
|
Sep 01 07:26:17 AM UTC 24 |
Sep 01 07:26:20 AM UTC 24 |
18185076 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.2729516594 |
|
|
Sep 01 07:26:15 AM UTC 24 |
Sep 01 07:26:20 AM UTC 24 |
520149585 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.899939095 |
|
|
Sep 01 07:26:10 AM UTC 24 |
Sep 01 07:26:21 AM UTC 24 |
1898163303 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.1117477063 |
|
|
Sep 01 07:26:16 AM UTC 24 |
Sep 01 07:26:22 AM UTC 24 |
1660522157 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.201867285 |
|
|
Sep 01 07:26:19 AM UTC 24 |
Sep 01 07:26:22 AM UTC 24 |
649669156 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.3463883758 |
|
|
Sep 01 07:26:20 AM UTC 24 |
Sep 01 07:26:26 AM UTC 24 |
531819037 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.2681954145 |
|
|
Sep 01 07:22:45 AM UTC 24 |
Sep 01 07:26:27 AM UTC 24 |
24684798178 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.3043928314 |
|
|
Sep 01 07:26:21 AM UTC 24 |
Sep 01 07:26:27 AM UTC 24 |
297618003 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2496552532 |
|
|
Sep 01 07:26:22 AM UTC 24 |
Sep 01 07:26:28 AM UTC 24 |
650427984 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.3418304761 |
|
|
Sep 01 07:24:51 AM UTC 24 |
Sep 01 07:26:29 AM UTC 24 |
5554084985 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.3048510010 |
|
|
Sep 01 07:24:56 AM UTC 24 |
Sep 01 07:26:34 AM UTC 24 |
2837034493 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.1177236485 |
|
|
Sep 01 07:26:20 AM UTC 24 |
Sep 01 07:26:34 AM UTC 24 |
1923502266 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.2777210968 |
|
|
Sep 01 07:26:28 AM UTC 24 |
Sep 01 07:26:34 AM UTC 24 |
293256292 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.1010694965 |
|
|
Sep 01 07:26:12 AM UTC 24 |
Sep 01 07:26:34 AM UTC 24 |
403406544 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.594557492 |
|
|
Sep 01 07:24:57 AM UTC 24 |
Sep 01 07:26:35 AM UTC 24 |
7638987359 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.2602454000 |
|
|
Sep 01 07:26:21 AM UTC 24 |
Sep 01 07:26:36 AM UTC 24 |
1277222701 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.2875339777 |
|
|
Sep 01 07:26:17 AM UTC 24 |
Sep 01 07:26:36 AM UTC 24 |
866154999 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.1134696577 |
|
|
Sep 01 07:26:28 AM UTC 24 |
Sep 01 07:26:37 AM UTC 24 |
3530862211 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.2643636727 |
|
|
Sep 01 07:26:36 AM UTC 24 |
Sep 01 07:27:37 AM UTC 24 |
35376893791 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.1266397602 |
|
|
Sep 01 07:26:22 AM UTC 24 |
Sep 01 07:26:37 AM UTC 24 |
820659260 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.2304095194 |
|
|
Sep 01 07:26:35 AM UTC 24 |
Sep 01 07:26:38 AM UTC 24 |
321005563 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.2905652985 |
|
|
Sep 01 07:26:35 AM UTC 24 |
Sep 01 07:26:38 AM UTC 24 |
250870424 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.3655945735 |
|
|
Sep 01 07:26:30 AM UTC 24 |
Sep 01 07:26:40 AM UTC 24 |
13019490504 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_hrst.2589536210 |
|
|
Sep 01 07:26:36 AM UTC 24 |
Sep 01 07:26:41 AM UTC 24 |
1084482288 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.4091362898 |
|
|
Sep 01 07:26:39 AM UTC 24 |
Sep 01 07:26:42 AM UTC 24 |
144218606 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_perf.2027808849 |
|
|
Sep 01 07:26:35 AM UTC 24 |
Sep 01 07:26:42 AM UTC 24 |
1318212963 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.2632373684 |
|
|
Sep 01 07:25:59 AM UTC 24 |
Sep 01 07:26:43 AM UTC 24 |
22318457736 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.397995151 |
|
|
Sep 01 07:26:39 AM UTC 24 |
Sep 01 07:26:43 AM UTC 24 |
421873116 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_mode_toggle.306024649 |
|
|
Sep 01 07:26:38 AM UTC 24 |
Sep 01 07:26:43 AM UTC 24 |
184529515 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.3693808399 |
|
|
Sep 01 07:26:39 AM UTC 24 |
Sep 01 07:26:44 AM UTC 24 |
3113673162 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_alert_test.3954044988 |
|
|
Sep 01 07:26:43 AM UTC 24 |
Sep 01 07:26:45 AM UTC 24 |
66781472 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.2682424743 |
|
|
Sep 01 07:26:41 AM UTC 24 |
Sep 01 07:26:46 AM UTC 24 |
1094506179 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.2777548102 |
|
|
Sep 01 07:24:30 AM UTC 24 |
Sep 01 07:26:46 AM UTC 24 |
14403194489 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.1474020198 |
|
|
Sep 01 07:26:36 AM UTC 24 |
Sep 01 07:26:46 AM UTC 24 |
942595506 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_override.2758751616 |
|
|
Sep 01 07:26:44 AM UTC 24 |
Sep 01 07:26:46 AM UTC 24 |
25848735 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.3507003456 |
|
|
Sep 01 07:27:19 AM UTC 24 |
Sep 01 07:27:36 AM UTC 24 |
920049842 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.3298079793 |
|
|
Sep 01 07:26:42 AM UTC 24 |
Sep 01 07:26:48 AM UTC 24 |
1759296102 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.2098267217 |
|
|
Sep 01 07:26:43 AM UTC 24 |
Sep 01 07:26:48 AM UTC 24 |
1435906062 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.3094353942 |
|
|
Sep 01 07:26:47 AM UTC 24 |
Sep 01 07:26:50 AM UTC 24 |
540118298 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.954693900 |
|
|
Sep 01 07:26:49 AM UTC 24 |
Sep 01 07:26:52 AM UTC 24 |
76230672 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.3597159861 |
|
|
Sep 01 07:26:39 AM UTC 24 |
Sep 01 07:26:53 AM UTC 24 |
664187544 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.3752603258 |
|
|
Sep 01 07:26:47 AM UTC 24 |
Sep 01 07:26:54 AM UTC 24 |
651410991 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.2067663772 |
|
|
Sep 01 07:25:51 AM UTC 24 |
Sep 01 07:26:56 AM UTC 24 |
2169015147 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.3309686090 |
|
|
Sep 01 07:26:50 AM UTC 24 |
Sep 01 07:26:57 AM UTC 24 |
748249021 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_perf.3166591375 |
|
|
Sep 01 07:26:21 AM UTC 24 |
Sep 01 07:26:57 AM UTC 24 |
13737298335 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.3373710601 |
|
|
Sep 01 07:25:17 AM UTC 24 |
Sep 01 07:26:57 AM UTC 24 |
21425711409 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.3912108083 |
|
|
Sep 01 07:26:29 AM UTC 24 |
Sep 01 07:26:57 AM UTC 24 |
2694694401 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.3701266769 |
|
|
Sep 01 07:26:09 AM UTC 24 |
Sep 01 07:26:58 AM UTC 24 |
5423893237 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.4024279957 |
|
|
Sep 01 07:25:52 AM UTC 24 |
Sep 01 07:26:59 AM UTC 24 |
2578086602 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.3472644397 |
|
|
Sep 01 07:26:47 AM UTC 24 |
Sep 01 07:27:01 AM UTC 24 |
195214364 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_perf.831863688 |
|
|
Sep 01 07:26:48 AM UTC 24 |
Sep 01 07:27:03 AM UTC 24 |
849373869 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.4210636232 |
|
|
Sep 01 07:26:49 AM UTC 24 |
Sep 01 07:27:03 AM UTC 24 |
8963951407 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.4104415520 |
|
|
Sep 01 07:27:00 AM UTC 24 |
Sep 01 07:27:03 AM UTC 24 |
223747363 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_stretch.3732017669 |
|
|
Sep 01 07:26:28 AM UTC 24 |
Sep 01 07:27:05 AM UTC 24 |
3433507756 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.3013616088 |
|
|
Sep 01 07:26:54 AM UTC 24 |
Sep 01 07:27:05 AM UTC 24 |
7616514928 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.1979696956 |
|
|
Sep 01 07:27:02 AM UTC 24 |
Sep 01 07:27:05 AM UTC 24 |
594304643 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.994148814 |
|
|
Sep 01 07:26:58 AM UTC 24 |
Sep 01 07:27:08 AM UTC 24 |
3906079932 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.2285164512 |
|
|
Sep 01 07:26:59 AM UTC 24 |
Sep 01 07:27:08 AM UTC 24 |
3750322594 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.2997162052 |
|
|
Sep 01 07:26:43 AM UTC 24 |
Sep 01 07:27:36 AM UTC 24 |
6814872924 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.2896242890 |
|
|
Sep 01 07:27:07 AM UTC 24 |
Sep 01 07:27:11 AM UTC 24 |
4439875816 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_mode_toggle.2490397688 |
|
|
Sep 01 07:27:06 AM UTC 24 |
Sep 01 07:27:12 AM UTC 24 |
281253552 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.3195851099 |
|
|
Sep 01 07:27:09 AM UTC 24 |
Sep 01 07:27:12 AM UTC 24 |
376363937 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_perf.1326592998 |
|
|
Sep 01 07:27:03 AM UTC 24 |
Sep 01 07:27:15 AM UTC 24 |
5878415109 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.3355342497 |
|
|
Sep 01 07:27:04 AM UTC 24 |
Sep 01 07:27:15 AM UTC 24 |
2646985774 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.793267135 |
|
|
Sep 01 07:25:19 AM UTC 24 |
Sep 01 07:27:16 AM UTC 24 |
17136038787 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.15946862 |
|
|
Sep 01 07:25:56 AM UTC 24 |
Sep 01 07:27:16 AM UTC 24 |
1497334327 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_nack_txstretch.523692874 |
|
|
Sep 01 07:27:13 AM UTC 24 |
Sep 01 07:27:16 AM UTC 24 |
150501961 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.4098543801 |
|
|
Sep 01 07:27:12 AM UTC 24 |
Sep 01 07:27:17 AM UTC 24 |
1827375520 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.4210590234 |
|
|
Sep 01 07:26:54 AM UTC 24 |
Sep 01 07:27:18 AM UTC 24 |
11802834284 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.4178063901 |
|
|
Sep 01 07:27:32 AM UTC 24 |
Sep 01 07:27:37 AM UTC 24 |
264912937 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_alert_test.3118762462 |
|
|
Sep 01 07:27:16 AM UTC 24 |
Sep 01 07:27:18 AM UTC 24 |
16896219 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_override.1502448995 |
|
|
Sep 01 07:27:16 AM UTC 24 |
Sep 01 07:27:18 AM UTC 24 |
16062697 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.1209970404 |
|
|
Sep 01 07:27:12 AM UTC 24 |
Sep 01 07:27:19 AM UTC 24 |
1086922465 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.3680781321 |
|
|
Sep 01 07:27:13 AM UTC 24 |
Sep 01 07:27:19 AM UTC 24 |
1017094772 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.1466423995 |
|
|
Sep 01 07:26:58 AM UTC 24 |
Sep 01 07:27:20 AM UTC 24 |
2063218775 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.2303995939 |
|
|
Sep 01 07:27:18 AM UTC 24 |
Sep 01 07:27:21 AM UTC 24 |
145832152 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.3953805255 |
|
|
Sep 01 07:27:07 AM UTC 24 |
Sep 01 07:27:21 AM UTC 24 |
1060625669 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.1000203940 |
|
|
Sep 01 07:27:20 AM UTC 24 |
Sep 01 07:27:22 AM UTC 24 |
139560724 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_perf.1772466021 |
|
|
Sep 01 07:22:15 AM UTC 24 |
Sep 01 07:27:24 AM UTC 24 |
29445681376 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.3860180462 |
|
|
Sep 01 07:27:21 AM UTC 24 |
Sep 01 07:27:28 AM UTC 24 |
142103052 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.3987062875 |
|
|
Sep 01 07:26:22 AM UTC 24 |
Sep 01 07:27:31 AM UTC 24 |
37937799378 ps |
| T1260 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.1623968375 |
|
|
Sep 01 07:27:39 AM UTC 24 |
Sep 01 07:27:42 AM UTC 24 |
311162479 ps |
| T1261 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.761931055 |
|
|
Sep 01 07:27:42 AM UTC 24 |
Sep 01 07:27:45 AM UTC 24 |
239561301 ps |
| T1262 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.3391212019 |
|
|
Sep 01 07:27:19 AM UTC 24 |
Sep 01 07:27:46 AM UTC 24 |
1530253107 ps |
| T1263 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.2275044327 |
|
|
Sep 01 07:27:16 AM UTC 24 |
Sep 01 07:27:47 AM UTC 24 |
4710048914 ps |
| T1264 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.2885539918 |
|
|
Sep 01 07:27:23 AM UTC 24 |
Sep 01 07:27:47 AM UTC 24 |
1443313335 ps |
| T1265 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.1667995573 |
|
|
Sep 01 07:27:37 AM UTC 24 |
Sep 01 07:27:48 AM UTC 24 |
3835150346 ps |
| T1266 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_perf.1817823372 |
|
|
Sep 01 07:29:09 AM UTC 24 |
Sep 01 07:29:19 AM UTC 24 |
910061727 ps |
| T1267 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_perf.859892640 |
|
|
Sep 01 07:27:42 AM UTC 24 |
Sep 01 07:27:50 AM UTC 24 |
9764581278 ps |
| T1268 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.1419622967 |
|
|
Sep 01 07:27:21 AM UTC 24 |
Sep 01 07:27:50 AM UTC 24 |
2891656267 ps |
| T1269 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.3196393986 |
|
|
Sep 01 07:26:46 AM UTC 24 |
Sep 01 07:27:50 AM UTC 24 |
2456206607 ps |
| T1270 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.1418509181 |
|
|
Sep 01 07:27:38 AM UTC 24 |
Sep 01 07:27:52 AM UTC 24 |
5654743265 ps |
| T1271 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_hrst.4084762002 |
|
|
Sep 01 07:27:48 AM UTC 24 |
Sep 01 07:27:52 AM UTC 24 |
1146837434 ps |
| T1272 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.2572528362 |
|
|
Sep 01 07:27:51 AM UTC 24 |
Sep 01 07:27:53 AM UTC 24 |
137267423 ps |
| T1273 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.3818110562 |
|
|
Sep 01 07:27:47 AM UTC 24 |
Sep 01 07:27:54 AM UTC 24 |
737940045 ps |
| T1274 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.2905134245 |
|
|
Sep 01 07:27:50 AM UTC 24 |
Sep 01 07:27:56 AM UTC 24 |
431897434 ps |
| T1275 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_alert_test.3823257994 |
|
|
Sep 01 07:27:55 AM UTC 24 |
Sep 01 07:27:57 AM UTC 24 |
46706565 ps |
| T1276 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.1803460675 |
|
|
Sep 01 07:27:52 AM UTC 24 |
Sep 01 07:27:57 AM UTC 24 |
2272913422 ps |
| T1277 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.3667391103 |
|
|
Sep 01 07:27:49 AM UTC 24 |
Sep 01 07:27:57 AM UTC 24 |
410235545 ps |
| T1278 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_nack_txstretch.3367217462 |
|
|
Sep 01 07:27:54 AM UTC 24 |
Sep 01 07:27:57 AM UTC 24 |
142215236 ps |
| T37 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/5.i2c_host_perf.1906059901 |
|
|
Sep 01 07:12:21 AM UTC 24 |
Sep 01 07:27:58 AM UTC 24 |
12074313959 ps |
| T1279 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.3879086215 |
|
|
Sep 01 07:27:53 AM UTC 24 |
Sep 01 07:27:58 AM UTC 24 |
2478894813 ps |
| T1280 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.2532233384 |
|
|
Sep 01 07:26:58 AM UTC 24 |
Sep 01 07:27:59 AM UTC 24 |
1299224793 ps |
| T1281 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.687326653 |
|
|
Sep 01 07:27:53 AM UTC 24 |
Sep 01 07:28:00 AM UTC 24 |
4079219216 ps |
| T1282 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_override.1748330196 |
|
|
Sep 01 07:27:58 AM UTC 24 |
Sep 01 07:28:00 AM UTC 24 |
29992279 ps |
| T1283 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.3244660270 |
|
|
Sep 01 07:27:58 AM UTC 24 |
Sep 01 07:28:00 AM UTC 24 |
317481451 ps |
| T1284 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.1124778744 |
|
|
Sep 01 07:25:49 AM UTC 24 |
Sep 01 07:28:01 AM UTC 24 |
10017470289 ps |
| T1285 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.430094638 |
|
|
Sep 01 07:26:47 AM UTC 24 |
Sep 01 07:28:03 AM UTC 24 |
9667546317 ps |
| T1286 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.2357015880 |
|
|
Sep 01 07:27:30 AM UTC 24 |
Sep 01 07:28:03 AM UTC 24 |
3193457695 ps |
| T1287 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.578260178 |
|
|
Sep 01 07:27:51 AM UTC 24 |
Sep 01 07:28:05 AM UTC 24 |
556874903 ps |
| T1288 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.3884199916 |
|
|
Sep 01 07:27:59 AM UTC 24 |
Sep 01 07:28:06 AM UTC 24 |
218136611 ps |
| T1289 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.3209010458 |
|
|
Sep 01 07:28:03 AM UTC 24 |
Sep 01 07:28:07 AM UTC 24 |
169272923 ps |
| T1290 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.2110638266 |
|
|
Sep 01 07:27:59 AM UTC 24 |
Sep 01 07:28:07 AM UTC 24 |
307300651 ps |
| T1291 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.1917762519 |
|
|
Sep 01 07:28:00 AM UTC 24 |
Sep 01 07:28:08 AM UTC 24 |
2958985243 ps |
| T1292 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/3.i2c_target_stress_all.49899156 |
|
|
Sep 01 07:11:40 AM UTC 24 |
Sep 01 07:28:10 AM UTC 24 |
43106905275 ps |
| T1293 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.8053817 |
|
|
Sep 01 07:28:01 AM UTC 24 |
Sep 01 07:28:13 AM UTC 24 |
7666548301 ps |
| T1294 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.3861730257 |
|
|
Sep 01 07:28:08 AM UTC 24 |
Sep 01 07:28:14 AM UTC 24 |
1026530435 ps |
| T1295 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.1877758354 |
|
|
Sep 01 07:29:08 AM UTC 24 |
Sep 01 07:29:12 AM UTC 24 |
778266538 ps |
| T1296 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.983612308 |
|
|
Sep 01 07:28:04 AM UTC 24 |
Sep 01 07:28:17 AM UTC 24 |
1518364538 ps |
| T1297 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.330040072 |
|
|
Sep 01 07:28:08 AM UTC 24 |
Sep 01 07:28:17 AM UTC 24 |
1767323595 ps |
| T1298 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.1606637592 |
|
|
Sep 01 07:28:15 AM UTC 24 |
Sep 01 07:28:18 AM UTC 24 |
227881912 ps |
| T1299 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.1183545265 |
|
|
Sep 01 07:28:18 AM UTC 24 |
Sep 01 07:28:21 AM UTC 24 |
485046976 ps |
| T1300 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.2334516735 |
|
|
Sep 01 07:28:11 AM UTC 24 |
Sep 01 07:28:25 AM UTC 24 |
6282484114 ps |
| T1301 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_hrst.644828914 |
|
|
Sep 01 07:28:22 AM UTC 24 |
Sep 01 07:28:27 AM UTC 24 |
3102745956 ps |
| T1302 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.3229174532 |
|
|
Sep 01 07:27:17 AM UTC 24 |
Sep 01 07:28:27 AM UTC 24 |
2887023330 ps |
| T1303 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_perf.4200472888 |
|
|
Sep 01 07:28:18 AM UTC 24 |
Sep 01 07:28:28 AM UTC 24 |
6137819437 ps |
| T1304 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.3549133541 |
|
|
Sep 01 07:27:19 AM UTC 24 |
Sep 01 07:28:29 AM UTC 24 |
2908595534 ps |
| T1305 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.1040724381 |
|
|
Sep 01 07:28:19 AM UTC 24 |
Sep 01 07:28:30 AM UTC 24 |
4639341350 ps |
| T1306 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.3910034465 |
|
|
Sep 01 07:23:19 AM UTC 24 |
Sep 01 07:28:30 AM UTC 24 |
17162429344 ps |
| T1307 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_mode_toggle.3158811282 |
|
|
Sep 01 07:28:26 AM UTC 24 |
Sep 01 07:28:31 AM UTC 24 |
317543040 ps |
| T1308 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.2826230774 |
|
|
Sep 01 07:28:28 AM UTC 24 |
Sep 01 07:28:31 AM UTC 24 |
639810721 ps |
| T1309 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.508747623 |
|
|
Sep 01 07:28:28 AM UTC 24 |
Sep 01 07:28:34 AM UTC 24 |
497650051 ps |
| T1310 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.2368390215 |
|
|
Sep 01 07:29:12 AM UTC 24 |
Sep 01 07:29:18 AM UTC 24 |
476944401 ps |
| T1311 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.186930224 |
|
|
Sep 01 07:28:30 AM UTC 24 |
Sep 01 07:28:35 AM UTC 24 |
1845617822 ps |
| T1312 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.2605120610 |
|
|
Sep 01 07:27:57 AM UTC 24 |
Sep 01 07:28:36 AM UTC 24 |
4076352611 ps |
| T1313 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.557704168 |
|
|
Sep 01 07:28:32 AM UTC 24 |
Sep 01 07:28:36 AM UTC 24 |
1510523616 ps |
| T1314 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_alert_test.3388988535 |
|
|
Sep 01 07:28:35 AM UTC 24 |
Sep 01 07:28:37 AM UTC 24 |
44838890 ps |
| T1315 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.3032589289 |
|
|
Sep 01 07:28:32 AM UTC 24 |
Sep 01 07:28:37 AM UTC 24 |
7418598692 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_override.1833361890 |
|
|
Sep 01 07:28:36 AM UTC 24 |
Sep 01 07:28:38 AM UTC 24 |
92990324 ps |
| T1316 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.4113542052 |
|
|
Sep 01 07:28:30 AM UTC 24 |
Sep 01 07:28:39 AM UTC 24 |
306541759 ps |
| T1317 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.2048685283 |
|
|
Sep 01 07:28:37 AM UTC 24 |
Sep 01 07:28:40 AM UTC 24 |
393448290 ps |
| T1318 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.1477180767 |
|
|
Sep 01 07:28:07 AM UTC 24 |
Sep 01 07:28:40 AM UTC 24 |
2496884782 ps |
| T1319 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.654831136 |
|
|
Sep 01 07:28:39 AM UTC 24 |
Sep 01 07:28:47 AM UTC 24 |
151124646 ps |