T1320 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.3331013916 |
|
|
Sep 01 07:28:38 AM UTC 24 |
Sep 01 07:28:49 AM UTC 24 |
433201352 ps |
T1321 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.3203338718 |
|
|
Sep 01 07:24:48 AM UTC 24 |
Sep 01 07:28:50 AM UTC 24 |
6790407514 ps |
T1322 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.4164727285 |
|
|
Sep 01 07:28:41 AM UTC 24 |
Sep 01 07:28:51 AM UTC 24 |
2449048478 ps |
T1323 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.3331259742 |
|
|
Sep 01 07:28:28 AM UTC 24 |
Sep 01 07:28:52 AM UTC 24 |
1051809204 ps |
T1324 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.344723655 |
|
|
Sep 01 07:28:50 AM UTC 24 |
Sep 01 07:28:54 AM UTC 24 |
209249820 ps |
T1325 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.2702219787 |
|
|
Sep 01 07:26:19 AM UTC 24 |
Sep 01 07:28:57 AM UTC 24 |
10075180567 ps |
T272 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_stress_all.1675580287 |
|
|
Sep 01 07:23:24 AM UTC 24 |
Sep 01 07:28:59 AM UTC 24 |
72009271570 ps |
T1326 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_intr_stress_wr.358230805 |
|
|
Sep 01 07:28:09 AM UTC 24 |
Sep 01 07:29:00 AM UTC 24 |
18659407459 ps |
T1327 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.3214042790 |
|
|
Sep 01 07:28:54 AM UTC 24 |
Sep 01 07:29:05 AM UTC 24 |
194224392 ps |
T1328 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.2190703799 |
|
|
Sep 01 07:28:48 AM UTC 24 |
Sep 01 07:29:06 AM UTC 24 |
3035895479 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.4075188082 |
|
|
Sep 01 07:28:58 AM UTC 24 |
Sep 01 07:29:07 AM UTC 24 |
3951268078 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.3906772442 |
|
|
Sep 01 07:28:36 AM UTC 24 |
Sep 01 07:29:08 AM UTC 24 |
1586257985 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.1495560462 |
|
|
Sep 01 07:29:07 AM UTC 24 |
Sep 01 07:29:10 AM UTC 24 |
213358296 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.412615141 |
|
|
Sep 01 07:28:59 AM UTC 24 |
Sep 01 07:29:10 AM UTC 24 |
6657609073 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.22919388 |
|
|
Sep 01 07:27:58 AM UTC 24 |
Sep 01 07:29:11 AM UTC 24 |
1835330184 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.2125271592 |
|
|
Sep 01 07:29:01 AM UTC 24 |
Sep 01 07:29:12 AM UTC 24 |
4725462174 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.1228121133 |
|
|
Sep 01 07:28:56 AM UTC 24 |
Sep 01 07:29:18 AM UTC 24 |
2730043330 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.800875315 |
|
|
Sep 01 07:29:16 AM UTC 24 |
Sep 01 07:29:19 AM UTC 24 |
132999322 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.2358995373 |
|
|
Sep 01 07:29:11 AM UTC 24 |
Sep 01 07:29:20 AM UTC 24 |
1842501014 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.2231808613 |
|
|
Sep 01 07:29:12 AM UTC 24 |
Sep 01 07:29:20 AM UTC 24 |
1438226892 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_stress_wr.1166524403 |
|
|
Sep 01 07:28:53 AM UTC 24 |
Sep 01 07:29:20 AM UTC 24 |
6663560361 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_alert_test.1024716289 |
|
|
Sep 01 07:29:21 AM UTC 24 |
Sep 01 07:29:23 AM UTC 24 |
31287532 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.404443856 |
|
|
Sep 01 07:29:21 AM UTC 24 |
Sep 01 07:29:24 AM UTC 24 |
600932949 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.578480051 |
|
|
Sep 01 07:29:19 AM UTC 24 |
Sep 01 07:29:24 AM UTC 24 |
4303270259 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.3614283896 |
|
|
Sep 01 07:29:20 AM UTC 24 |
Sep 01 07:29:25 AM UTC 24 |
7671114224 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.2304881029 |
|
|
Sep 01 07:29:20 AM UTC 24 |
Sep 01 07:29:26 AM UTC 24 |
1924526873 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_override.3860542116 |
|
|
Sep 01 07:29:24 AM UTC 24 |
Sep 01 07:29:26 AM UTC 24 |
52619850 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.3881000907 |
|
|
Sep 01 07:29:19 AM UTC 24 |
Sep 01 07:29:26 AM UTC 24 |
268946676 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.3261017698 |
|
|
Sep 01 07:28:52 AM UTC 24 |
Sep 01 07:29:26 AM UTC 24 |
3615636642 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.688392138 |
|
|
Sep 01 07:27:25 AM UTC 24 |
Sep 01 07:29:26 AM UTC 24 |
24688517308 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.78031461 |
|
|
Sep 01 07:25:49 AM UTC 24 |
Sep 01 07:29:27 AM UTC 24 |
3952627874 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.4002987558 |
|
|
Sep 01 07:28:19 AM UTC 24 |
Sep 01 07:29:28 AM UTC 24 |
29442659774 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.4049291014 |
|
|
Sep 01 07:29:26 AM UTC 24 |
Sep 01 07:29:29 AM UTC 24 |
369685566 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.3079916237 |
|
|
Sep 01 07:29:29 AM UTC 24 |
Sep 01 07:29:33 AM UTC 24 |
137006667 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_perf.2448794100 |
|
|
Sep 01 07:24:19 AM UTC 24 |
Sep 01 07:29:36 AM UTC 24 |
27409001036 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.2892585639 |
|
|
Sep 01 07:29:27 AM UTC 24 |
Sep 01 07:29:36 AM UTC 24 |
3308323091 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.4197845483 |
|
|
Sep 01 07:29:27 AM UTC 24 |
Sep 01 07:29:36 AM UTC 24 |
291909472 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.3171008439 |
|
|
Sep 01 07:27:17 AM UTC 24 |
Sep 01 07:29:38 AM UTC 24 |
6515647812 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.2645312895 |
|
|
Sep 01 07:26:18 AM UTC 24 |
Sep 01 07:29:42 AM UTC 24 |
3933889437 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.3460729343 |
|
|
Sep 01 07:26:21 AM UTC 24 |
Sep 01 07:29:42 AM UTC 24 |
7963269604 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.4106868022 |
|
|
Sep 01 07:29:28 AM UTC 24 |
Sep 01 07:29:42 AM UTC 24 |
2683401456 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/5.i2c_target_stress_wr.3882943769 |
|
|
Sep 01 07:12:24 AM UTC 24 |
Sep 01 07:29:45 AM UTC 24 |
55215188309 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.1258190339 |
|
|
Sep 01 07:29:28 AM UTC 24 |
Sep 01 07:29:46 AM UTC 24 |
7391812518 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.4012483647 |
|
|
Sep 01 07:29:44 AM UTC 24 |
Sep 01 07:29:46 AM UTC 24 |
134612025 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.3723373016 |
|
|
Sep 01 07:27:58 AM UTC 24 |
Sep 01 07:29:46 AM UTC 24 |
8683072853 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.2972710140 |
|
|
Sep 01 07:29:33 AM UTC 24 |
Sep 01 07:29:49 AM UTC 24 |
1820199008 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.1535819407 |
|
|
Sep 01 07:29:46 AM UTC 24 |
Sep 01 07:29:49 AM UTC 24 |
631269436 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.1227925938 |
|
|
Sep 01 07:28:00 AM UTC 24 |
Sep 01 07:29:50 AM UTC 24 |
7012241613 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.3426747441 |
|
|
Sep 01 07:29:39 AM UTC 24 |
Sep 01 07:29:50 AM UTC 24 |
1062729106 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_hrst.2905855075 |
|
|
Sep 01 07:29:47 AM UTC 24 |
Sep 01 07:29:51 AM UTC 24 |
1086252581 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_perf.3346805245 |
|
|
Sep 01 07:29:28 AM UTC 24 |
Sep 01 07:29:51 AM UTC 24 |
7316207838 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.3139006756 |
|
|
Sep 01 07:29:36 AM UTC 24 |
Sep 01 07:29:51 AM UTC 24 |
2139246079 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.2480834795 |
|
|
Sep 01 07:29:21 AM UTC 24 |
Sep 01 07:29:52 AM UTC 24 |
1656317768 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/2.i2c_host_perf.3383981397 |
|
|
Sep 01 07:10:51 AM UTC 24 |
Sep 01 07:29:53 AM UTC 24 |
49881072811 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.253464253 |
|
|
Sep 01 07:29:37 AM UTC 24 |
Sep 01 07:29:53 AM UTC 24 |
1123387026 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.3817360443 |
|
|
Sep 01 07:29:43 AM UTC 24 |
Sep 01 07:29:53 AM UTC 24 |
2684919055 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.2566857576 |
|
|
Sep 01 07:29:51 AM UTC 24 |
Sep 01 07:29:53 AM UTC 24 |
1453955580 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.3939225167 |
|
|
Sep 01 07:29:51 AM UTC 24 |
Sep 01 07:29:54 AM UTC 24 |
364279437 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.305490552 |
|
|
Sep 01 07:29:47 AM UTC 24 |
Sep 01 07:29:54 AM UTC 24 |
3984864821 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.3231456399 |
|
|
Sep 01 07:23:54 AM UTC 24 |
Sep 01 07:29:56 AM UTC 24 |
35601339324 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_perf.3979958425 |
|
|
Sep 01 07:29:46 AM UTC 24 |
Sep 01 07:29:56 AM UTC 24 |
1524917014 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.2996093952 |
|
|
Sep 01 07:30:26 AM UTC 24 |
Sep 01 07:30:31 AM UTC 24 |
566831031 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.1179454883 |
|
|
Sep 01 07:29:53 AM UTC 24 |
Sep 01 07:29:56 AM UTC 24 |
294238999 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.1961071459 |
|
|
Sep 01 07:29:52 AM UTC 24 |
Sep 01 07:29:56 AM UTC 24 |
1532460557 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_alert_test.4042773554 |
|
|
Sep 01 07:29:54 AM UTC 24 |
Sep 01 07:29:56 AM UTC 24 |
37887679 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_override.1784422741 |
|
|
Sep 01 07:29:54 AM UTC 24 |
Sep 01 07:29:56 AM UTC 24 |
72579180 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_target_stress_wr.2936941133 |
|
|
Sep 01 07:28:06 AM UTC 24 |
Sep 01 07:29:58 AM UTC 24 |
31072676677 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.2753545198 |
|
|
Sep 01 07:29:56 AM UTC 24 |
Sep 01 07:29:58 AM UTC 24 |
480944066 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.2353639186 |
|
|
Sep 01 07:29:52 AM UTC 24 |
Sep 01 07:29:58 AM UTC 24 |
2128503018 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.297767145 |
|
|
Sep 01 07:29:53 AM UTC 24 |
Sep 01 07:29:59 AM UTC 24 |
482492548 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.2124847548 |
|
|
Sep 01 07:29:52 AM UTC 24 |
Sep 01 07:29:59 AM UTC 24 |
162675678 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.3872462644 |
|
|
Sep 01 07:29:57 AM UTC 24 |
Sep 01 07:30:00 AM UTC 24 |
249303212 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.2412298512 |
|
|
Sep 01 07:29:58 AM UTC 24 |
Sep 01 07:30:02 AM UTC 24 |
419712722 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.4188055463 |
|
|
Sep 01 07:29:50 AM UTC 24 |
Sep 01 07:30:03 AM UTC 24 |
1275754681 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.2885812351 |
|
|
Sep 01 07:29:09 AM UTC 24 |
Sep 01 07:30:05 AM UTC 24 |
7060946244 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.2924750776 |
|
|
Sep 01 07:29:57 AM UTC 24 |
Sep 01 07:30:08 AM UTC 24 |
372382700 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.2196762046 |
|
|
Sep 01 07:30:03 AM UTC 24 |
Sep 01 07:30:11 AM UTC 24 |
3197185709 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.328231540 |
|
|
Sep 01 07:29:57 AM UTC 24 |
Sep 01 07:30:11 AM UTC 24 |
985097607 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.1457417286 |
|
|
Sep 01 07:29:36 AM UTC 24 |
Sep 01 07:30:15 AM UTC 24 |
32455771051 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.1214809480 |
|
|
Sep 01 07:30:12 AM UTC 24 |
Sep 01 07:30:16 AM UTC 24 |
836954892 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.2373332159 |
|
|
Sep 01 07:30:12 AM UTC 24 |
Sep 01 07:30:16 AM UTC 24 |
2357826946 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.419715031 |
|
|
Sep 01 07:30:06 AM UTC 24 |
Sep 01 07:30:18 AM UTC 24 |
5796762292 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.4234664987 |
|
|
Sep 01 07:29:41 AM UTC 24 |
Sep 01 07:30:19 AM UTC 24 |
9570703189 ps |
T82 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.1761558267 |
|
|
Sep 01 07:29:59 AM UTC 24 |
Sep 01 07:30:19 AM UTC 24 |
5317984187 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_override.495145881 |
|
|
Sep 01 07:30:30 AM UTC 24 |
Sep 01 07:30:32 AM UTC 24 |
26203619 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_hrst.2802377654 |
|
|
Sep 01 07:30:17 AM UTC 24 |
Sep 01 07:30:22 AM UTC 24 |
885288078 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_perf.2574854537 |
|
|
Sep 01 07:28:41 AM UTC 24 |
Sep 01 07:30:24 AM UTC 24 |
2435354387 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.3893104281 |
|
|
Sep 01 07:30:21 AM UTC 24 |
Sep 01 07:30:25 AM UTC 24 |
620656581 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_perf.790580597 |
|
|
Sep 01 07:30:13 AM UTC 24 |
Sep 01 07:30:25 AM UTC 24 |
855421516 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.4063146377 |
|
|
Sep 01 07:30:23 AM UTC 24 |
Sep 01 07:30:26 AM UTC 24 |
1345809615 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.3748506819 |
|
|
Sep 01 07:30:17 AM UTC 24 |
Sep 01 07:30:27 AM UTC 24 |
1410433073 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.1098403360 |
|
|
Sep 01 07:30:24 AM UTC 24 |
Sep 01 07:30:29 AM UTC 24 |
4105937754 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_alert_test.3979284202 |
|
|
Sep 01 07:30:27 AM UTC 24 |
Sep 01 07:30:30 AM UTC 24 |
24145866 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.3780835145 |
|
|
Sep 01 07:29:54 AM UTC 24 |
Sep 01 07:30:30 AM UTC 24 |
5360237875 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.30759651 |
|
|
Sep 01 07:30:27 AM UTC 24 |
Sep 01 07:30:31 AM UTC 24 |
472821210 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.4123049870 |
|
|
Sep 01 07:29:59 AM UTC 24 |
Sep 01 07:30:31 AM UTC 24 |
8483692653 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.1956159064 |
|
|
Sep 01 07:30:26 AM UTC 24 |
Sep 01 07:30:33 AM UTC 24 |
1944588210 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.1458199941 |
|
|
Sep 01 07:30:32 AM UTC 24 |
Sep 01 07:30:35 AM UTC 24 |
517533422 ps |
T274 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_stress_all.2136166723 |
|
|
Sep 01 07:24:21 AM UTC 24 |
Sep 01 07:30:35 AM UTC 24 |
11198404252 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.3299765162 |
|
|
Sep 01 07:30:04 AM UTC 24 |
Sep 01 07:30:36 AM UTC 24 |
13399743475 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.1283947851 |
|
|
Sep 01 07:30:38 AM UTC 24 |
Sep 01 07:30:41 AM UTC 24 |
121008044 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.4109268852 |
|
|
Sep 01 07:30:20 AM UTC 24 |
Sep 01 07:30:43 AM UTC 24 |
420617450 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.4091794081 |
|
|
Sep 01 07:29:57 AM UTC 24 |
Sep 01 07:30:46 AM UTC 24 |
787076956 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.2293640866 |
|
|
Sep 01 07:30:32 AM UTC 24 |
Sep 01 07:30:46 AM UTC 24 |
182114752 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.1667030979 |
|
|
Sep 01 07:30:32 AM UTC 24 |
Sep 01 07:30:47 AM UTC 24 |
1951377535 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.2166102674 |
|
|
Sep 01 07:30:36 AM UTC 24 |
Sep 01 07:30:48 AM UTC 24 |
849803354 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.3246997484 |
|
|
Sep 01 07:30:48 AM UTC 24 |
Sep 01 07:30:57 AM UTC 24 |
5031618533 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.3683627195 |
|
|
Sep 01 07:29:28 AM UTC 24 |
Sep 01 07:31:01 AM UTC 24 |
10682298364 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.988912172 |
|
|
Sep 01 07:30:49 AM UTC 24 |
Sep 01 07:31:01 AM UTC 24 |
5947861770 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.1882382595 |
|
|
Sep 01 07:30:47 AM UTC 24 |
Sep 01 07:31:03 AM UTC 24 |
2199550008 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.1262466373 |
|
|
Sep 01 07:30:44 AM UTC 24 |
Sep 01 07:31:03 AM UTC 24 |
1041304017 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.3720180014 |
|
|
Sep 01 07:31:04 AM UTC 24 |
Sep 01 07:31:06 AM UTC 24 |
114059573 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.2337359793 |
|
|
Sep 01 07:31:04 AM UTC 24 |
Sep 01 07:31:07 AM UTC 24 |
164667891 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.3355285821 |
|
|
Sep 01 07:26:44 AM UTC 24 |
Sep 01 07:31:07 AM UTC 24 |
17631448129 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.3779860895 |
|
|
Sep 01 07:31:01 AM UTC 24 |
Sep 01 07:31:13 AM UTC 24 |
3410498115 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.2679681297 |
|
|
Sep 01 07:31:08 AM UTC 24 |
Sep 01 07:31:14 AM UTC 24 |
2053022414 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.2266322047 |
|
|
Sep 01 07:27:37 AM UTC 24 |
Sep 01 07:31:18 AM UTC 24 |
17434122992 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_perf.1656010531 |
|
|
Sep 01 07:31:07 AM UTC 24 |
Sep 01 07:31:18 AM UTC 24 |
999927239 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.1518266356 |
|
|
Sep 01 07:30:58 AM UTC 24 |
Sep 01 07:31:20 AM UTC 24 |
5629223358 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.2706937449 |
|
|
Sep 01 07:31:18 AM UTC 24 |
Sep 01 07:31:21 AM UTC 24 |
38081308 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.317849902 |
|
|
Sep 01 07:31:17 AM UTC 24 |
Sep 01 07:31:22 AM UTC 24 |
374187178 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.1963817814 |
|
|
Sep 01 07:31:19 AM UTC 24 |
Sep 01 07:31:22 AM UTC 24 |
109084775 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.450421112 |
|
|
Sep 01 07:30:31 AM UTC 24 |
Sep 01 07:31:23 AM UTC 24 |
6066861972 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.3905522434 |
|
|
Sep 01 07:30:01 AM UTC 24 |
Sep 01 07:31:24 AM UTC 24 |
4273665458 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.91885247 |
|
|
Sep 01 07:31:14 AM UTC 24 |
Sep 01 07:31:25 AM UTC 24 |
498827754 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.2613673154 |
|
|
Sep 01 07:27:46 AM UTC 24 |
Sep 01 07:31:25 AM UTC 24 |
68276910033 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_alert_test.1282330369 |
|
|
Sep 01 07:31:24 AM UTC 24 |
Sep 01 07:31:26 AM UTC 24 |
23470502 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.2999410575 |
|
|
Sep 01 07:32:10 AM UTC 24 |
Sep 01 07:32:19 AM UTC 24 |
622090162 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.2577346147 |
|
|
Sep 01 07:31:22 AM UTC 24 |
Sep 01 07:31:27 AM UTC 24 |
1683117747 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.3040124255 |
|
|
Sep 01 07:31:22 AM UTC 24 |
Sep 01 07:31:27 AM UTC 24 |
1154662501 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_override.240060202 |
|
|
Sep 01 07:31:25 AM UTC 24 |
Sep 01 07:31:27 AM UTC 24 |
177538875 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.1282251279 |
|
|
Sep 01 07:31:23 AM UTC 24 |
Sep 01 07:31:29 AM UTC 24 |
2710227293 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.1072278333 |
|
|
Sep 01 07:28:37 AM UTC 24 |
Sep 01 07:31:30 AM UTC 24 |
2207084729 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.3275873224 |
|
|
Sep 01 07:31:27 AM UTC 24 |
Sep 01 07:31:30 AM UTC 24 |
223552320 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.106534592 |
|
|
Sep 01 07:29:55 AM UTC 24 |
Sep 01 07:31:33 AM UTC 24 |
1616275002 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.3143352954 |
|
|
Sep 01 07:31:28 AM UTC 24 |
Sep 01 07:31:34 AM UTC 24 |
283856122 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.1163338069 |
|
|
Sep 01 07:31:31 AM UTC 24 |
Sep 01 07:31:34 AM UTC 24 |
1806720648 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.2890754982 |
|
|
Sep 01 07:30:15 AM UTC 24 |
Sep 01 07:31:34 AM UTC 24 |
10113492501 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.4099714055 |
|
|
Sep 01 07:31:27 AM UTC 24 |
Sep 01 07:31:40 AM UTC 24 |
1555084839 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.609737723 |
|
|
Sep 01 07:30:36 AM UTC 24 |
Sep 01 07:31:40 AM UTC 24 |
2483361079 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_stress_wr.1798150188 |
|
|
Sep 01 07:30:47 AM UTC 24 |
Sep 01 07:31:44 AM UTC 24 |
36808915582 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.210436136 |
|
|
Sep 01 07:31:30 AM UTC 24 |
Sep 01 07:31:45 AM UTC 24 |
1033735706 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.240024600 |
|
|
Sep 01 07:31:41 AM UTC 24 |
Sep 01 07:31:47 AM UTC 24 |
6818588180 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.1015338020 |
|
|
Sep 01 07:29:25 AM UTC 24 |
Sep 01 07:31:48 AM UTC 24 |
3125536591 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.2791208202 |
|
|
Sep 01 07:31:40 AM UTC 24 |
Sep 01 07:31:50 AM UTC 24 |
1774368296 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.2931876795 |
|
|
Sep 01 07:31:35 AM UTC 24 |
Sep 01 07:31:51 AM UTC 24 |
574741772 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.4191719864 |
|
|
Sep 01 07:31:49 AM UTC 24 |
Sep 01 07:31:53 AM UTC 24 |
218298985 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.3342078004 |
|
|
Sep 01 07:31:51 AM UTC 24 |
Sep 01 07:31:54 AM UTC 24 |
150624673 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.3022116716 |
|
|
Sep 01 07:29:59 AM UTC 24 |
Sep 01 07:31:54 AM UTC 24 |
2001082729 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.1363716073 |
|
|
Sep 01 07:31:35 AM UTC 24 |
Sep 01 07:31:56 AM UTC 24 |
14908992813 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.846394120 |
|
|
Sep 01 07:31:47 AM UTC 24 |
Sep 01 07:32:01 AM UTC 24 |
1411071818 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_perf.3076162083 |
|
|
Sep 01 07:31:52 AM UTC 24 |
Sep 01 07:32:01 AM UTC 24 |
2940158726 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.3536706745 |
|
|
Sep 01 07:31:53 AM UTC 24 |
Sep 01 07:32:02 AM UTC 24 |
933891962 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.1319169852 |
|
|
Sep 01 07:30:29 AM UTC 24 |
Sep 01 07:32:03 AM UTC 24 |
7881102859 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.3128504326 |
|
|
Sep 01 07:29:54 AM UTC 24 |
Sep 01 07:32:03 AM UTC 24 |
21167753420 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.3600090533 |
|
|
Sep 01 07:32:00 AM UTC 24 |
Sep 01 07:32:05 AM UTC 24 |
491201599 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.4284198337 |
|
|
Sep 01 07:32:02 AM UTC 24 |
Sep 01 07:32:05 AM UTC 24 |
142955699 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.1583685277 |
|
|
Sep 01 07:28:39 AM UTC 24 |
Sep 01 07:32:05 AM UTC 24 |
13227703581 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.1398149044 |
|
|
Sep 01 07:31:57 AM UTC 24 |
Sep 01 07:32:06 AM UTC 24 |
518967570 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.4053312547 |
|
|
Sep 01 07:32:03 AM UTC 24 |
Sep 01 07:32:08 AM UTC 24 |
2080229176 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.3405522677 |
|
|
Sep 01 07:32:02 AM UTC 24 |
Sep 01 07:32:08 AM UTC 24 |
258582333 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_alert_test.2795864943 |
|
|
Sep 01 07:32:06 AM UTC 24 |
Sep 01 07:32:08 AM UTC 24 |
18556825 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_override.921949198 |
|
|
Sep 01 07:32:06 AM UTC 24 |
Sep 01 07:32:09 AM UTC 24 |
16586188 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.3817897276 |
|
|
Sep 01 07:32:05 AM UTC 24 |
Sep 01 07:32:09 AM UTC 24 |
618986855 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.73322527 |
|
|
Sep 01 07:32:03 AM UTC 24 |
Sep 01 07:32:09 AM UTC 24 |
3684242990 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.905660197 |
|
|
Sep 01 07:32:04 AM UTC 24 |
Sep 01 07:32:09 AM UTC 24 |
777101207 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.177641137 |
|
|
Sep 01 07:31:31 AM UTC 24 |
Sep 01 07:32:09 AM UTC 24 |
4509646279 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.3773833528 |
|
|
Sep 01 07:32:09 AM UTC 24 |
Sep 01 07:32:11 AM UTC 24 |
112516278 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.3324739263 |
|
|
Sep 01 07:32:10 AM UTC 24 |
Sep 01 07:32:13 AM UTC 24 |
94041290 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.2440765028 |
|
|
Sep 01 07:32:12 AM UTC 24 |
Sep 01 07:32:16 AM UTC 24 |
151153183 ps |
T275 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/36.i2c_host_stress_all.841760046 |
|
|
Sep 01 07:27:22 AM UTC 24 |
Sep 01 07:32:18 AM UTC 24 |
31107640035 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.4109025314 |
|
|
Sep 01 07:31:46 AM UTC 24 |
Sep 01 07:32:20 AM UTC 24 |
6362949061 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.3885205531 |
|
|
Sep 01 07:32:10 AM UTC 24 |
Sep 01 07:32:22 AM UTC 24 |
375120535 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.165055476 |
|
|
Sep 01 07:32:21 AM UTC 24 |
Sep 01 07:32:24 AM UTC 24 |
1969573133 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_host_perf.3721546022 |
|
|
Sep 01 07:30:33 AM UTC 24 |
Sep 01 07:32:25 AM UTC 24 |
7512625276 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.898107405 |
|
|
Sep 01 07:32:10 AM UTC 24 |
Sep 01 07:32:28 AM UTC 24 |
768945095 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.1936604364 |
|
|
Sep 01 07:32:17 AM UTC 24 |
Sep 01 07:32:30 AM UTC 24 |
915165285 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.440165664 |
|
|
Sep 01 07:34:02 AM UTC 24 |
Sep 01 07:34:15 AM UTC 24 |
1808534766 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.126206384 |
|
|
Sep 01 07:29:57 AM UTC 24 |
Sep 01 07:32:32 AM UTC 24 |
9237783621 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.3396908427 |
|
|
Sep 01 07:32:23 AM UTC 24 |
Sep 01 07:32:33 AM UTC 24 |
1961459240 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.3152285306 |
|
|
Sep 01 07:32:31 AM UTC 24 |
Sep 01 07:32:34 AM UTC 24 |
237995477 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.162057005 |
|
|
Sep 01 07:32:32 AM UTC 24 |
Sep 01 07:32:35 AM UTC 24 |
116662044 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.3064554411 |
|
|
Sep 01 07:32:26 AM UTC 24 |
Sep 01 07:32:38 AM UTC 24 |
1251023252 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.2133315263 |
|
|
Sep 01 07:32:06 AM UTC 24 |
Sep 01 07:32:38 AM UTC 24 |
4124257186 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_perf.3315354614 |
|
|
Sep 01 07:32:32 AM UTC 24 |
Sep 01 07:32:40 AM UTC 24 |
2083644271 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_target_timeout.2110022298 |
|
|
Sep 01 07:34:05 AM UTC 24 |
Sep 01 07:34:15 AM UTC 24 |
2505301584 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_perf.516973493 |
|
|
Sep 01 07:31:29 AM UTC 24 |
Sep 01 07:32:42 AM UTC 24 |
12957012714 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.1936120296 |
|
|
Sep 01 07:32:35 AM UTC 24 |
Sep 01 07:32:42 AM UTC 24 |
2634873217 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.238604495 |
|
|
Sep 01 07:32:42 AM UTC 24 |
Sep 01 07:32:44 AM UTC 24 |
114348391 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.1400636510 |
|
|
Sep 01 07:32:39 AM UTC 24 |
Sep 01 07:32:46 AM UTC 24 |
302248822 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.3468316101 |
|
|
Sep 01 07:32:41 AM UTC 24 |
Sep 01 07:32:46 AM UTC 24 |
473296036 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.328168462 |
|
|
Sep 01 07:32:43 AM UTC 24 |
Sep 01 07:32:47 AM UTC 24 |
90920065 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.1526142415 |
|
|
Sep 01 07:32:43 AM UTC 24 |
Sep 01 07:32:48 AM UTC 24 |
377347212 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.291677061 |
|
|
Sep 01 07:32:20 AM UTC 24 |
Sep 01 07:32:49 AM UTC 24 |
2519328050 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_alert_test.1790007290 |
|
|
Sep 01 07:32:48 AM UTC 24 |
Sep 01 07:32:49 AM UTC 24 |
87425047 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_nack_txstretch.789786395 |
|
|
Sep 01 07:32:46 AM UTC 24 |
Sep 01 07:32:50 AM UTC 24 |
280218634 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.1077561073 |
|
|
Sep 01 07:32:45 AM UTC 24 |
Sep 01 07:32:50 AM UTC 24 |
2681539520 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_override.637359707 |
|
|
Sep 01 07:32:49 AM UTC 24 |
Sep 01 07:32:51 AM UTC 24 |
27099058 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.3189469643 |
|
|
Sep 01 07:32:46 AM UTC 24 |
Sep 01 07:32:52 AM UTC 24 |
1847541629 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_target_stress_all.3993950091 |
|
|
Sep 01 07:29:47 AM UTC 24 |
Sep 01 07:32:53 AM UTC 24 |
60399211049 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.4023286216 |
|
|
Sep 01 07:32:51 AM UTC 24 |
Sep 01 07:32:54 AM UTC 24 |
738094664 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.3244300076 |
|
|
Sep 01 07:31:24 AM UTC 24 |
Sep 01 07:32:56 AM UTC 24 |
8121165951 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.3530554311 |
|
|
Sep 01 07:32:54 AM UTC 24 |
Sep 01 07:33:00 AM UTC 24 |
72365646 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.1763975622 |
|
|
Sep 01 07:32:09 AM UTC 24 |
Sep 01 07:33:01 AM UTC 24 |
11692640400 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.3422951408 |
|
|
Sep 01 07:32:51 AM UTC 24 |
Sep 01 07:33:02 AM UTC 24 |
5670312608 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.4274266063 |
|
|
Sep 01 07:32:52 AM UTC 24 |
Sep 01 07:33:04 AM UTC 24 |
156689885 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.923846788 |
|
|
Sep 01 07:33:01 AM UTC 24 |
Sep 01 07:33:06 AM UTC 24 |
682234070 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.2536559892 |
|
|
Sep 01 07:32:57 AM UTC 24 |
Sep 01 07:33:14 AM UTC 24 |
4026321075 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_stress_all.2993532774 |
|
|
Sep 01 07:32:33 AM UTC 24 |
Sep 01 07:33:16 AM UTC 24 |
4954520566 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.858147948 |
|
|
Sep 01 07:33:16 AM UTC 24 |
Sep 01 07:33:28 AM UTC 24 |
1171694945 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_stress_all.3620312298 |
|
|
Sep 01 07:16:00 AM UTC 24 |
Sep 01 07:33:31 AM UTC 24 |
54720468140 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.3167664553 |
|
|
Sep 01 07:31:26 AM UTC 24 |
Sep 01 07:33:34 AM UTC 24 |
3309141925 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.2085291117 |
|
|
Sep 01 07:33:36 AM UTC 24 |
Sep 01 07:33:39 AM UTC 24 |
616987166 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.3053317861 |
|
|
Sep 01 07:18:12 AM UTC 24 |
Sep 01 07:33:39 AM UTC 24 |
53462681438 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.1991966630 |
|
|
Sep 01 07:33:37 AM UTC 24 |
Sep 01 07:33:39 AM UTC 24 |
210489512 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.1706785951 |
|
|
Sep 01 07:32:49 AM UTC 24 |
Sep 01 07:33:41 AM UTC 24 |
8404495890 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.90462606 |
|
|
Sep 01 07:33:29 AM UTC 24 |
Sep 01 07:33:41 AM UTC 24 |
6041281350 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_intr_stress_wr.1696834670 |
|
|
Sep 01 07:33:26 AM UTC 24 |
Sep 01 07:33:43 AM UTC 24 |
8144829988 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.679973876 |
|
|
Sep 01 07:31:29 AM UTC 24 |
Sep 01 07:33:44 AM UTC 24 |
2265216646 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_hrst.4205467609 |
|
|
Sep 01 07:33:40 AM UTC 24 |
Sep 01 07:33:44 AM UTC 24 |
484257601 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.3479371436 |
|
|
Sep 01 07:33:03 AM UTC 24 |
Sep 01 07:33:46 AM UTC 24 |
1305460620 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_mode_toggle.2304509249 |
|
|
Sep 01 07:33:42 AM UTC 24 |
Sep 01 07:33:46 AM UTC 24 |
417109902 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.2145874101 |
|
|
Sep 01 07:33:44 AM UTC 24 |
Sep 01 07:33:47 AM UTC 24 |
425667707 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_stress_wr.951898175 |
|
|
Sep 01 07:33:05 AM UTC 24 |
Sep 01 07:33:49 AM UTC 24 |
10523358660 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.3516564846 |
|
|
Sep 01 07:33:44 AM UTC 24 |
Sep 01 07:33:49 AM UTC 24 |
383785244 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_perf.4205188212 |
|
|
Sep 01 07:33:40 AM UTC 24 |
Sep 01 07:33:50 AM UTC 24 |
727560212 ps |
T246 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.3957100996 |
|
|
Sep 01 07:33:42 AM UTC 24 |
Sep 01 07:33:51 AM UTC 24 |
443117319 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.2025820685 |
|
|
Sep 01 07:33:40 AM UTC 24 |
Sep 01 07:33:51 AM UTC 24 |
5566855315 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.2055746835 |
|
|
Sep 01 07:33:47 AM UTC 24 |
Sep 01 07:33:51 AM UTC 24 |
407479274 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/41.i2c_target_stress_all.2883093409 |
|
|
Sep 01 07:31:07 AM UTC 24 |
Sep 01 07:33:51 AM UTC 24 |
46249207295 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_alert_test.2124711045 |
|
|
Sep 01 07:33:50 AM UTC 24 |
Sep 01 07:33:52 AM UTC 24 |
15355130 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.2329610635 |
|
|
Sep 01 07:33:47 AM UTC 24 |
Sep 01 07:33:52 AM UTC 24 |
422110288 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.1694209282 |
|
|
Sep 01 07:33:45 AM UTC 24 |
Sep 01 07:33:52 AM UTC 24 |
299233153 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.3858580703 |
|
|
Sep 01 07:33:07 AM UTC 24 |
Sep 01 07:33:52 AM UTC 24 |
4041355758 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.2794725097 |
|
|
Sep 01 07:33:50 AM UTC 24 |
Sep 01 07:33:53 AM UTC 24 |
544892808 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_host_override.1405565413 |
|
|
Sep 01 07:33:51 AM UTC 24 |
Sep 01 07:33:53 AM UTC 24 |
32816423 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.2563354807 |
|
|
Sep 01 07:33:49 AM UTC 24 |
Sep 01 07:33:54 AM UTC 24 |
1078991605 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.4227843367 |
|
|
Sep 01 07:33:52 AM UTC 24 |
Sep 01 07:33:55 AM UTC 24 |
268621828 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.3190040317 |
|
|
Sep 01 07:28:37 AM UTC 24 |
Sep 01 07:33:55 AM UTC 24 |
4530659520 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_host_perf_precise.907566956 |
|
|
Sep 01 07:33:54 AM UTC 24 |
Sep 01 07:33:56 AM UTC 24 |
430061588 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_overflow.2549765326 |
|
|
Sep 01 07:32:50 AM UTC 24 |
Sep 01 07:33:56 AM UTC 24 |
2047698535 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.1173847368 |
|
|
Sep 01 07:33:55 AM UTC 24 |
Sep 01 07:33:58 AM UTC 24 |
170215854 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.2220143462 |
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|
Sep 01 07:33:54 AM UTC 24 |
Sep 01 07:34:02 AM UTC 24 |
606097929 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_host_perf.1256644288 |
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|
Sep 01 07:33:54 AM UTC 24 |
Sep 01 07:34:02 AM UTC 24 |
1256791866 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.3739287071 |
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|
Sep 01 07:29:24 AM UTC 24 |
Sep 01 07:34:03 AM UTC 24 |
14895805617 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.743144093 |
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|
Sep 01 07:33:15 AM UTC 24 |
Sep 01 07:34:08 AM UTC 24 |
1710935304 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.511743621 |
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|
Sep 01 07:32:25 AM UTC 24 |
Sep 01 07:34:12 AM UTC 24 |
23500931502 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_acq.483415599 |
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|
Sep 01 07:34:12 AM UTC 24 |
Sep 01 07:34:15 AM UTC 24 |
496907018 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/37.i2c_host_perf.4004130074 |
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|
Sep 01 07:28:00 AM UTC 24 |
Sep 01 07:34:15 AM UTC 24 |
27337969074 ps |
T1563 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.3263175278 |
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Sep 01 07:34:13 AM UTC 24 |
Sep 01 07:34:17 AM UTC 24 |
254348877 ps |