| T839 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.2054925549 |
|
|
Sep 01 07:20:42 AM UTC 24 |
Sep 01 07:20:58 AM UTC 24 |
2732577483 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.3392731177 |
|
|
Sep 01 07:20:51 AM UTC 24 |
Sep 01 07:20:58 AM UTC 24 |
663921605 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_perf.2796087534 |
|
|
Sep 01 07:20:50 AM UTC 24 |
Sep 01 07:20:59 AM UTC 24 |
701639832 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_hrst.75773730 |
|
|
Sep 01 07:20:55 AM UTC 24 |
Sep 01 07:21:00 AM UTC 24 |
667436911 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_alert_test.2960275766 |
|
|
Sep 01 07:21:31 AM UTC 24 |
Sep 01 07:21:33 AM UTC 24 |
45957230 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.755414883 |
|
|
Sep 01 07:20:35 AM UTC 24 |
Sep 01 07:21:00 AM UTC 24 |
795419992 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.1706357895 |
|
|
Sep 01 07:19:56 AM UTC 24 |
Sep 01 07:21:00 AM UTC 24 |
22865592309 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_host_mode_toggle.2420902434 |
|
|
Sep 01 07:20:56 AM UTC 24 |
Sep 01 07:21:01 AM UTC 24 |
90231111 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.1654303723 |
|
|
Sep 01 07:20:37 AM UTC 24 |
Sep 01 07:21:02 AM UTC 24 |
9239389456 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.3357891770 |
|
|
Sep 01 07:21:00 AM UTC 24 |
Sep 01 07:21:04 AM UTC 24 |
114836170 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.2887573216 |
|
|
Sep 01 07:19:30 AM UTC 24 |
Sep 01 07:21:05 AM UTC 24 |
40040156173 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_alert_test.1022813227 |
|
|
Sep 01 07:21:03 AM UTC 24 |
Sep 01 07:21:05 AM UTC 24 |
23275195 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.2033094194 |
|
|
Sep 01 07:20:58 AM UTC 24 |
Sep 01 07:21:05 AM UTC 24 |
369787704 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.3354236216 |
|
|
Sep 01 07:21:00 AM UTC 24 |
Sep 01 07:21:05 AM UTC 24 |
159819112 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_nack_txstretch.3681613449 |
|
|
Sep 01 07:21:03 AM UTC 24 |
Sep 01 07:21:06 AM UTC 24 |
304412666 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.128459170 |
|
|
Sep 01 07:20:59 AM UTC 24 |
Sep 01 07:21:06 AM UTC 24 |
1352485247 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.2395392710 |
|
|
Sep 01 07:21:01 AM UTC 24 |
Sep 01 07:21:06 AM UTC 24 |
1251713631 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.2145917768 |
|
|
Sep 01 07:19:50 AM UTC 24 |
Sep 01 07:21:06 AM UTC 24 |
14091232571 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.3092551505 |
|
|
Sep 01 07:20:08 AM UTC 24 |
Sep 01 07:21:06 AM UTC 24 |
31109284628 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.495723440 |
|
|
Sep 01 07:21:02 AM UTC 24 |
Sep 01 07:21:07 AM UTC 24 |
1055213165 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.1861871733 |
|
|
Sep 01 07:21:02 AM UTC 24 |
Sep 01 07:21:07 AM UTC 24 |
1653146054 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_override.3839701790 |
|
|
Sep 01 07:21:06 AM UTC 24 |
Sep 01 07:21:08 AM UTC 24 |
346396448 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.296233781 |
|
|
Sep 01 07:22:47 AM UTC 24 |
Sep 01 07:22:57 AM UTC 24 |
114901361 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.918291912 |
|
|
Sep 01 07:21:06 AM UTC 24 |
Sep 01 07:21:09 AM UTC 24 |
154676367 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.231455665 |
|
|
Sep 01 07:20:05 AM UTC 24 |
Sep 01 07:21:10 AM UTC 24 |
3695127854 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.2967312433 |
|
|
Sep 01 07:18:55 AM UTC 24 |
Sep 01 07:21:12 AM UTC 24 |
54259485669 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.4210817369 |
|
|
Sep 01 07:21:08 AM UTC 24 |
Sep 01 07:21:13 AM UTC 24 |
80928578 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.2023876297 |
|
|
Sep 01 07:19:46 AM UTC 24 |
Sep 01 07:21:13 AM UTC 24 |
11362027094 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/19.i2c_host_perf.62944266 |
|
|
Sep 01 07:18:08 AM UTC 24 |
Sep 01 07:21:14 AM UTC 24 |
18517304471 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.281109693 |
|
|
Sep 01 07:20:32 AM UTC 24 |
Sep 01 07:21:15 AM UTC 24 |
743694714 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.7742595 |
|
|
Sep 01 07:19:09 AM UTC 24 |
Sep 01 07:21:15 AM UTC 24 |
9601209984 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.2015159886 |
|
|
Sep 01 07:21:09 AM UTC 24 |
Sep 01 07:21:16 AM UTC 24 |
161917612 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.3831319493 |
|
|
Sep 01 07:21:18 AM UTC 24 |
Sep 01 07:21:21 AM UTC 24 |
409121854 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.925010621 |
|
|
Sep 01 07:21:09 AM UTC 24 |
Sep 01 07:21:21 AM UTC 24 |
4363821581 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.1418985099 |
|
|
Sep 01 07:21:14 AM UTC 24 |
Sep 01 07:21:22 AM UTC 24 |
4223760744 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.546964367 |
|
|
Sep 01 07:21:07 AM UTC 24 |
Sep 01 07:21:22 AM UTC 24 |
214084203 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.2561001205 |
|
|
Sep 01 07:21:20 AM UTC 24 |
Sep 01 07:21:22 AM UTC 24 |
269135587 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.4210244114 |
|
|
Sep 01 07:21:43 AM UTC 24 |
Sep 01 07:22:57 AM UTC 24 |
3883077849 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.2449409521 |
|
|
Sep 01 07:20:38 AM UTC 24 |
Sep 01 07:21:25 AM UTC 24 |
2674154171 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.2874996986 |
|
|
Sep 01 07:21:15 AM UTC 24 |
Sep 01 07:21:26 AM UTC 24 |
1225403864 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.279244075 |
|
|
Sep 01 07:21:07 AM UTC 24 |
Sep 01 07:21:26 AM UTC 24 |
558183949 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_hrst.1259377616 |
|
|
Sep 01 07:21:23 AM UTC 24 |
Sep 01 07:21:27 AM UTC 24 |
436435493 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.3680905892 |
|
|
Sep 01 07:21:12 AM UTC 24 |
Sep 01 07:21:28 AM UTC 24 |
737887922 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.4226429492 |
|
|
Sep 01 07:21:10 AM UTC 24 |
Sep 01 07:21:29 AM UTC 24 |
1081693121 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.2695559102 |
|
|
Sep 01 07:21:26 AM UTC 24 |
Sep 01 07:21:29 AM UTC 24 |
116501531 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.2158391876 |
|
|
Sep 01 07:21:23 AM UTC 24 |
Sep 01 07:21:30 AM UTC 24 |
1186465493 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_perf.2532371877 |
|
|
Sep 01 07:21:22 AM UTC 24 |
Sep 01 07:21:31 AM UTC 24 |
792417624 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.3323737352 |
|
|
Sep 01 07:21:26 AM UTC 24 |
Sep 01 07:21:32 AM UTC 24 |
527462775 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.1435949389 |
|
|
Sep 01 07:19:51 AM UTC 24 |
Sep 01 07:21:32 AM UTC 24 |
5903424206 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.3505724136 |
|
|
Sep 01 07:21:28 AM UTC 24 |
Sep 01 07:21:33 AM UTC 24 |
504526221 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_nack_txstretch.2809023579 |
|
|
Sep 01 07:21:31 AM UTC 24 |
Sep 01 07:21:35 AM UTC 24 |
1346081862 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_override.3174146395 |
|
|
Sep 01 07:21:33 AM UTC 24 |
Sep 01 07:21:35 AM UTC 24 |
73178769 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.2064124620 |
|
|
Sep 01 07:21:30 AM UTC 24 |
Sep 01 07:21:35 AM UTC 24 |
700869178 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.3149227962 |
|
|
Sep 01 07:21:30 AM UTC 24 |
Sep 01 07:21:36 AM UTC 24 |
1904177230 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.1542797473 |
|
|
Sep 01 07:21:27 AM UTC 24 |
Sep 01 07:21:36 AM UTC 24 |
245854142 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.1723784940 |
|
|
Sep 01 07:21:34 AM UTC 24 |
Sep 01 07:21:37 AM UTC 24 |
144063066 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.2348404726 |
|
|
Sep 01 07:21:05 AM UTC 24 |
Sep 01 07:21:39 AM UTC 24 |
1371466695 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.928077954 |
|
|
Sep 01 07:21:26 AM UTC 24 |
Sep 01 07:21:39 AM UTC 24 |
694685724 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.3473105159 |
|
|
Sep 01 07:21:37 AM UTC 24 |
Sep 01 07:21:41 AM UTC 24 |
268041825 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.1001102561 |
|
|
Sep 01 07:21:36 AM UTC 24 |
Sep 01 07:21:42 AM UTC 24 |
139197782 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.441300143 |
|
|
Sep 01 07:21:38 AM UTC 24 |
Sep 01 07:21:43 AM UTC 24 |
299642589 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.373092519 |
|
|
Sep 01 07:21:15 AM UTC 24 |
Sep 01 07:21:45 AM UTC 24 |
3382709173 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.1821050496 |
|
|
Sep 01 07:17:19 AM UTC 24 |
Sep 01 07:21:49 AM UTC 24 |
70292034579 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.3296903688 |
|
|
Sep 01 07:21:42 AM UTC 24 |
Sep 01 07:21:52 AM UTC 24 |
1591268896 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.2804962622 |
|
|
Sep 01 07:21:34 AM UTC 24 |
Sep 01 07:21:53 AM UTC 24 |
3950038913 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.688053144 |
|
|
Sep 01 07:21:45 AM UTC 24 |
Sep 01 07:21:54 AM UTC 24 |
3954368230 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.2284041596 |
|
|
Sep 01 07:19:09 AM UTC 24 |
Sep 01 07:21:54 AM UTC 24 |
4368406501 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_perf.3942137999 |
|
|
Sep 01 07:21:07 AM UTC 24 |
Sep 01 07:21:56 AM UTC 24 |
6060601292 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.2620998492 |
|
|
Sep 01 07:21:55 AM UTC 24 |
Sep 01 07:21:58 AM UTC 24 |
225767254 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.224674886 |
|
|
Sep 01 07:21:55 AM UTC 24 |
Sep 01 07:21:59 AM UTC 24 |
270497983 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.1196754953 |
|
|
Sep 01 07:21:40 AM UTC 24 |
Sep 01 07:22:01 AM UTC 24 |
1048036631 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_perf.1539097869 |
|
|
Sep 01 07:21:57 AM UTC 24 |
Sep 01 07:22:07 AM UTC 24 |
3626630712 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.3827733848 |
|
|
Sep 01 07:21:42 AM UTC 24 |
Sep 01 07:22:07 AM UTC 24 |
8633573032 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.1526772604 |
|
|
Sep 01 07:21:06 AM UTC 24 |
Sep 01 07:22:07 AM UTC 24 |
4540647237 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.4256132921 |
|
|
Sep 01 07:21:59 AM UTC 24 |
Sep 01 07:22:07 AM UTC 24 |
3481709612 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.782621242 |
|
|
Sep 01 07:21:53 AM UTC 24 |
Sep 01 07:22:09 AM UTC 24 |
6460727049 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.3302704348 |
|
|
Sep 01 07:22:06 AM UTC 24 |
Sep 01 07:22:09 AM UTC 24 |
287945501 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.3292363532 |
|
|
Sep 01 07:19:45 AM UTC 24 |
Sep 01 07:22:09 AM UTC 24 |
5664936931 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/1.i2c_host_perf.3994253716 |
|
|
Sep 01 07:10:24 AM UTC 24 |
Sep 01 07:22:10 AM UTC 24 |
50776639855 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.3721599421 |
|
|
Sep 01 07:22:08 AM UTC 24 |
Sep 01 07:22:10 AM UTC 24 |
295970702 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_alert_test.3269291660 |
|
|
Sep 01 07:22:10 AM UTC 24 |
Sep 01 07:22:12 AM UTC 24 |
49661353 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.2463569424 |
|
|
Sep 01 07:21:07 AM UTC 24 |
Sep 01 07:22:13 AM UTC 24 |
3851978933 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.240660931 |
|
|
Sep 01 07:22:05 AM UTC 24 |
Sep 01 07:22:13 AM UTC 24 |
1478398217 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_override.2894263911 |
|
|
Sep 01 07:22:11 AM UTC 24 |
Sep 01 07:22:13 AM UTC 24 |
37134629 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_nack_txstretch.1268729240 |
|
|
Sep 01 07:22:10 AM UTC 24 |
Sep 01 07:22:13 AM UTC 24 |
1587137260 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.3143947102 |
|
|
Sep 01 07:22:09 AM UTC 24 |
Sep 01 07:22:14 AM UTC 24 |
113927183 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.3530367994 |
|
|
Sep 01 07:20:30 AM UTC 24 |
Sep 01 07:22:14 AM UTC 24 |
1711976188 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.2047955149 |
|
|
Sep 01 07:22:09 AM UTC 24 |
Sep 01 07:22:15 AM UTC 24 |
1988457879 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.2781527188 |
|
|
Sep 01 07:22:09 AM UTC 24 |
Sep 01 07:22:15 AM UTC 24 |
1074439286 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.1590811777 |
|
|
Sep 01 07:22:10 AM UTC 24 |
Sep 01 07:22:16 AM UTC 24 |
849518957 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.1281770322 |
|
|
Sep 01 07:22:14 AM UTC 24 |
Sep 01 07:22:16 AM UTC 24 |
288985046 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.3359902119 |
|
|
Sep 01 07:17:42 AM UTC 24 |
Sep 01 07:22:16 AM UTC 24 |
5202607796 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.2301419564 |
|
|
Sep 01 07:21:38 AM UTC 24 |
Sep 01 07:22:17 AM UTC 24 |
822611006 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.1974207355 |
|
|
Sep 01 07:22:16 AM UTC 24 |
Sep 01 07:22:19 AM UTC 24 |
98684598 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.2046087304 |
|
|
Sep 01 07:22:15 AM UTC 24 |
Sep 01 07:22:20 AM UTC 24 |
150023663 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.3188390740 |
|
|
Sep 01 07:22:16 AM UTC 24 |
Sep 01 07:22:21 AM UTC 24 |
199174436 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.1244334717 |
|
|
Sep 01 07:22:15 AM UTC 24 |
Sep 01 07:22:25 AM UTC 24 |
1890365033 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.2453847969 |
|
|
Sep 01 07:22:22 AM UTC 24 |
Sep 01 07:22:28 AM UTC 24 |
3104986882 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.651552530 |
|
|
Sep 01 07:20:29 AM UTC 24 |
Sep 01 07:22:28 AM UTC 24 |
5025773930 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.2961548925 |
|
|
Sep 01 07:22:19 AM UTC 24 |
Sep 01 07:22:29 AM UTC 24 |
1959407905 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.516655701 |
|
|
Sep 01 07:22:46 AM UTC 24 |
Sep 01 07:22:49 AM UTC 24 |
138190077 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_target_stress_all.3697252850 |
|
|
Sep 01 07:20:50 AM UTC 24 |
Sep 01 07:22:30 AM UTC 24 |
47183784327 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.3002785582 |
|
|
Sep 01 07:22:30 AM UTC 24 |
Sep 01 07:22:32 AM UTC 24 |
270957646 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.4280496511 |
|
|
Sep 01 07:21:11 AM UTC 24 |
Sep 01 07:22:33 AM UTC 24 |
19874233907 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.1262904128 |
|
|
Sep 01 07:19:16 AM UTC 24 |
Sep 01 07:22:33 AM UTC 24 |
56544533979 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.2501771278 |
|
|
Sep 01 07:22:31 AM UTC 24 |
Sep 01 07:22:35 AM UTC 24 |
185328096 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.276009022 |
|
|
Sep 01 07:22:17 AM UTC 24 |
Sep 01 07:22:36 AM UTC 24 |
3645107577 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/20.i2c_host_stress_all.976031872 |
|
|
Sep 01 07:18:40 AM UTC 24 |
Sep 01 07:22:37 AM UTC 24 |
15050411226 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_mode_toggle.1687550296 |
|
|
Sep 01 07:22:35 AM UTC 24 |
Sep 01 07:22:38 AM UTC 24 |
248307739 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_perf.1841380579 |
|
|
Sep 01 07:22:31 AM UTC 24 |
Sep 01 07:22:38 AM UTC 24 |
1644966766 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.1612092865 |
|
|
Sep 01 07:22:16 AM UTC 24 |
Sep 01 07:22:40 AM UTC 24 |
3096931072 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.1720254255 |
|
|
Sep 01 07:21:22 AM UTC 24 |
Sep 01 07:22:41 AM UTC 24 |
25048788267 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.1672035015 |
|
|
Sep 01 07:22:38 AM UTC 24 |
Sep 01 07:22:41 AM UTC 24 |
536778609 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.1407446599 |
|
|
Sep 01 07:22:37 AM UTC 24 |
Sep 01 07:22:42 AM UTC 24 |
460632837 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.372783360 |
|
|
Sep 01 07:22:29 AM UTC 24 |
Sep 01 07:22:43 AM UTC 24 |
1572453485 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.1957541169 |
|
|
Sep 01 07:22:33 AM UTC 24 |
Sep 01 07:22:43 AM UTC 24 |
1291058619 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.2448501259 |
|
|
Sep 01 07:22:39 AM UTC 24 |
Sep 01 07:22:44 AM UTC 24 |
856750174 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.500655313 |
|
|
Sep 01 07:22:36 AM UTC 24 |
Sep 01 07:22:44 AM UTC 24 |
2170044965 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_alert_test.2984927600 |
|
|
Sep 01 07:22:43 AM UTC 24 |
Sep 01 07:22:45 AM UTC 24 |
19000152 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.3412693726 |
|
|
Sep 01 07:22:40 AM UTC 24 |
Sep 01 07:22:46 AM UTC 24 |
638152555 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.967240819 |
|
|
Sep 01 07:22:42 AM UTC 24 |
Sep 01 07:22:46 AM UTC 24 |
719826611 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_override.1604354776 |
|
|
Sep 01 07:22:45 AM UTC 24 |
Sep 01 07:22:47 AM UTC 24 |
33163917 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.3900609389 |
|
|
Sep 01 07:22:39 AM UTC 24 |
Sep 01 07:22:48 AM UTC 24 |
353419259 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.3164651748 |
|
|
Sep 01 07:22:42 AM UTC 24 |
Sep 01 07:22:48 AM UTC 24 |
1887369835 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.2934312263 |
|
|
Sep 01 07:18:25 AM UTC 24 |
Sep 01 07:22:49 AM UTC 24 |
15656123228 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.1558237794 |
|
|
Sep 01 07:22:49 AM UTC 24 |
Sep 01 07:22:53 AM UTC 24 |
1185210417 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.3266781163 |
|
|
Sep 01 07:22:47 AM UTC 24 |
Sep 01 07:22:58 AM UTC 24 |
1290929214 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.3318296709 |
|
|
Sep 01 07:22:13 AM UTC 24 |
Sep 01 07:23:04 AM UTC 24 |
5921115694 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.2073043093 |
|
|
Sep 01 07:22:49 AM UTC 24 |
Sep 01 07:23:05 AM UTC 24 |
584193915 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.961040659 |
|
|
Sep 01 07:22:58 AM UTC 24 |
Sep 01 07:23:06 AM UTC 24 |
5359331734 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.119330607 |
|
|
Sep 01 07:22:58 AM UTC 24 |
Sep 01 07:23:08 AM UTC 24 |
7723257975 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.4237032022 |
|
|
Sep 01 07:23:07 AM UTC 24 |
Sep 01 07:23:10 AM UTC 24 |
232644251 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.3295184779 |
|
|
Sep 01 07:23:07 AM UTC 24 |
Sep 01 07:23:10 AM UTC 24 |
655180926 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.3368268103 |
|
|
Sep 01 07:22:49 AM UTC 24 |
Sep 01 07:23:12 AM UTC 24 |
3367759476 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.3138597002 |
|
|
Sep 01 07:23:05 AM UTC 24 |
Sep 01 07:23:12 AM UTC 24 |
4543009015 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.2677436049 |
|
|
Sep 01 07:22:22 AM UTC 24 |
Sep 01 07:23:13 AM UTC 24 |
2961951654 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.2320771841 |
|
|
Sep 01 07:22:53 AM UTC 24 |
Sep 01 07:23:14 AM UTC 24 |
932898132 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.408861721 |
|
|
Sep 01 07:22:11 AM UTC 24 |
Sep 01 07:23:14 AM UTC 24 |
1340151872 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.769042185 |
|
|
Sep 01 07:21:34 AM UTC 24 |
Sep 01 07:23:14 AM UTC 24 |
19869976203 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_hrst.1912176888 |
|
|
Sep 01 07:23:12 AM UTC 24 |
Sep 01 07:23:16 AM UTC 24 |
190422898 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.1920082148 |
|
|
Sep 01 07:23:56 AM UTC 24 |
Sep 01 07:24:07 AM UTC 24 |
849284953 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.1544148274 |
|
|
Sep 01 07:21:32 AM UTC 24 |
Sep 01 07:23:17 AM UTC 24 |
3875654687 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.2091936049 |
|
|
Sep 01 07:23:14 AM UTC 24 |
Sep 01 07:23:17 AM UTC 24 |
2693574738 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_perf.1471467414 |
|
|
Sep 01 07:22:48 AM UTC 24 |
Sep 01 07:23:17 AM UTC 24 |
4030570548 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_perf.548211862 |
|
|
Sep 01 07:23:09 AM UTC 24 |
Sep 01 07:23:18 AM UTC 24 |
716734944 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.1533727160 |
|
|
Sep 01 07:23:15 AM UTC 24 |
Sep 01 07:23:18 AM UTC 24 |
156971927 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.1121957302 |
|
|
Sep 01 07:22:13 AM UTC 24 |
Sep 01 07:23:18 AM UTC 24 |
14879232865 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.3833953586 |
|
|
Sep 01 07:23:13 AM UTC 24 |
Sep 01 07:23:19 AM UTC 24 |
1614624061 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_alert_test.2295012569 |
|
|
Sep 01 07:23:19 AM UTC 24 |
Sep 01 07:23:20 AM UTC 24 |
43693661 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.3938022695 |
|
|
Sep 01 07:23:17 AM UTC 24 |
Sep 01 07:23:21 AM UTC 24 |
132202833 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.1684488039 |
|
|
Sep 01 07:23:15 AM UTC 24 |
Sep 01 07:23:21 AM UTC 24 |
4430834893 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_override.1839585610 |
|
|
Sep 01 07:23:19 AM UTC 24 |
Sep 01 07:23:21 AM UTC 24 |
17696648 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.1080469292 |
|
|
Sep 01 07:21:58 AM UTC 24 |
Sep 01 07:23:21 AM UTC 24 |
14087303089 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.1025632898 |
|
|
Sep 01 07:22:32 AM UTC 24 |
Sep 01 07:23:22 AM UTC 24 |
29927881380 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.2927092863 |
|
|
Sep 01 07:23:16 AM UTC 24 |
Sep 01 07:23:22 AM UTC 24 |
431353817 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.725360511 |
|
|
Sep 01 07:23:17 AM UTC 24 |
Sep 01 07:23:22 AM UTC 24 |
2000617596 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.2830263662 |
|
|
Sep 01 07:23:12 AM UTC 24 |
Sep 01 07:23:23 AM UTC 24 |
1029296509 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.1041004796 |
|
|
Sep 01 07:23:20 AM UTC 24 |
Sep 01 07:23:23 AM UTC 24 |
565182634 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.24789976 |
|
|
Sep 01 07:23:15 AM UTC 24 |
Sep 01 07:23:25 AM UTC 24 |
273310584 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.2882708766 |
|
|
Sep 01 07:22:26 AM UTC 24 |
Sep 01 07:23:25 AM UTC 24 |
22924106789 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.3467891956 |
|
|
Sep 01 07:23:21 AM UTC 24 |
Sep 01 07:23:27 AM UTC 24 |
762461349 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.1130500652 |
|
|
Sep 01 07:22:58 AM UTC 24 |
Sep 01 07:23:29 AM UTC 24 |
1422985578 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.3249771331 |
|
|
Sep 01 07:21:36 AM UTC 24 |
Sep 01 07:23:29 AM UTC 24 |
18494643616 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.1755007384 |
|
|
Sep 01 07:22:44 AM UTC 24 |
Sep 01 07:23:30 AM UTC 24 |
3400291697 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_stress_wr.1314005492 |
|
|
Sep 01 07:22:54 AM UTC 24 |
Sep 01 07:23:30 AM UTC 24 |
12980023161 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.2606926963 |
|
|
Sep 01 07:23:28 AM UTC 24 |
Sep 01 07:23:33 AM UTC 24 |
606458914 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.4277554040 |
|
|
Sep 01 07:23:31 AM UTC 24 |
Sep 01 07:23:34 AM UTC 24 |
293441270 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.3148133398 |
|
|
Sep 01 07:23:33 AM UTC 24 |
Sep 01 07:23:37 AM UTC 24 |
202145807 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.4276062032 |
|
|
Sep 01 07:23:26 AM UTC 24 |
Sep 01 07:23:37 AM UTC 24 |
2037287213 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.1654544045 |
|
|
Sep 01 07:21:14 AM UTC 24 |
Sep 01 07:23:38 AM UTC 24 |
4009771419 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.2133424847 |
|
|
Sep 01 07:23:22 AM UTC 24 |
Sep 01 07:23:39 AM UTC 24 |
3206268966 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.1583644677 |
|
|
Sep 01 07:23:21 AM UTC 24 |
Sep 01 07:23:40 AM UTC 24 |
347808807 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_perf.453835163 |
|
|
Sep 01 07:23:35 AM UTC 24 |
Sep 01 07:23:42 AM UTC 24 |
499003992 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.1187109638 |
|
|
Sep 01 07:22:47 AM UTC 24 |
Sep 01 07:23:42 AM UTC 24 |
7155983055 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_mode_toggle.7039042 |
|
|
Sep 01 07:23:39 AM UTC 24 |
Sep 01 07:23:42 AM UTC 24 |
400777654 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_perf.2178764707 |
|
|
Sep 01 07:23:21 AM UTC 24 |
Sep 01 07:23:43 AM UTC 24 |
5614485257 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.3596629347 |
|
|
Sep 01 07:23:30 AM UTC 24 |
Sep 01 07:23:43 AM UTC 24 |
1543080902 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.4230067438 |
|
|
Sep 01 07:23:38 AM UTC 24 |
Sep 01 07:23:44 AM UTC 24 |
1967450033 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_hrst.3231877106 |
|
|
Sep 01 07:23:39 AM UTC 24 |
Sep 01 07:23:44 AM UTC 24 |
334630960 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.1139054510 |
|
|
Sep 01 07:23:40 AM UTC 24 |
Sep 01 07:23:45 AM UTC 24 |
1316230306 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/5.i2c_target_stress_all.220850881 |
|
|
Sep 01 07:12:31 AM UTC 24 |
Sep 01 07:23:46 AM UTC 24 |
89721629319 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.2564086501 |
|
|
Sep 01 07:23:43 AM UTC 24 |
Sep 01 07:23:46 AM UTC 24 |
287493663 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.2203293749 |
|
|
Sep 01 07:23:43 AM UTC 24 |
Sep 01 07:23:47 AM UTC 24 |
2089052071 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.628801954 |
|
|
Sep 01 07:23:22 AM UTC 24 |
Sep 01 07:23:48 AM UTC 24 |
9178681538 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_alert_test.2955555374 |
|
|
Sep 01 07:23:46 AM UTC 24 |
Sep 01 07:23:48 AM UTC 24 |
17650349 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.892273434 |
|
|
Sep 01 07:23:43 AM UTC 24 |
Sep 01 07:23:48 AM UTC 24 |
174399739 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_nack_txstretch.430031353 |
|
|
Sep 01 07:23:46 AM UTC 24 |
Sep 01 07:23:48 AM UTC 24 |
317641231 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.2335471388 |
|
|
Sep 01 07:23:44 AM UTC 24 |
Sep 01 07:23:49 AM UTC 24 |
1245908968 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_override.3358854001 |
|
|
Sep 01 07:23:47 AM UTC 24 |
Sep 01 07:23:49 AM UTC 24 |
19443326 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.2661409184 |
|
|
Sep 01 07:23:40 AM UTC 24 |
Sep 01 07:23:50 AM UTC 24 |
647860926 ps |
| T1016 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.1967181088 |
|
|
Sep 01 07:23:48 AM UTC 24 |
Sep 01 07:23:51 AM UTC 24 |
421958715 ps |
| T1017 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.786458727 |
|
|
Sep 01 07:23:44 AM UTC 24 |
Sep 01 07:23:51 AM UTC 24 |
4274615503 ps |
| T1018 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.2816771817 |
|
|
Sep 01 07:23:26 AM UTC 24 |
Sep 01 07:23:52 AM UTC 24 |
1113504356 ps |
| T1019 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.3071021099 |
|
|
Sep 01 07:23:10 AM UTC 24 |
Sep 01 07:23:53 AM UTC 24 |
5026456608 ps |
| T1020 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.3782882670 |
|
|
Sep 01 07:23:19 AM UTC 24 |
Sep 01 07:23:54 AM UTC 24 |
5306769361 ps |
| T1021 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.1675069623 |
|
|
Sep 01 07:23:49 AM UTC 24 |
Sep 01 07:23:55 AM UTC 24 |
546219861 ps |
| T1022 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.2899377558 |
|
|
Sep 01 07:23:52 AM UTC 24 |
Sep 01 07:23:55 AM UTC 24 |
178856889 ps |
| T1023 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.2743332820 |
|
|
Sep 01 07:23:30 AM UTC 24 |
Sep 01 07:23:56 AM UTC 24 |
15912074815 ps |
| T1024 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.3749579467 |
|
|
Sep 01 07:23:49 AM UTC 24 |
Sep 01 07:23:58 AM UTC 24 |
503138686 ps |
| T1025 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.3068840977 |
|
|
Sep 01 07:23:24 AM UTC 24 |
Sep 01 07:23:59 AM UTC 24 |
1014643166 ps |
| T1026 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.2426348065 |
|
|
Sep 01 07:23:46 AM UTC 24 |
Sep 01 07:24:01 AM UTC 24 |
5693669394 ps |
| T1027 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.459539915 |
|
|
Sep 01 07:21:33 AM UTC 24 |
Sep 01 07:24:02 AM UTC 24 |
10197784682 ps |
| T1028 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_perf.1237717474 |
|
|
Sep 01 07:23:49 AM UTC 24 |
Sep 01 07:24:02 AM UTC 24 |
3090091488 ps |
| T1029 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.3491469523 |
|
|
Sep 01 07:23:55 AM UTC 24 |
Sep 01 07:24:03 AM UTC 24 |
644641145 ps |
| T1030 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.334520394 |
|
|
Sep 01 07:24:02 AM UTC 24 |
Sep 01 07:24:04 AM UTC 24 |
143926702 ps |
| T1031 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.1100894315 |
|
|
Sep 01 07:24:03 AM UTC 24 |
Sep 01 07:24:06 AM UTC 24 |
249997394 ps |
| T1032 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.3059512341 |
|
|
Sep 01 07:23:48 AM UTC 24 |
Sep 01 07:24:08 AM UTC 24 |
1368670069 ps |
| T1033 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_perf.3756299332 |
|
|
Sep 01 07:24:04 AM UTC 24 |
Sep 01 07:24:10 AM UTC 24 |
2129309061 ps |
| T1034 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.2321193041 |
|
|
Sep 01 07:23:59 AM UTC 24 |
Sep 01 07:24:10 AM UTC 24 |
1393337792 ps |
| T1035 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.3931241832 |
|
|
Sep 01 07:24:09 AM UTC 24 |
Sep 01 07:24:12 AM UTC 24 |
568015839 ps |
| T1036 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.332231078 |
|
|
Sep 01 07:20:31 AM UTC 24 |
Sep 01 07:24:12 AM UTC 24 |
7226606958 ps |
| T1037 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.4072369986 |
|
|
Sep 01 07:24:05 AM UTC 24 |
Sep 01 07:24:13 AM UTC 24 |
968502827 ps |
| T1038 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.2541020360 |
|
|
Sep 01 07:24:08 AM UTC 24 |
Sep 01 07:24:14 AM UTC 24 |
1645681358 ps |
| T1039 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.1031215272 |
|
|
Sep 01 07:24:11 AM UTC 24 |
Sep 01 07:24:14 AM UTC 24 |
1538071078 ps |
| T1040 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_alert_test.3888570207 |
|
|
Sep 01 07:24:13 AM UTC 24 |
Sep 01 07:24:15 AM UTC 24 |
59942250 ps |
| T1041 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.2392199887 |
|
|
Sep 01 07:24:11 AM UTC 24 |
Sep 01 07:24:15 AM UTC 24 |
3176436471 ps |
| T1042 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.429357807 |
|
|
Sep 01 07:24:07 AM UTC 24 |
Sep 01 07:24:16 AM UTC 24 |
1836420709 ps |
| T1043 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.1665278977 |
|
|
Sep 01 07:24:12 AM UTC 24 |
Sep 01 07:24:17 AM UTC 24 |
1608696226 ps |
| T1044 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_override.4180779394 |
|
|
Sep 01 07:24:15 AM UTC 24 |
Sep 01 07:24:18 AM UTC 24 |
44816537 ps |
| T1045 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.1966202019 |
|
|
Sep 01 07:24:10 AM UTC 24 |
Sep 01 07:24:19 AM UTC 24 |
226483814 ps |
| T1046 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.1073790021 |
|
|
Sep 01 07:24:16 AM UTC 24 |
Sep 01 07:24:19 AM UTC 24 |
91950704 ps |
| T1047 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.3937803845 |
|
|
Sep 01 07:23:51 AM UTC 24 |
Sep 01 07:24:20 AM UTC 24 |
601525237 ps |
| T1048 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.2380101524 |
|
|
Sep 01 07:23:53 AM UTC 24 |
Sep 01 07:24:20 AM UTC 24 |
3372249200 ps |
| T1049 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.3091163178 |
|
|
Sep 01 07:22:46 AM UTC 24 |
Sep 01 07:24:21 AM UTC 24 |
2263761943 ps |
| T1050 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/14.i2c_host_perf.4118448401 |
|
|
Sep 01 07:15:59 AM UTC 24 |
Sep 01 07:24:21 AM UTC 24 |
49593496977 ps |
| T1051 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.4109702249 |
|
|
Sep 01 07:24:20 AM UTC 24 |
Sep 01 07:24:24 AM UTC 24 |
183539673 ps |
| T1052 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.439122439 |
|
|
Sep 01 07:24:21 AM UTC 24 |
Sep 01 07:24:25 AM UTC 24 |
317315755 ps |
| T1053 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.1047629720 |
|
|
Sep 01 07:24:17 AM UTC 24 |
Sep 01 07:24:27 AM UTC 24 |
800749148 ps |
| T1054 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.1492499196 |
|
|
Sep 01 07:23:54 AM UTC 24 |
Sep 01 07:24:29 AM UTC 24 |
766865933 ps |
| T1055 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.324633081 |
|
|
Sep 01 07:24:17 AM UTC 24 |
Sep 01 07:24:30 AM UTC 24 |
173667606 ps |
| T1056 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.2184705582 |
|
|
Sep 01 07:20:16 AM UTC 24 |
Sep 01 07:24:31 AM UTC 24 |
57323457287 ps |
| T1057 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.3854190303 |
|
|
Sep 01 07:22:59 AM UTC 24 |
Sep 01 07:24:31 AM UTC 24 |
11305428382 ps |
| T1058 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.3638424982 |
|
|
Sep 01 07:23:21 AM UTC 24 |
Sep 01 07:24:32 AM UTC 24 |
1696017701 ps |
| T1059 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.1365869868 |
|
|
Sep 01 07:21:50 AM UTC 24 |
Sep 01 07:24:34 AM UTC 24 |
16404235934 ps |
| T1060 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.4079326221 |
|
|
Sep 01 07:24:27 AM UTC 24 |
Sep 01 07:24:34 AM UTC 24 |
772100993 ps |
| T1061 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.3923843410 |
|
|
Sep 01 07:24:26 AM UTC 24 |
Sep 01 07:24:34 AM UTC 24 |
936983255 ps |
| T1062 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.2358959872 |
|
|
Sep 01 07:24:33 AM UTC 24 |
Sep 01 07:24:35 AM UTC 24 |
162552051 ps |
| T1063 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.1721297998 |
|
|
Sep 01 07:24:33 AM UTC 24 |
Sep 01 07:24:36 AM UTC 24 |
229324113 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_mode_toggle.512035925 |
|
|
Sep 01 07:24:36 AM UTC 24 |
Sep 01 07:24:41 AM UTC 24 |
491157134 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.103825393 |
|
|
Sep 01 07:24:26 AM UTC 24 |
Sep 01 07:24:41 AM UTC 24 |
1048815356 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.1164168516 |
|
|
Sep 01 07:24:22 AM UTC 24 |
Sep 01 07:24:44 AM UTC 24 |
7717410242 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.1332657921 |
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|
Sep 01 07:24:30 AM UTC 24 |
Sep 01 07:24:44 AM UTC 24 |
5831183495 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.2564727010 |
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|
Sep 01 07:24:35 AM UTC 24 |
Sep 01 07:24:44 AM UTC 24 |
798852154 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.316604329 |
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|
Sep 01 07:24:42 AM UTC 24 |
Sep 01 07:24:45 AM UTC 24 |
169241920 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_perf.1408064012 |
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|
Sep 01 07:24:35 AM UTC 24 |
Sep 01 07:24:46 AM UTC 24 |
2119983921 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.1846717445 |
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|
Sep 01 07:23:57 AM UTC 24 |
Sep 01 07:24:46 AM UTC 24 |
10154246788 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.3836629211 |
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|
Sep 01 07:24:41 AM UTC 24 |
Sep 01 07:24:46 AM UTC 24 |
368460645 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.2981911271 |
|
|
Sep 01 07:24:20 AM UTC 24 |
Sep 01 07:24:47 AM UTC 24 |
618733404 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.1171031827 |
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|
Sep 01 07:24:04 AM UTC 24 |
Sep 01 07:24:47 AM UTC 24 |
11202003638 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_08_31/i2c-sim-vcs/coverage/default/30.i2c_alert_test.3335791981 |
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|
Sep 01 07:24:47 AM UTC 24 |
Sep 01 07:24:49 AM UTC 24 |
16211436 ps |