| T621 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_smbus_maxlen.244966137 |
|
|
Sep 09 10:27:47 AM UTC 24 |
Sep 09 10:27:52 AM UTC 24 |
406949871 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/9.i2c_target_stress_all.3560821090 |
|
|
Sep 09 10:24:25 AM UTC 24 |
Sep 09 10:27:52 AM UTC 24 |
15159007422 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_alert_test.4057781241 |
|
|
Sep 09 10:27:50 AM UTC 24 |
Sep 09 10:27:52 AM UTC 24 |
33617559 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull.886973919 |
|
|
Sep 09 10:27:47 AM UTC 24 |
Sep 09 10:27:52 AM UTC 24 |
473836532 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_nack_txstretch.724135036 |
|
|
Sep 09 10:27:50 AM UTC 24 |
Sep 09 10:27:53 AM UTC 24 |
514226824 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_override.1753139694 |
|
|
Sep 09 10:27:51 AM UTC 24 |
Sep 09 10:27:53 AM UTC 24 |
28939027 ps |
| T47 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_nack_acqfull_addr.1912045931 |
|
|
Sep 09 10:27:48 AM UTC 24 |
Sep 09 10:27:54 AM UTC 24 |
5064085874 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_host_may_nack.2817203396 |
|
|
Sep 09 10:27:42 AM UTC 24 |
Sep 09 10:27:54 AM UTC 24 |
633295916 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_fmt.2705604240 |
|
|
Sep 09 10:27:52 AM UTC 24 |
Sep 09 10:27:55 AM UTC 24 |
1120881302 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_tx_stretch_ctrl.3098194073 |
|
|
Sep 09 10:27:45 AM UTC 24 |
Sep 09 10:27:55 AM UTC 24 |
313051153 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_timeout.2677348820 |
|
|
Sep 09 10:28:36 AM UTC 24 |
Sep 09 10:28:47 AM UTC 24 |
1156054114 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/5.i2c_host_stress_all.1531540148 |
|
|
Sep 09 10:22:27 AM UTC 24 |
Sep 09 10:27:56 AM UTC 24 |
15125237289 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.2250809452 |
|
|
Sep 09 10:27:21 AM UTC 24 |
Sep 09 10:27:57 AM UTC 24 |
7873264226 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.1033081076 |
|
|
Sep 09 10:27:54 AM UTC 24 |
Sep 09 10:27:58 AM UTC 24 |
64999890 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_reset_rx.3955823653 |
|
|
Sep 09 10:27:53 AM UTC 24 |
Sep 09 10:27:59 AM UTC 24 |
117772533 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_error_intr.1304516324 |
|
|
Sep 09 10:27:56 AM UTC 24 |
Sep 09 10:27:59 AM UTC 24 |
414292965 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_stretch.610877558 |
|
|
Sep 09 10:27:59 AM UTC 24 |
Sep 09 10:28:02 AM UTC 24 |
207315673 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.2266688532 |
|
|
Sep 09 10:27:34 AM UTC 24 |
Sep 09 10:28:06 AM UTC 24 |
8953314220 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_fmt_empty.361690524 |
|
|
Sep 09 10:27:53 AM UTC 24 |
Sep 09 10:28:07 AM UTC 24 |
209647634 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_intr_smoke.1094340398 |
|
|
Sep 09 10:28:00 AM UTC 24 |
Sep 09 10:28:08 AM UTC 24 |
1312382572 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_tx.3215690403 |
|
|
Sep 09 10:28:08 AM UTC 24 |
Sep 09 10:28:11 AM UTC 24 |
503605681 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_reset_acq.1306720585 |
|
|
Sep 09 10:28:08 AM UTC 24 |
Sep 09 10:28:12 AM UTC 24 |
722554257 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_perf.3864038396 |
|
|
Sep 09 10:27:54 AM UTC 24 |
Sep 09 10:28:13 AM UTC 24 |
5397543145 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.3884365432 |
|
|
Sep 09 10:26:14 AM UTC 24 |
Sep 09 10:28:13 AM UTC 24 |
1593772902 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/4.i2c_target_stress_wr.1500872608 |
|
|
Sep 09 10:22:09 AM UTC 24 |
Sep 09 10:28:14 AM UTC 24 |
55139212650 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_stretch_timeout.653999999 |
|
|
Sep 09 10:27:55 AM UTC 24 |
Sep 09 10:28:15 AM UTC 24 |
7662491107 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_stress_rd.492282332 |
|
|
Sep 09 10:27:58 AM UTC 24 |
Sep 09 10:28:15 AM UTC 24 |
665630880 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_timeout.738160228 |
|
|
Sep 09 10:28:03 AM UTC 24 |
Sep 09 10:28:15 AM UTC 24 |
4623451871 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_smoke.4128524981 |
|
|
Sep 09 10:27:57 AM UTC 24 |
Sep 09 10:28:15 AM UTC 24 |
963699346 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.3488074520 |
|
|
Sep 09 10:26:52 AM UTC 24 |
Sep 09 10:28:16 AM UTC 24 |
1280011295 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/7.i2c_host_perf_precise.1027178545 |
|
|
Sep 09 10:23:13 AM UTC 24 |
Sep 09 10:28:17 AM UTC 24 |
23203504456 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_perf.1395994310 |
|
|
Sep 09 10:28:11 AM UTC 24 |
Sep 09 10:28:17 AM UTC 24 |
565513099 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_tx.1967609843 |
|
|
Sep 09 10:28:16 AM UTC 24 |
Sep 09 10:28:18 AM UTC 24 |
417070467 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.118306579 |
|
|
Sep 09 10:26:26 AM UTC 24 |
Sep 09 10:28:19 AM UTC 24 |
34540068291 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_mode_toggle.4165597840 |
|
|
Sep 09 10:28:14 AM UTC 24 |
Sep 09 10:28:19 AM UTC 24 |
198121161 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_smbus_maxlen.2777777019 |
|
|
Sep 09 10:28:16 AM UTC 24 |
Sep 09 10:28:20 AM UTC 24 |
1110988908 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_fifo_watermarks_acq.344156151 |
|
|
Sep 09 10:28:16 AM UTC 24 |
Sep 09 10:28:21 AM UTC 24 |
1217898969 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_tx_stretch_ctrl.873820189 |
|
|
Sep 09 10:28:16 AM UTC 24 |
Sep 09 10:28:21 AM UTC 24 |
138224022 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_alert_test.3429881992 |
|
|
Sep 09 10:28:19 AM UTC 24 |
Sep 09 10:28:21 AM UTC 24 |
16584315 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_bad_addr.29043953 |
|
|
Sep 09 10:28:13 AM UTC 24 |
Sep 09 10:28:21 AM UTC 24 |
924055826 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_nack_txstretch.1493458249 |
|
|
Sep 09 10:28:18 AM UTC 24 |
Sep 09 10:28:22 AM UTC 24 |
602480784 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_override.3073080467 |
|
|
Sep 09 10:28:20 AM UTC 24 |
Sep 09 10:28:22 AM UTC 24 |
43761825 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull_addr.3869453452 |
|
|
Sep 09 10:28:17 AM UTC 24 |
Sep 09 10:28:22 AM UTC 24 |
440378658 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_nack_acqfull.1509222773 |
|
|
Sep 09 10:28:17 AM UTC 24 |
Sep 09 10:28:23 AM UTC 24 |
1933859774 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_fmt.3584402387 |
|
|
Sep 09 10:28:22 AM UTC 24 |
Sep 09 10:28:24 AM UTC 24 |
157565268 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_perf_precise.4190101134 |
|
|
Sep 09 10:28:23 AM UTC 24 |
Sep 09 10:28:26 AM UTC 24 |
54319269 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.4218245980 |
|
|
Sep 09 10:25:48 AM UTC 24 |
Sep 09 10:28:30 AM UTC 24 |
6875655192 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_stress_rd.292070273 |
|
|
Sep 09 10:27:28 AM UTC 24 |
Sep 09 10:28:31 AM UTC 24 |
1082419588 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_error_intr.553042704 |
|
|
Sep 09 10:28:25 AM UTC 24 |
Sep 09 10:28:31 AM UTC 24 |
3735066816 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_fmt_empty.2794295228 |
|
|
Sep 09 10:28:22 AM UTC 24 |
Sep 09 10:28:34 AM UTC 24 |
193361151 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_reset_rx.562496905 |
|
|
Sep 09 10:28:22 AM UTC 24 |
Sep 09 10:28:34 AM UTC 24 |
178788572 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_full.4217933984 |
|
|
Sep 09 10:26:17 AM UTC 24 |
Sep 09 10:28:35 AM UTC 24 |
5186313502 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_may_nack.66675832 |
|
|
Sep 09 10:28:15 AM UTC 24 |
Sep 09 10:28:37 AM UTC 24 |
377941180 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_perf.3787596830 |
|
|
Sep 09 10:28:23 AM UTC 24 |
Sep 09 10:28:38 AM UTC 24 |
2669957174 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_acq.3234165365 |
|
|
Sep 09 10:28:38 AM UTC 24 |
Sep 09 10:28:41 AM UTC 24 |
280715593 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.3014329010 |
|
|
Sep 09 10:23:41 AM UTC 24 |
Sep 09 10:28:42 AM UTC 24 |
35643056333 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_reset_tx.3565436140 |
|
|
Sep 09 10:28:39 AM UTC 24 |
Sep 09 10:28:42 AM UTC 24 |
677409664 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_smoke.2122495713 |
|
|
Sep 09 10:28:20 AM UTC 24 |
Sep 09 10:28:43 AM UTC 24 |
1296799769 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_stretch_timeout.1721071459 |
|
|
Sep 09 10:28:24 AM UTC 24 |
Sep 09 10:28:43 AM UTC 24 |
3002758187 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.2419996757 |
|
|
Sep 09 10:28:00 AM UTC 24 |
Sep 09 10:28:45 AM UTC 24 |
19618619518 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_smoke.1523177228 |
|
|
Sep 09 10:28:30 AM UTC 24 |
Sep 09 10:28:45 AM UTC 24 |
1107993673 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_mode_toggle.1672302367 |
|
|
Sep 09 10:28:43 AM UTC 24 |
Sep 09 10:28:46 AM UTC 24 |
193554647 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_intr_smoke.1595029782 |
|
|
Sep 09 10:28:35 AM UTC 24 |
Sep 09 10:28:47 AM UTC 24 |
4122325602 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_tx.127830720 |
|
|
Sep 09 10:28:46 AM UTC 24 |
Sep 09 10:28:48 AM UTC 24 |
115958587 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_perf.3567066326 |
|
|
Sep 09 10:28:41 AM UTC 24 |
Sep 09 10:28:48 AM UTC 24 |
5960097677 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_bad_addr.262743266 |
|
|
Sep 09 10:28:43 AM UTC 24 |
Sep 09 10:28:50 AM UTC 24 |
3516611842 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_nack_txstretch.1372188249 |
|
|
Sep 09 10:28:49 AM UTC 24 |
Sep 09 10:28:52 AM UTC 24 |
260409995 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_fifo_watermarks_acq.3434350903 |
|
|
Sep 09 10:28:46 AM UTC 24 |
Sep 09 10:28:52 AM UTC 24 |
1468516420 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_watermark.2334131947 |
|
|
Sep 09 10:26:51 AM UTC 24 |
Sep 09 10:28:52 AM UTC 24 |
19966063465 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_tx_stretch_ctrl.1993445441 |
|
|
Sep 09 10:28:47 AM UTC 24 |
Sep 09 10:28:53 AM UTC 24 |
156369476 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_alert_test.281256622 |
|
|
Sep 09 10:28:51 AM UTC 24 |
Sep 09 10:28:53 AM UTC 24 |
17098782 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_smbus_maxlen.3471869466 |
|
|
Sep 09 10:28:48 AM UTC 24 |
Sep 09 10:28:53 AM UTC 24 |
2129932908 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull.2080492368 |
|
|
Sep 09 10:28:48 AM UTC 24 |
Sep 09 10:28:54 AM UTC 24 |
2186512563 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_nack_acqfull_addr.3612381254 |
|
|
Sep 09 10:28:49 AM UTC 24 |
Sep 09 10:28:54 AM UTC 24 |
421106467 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_override.3867934288 |
|
|
Sep 09 10:28:53 AM UTC 24 |
Sep 09 10:28:55 AM UTC 24 |
58772169 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_overflow.2074145377 |
|
|
Sep 09 10:27:52 AM UTC 24 |
Sep 09 10:28:56 AM UTC 24 |
4392815587 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_fmt.196654008 |
|
|
Sep 09 10:28:54 AM UTC 24 |
Sep 09 10:28:57 AM UTC 24 |
304725610 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_full.3998964365 |
|
|
Sep 09 10:27:24 AM UTC 24 |
Sep 09 10:28:57 AM UTC 24 |
3244809972 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.3268930213 |
|
|
Sep 09 10:27:06 AM UTC 24 |
Sep 09 10:28:59 AM UTC 24 |
23251294194 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_stress_rd.3008819502 |
|
|
Sep 09 10:28:32 AM UTC 24 |
Sep 09 10:28:59 AM UTC 24 |
5509056329 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_error_intr.3834020577 |
|
|
Sep 09 10:28:58 AM UTC 24 |
Sep 09 10:29:04 AM UTC 24 |
134575484 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_fmt_empty.3882919338 |
|
|
Sep 09 10:28:54 AM UTC 24 |
Sep 09 10:29:05 AM UTC 24 |
1328529686 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.4194956909 |
|
|
Sep 09 10:27:21 AM UTC 24 |
Sep 09 10:29:05 AM UTC 24 |
4817647921 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_reset_rx.1333169287 |
|
|
Sep 09 10:28:54 AM UTC 24 |
Sep 09 10:29:06 AM UTC 24 |
206765027 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_may_nack.867079228 |
|
|
Sep 09 10:28:44 AM UTC 24 |
Sep 09 10:29:07 AM UTC 24 |
1798054220 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_stretch.1563942168 |
|
|
Sep 09 10:28:33 AM UTC 24 |
Sep 09 10:29:11 AM UTC 24 |
3540446327 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_smoke.2496719862 |
|
|
Sep 09 10:28:52 AM UTC 24 |
Sep 09 10:29:16 AM UTC 24 |
1352497377 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_perf.3091639326 |
|
|
Sep 09 10:28:56 AM UTC 24 |
Sep 09 10:29:17 AM UTC 24 |
6248684733 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_smoke.3046329472 |
|
|
Sep 09 10:27:51 AM UTC 24 |
Sep 09 10:29:18 AM UTC 24 |
1506419754 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_stretch_timeout.2196368264 |
|
|
Sep 09 10:28:58 AM UTC 24 |
Sep 09 10:29:18 AM UTC 24 |
722818153 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_intr_smoke.1633216521 |
|
|
Sep 09 10:29:06 AM UTC 24 |
Sep 09 10:29:18 AM UTC 24 |
2184290928 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_acq.2980336417 |
|
|
Sep 09 10:29:16 AM UTC 24 |
Sep 09 10:29:19 AM UTC 24 |
186771600 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_reset_tx.578339457 |
|
|
Sep 09 10:29:17 AM UTC 24 |
Sep 09 10:29:20 AM UTC 24 |
169872222 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_timeout.1755167475 |
|
|
Sep 09 10:29:07 AM UTC 24 |
Sep 09 10:29:21 AM UTC 24 |
1257860191 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.2594670795 |
|
|
Sep 09 10:28:13 AM UTC 24 |
Sep 09 10:29:24 AM UTC 24 |
12492759013 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.1128490489 |
|
|
Sep 09 10:27:22 AM UTC 24 |
Sep 09 10:29:25 AM UTC 24 |
13668390558 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_mode_toggle.1350551611 |
|
|
Sep 09 10:29:20 AM UTC 24 |
Sep 09 10:29:25 AM UTC 24 |
1354378613 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.429086829 |
|
|
Sep 09 10:29:07 AM UTC 24 |
Sep 09 10:29:25 AM UTC 24 |
17324496618 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_alert_test.1251579208 |
|
|
Sep 09 10:30:01 AM UTC 24 |
Sep 09 10:30:03 AM UTC 24 |
16670595 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_perf.1951175494 |
|
|
Sep 09 10:29:18 AM UTC 24 |
Sep 09 10:29:25 AM UTC 24 |
515848066 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_acq.3840318161 |
|
|
Sep 09 10:29:22 AM UTC 24 |
Sep 09 10:29:27 AM UTC 24 |
414790963 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_smoke.3185032896 |
|
|
Sep 09 10:29:00 AM UTC 24 |
Sep 09 10:29:27 AM UTC 24 |
1273301332 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.3676216254 |
|
|
Sep 09 10:26:58 AM UTC 24 |
Sep 09 10:29:28 AM UTC 24 |
3679630744 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_fifo_watermarks_tx.2481294962 |
|
|
Sep 09 10:29:25 AM UTC 24 |
Sep 09 10:29:28 AM UTC 24 |
193213888 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_smbus_maxlen.3654353035 |
|
|
Sep 09 10:29:25 AM UTC 24 |
Sep 09 10:29:29 AM UTC 24 |
1454595692 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_tx_stretch_ctrl.1186101436 |
|
|
Sep 09 10:29:25 AM UTC 24 |
Sep 09 10:29:30 AM UTC 24 |
131092433 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_nack_txstretch.626747421 |
|
|
Sep 09 10:29:27 AM UTC 24 |
Sep 09 10:29:30 AM UTC 24 |
509310946 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_alert_test.2460713698 |
|
|
Sep 09 10:29:29 AM UTC 24 |
Sep 09 10:29:30 AM UTC 24 |
36284882 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_override.1201344867 |
|
|
Sep 09 10:29:29 AM UTC 24 |
Sep 09 10:29:31 AM UTC 24 |
85074306 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull.2547502677 |
|
|
Sep 09 10:29:26 AM UTC 24 |
Sep 09 10:29:32 AM UTC 24 |
513962011 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_bad_addr.1588372102 |
|
|
Sep 09 10:29:19 AM UTC 24 |
Sep 09 10:29:32 AM UTC 24 |
2246455674 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/1.i2c_host_stress_all.2076698525 |
|
|
Sep 09 10:21:36 AM UTC 24 |
Sep 09 10:29:32 AM UTC 24 |
62354164930 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_may_nack.1001158516 |
|
|
Sep 09 10:29:21 AM UTC 24 |
Sep 09 10:29:32 AM UTC 24 |
257526669 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_nack_acqfull_addr.1848254185 |
|
|
Sep 09 10:29:27 AM UTC 24 |
Sep 09 10:29:33 AM UTC 24 |
7887036822 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.1288417465 |
|
|
Sep 09 10:28:42 AM UTC 24 |
Sep 09 10:29:34 AM UTC 24 |
23966861554 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_fmt.3102990089 |
|
|
Sep 09 10:29:31 AM UTC 24 |
Sep 09 10:29:34 AM UTC 24 |
166669625 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_perf_precise.2632333171 |
|
|
Sep 09 10:29:33 AM UTC 24 |
Sep 09 10:29:36 AM UTC 24 |
147714724 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_error_intr.1576845070 |
|
|
Sep 09 10:29:33 AM UTC 24 |
Sep 09 10:29:37 AM UTC 24 |
136791916 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.771951395 |
|
|
Sep 09 10:27:39 AM UTC 24 |
Sep 09 10:29:40 AM UTC 24 |
48261089058 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_reset_rx.175130087 |
|
|
Sep 09 10:29:31 AM UTC 24 |
Sep 09 10:29:49 AM UTC 24 |
324190090 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_perf.2019916943 |
|
|
Sep 09 10:29:32 AM UTC 24 |
Sep 09 10:29:50 AM UTC 24 |
3561611874 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_intr_smoke.237836988 |
|
|
Sep 09 10:29:41 AM UTC 24 |
Sep 09 10:29:51 AM UTC 24 |
5098807458 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.3473338871 |
|
|
Sep 09 10:25:28 AM UTC 24 |
Sep 09 10:29:52 AM UTC 24 |
5532198611 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_watermark.3706150088 |
|
|
Sep 09 10:28:21 AM UTC 24 |
Sep 09 10:29:53 AM UTC 24 |
3990960967 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_intr_stress_wr.822780117 |
|
|
Sep 09 10:29:49 AM UTC 24 |
Sep 09 10:29:53 AM UTC 24 |
459797518 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_watermark.1733050976 |
|
|
Sep 09 10:27:52 AM UTC 24 |
Sep 09 10:29:53 AM UTC 24 |
10992022590 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_stretch.3765561407 |
|
|
Sep 09 10:29:06 AM UTC 24 |
Sep 09 10:29:53 AM UTC 24 |
3371668748 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_timeout.1352792203 |
|
|
Sep 09 10:29:50 AM UTC 24 |
Sep 09 10:30:03 AM UTC 24 |
9096371725 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_smoke.713976840 |
|
|
Sep 09 10:29:35 AM UTC 24 |
Sep 09 10:29:55 AM UTC 24 |
3453029289 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_stretch.3926198789 |
|
|
Sep 09 10:29:38 AM UTC 24 |
Sep 09 10:29:55 AM UTC 24 |
2384156707 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_stretch_timeout.2165379530 |
|
|
Sep 09 10:29:33 AM UTC 24 |
Sep 09 10:29:56 AM UTC 24 |
3570917845 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_tx.165559424 |
|
|
Sep 09 10:29:53 AM UTC 24 |
Sep 09 10:29:56 AM UTC 24 |
365066326 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_reset_acq.3186218478 |
|
|
Sep 09 10:29:53 AM UTC 24 |
Sep 09 10:29:56 AM UTC 24 |
200516020 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.2844350516 |
|
|
Sep 09 10:25:24 AM UTC 24 |
Sep 09 10:29:57 AM UTC 24 |
48854077149 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_fmt_empty.1870634144 |
|
|
Sep 09 10:29:31 AM UTC 24 |
Sep 09 10:29:58 AM UTC 24 |
552234845 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_tx.1028719246 |
|
|
Sep 09 10:29:57 AM UTC 24 |
Sep 09 10:30:00 AM UTC 24 |
156185533 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_tx_stretch_ctrl.3804381576 |
|
|
Sep 09 10:29:57 AM UTC 24 |
Sep 09 10:30:00 AM UTC 24 |
55532057 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_hrst.4183151487 |
|
|
Sep 09 10:29:56 AM UTC 24 |
Sep 09 10:30:01 AM UTC 24 |
851457894 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_perf.3682439486 |
|
|
Sep 09 10:29:53 AM UTC 24 |
Sep 09 10:30:01 AM UTC 24 |
612574704 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_fifo_watermarks_acq.349171885 |
|
|
Sep 09 10:29:57 AM UTC 24 |
Sep 09 10:30:02 AM UTC 24 |
743435493 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull_addr.2496212027 |
|
|
Sep 09 10:29:58 AM UTC 24 |
Sep 09 10:30:03 AM UTC 24 |
2792757095 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_smbus_maxlen.3284328710 |
|
|
Sep 09 10:29:57 AM UTC 24 |
Sep 09 10:30:03 AM UTC 24 |
1975786912 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_nack_txstretch.1100326206 |
|
|
Sep 09 10:29:59 AM UTC 24 |
Sep 09 10:30:03 AM UTC 24 |
299474032 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_override.2592268090 |
|
|
Sep 09 10:30:02 AM UTC 24 |
Sep 09 10:30:04 AM UTC 24 |
40297512 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_bad_addr.716680518 |
|
|
Sep 09 10:29:54 AM UTC 24 |
Sep 09 10:30:04 AM UTC 24 |
8706252256 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_nack_acqfull.1870472566 |
|
|
Sep 09 10:29:58 AM UTC 24 |
Sep 09 10:30:04 AM UTC 24 |
2127708027 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull_addr.3349484970 |
|
|
Sep 09 10:30:56 AM UTC 24 |
Sep 09 10:31:02 AM UTC 24 |
505953368 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_overflow.1212829831 |
|
|
Sep 09 10:28:54 AM UTC 24 |
Sep 09 10:30:05 AM UTC 24 |
4701278282 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_stress_wr.2816566624 |
|
|
Sep 09 10:29:35 AM UTC 24 |
Sep 09 10:30:05 AM UTC 24 |
14145994349 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_fmt.1973403043 |
|
|
Sep 09 10:30:03 AM UTC 24 |
Sep 09 10:30:05 AM UTC 24 |
408611596 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_may_nack.2154900190 |
|
|
Sep 09 10:29:57 AM UTC 24 |
Sep 09 10:30:07 AM UTC 24 |
2297585198 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.438543439 |
|
|
Sep 09 10:30:30 AM UTC 24 |
Sep 09 10:31:06 AM UTC 24 |
6114995643 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_stress_wr.1116146561 |
|
|
Sep 09 10:28:31 AM UTC 24 |
Sep 09 10:30:07 AM UTC 24 |
60067195820 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_reset_rx.427631834 |
|
|
Sep 09 10:30:04 AM UTC 24 |
Sep 09 10:30:10 AM UTC 24 |
178668420 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_stress_rd.3933929461 |
|
|
Sep 09 10:29:37 AM UTC 24 |
Sep 09 10:30:14 AM UTC 24 |
689986249 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_error_intr.1902190513 |
|
|
Sep 09 10:30:05 AM UTC 24 |
Sep 09 10:30:16 AM UTC 24 |
815703877 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_acq.2533756650 |
|
|
Sep 09 10:30:17 AM UTC 24 |
Sep 09 10:30:19 AM UTC 24 |
257550635 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_intr_smoke.4186137353 |
|
|
Sep 09 10:30:08 AM UTC 24 |
Sep 09 10:30:20 AM UTC 24 |
1804236491 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_smoke.1892710526 |
|
|
Sep 09 10:29:29 AM UTC 24 |
Sep 09 10:30:20 AM UTC 24 |
12826002500 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_smoke.4237323440 |
|
|
Sep 09 10:30:05 AM UTC 24 |
Sep 09 10:30:21 AM UTC 24 |
2970427725 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.2317722457 |
|
|
Sep 09 10:30:08 AM UTC 24 |
Sep 09 10:30:21 AM UTC 24 |
7785452513 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_fmt_empty.1622003229 |
|
|
Sep 09 10:30:04 AM UTC 24 |
Sep 09 10:30:21 AM UTC 24 |
366573061 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_stress_rd.3569328550 |
|
|
Sep 09 10:29:05 AM UTC 24 |
Sep 09 10:30:21 AM UTC 24 |
1514547319 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_reset_tx.1557121387 |
|
|
Sep 09 10:30:19 AM UTC 24 |
Sep 09 10:30:22 AM UTC 24 |
252678464 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_stretch_timeout.3536753643 |
|
|
Sep 09 10:30:04 AM UTC 24 |
Sep 09 10:30:23 AM UTC 24 |
798907372 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_timeout.3806652038 |
|
|
Sep 09 10:30:11 AM UTC 24 |
Sep 09 10:30:23 AM UTC 24 |
1155612847 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.2626772745 |
|
|
Sep 09 10:29:54 AM UTC 24 |
Sep 09 10:30:24 AM UTC 24 |
4565701087 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_stress_rd.1555643264 |
|
|
Sep 09 10:30:37 AM UTC 24 |
Sep 09 10:31:03 AM UTC 24 |
2352441513 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_tx.2563883806 |
|
|
Sep 09 10:30:23 AM UTC 24 |
Sep 09 10:30:25 AM UTC 24 |
381079634 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_overflow.213364521 |
|
|
Sep 09 10:28:22 AM UTC 24 |
Sep 09 10:30:26 AM UTC 24 |
4939907089 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_fifo_watermarks_acq.922142865 |
|
|
Sep 09 10:30:23 AM UTC 24 |
Sep 09 10:30:26 AM UTC 24 |
315270602 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_perf.4029588665 |
|
|
Sep 09 10:30:20 AM UTC 24 |
Sep 09 10:30:28 AM UTC 24 |
793865526 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_alert_test.2541103908 |
|
|
Sep 09 10:30:27 AM UTC 24 |
Sep 09 10:30:29 AM UTC 24 |
95252901 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.1735686974 |
|
|
Sep 09 10:29:04 AM UTC 24 |
Sep 09 10:30:29 AM UTC 24 |
25568105034 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_nack_txstretch.2822130394 |
|
|
Sep 09 10:30:26 AM UTC 24 |
Sep 09 10:30:29 AM UTC 24 |
133366080 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_bad_addr.577678616 |
|
|
Sep 09 10:30:21 AM UTC 24 |
Sep 09 10:30:29 AM UTC 24 |
10033673578 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_smoke.1786781894 |
|
|
Sep 09 10:30:02 AM UTC 24 |
Sep 09 10:30:30 AM UTC 24 |
5408103437 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_smbus_maxlen.350869916 |
|
|
Sep 09 10:30:25 AM UTC 24 |
Sep 09 10:30:30 AM UTC 24 |
488472435 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull.1692299717 |
|
|
Sep 09 10:30:25 AM UTC 24 |
Sep 09 10:30:30 AM UTC 24 |
1087293545 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.3001418953 |
|
|
Sep 09 10:26:39 AM UTC 24 |
Sep 09 10:30:30 AM UTC 24 |
18638220555 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_may_nack.1950504001 |
|
|
Sep 09 10:30:23 AM UTC 24 |
Sep 09 10:30:30 AM UTC 24 |
1192355014 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_nack_acqfull_addr.2197695621 |
|
|
Sep 09 10:30:26 AM UTC 24 |
Sep 09 10:30:30 AM UTC 24 |
413312097 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_override.3344686875 |
|
|
Sep 09 10:30:29 AM UTC 24 |
Sep 09 10:30:32 AM UTC 24 |
87437781 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_stress_rd.414904588 |
|
|
Sep 09 10:30:07 AM UTC 24 |
Sep 09 10:30:33 AM UTC 24 |
1365103048 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_fmt.3056220358 |
|
|
Sep 09 10:30:30 AM UTC 24 |
Sep 09 10:30:33 AM UTC 24 |
205653970 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_error_intr.4197618946 |
|
|
Sep 09 10:30:32 AM UTC 24 |
Sep 09 10:30:36 AM UTC 24 |
140539047 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_host_fifo_full.4239518779 |
|
|
Sep 09 10:27:53 AM UTC 24 |
Sep 09 10:30:37 AM UTC 24 |
3810825746 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.2838635952 |
|
|
Sep 09 10:24:46 AM UTC 24 |
Sep 09 10:30:38 AM UTC 24 |
56140674917 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_tx_stretch_ctrl.3891907622 |
|
|
Sep 09 10:30:24 AM UTC 24 |
Sep 09 10:30:38 AM UTC 24 |
970400567 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_reset_rx.1145160613 |
|
|
Sep 09 10:30:31 AM UTC 24 |
Sep 09 10:30:39 AM UTC 24 |
342064251 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_stretch.3597445766 |
|
|
Sep 09 10:30:08 AM UTC 24 |
Sep 09 10:30:39 AM UTC 24 |
5006725785 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_intr_smoke.256608721 |
|
|
Sep 09 10:30:39 AM UTC 24 |
Sep 09 10:30:45 AM UTC 24 |
2321105802 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_acq.4000886863 |
|
|
Sep 09 10:30:44 AM UTC 24 |
Sep 09 10:30:47 AM UTC 24 |
201814257 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_full.1265782109 |
|
|
Sep 09 10:28:56 AM UTC 24 |
Sep 09 10:30:47 AM UTC 24 |
2070832231 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_reset_tx.1971761272 |
|
|
Sep 09 10:30:46 AM UTC 24 |
Sep 09 10:30:49 AM UTC 24 |
210530836 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_smoke.3745264293 |
|
|
Sep 09 10:30:34 AM UTC 24 |
Sep 09 10:30:49 AM UTC 24 |
790170692 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_error_intr.1325938579 |
|
|
Sep 09 10:31:01 AM UTC 24 |
Sep 09 10:31:04 AM UTC 24 |
487034973 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/13.i2c_target_intr_stress_wr.2226056719 |
|
|
Sep 09 10:26:34 AM UTC 24 |
Sep 09 10:30:50 AM UTC 24 |
18889523034 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_stress_wr.1685326286 |
|
|
Sep 09 10:30:07 AM UTC 24 |
Sep 09 10:30:52 AM UTC 24 |
19260813648 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_intr_stress_wr.2755468444 |
|
|
Sep 09 10:30:39 AM UTC 24 |
Sep 09 10:30:52 AM UTC 24 |
9072694456 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_perf_precise.2773613905 |
|
|
Sep 09 10:31:00 AM UTC 24 |
Sep 09 10:31:08 AM UTC 24 |
799470036 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_timeout.270715726 |
|
|
Sep 09 10:30:39 AM UTC 24 |
Sep 09 10:30:53 AM UTC 24 |
1408342445 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_bad_addr.2416873858 |
|
|
Sep 09 10:30:50 AM UTC 24 |
Sep 09 10:30:54 AM UTC 24 |
948413717 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_rx.2378836602 |
|
|
Sep 09 10:31:00 AM UTC 24 |
Sep 09 10:31:07 AM UTC 24 |
166066426 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_fmt_empty.3055359225 |
|
|
Sep 09 10:30:30 AM UTC 24 |
Sep 09 10:30:54 AM UTC 24 |
381676272 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_perf.289561312 |
|
|
Sep 09 10:30:48 AM UTC 24 |
Sep 09 10:30:55 AM UTC 24 |
551558720 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_tx.3570584887 |
|
|
Sep 09 10:30:53 AM UTC 24 |
Sep 09 10:30:56 AM UTC 24 |
60645311 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_hrst.3942007095 |
|
|
Sep 09 10:30:50 AM UTC 24 |
Sep 09 10:30:56 AM UTC 24 |
382022183 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.4294873090 |
|
|
Sep 09 10:27:27 AM UTC 24 |
Sep 09 10:30:57 AM UTC 24 |
61619117917 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_host_fifo_full.3447978337 |
|
|
Sep 09 10:28:23 AM UTC 24 |
Sep 09 10:30:57 AM UTC 24 |
16791081034 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_alert_test.2823522944 |
|
|
Sep 09 10:30:56 AM UTC 24 |
Sep 09 10:30:58 AM UTC 24 |
24044191 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_smbus_maxlen.2613709376 |
|
|
Sep 09 10:30:54 AM UTC 24 |
Sep 09 10:30:59 AM UTC 24 |
7163699123 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_fifo_watermarks_acq.3134537065 |
|
|
Sep 09 10:30:52 AM UTC 24 |
Sep 09 10:30:59 AM UTC 24 |
1055630749 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_tx_stretch_ctrl.3026335011 |
|
|
Sep 09 10:30:54 AM UTC 24 |
Sep 09 10:30:59 AM UTC 24 |
101054581 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_may_nack.2255663395 |
|
|
Sep 09 10:30:51 AM UTC 24 |
Sep 09 10:30:59 AM UTC 24 |
485280799 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_nack_txstretch.1240051645 |
|
|
Sep 09 10:30:56 AM UTC 24 |
Sep 09 10:30:59 AM UTC 24 |
296873237 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_override.1182003716 |
|
|
Sep 09 10:30:58 AM UTC 24 |
Sep 09 10:31:00 AM UTC 24 |
201898545 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_nack_acqfull.424603423 |
|
|
Sep 09 10:30:54 AM UTC 24 |
Sep 09 10:31:00 AM UTC 24 |
1985480233 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_reset_fmt.1926840065 |
|
|
Sep 09 10:30:59 AM UTC 24 |
Sep 09 10:31:02 AM UTC 24 |
142110651 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.2958716087 |
|
|
Sep 09 10:30:34 AM UTC 24 |
Sep 09 10:31:02 AM UTC 24 |
7871295912 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.2454547787 |
|
|
Sep 09 10:25:58 AM UTC 24 |
Sep 09 10:31:09 AM UTC 24 |
22302235939 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.3266213617 |
|
|
Sep 09 10:30:21 AM UTC 24 |
Sep 09 10:31:14 AM UTC 24 |
13876832696 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.1786831062 |
|
|
Sep 09 10:28:53 AM UTC 24 |
Sep 09 10:31:15 AM UTC 24 |
5379190950 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_fmt_empty.1841648271 |
|
|
Sep 09 10:30:59 AM UTC 24 |
Sep 09 10:31:15 AM UTC 24 |
266069248 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.1830624333 |
|
|
Sep 09 10:30:27 AM UTC 24 |
Sep 09 10:31:17 AM UTC 24 |
2251986605 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.3515158993 |
|
|
Sep 09 10:32:08 AM UTC 24 |
Sep 09 10:32:19 AM UTC 24 |
953734387 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.1104114241 |
|
|
Sep 09 10:29:30 AM UTC 24 |
Sep 09 10:31:17 AM UTC 24 |
2984453829 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_acq.435854175 |
|
|
Sep 09 10:31:14 AM UTC 24 |
Sep 09 10:31:17 AM UTC 24 |
264010568 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_intr_smoke.1888925543 |
|
|
Sep 09 10:31:07 AM UTC 24 |
Sep 09 10:31:17 AM UTC 24 |
1049547246 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_reset_tx.546229971 |
|
|
Sep 09 10:31:15 AM UTC 24 |
Sep 09 10:31:18 AM UTC 24 |
596538751 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.3709828782 |
|
|
Sep 09 10:31:05 AM UTC 24 |
Sep 09 10:31:20 AM UTC 24 |
1045931205 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_timeout.2575270455 |
|
|
Sep 09 10:31:09 AM UTC 24 |
Sep 09 10:31:21 AM UTC 24 |
1149090862 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_smoke.835813228 |
|
|
Sep 09 10:31:03 AM UTC 24 |
Sep 09 10:31:22 AM UTC 24 |
1038511665 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_overflow.464876374 |
|
|
Sep 09 10:30:03 AM UTC 24 |
Sep 09 10:31:22 AM UTC 24 |
4909717594 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_perf.211323105 |
|
|
Sep 09 10:32:12 AM UTC 24 |
Sep 09 10:32:21 AM UTC 24 |
564166177 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_tx.1160605682 |
|
|
Sep 09 10:31:21 AM UTC 24 |
Sep 09 10:31:24 AM UTC 24 |
612176185 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_perf.414289878 |
|
|
Sep 09 10:31:15 AM UTC 24 |
Sep 09 10:31:24 AM UTC 24 |
893531323 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.54369129 |
|
|
Sep 09 10:30:57 AM UTC 24 |
Sep 09 10:31:25 AM UTC 24 |
1861529440 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_fifo_watermarks_acq.728338618 |
|
|
Sep 09 10:31:20 AM UTC 24 |
Sep 09 10:31:25 AM UTC 24 |
4166144914 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.1910777671 |
|
|
Sep 09 10:31:04 AM UTC 24 |
Sep 09 10:31:25 AM UTC 24 |
2335146375 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_bad_addr.2206176418 |
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|
Sep 09 10:31:18 AM UTC 24 |
Sep 09 10:31:26 AM UTC 24 |
9091611883 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.601090339 |
|
|
Sep 09 10:31:19 AM UTC 24 |
Sep 09 10:31:26 AM UTC 24 |
795347143 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.118277915 |
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|
Sep 09 10:23:55 AM UTC 24 |
Sep 09 10:31:26 AM UTC 24 |
25587541486 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_tx_stretch_ctrl.1648215268 |
|
|
Sep 09 10:31:22 AM UTC 24 |
Sep 09 10:31:27 AM UTC 24 |
125521074 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_alert_test.3613960569 |
|
|
Sep 09 10:31:25 AM UTC 24 |
Sep 09 10:31:27 AM UTC 24 |
27564130 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.4063464256 |
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|
Sep 09 10:31:23 AM UTC 24 |
Sep 09 10:31:27 AM UTC 24 |
813075232 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.491442474 |
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|
Sep 09 10:31:23 AM UTC 24 |
Sep 09 10:31:28 AM UTC 24 |
1032050855 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_nack_txstretch.3364638772 |
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|
Sep 09 10:31:25 AM UTC 24 |
Sep 09 10:31:28 AM UTC 24 |
148418842 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_override.1426082207 |
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|
Sep 09 10:31:26 AM UTC 24 |
Sep 09 10:31:29 AM UTC 24 |
97721353 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.4059405941 |
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Sep 09 10:27:57 AM UTC 24 |
Sep 09 10:31:29 AM UTC 24 |
62189931868 ps |