T1327 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.49114352 |
|
|
Sep 09 10:39:00 AM UTC 24 |
Sep 09 10:40:37 AM UTC 24 |
17283263207 ps |
T1328 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.2080920241 |
|
|
Sep 09 10:40:38 AM UTC 24 |
Sep 09 10:40:44 AM UTC 24 |
233666452 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.44181787 |
|
|
Sep 09 10:40:22 AM UTC 24 |
Sep 09 10:40:44 AM UTC 24 |
1021777250 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.3903068998 |
|
|
Sep 09 10:40:37 AM UTC 24 |
Sep 09 10:40:45 AM UTC 24 |
294114456 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.837161676 |
|
|
Sep 09 10:40:37 AM UTC 24 |
Sep 09 10:40:46 AM UTC 24 |
756304700 ps |
T33 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.3718601562 |
|
|
Sep 09 10:40:45 AM UTC 24 |
Sep 09 10:40:49 AM UTC 24 |
268876077 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.3800465429 |
|
|
Sep 09 10:38:29 AM UTC 24 |
Sep 09 10:40:52 AM UTC 24 |
5429909951 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.1097869006 |
|
|
Sep 09 10:39:44 AM UTC 24 |
Sep 09 10:40:57 AM UTC 24 |
8642482379 ps |
T242 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_host_stress_all.1057642697 |
|
|
Sep 09 10:39:51 AM UTC 24 |
Sep 09 10:40:59 AM UTC 24 |
2626654226 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.2714176737 |
|
|
Sep 09 10:39:02 AM UTC 24 |
Sep 09 10:41:00 AM UTC 24 |
2865599319 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.1736290283 |
|
|
Sep 09 10:39:46 AM UTC 24 |
Sep 09 10:41:00 AM UTC 24 |
4636537499 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.333390201 |
|
|
Sep 09 10:37:39 AM UTC 24 |
Sep 09 10:41:02 AM UTC 24 |
3439644983 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.787032333 |
|
|
Sep 09 10:40:33 AM UTC 24 |
Sep 09 10:41:03 AM UTC 24 |
1510664950 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.3458967886 |
|
|
Sep 09 10:40:12 AM UTC 24 |
Sep 09 10:41:04 AM UTC 24 |
32704319547 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.185614537 |
|
|
Sep 09 10:40:45 AM UTC 24 |
Sep 09 10:41:04 AM UTC 24 |
946076506 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.3118736733 |
|
|
Sep 09 10:40:53 AM UTC 24 |
Sep 09 10:41:05 AM UTC 24 |
7387974390 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.1879220708 |
|
|
Sep 09 10:41:04 AM UTC 24 |
Sep 09 10:41:08 AM UTC 24 |
391496008 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.2539743217 |
|
|
Sep 09 10:41:03 AM UTC 24 |
Sep 09 10:41:08 AM UTC 24 |
532459595 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_perf.144277075 |
|
|
Sep 09 10:40:38 AM UTC 24 |
Sep 09 10:41:11 AM UTC 24 |
3212239652 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.2077123325 |
|
|
Sep 09 10:41:12 AM UTC 24 |
Sep 09 10:41:15 AM UTC 24 |
966948096 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_target_intr_stress_wr.1271083897 |
|
|
Sep 09 10:39:59 AM UTC 24 |
Sep 09 10:41:15 AM UTC 24 |
10387634923 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.2604978349 |
|
|
Sep 09 10:41:11 AM UTC 24 |
Sep 09 10:41:16 AM UTC 24 |
2364571385 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/0.i2c_target_stress_all.713646120 |
|
|
Sep 09 10:21:35 AM UTC 24 |
Sep 09 10:41:16 AM UTC 24 |
58001957297 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.56790403 |
|
|
Sep 09 10:41:13 AM UTC 24 |
Sep 09 10:41:17 AM UTC 24 |
70851943 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_alert_test.3975323559 |
|
|
Sep 09 10:41:15 AM UTC 24 |
Sep 09 10:41:17 AM UTC 24 |
18414048 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.949693053 |
|
|
Sep 09 10:41:14 AM UTC 24 |
Sep 09 10:41:18 AM UTC 24 |
535171062 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_override.1009562824 |
|
|
Sep 09 10:41:17 AM UTC 24 |
Sep 09 10:41:19 AM UTC 24 |
78640365 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.1826676952 |
|
|
Sep 09 10:41:15 AM UTC 24 |
Sep 09 10:41:19 AM UTC 24 |
518936252 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.52164171 |
|
|
Sep 09 10:41:15 AM UTC 24 |
Sep 09 10:41:19 AM UTC 24 |
1953768223 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.1137192277 |
|
|
Sep 09 10:38:33 AM UTC 24 |
Sep 09 10:41:20 AM UTC 24 |
55505868820 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.2076576460 |
|
|
Sep 09 10:41:14 AM UTC 24 |
Sep 09 10:41:20 AM UTC 24 |
5533404268 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.1584113406 |
|
|
Sep 09 10:41:18 AM UTC 24 |
Sep 09 10:41:21 AM UTC 24 |
372135777 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.3338546063 |
|
|
Sep 09 10:37:58 AM UTC 24 |
Sep 09 10:41:21 AM UTC 24 |
55853444953 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.3823438408 |
|
|
Sep 09 10:41:19 AM UTC 24 |
Sep 09 10:41:25 AM UTC 24 |
151812959 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.1812491542 |
|
|
Sep 09 10:41:21 AM UTC 24 |
Sep 09 10:41:27 AM UTC 24 |
166596446 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.2246192423 |
|
|
Sep 09 10:41:18 AM UTC 24 |
Sep 09 10:41:27 AM UTC 24 |
1498170966 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.575227404 |
|
|
Sep 09 10:41:28 AM UTC 24 |
Sep 09 10:41:31 AM UTC 24 |
217228357 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.3578460992 |
|
|
Sep 09 10:41:20 AM UTC 24 |
Sep 09 10:41:31 AM UTC 24 |
772249212 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.4014085871 |
|
|
Sep 09 10:39:42 AM UTC 24 |
Sep 09 10:41:32 AM UTC 24 |
2231509863 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.2781463883 |
|
|
Sep 09 10:41:21 AM UTC 24 |
Sep 09 10:41:33 AM UTC 24 |
3218022418 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.2873791740 |
|
|
Sep 09 10:41:22 AM UTC 24 |
Sep 09 10:41:33 AM UTC 24 |
2429170877 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.3990979905 |
|
|
Sep 09 10:40:47 AM UTC 24 |
Sep 09 10:41:35 AM UTC 24 |
8339743571 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.3637872933 |
|
|
Sep 09 10:41:34 AM UTC 24 |
Sep 09 10:41:37 AM UTC 24 |
132134353 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_target_stress_wr.2141689489 |
|
|
Sep 09 10:39:52 AM UTC 24 |
Sep 09 10:41:37 AM UTC 24 |
44167044735 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.3808478034 |
|
|
Sep 09 10:40:38 AM UTC 24 |
Sep 09 10:42:46 AM UTC 24 |
7647816134 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.2053103093 |
|
|
Sep 09 10:41:32 AM UTC 24 |
Sep 09 10:41:39 AM UTC 24 |
1399524739 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.3558374108 |
|
|
Sep 09 10:41:36 AM UTC 24 |
Sep 09 10:41:40 AM UTC 24 |
242240826 ps |
T265 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.4077015690 |
|
|
Sep 09 10:41:11 AM UTC 24 |
Sep 09 10:41:42 AM UTC 24 |
611817415 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.799424732 |
|
|
Sep 09 10:41:33 AM UTC 24 |
Sep 09 10:41:45 AM UTC 24 |
15365636107 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.1754644274 |
|
|
Sep 09 10:41:26 AM UTC 24 |
Sep 09 10:41:47 AM UTC 24 |
8999203002 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.3524354257 |
|
|
Sep 09 10:41:45 AM UTC 24 |
Sep 09 10:41:48 AM UTC 24 |
223671527 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_perf.3496443363 |
|
|
Sep 09 10:41:37 AM UTC 24 |
Sep 09 10:41:48 AM UTC 24 |
819544930 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.1342578978 |
|
|
Sep 09 10:41:15 AM UTC 24 |
Sep 09 10:41:50 AM UTC 24 |
1624916013 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.1730376008 |
|
|
Sep 09 10:41:40 AM UTC 24 |
Sep 09 10:41:51 AM UTC 24 |
1033390740 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.4137232486 |
|
|
Sep 09 10:41:46 AM UTC 24 |
Sep 09 10:41:51 AM UTC 24 |
137582949 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.1297468587 |
|
|
Sep 09 10:41:45 AM UTC 24 |
Sep 09 10:41:51 AM UTC 24 |
442669771 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.2461844545 |
|
|
Sep 09 10:41:05 AM UTC 24 |
Sep 09 10:41:51 AM UTC 24 |
78014964318 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.3862074332 |
|
|
Sep 09 10:41:48 AM UTC 24 |
Sep 09 10:41:52 AM UTC 24 |
525078661 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_alert_test.2526780779 |
|
|
Sep 09 10:41:51 AM UTC 24 |
Sep 09 10:41:53 AM UTC 24 |
47375551 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_override.2403354071 |
|
|
Sep 09 10:41:51 AM UTC 24 |
Sep 09 10:41:54 AM UTC 24 |
81399111 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.1518425234 |
|
|
Sep 09 10:41:49 AM UTC 24 |
Sep 09 10:41:54 AM UTC 24 |
442658632 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.1282954621 |
|
|
Sep 09 10:39:58 AM UTC 24 |
Sep 09 10:41:54 AM UTC 24 |
3539431554 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.3870063761 |
|
|
Sep 09 10:41:49 AM UTC 24 |
Sep 09 10:41:55 AM UTC 24 |
580830680 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.2533136328 |
|
|
Sep 09 10:41:51 AM UTC 24 |
Sep 09 10:41:55 AM UTC 24 |
161237379 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_perf.1559810230 |
|
|
Sep 09 10:41:20 AM UTC 24 |
Sep 09 10:41:56 AM UTC 24 |
29165258022 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.1926516070 |
|
|
Sep 09 10:41:54 AM UTC 24 |
Sep 09 10:41:56 AM UTC 24 |
535412498 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.1926061662 |
|
|
Sep 09 10:41:32 AM UTC 24 |
Sep 09 10:42:00 AM UTC 24 |
9745278209 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.14972077 |
|
|
Sep 09 10:41:28 AM UTC 24 |
Sep 09 10:42:01 AM UTC 24 |
755414393 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.2039610206 |
|
|
Sep 09 10:41:57 AM UTC 24 |
Sep 09 10:42:01 AM UTC 24 |
1088425107 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.346283811 |
|
|
Sep 09 10:41:43 AM UTC 24 |
Sep 09 10:42:02 AM UTC 24 |
4067241843 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.2557903898 |
|
|
Sep 09 10:41:56 AM UTC 24 |
Sep 09 10:42:02 AM UTC 24 |
992525059 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.842646919 |
|
|
Sep 09 10:41:55 AM UTC 24 |
Sep 09 10:42:06 AM UTC 24 |
611623527 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.4088700045 |
|
|
Sep 09 10:41:17 AM UTC 24 |
Sep 09 10:42:16 AM UTC 24 |
8216364301 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.2923209364 |
|
|
Sep 09 10:42:01 AM UTC 24 |
Sep 09 10:42:16 AM UTC 24 |
10404377329 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.3491727001 |
|
|
Sep 09 10:42:08 AM UTC 24 |
Sep 09 10:42:16 AM UTC 24 |
1801075712 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.3449307686 |
|
|
Sep 09 10:42:01 AM UTC 24 |
Sep 09 10:42:18 AM UTC 24 |
9426438002 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.1840604370 |
|
|
Sep 09 10:41:57 AM UTC 24 |
Sep 09 10:42:20 AM UTC 24 |
1512828330 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.703781004 |
|
|
Sep 09 10:42:17 AM UTC 24 |
Sep 09 10:42:20 AM UTC 24 |
1171849712 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.1375098995 |
|
|
Sep 09 10:42:19 AM UTC 24 |
Sep 09 10:42:22 AM UTC 24 |
1607545274 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_perf.486222826 |
|
|
Sep 09 10:42:19 AM UTC 24 |
Sep 09 10:42:27 AM UTC 24 |
1117926263 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.3138761926 |
|
|
Sep 09 10:41:55 AM UTC 24 |
Sep 09 10:42:27 AM UTC 24 |
975873101 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.4204143381 |
|
|
Sep 09 10:42:17 AM UTC 24 |
Sep 09 10:42:27 AM UTC 24 |
1626705491 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.907013596 |
|
|
Sep 09 10:42:20 AM UTC 24 |
Sep 09 10:42:27 AM UTC 24 |
2045252740 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_hrst.1900670795 |
|
|
Sep 09 10:42:21 AM UTC 24 |
Sep 09 10:42:28 AM UTC 24 |
515487689 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.3252017595 |
|
|
Sep 09 10:41:00 AM UTC 24 |
Sep 09 10:42:31 AM UTC 24 |
16706742054 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.710208638 |
|
|
Sep 09 10:42:28 AM UTC 24 |
Sep 09 10:42:33 AM UTC 24 |
2042129866 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.3832630609 |
|
|
Sep 09 10:42:28 AM UTC 24 |
Sep 09 10:42:34 AM UTC 24 |
497595714 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.2179020980 |
|
|
Sep 09 10:42:03 AM UTC 24 |
Sep 09 10:42:34 AM UTC 24 |
5907736496 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_alert_test.678800098 |
|
|
Sep 09 10:42:32 AM UTC 24 |
Sep 09 10:42:34 AM UTC 24 |
207743266 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.1357850949 |
|
|
Sep 09 10:42:29 AM UTC 24 |
Sep 09 10:42:34 AM UTC 24 |
483688955 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.231525326 |
|
|
Sep 09 10:42:31 AM UTC 24 |
Sep 09 10:42:35 AM UTC 24 |
1650509533 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.94135135 |
|
|
Sep 09 10:42:31 AM UTC 24 |
Sep 09 10:42:37 AM UTC 24 |
7681443475 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_override.244131652 |
|
|
Sep 09 10:42:35 AM UTC 24 |
Sep 09 10:42:37 AM UTC 24 |
19032751 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.893534054 |
|
|
Sep 09 10:42:36 AM UTC 24 |
Sep 09 10:42:38 AM UTC 24 |
166590095 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.826011180 |
|
|
Sep 09 10:39:44 AM UTC 24 |
Sep 09 10:42:38 AM UTC 24 |
12056655533 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.1210342050 |
|
|
Sep 09 10:42:26 AM UTC 24 |
Sep 09 10:42:42 AM UTC 24 |
282329615 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.1623872255 |
|
|
Sep 09 10:41:19 AM UTC 24 |
Sep 09 10:42:45 AM UTC 24 |
7969628557 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.2891105083 |
|
|
Sep 09 10:42:36 AM UTC 24 |
Sep 09 10:42:49 AM UTC 24 |
910478271 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_target_stress_all.2118758192 |
|
|
Sep 09 10:41:38 AM UTC 24 |
Sep 09 10:42:49 AM UTC 24 |
97909182498 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.2491683596 |
|
|
Sep 09 10:40:34 AM UTC 24 |
Sep 09 10:42:50 AM UTC 24 |
10708484034 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.1011138656 |
|
|
Sep 09 10:42:38 AM UTC 24 |
Sep 09 10:42:50 AM UTC 24 |
151507968 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.2205874798 |
|
|
Sep 09 10:42:45 AM UTC 24 |
Sep 09 10:42:51 AM UTC 24 |
697961458 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_perf.834461560 |
|
|
Sep 09 10:42:39 AM UTC 24 |
Sep 09 10:42:51 AM UTC 24 |
3118336285 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.273801092 |
|
|
Sep 09 10:41:51 AM UTC 24 |
Sep 09 10:42:55 AM UTC 24 |
2961925951 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_perf.2978525259 |
|
|
Sep 09 10:41:56 AM UTC 24 |
Sep 09 10:43:02 AM UTC 24 |
5562476070 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.2019246502 |
|
|
Sep 09 10:42:52 AM UTC 24 |
Sep 09 10:43:03 AM UTC 24 |
1152009109 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.2911296967 |
|
|
Sep 09 10:42:03 AM UTC 24 |
Sep 09 10:43:05 AM UTC 24 |
2865503881 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.333541634 |
|
|
Sep 09 10:42:52 AM UTC 24 |
Sep 09 10:43:07 AM UTC 24 |
5785090621 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.1445337067 |
|
|
Sep 09 10:43:04 AM UTC 24 |
Sep 09 10:43:07 AM UTC 24 |
354792494 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.558044712 |
|
|
Sep 09 10:42:56 AM UTC 24 |
Sep 09 10:43:08 AM UTC 24 |
2698175380 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.1352773427 |
|
|
Sep 09 10:43:06 AM UTC 24 |
Sep 09 10:43:09 AM UTC 24 |
336027479 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.2774678389 |
|
|
Sep 09 10:42:20 AM UTC 24 |
Sep 09 10:43:10 AM UTC 24 |
32099008938 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.2225325395 |
|
|
Sep 09 10:41:17 AM UTC 24 |
Sep 09 10:43:11 AM UTC 24 |
5572677733 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_perf.4130389555 |
|
|
Sep 09 10:43:06 AM UTC 24 |
Sep 09 10:43:14 AM UTC 24 |
477527064 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.1163709770 |
|
|
Sep 09 10:40:35 AM UTC 24 |
Sep 09 10:43:15 AM UTC 24 |
5559200369 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.1437109178 |
|
|
Sep 09 10:43:12 AM UTC 24 |
Sep 09 10:43:17 AM UTC 24 |
1005416279 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.1083515507 |
|
|
Sep 09 10:43:08 AM UTC 24 |
Sep 09 10:43:17 AM UTC 24 |
1763809923 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.631289533 |
|
|
Sep 09 10:43:15 AM UTC 24 |
Sep 09 10:43:18 AM UTC 24 |
147261697 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.1324008054 |
|
|
Sep 09 10:42:51 AM UTC 24 |
Sep 09 10:43:19 AM UTC 24 |
2410030272 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.1491224382 |
|
|
Sep 09 10:44:02 AM UTC 24 |
Sep 09 10:44:20 AM UTC 24 |
19166846849 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.3708255335 |
|
|
Sep 09 10:42:43 AM UTC 24 |
Sep 09 10:43:20 AM UTC 24 |
4894712446 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.2123280939 |
|
|
Sep 09 10:42:52 AM UTC 24 |
Sep 09 10:43:20 AM UTC 24 |
1989387517 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.1739706707 |
|
|
Sep 09 10:43:16 AM UTC 24 |
Sep 09 10:43:20 AM UTC 24 |
2323374470 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_alert_test.2509445861 |
|
|
Sep 09 10:43:19 AM UTC 24 |
Sep 09 10:43:21 AM UTC 24 |
118179141 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_watermarks_tx.3049792623 |
|
|
Sep 09 10:45:37 AM UTC 24 |
Sep 09 10:45:41 AM UTC 24 |
312001803 ps |
T266 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.740740136 |
|
|
Sep 09 10:43:11 AM UTC 24 |
Sep 09 10:43:21 AM UTC 24 |
686111151 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.4098266536 |
|
|
Sep 09 10:43:15 AM UTC 24 |
Sep 09 10:43:22 AM UTC 24 |
295480616 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_override.3704571453 |
|
|
Sep 09 10:43:20 AM UTC 24 |
Sep 09 10:43:22 AM UTC 24 |
27091480 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.4077460521 |
|
|
Sep 09 10:43:17 AM UTC 24 |
Sep 09 10:43:23 AM UTC 24 |
2465447925 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.1982731592 |
|
|
Sep 09 10:43:18 AM UTC 24 |
Sep 09 10:43:23 AM UTC 24 |
451754413 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.2896168491 |
|
|
Sep 09 10:43:23 AM UTC 24 |
Sep 09 10:43:25 AM UTC 24 |
842014789 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_stress_wr.1245775484 |
|
|
Sep 09 10:40:51 AM UTC 24 |
Sep 09 10:43:26 AM UTC 24 |
29265644414 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.390649948 |
|
|
Sep 09 10:44:09 AM UTC 24 |
Sep 09 10:44:21 AM UTC 24 |
1283359617 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.3007332221 |
|
|
Sep 09 10:42:49 AM UTC 24 |
Sep 09 10:43:26 AM UTC 24 |
6216997025 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.1905168526 |
|
|
Sep 09 10:43:24 AM UTC 24 |
Sep 09 10:43:27 AM UTC 24 |
61645717 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.994759883 |
|
|
Sep 09 10:43:23 AM UTC 24 |
Sep 09 10:43:29 AM UTC 24 |
210117436 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.3913233336 |
|
|
Sep 09 10:43:26 AM UTC 24 |
Sep 09 10:43:30 AM UTC 24 |
610040032 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.1916774831 |
|
|
Sep 09 10:43:23 AM UTC 24 |
Sep 09 10:43:31 AM UTC 24 |
860561433 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.729627192 |
|
|
Sep 09 10:42:36 AM UTC 24 |
Sep 09 10:43:35 AM UTC 24 |
1903998361 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_perf.183370513 |
|
|
Sep 09 10:43:24 AM UTC 24 |
Sep 09 10:43:38 AM UTC 24 |
2666090677 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.2158804375 |
|
|
Sep 09 10:41:55 AM UTC 24 |
Sep 09 10:43:40 AM UTC 24 |
2827511437 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.3662703302 |
|
|
Sep 09 10:43:30 AM UTC 24 |
Sep 09 10:43:41 AM UTC 24 |
5862519770 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.2986666707 |
|
|
Sep 09 10:43:38 AM UTC 24 |
Sep 09 10:43:42 AM UTC 24 |
245200471 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.4168589086 |
|
|
Sep 09 10:33:53 AM UTC 24 |
Sep 09 10:43:42 AM UTC 24 |
33256662927 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.4102055172 |
|
|
Sep 09 10:42:33 AM UTC 24 |
Sep 09 10:43:42 AM UTC 24 |
7129887329 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.2270266344 |
|
|
Sep 09 10:43:39 AM UTC 24 |
Sep 09 10:43:43 AM UTC 24 |
146958114 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.1601713923 |
|
|
Sep 09 10:35:22 AM UTC 24 |
Sep 09 10:43:45 AM UTC 24 |
43513485336 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_perf.3181339833 |
|
|
Sep 09 10:43:41 AM UTC 24 |
Sep 09 10:43:46 AM UTC 24 |
745899088 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.884947721 |
|
|
Sep 09 10:43:32 AM UTC 24 |
Sep 09 10:43:46 AM UTC 24 |
1226771676 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.1830032632 |
|
|
Sep 09 10:43:43 AM UTC 24 |
Sep 09 10:43:48 AM UTC 24 |
868903066 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.202136481 |
|
|
Sep 09 10:34:29 AM UTC 24 |
Sep 09 10:43:49 AM UTC 24 |
39340143753 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.498652492 |
|
|
Sep 09 10:43:24 AM UTC 24 |
Sep 09 10:43:49 AM UTC 24 |
681198980 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.1978768981 |
|
|
Sep 09 10:43:47 AM UTC 24 |
Sep 09 10:43:50 AM UTC 24 |
1102675465 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.3816427678 |
|
|
Sep 09 10:43:27 AM UTC 24 |
Sep 09 10:43:50 AM UTC 24 |
4774547704 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.1392969424 |
|
|
Sep 09 10:43:43 AM UTC 24 |
Sep 09 10:43:51 AM UTC 24 |
1146285378 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.2691818057 |
|
|
Sep 09 10:43:46 AM UTC 24 |
Sep 09 10:43:51 AM UTC 24 |
865525773 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.2919748741 |
|
|
Sep 09 10:43:47 AM UTC 24 |
Sep 09 10:43:53 AM UTC 24 |
138383724 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.3933590662 |
|
|
Sep 09 10:43:50 AM UTC 24 |
Sep 09 10:43:53 AM UTC 24 |
142600882 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_alert_test.1707860338 |
|
|
Sep 09 10:43:51 AM UTC 24 |
Sep 09 10:43:54 AM UTC 24 |
23562794 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.3803228383 |
|
|
Sep 09 10:43:49 AM UTC 24 |
Sep 09 10:43:54 AM UTC 24 |
1382517951 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_override.1725176475 |
|
|
Sep 09 10:43:52 AM UTC 24 |
Sep 09 10:43:55 AM UTC 24 |
93516040 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.1509249529 |
|
|
Sep 09 10:43:50 AM UTC 24 |
Sep 09 10:43:56 AM UTC 24 |
586091928 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.4173606118 |
|
|
Sep 09 10:43:50 AM UTC 24 |
Sep 09 10:43:57 AM UTC 24 |
5974745269 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.4111998566 |
|
|
Sep 09 10:43:55 AM UTC 24 |
Sep 09 10:43:57 AM UTC 24 |
81025856 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.774956327 |
|
|
Sep 09 10:42:12 AM UTC 24 |
Sep 09 10:43:59 AM UTC 24 |
11487135969 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.2011757615 |
|
|
Sep 09 10:43:20 AM UTC 24 |
Sep 09 10:44:00 AM UTC 24 |
1729250277 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.552925009 |
|
|
Sep 09 10:43:55 AM UTC 24 |
Sep 09 10:44:02 AM UTC 24 |
286541310 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.1438662973 |
|
|
Sep 09 10:43:21 AM UTC 24 |
Sep 09 10:44:03 AM UTC 24 |
5788042637 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.4235041383 |
|
|
Sep 09 10:43:23 AM UTC 24 |
Sep 09 10:44:06 AM UTC 24 |
1988472624 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.1169065873 |
|
|
Sep 09 10:44:00 AM UTC 24 |
Sep 09 10:44:06 AM UTC 24 |
766366116 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.884403108 |
|
|
Sep 09 10:42:39 AM UTC 24 |
Sep 09 10:44:08 AM UTC 24 |
5821016502 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.570474611 |
|
|
Sep 09 10:43:55 AM UTC 24 |
Sep 09 10:44:12 AM UTC 24 |
515510121 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.2609414568 |
|
|
Sep 09 10:39:25 AM UTC 24 |
Sep 09 10:44:13 AM UTC 24 |
18222369096 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.3373317997 |
|
|
Sep 09 10:43:51 AM UTC 24 |
Sep 09 10:44:15 AM UTC 24 |
1367575479 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.3941480036 |
|
|
Sep 09 10:43:58 AM UTC 24 |
Sep 09 10:44:17 AM UTC 24 |
3046802270 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.2055590361 |
|
|
Sep 09 10:44:18 AM UTC 24 |
Sep 09 10:44:20 AM UTC 24 |
391385538 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.245881849 |
|
|
Sep 09 10:44:20 AM UTC 24 |
Sep 09 10:44:23 AM UTC 24 |
235316720 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.578206582 |
|
|
Sep 09 10:41:53 AM UTC 24 |
Sep 09 10:44:26 AM UTC 24 |
9843554367 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_hrst.2884464873 |
|
|
Sep 09 10:44:21 AM UTC 24 |
Sep 09 10:44:26 AM UTC 24 |
313592305 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.3049410122 |
|
|
Sep 09 10:44:14 AM UTC 24 |
Sep 09 10:44:27 AM UTC 24 |
2326816556 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.4008866601 |
|
|
Sep 09 10:42:39 AM UTC 24 |
Sep 09 10:44:28 AM UTC 24 |
7995657059 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_perf.3252420536 |
|
|
Sep 09 10:44:21 AM UTC 24 |
Sep 09 10:44:28 AM UTC 24 |
636642254 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.64146253 |
|
|
Sep 09 10:33:23 AM UTC 24 |
Sep 09 10:44:29 AM UTC 24 |
30966362772 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.3071374309 |
|
|
Sep 09 10:44:27 AM UTC 24 |
Sep 09 10:44:30 AM UTC 24 |
153512868 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.1234988572 |
|
|
Sep 09 10:43:29 AM UTC 24 |
Sep 09 10:44:31 AM UTC 24 |
2920826393 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.2168160910 |
|
|
Sep 09 10:44:28 AM UTC 24 |
Sep 09 10:44:32 AM UTC 24 |
1853644357 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.3998942512 |
|
|
Sep 09 10:44:21 AM UTC 24 |
Sep 09 10:44:32 AM UTC 24 |
7385717290 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.2890511718 |
|
|
Sep 09 10:44:27 AM UTC 24 |
Sep 09 10:44:33 AM UTC 24 |
559918488 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_alert_test.3177077953 |
|
|
Sep 09 10:44:31 AM UTC 24 |
Sep 09 10:44:33 AM UTC 24 |
34031039 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_nack_txstretch.663454594 |
|
|
Sep 09 10:44:30 AM UTC 24 |
Sep 09 10:44:34 AM UTC 24 |
1140287477 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_watermark.2721494704 |
|
|
Sep 09 10:42:36 AM UTC 24 |
Sep 09 10:44:35 AM UTC 24 |
20220638512 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.1597081457 |
|
|
Sep 09 10:44:29 AM UTC 24 |
Sep 09 10:44:35 AM UTC 24 |
2313506787 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.225972093 |
|
|
Sep 09 10:44:29 AM UTC 24 |
Sep 09 10:44:35 AM UTC 24 |
2195552856 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_override.2177037261 |
|
|
Sep 09 10:44:33 AM UTC 24 |
Sep 09 10:44:35 AM UTC 24 |
80587025 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.2256341315 |
|
|
Sep 09 10:43:27 AM UTC 24 |
Sep 09 10:44:36 AM UTC 24 |
7689316961 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.3994221498 |
|
|
Sep 09 10:44:23 AM UTC 24 |
Sep 09 10:44:37 AM UTC 24 |
1418811307 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.385582795 |
|
|
Sep 09 10:43:58 AM UTC 24 |
Sep 09 10:44:37 AM UTC 24 |
6026447014 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.3854204302 |
|
|
Sep 09 10:44:34 AM UTC 24 |
Sep 09 10:44:37 AM UTC 24 |
83205682 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.963585733 |
|
|
Sep 09 10:43:31 AM UTC 24 |
Sep 09 10:44:37 AM UTC 24 |
6126439778 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.2943965195 |
|
|
Sep 09 10:44:27 AM UTC 24 |
Sep 09 10:44:37 AM UTC 24 |
469161183 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.121224141 |
|
|
Sep 09 10:44:38 AM UTC 24 |
Sep 09 10:44:41 AM UTC 24 |
264112066 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.3573154246 |
|
|
Sep 09 10:44:07 AM UTC 24 |
Sep 09 10:44:42 AM UTC 24 |
4218105718 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.116750271 |
|
|
Sep 09 10:44:36 AM UTC 24 |
Sep 09 10:44:43 AM UTC 24 |
156204885 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.409213210 |
|
|
Sep 09 10:44:36 AM UTC 24 |
Sep 09 10:44:45 AM UTC 24 |
224409909 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.34851411 |
|
|
Sep 09 10:37:24 AM UTC 24 |
Sep 09 10:44:50 AM UTC 24 |
33941262213 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.2784758302 |
|
|
Sep 09 10:44:34 AM UTC 24 |
Sep 09 10:44:50 AM UTC 24 |
220161639 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_stress_wr.1346565492 |
|
|
Sep 09 10:44:38 AM UTC 24 |
Sep 09 10:44:51 AM UTC 24 |
10913111595 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.1351766333 |
|
|
Sep 09 10:44:42 AM UTC 24 |
Sep 09 10:44:51 AM UTC 24 |
1967534752 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.826900925 |
|
|
Sep 09 10:43:54 AM UTC 24 |
Sep 09 10:44:54 AM UTC 24 |
7752230468 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.1833587081 |
|
|
Sep 09 10:44:51 AM UTC 24 |
Sep 09 10:44:54 AM UTC 24 |
672297988 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.2388606614 |
|
|
Sep 09 10:44:52 AM UTC 24 |
Sep 09 10:44:55 AM UTC 24 |
212029344 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_full.1824065097 |
|
|
Sep 09 10:43:56 AM UTC 24 |
Sep 09 10:44:56 AM UTC 24 |
3492410735 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_perf.3099604336 |
|
|
Sep 09 10:44:52 AM UTC 24 |
Sep 09 10:44:56 AM UTC 24 |
785021277 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.58697140 |
|
|
Sep 09 10:44:46 AM UTC 24 |
Sep 09 10:44:57 AM UTC 24 |
1266564031 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.3189989762 |
|
|
Sep 09 10:44:37 AM UTC 24 |
Sep 09 10:44:57 AM UTC 24 |
1248474074 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.554540945 |
|
|
Sep 09 10:44:57 AM UTC 24 |
Sep 09 10:45:01 AM UTC 24 |
126710379 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_hrst.1351859875 |
|
|
Sep 09 10:44:56 AM UTC 24 |
Sep 09 10:45:01 AM UTC 24 |
277505237 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.1427325254 |
|
|
Sep 09 10:44:57 AM UTC 24 |
Sep 09 10:45:02 AM UTC 24 |
593100240 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.1007628720 |
|
|
Sep 09 10:44:59 AM UTC 24 |
Sep 09 10:45:03 AM UTC 24 |
79934880 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_host_perf.3195941537 |
|
|
Sep 09 10:35:18 AM UTC 24 |
Sep 09 10:45:03 AM UTC 24 |
30007702153 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_perf.3644786232 |
|
|
Sep 09 10:44:36 AM UTC 24 |
Sep 09 10:45:05 AM UTC 24 |
10129946181 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.1247902858 |
|
|
Sep 09 10:44:55 AM UTC 24 |
Sep 09 10:45:05 AM UTC 24 |
1146269545 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_alert_test.760145858 |
|
|
Sep 09 10:45:04 AM UTC 24 |
Sep 09 10:45:06 AM UTC 24 |
18984971 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.2447371242 |
|
|
Sep 09 10:45:02 AM UTC 24 |
Sep 09 10:45:07 AM UTC 24 |
1900661441 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.1964849973 |
|
|
Sep 09 10:45:02 AM UTC 24 |
Sep 09 10:45:07 AM UTC 24 |
1305431199 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_override.1724365492 |
|
|
Sep 09 10:45:05 AM UTC 24 |
Sep 09 10:45:07 AM UTC 24 |
40092039 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.2402142996 |
|
|
Sep 09 10:45:04 AM UTC 24 |
Sep 09 10:45:07 AM UTC 24 |
150229760 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.1858843918 |
|
|
Sep 09 10:45:03 AM UTC 24 |
Sep 09 10:45:10 AM UTC 24 |
2002525476 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.2921182244 |
|
|
Sep 09 10:45:07 AM UTC 24 |
Sep 09 10:45:10 AM UTC 24 |
179584779 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/42.i2c_target_stress_wr.2844643155 |
|
|
Sep 09 10:43:27 AM UTC 24 |
Sep 09 10:45:12 AM UTC 24 |
59715764770 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.4293688625 |
|
|
Sep 09 10:44:38 AM UTC 24 |
Sep 09 10:45:12 AM UTC 24 |
1376199628 ps |
T91 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.15374402 |
|
|
Sep 09 10:44:38 AM UTC 24 |
Sep 09 10:45:14 AM UTC 24 |
1251251731 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.2358279929 |
|
|
Sep 09 10:45:08 AM UTC 24 |
Sep 09 10:45:16 AM UTC 24 |
188374184 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.2350602801 |
|
|
Sep 09 10:45:08 AM UTC 24 |
Sep 09 10:45:16 AM UTC 24 |
841504261 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.917737739 |
|
|
Sep 09 10:45:13 AM UTC 24 |
Sep 09 10:45:17 AM UTC 24 |
538767990 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.2409277238 |
|
|
Sep 09 10:44:13 AM UTC 24 |
Sep 09 10:45:17 AM UTC 24 |
15192558094 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_perf_precise.1453000216 |
|
|
Sep 09 10:45:12 AM UTC 24 |
Sep 09 10:45:18 AM UTC 24 |
235275458 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_watermark.4172025116 |
|
|
Sep 09 10:43:52 AM UTC 24 |
Sep 09 10:45:21 AM UTC 24 |
34011745439 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.4278203889 |
|
|
Sep 09 10:44:06 AM UTC 24 |
Sep 09 10:45:22 AM UTC 24 |
5980308427 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_stretch.1108509387 |
|
|
Sep 09 10:45:18 AM UTC 24 |
Sep 09 10:45:23 AM UTC 24 |
3563456388 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_stretch_timeout.2104904227 |
|
|
Sep 09 10:45:13 AM UTC 24 |
Sep 09 10:45:27 AM UTC 24 |
2435598231 ps |
T1563 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_acq.331608307 |
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|
Sep 09 10:45:28 AM UTC 24 |
Sep 09 10:45:30 AM UTC 24 |
257673501 ps |
T1564 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.3428392270 |
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|
Sep 09 10:45:18 AM UTC 24 |
Sep 09 10:45:30 AM UTC 24 |
20376910614 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.1447612749 |
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|
Sep 09 10:44:56 AM UTC 24 |
Sep 09 10:45:31 AM UTC 24 |
2928053909 ps |
T1565 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.2895962967 |
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|
Sep 09 10:44:32 AM UTC 24 |
Sep 09 10:45:32 AM UTC 24 |
1251266481 ps |
T1566 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.3964196228 |
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|
Sep 09 10:45:29 AM UTC 24 |
Sep 09 10:45:32 AM UTC 24 |
177596429 ps |
T1567 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_timeout.3752452072 |
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|
Sep 09 10:45:23 AM UTC 24 |
Sep 09 10:45:34 AM UTC 24 |
2742549422 ps |
T1568 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_host_smoke.3355393439 |
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|
Sep 09 10:45:04 AM UTC 24 |
Sep 09 10:45:37 AM UTC 24 |
2153999043 ps |
T1569 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_perf.2875557965 |
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|
Sep 09 10:45:31 AM UTC 24 |
Sep 09 10:45:37 AM UTC 24 |
398663039 ps |
T1570 |
/workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/45.i2c_target_hrst.1050793364 |
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Sep 09 10:45:33 AM UTC 24 |
Sep 09 10:45:37 AM UTC 24 |
267693189 ps |