Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.09 97.15 89.39 97.22 71.43 94.11 98.44 89.89


Total test records in report: 1848
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html

T848 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_full.251546171 Sep 09 10:30:04 AM UTC 24 Sep 09 10:31:30 AM UTC 24 23873110611 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.607749578 Sep 09 10:32:15 AM UTC 24 Sep 09 10:32:22 AM UTC 24 2534341929 ps
T850 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.2813130520 Sep 09 10:31:28 AM UTC 24 Sep 09 10:31:31 AM UTC 24 436019837 ps
T851 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.2872507871 Sep 09 10:31:25 AM UTC 24 Sep 09 10:31:31 AM UTC 24 1730399988 ps
T852 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_error_intr.2527937219 Sep 09 10:31:29 AM UTC 24 Sep 09 10:31:32 AM UTC 24 570165598 ps
T853 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.3051568042 Sep 09 10:31:08 AM UTC 24 Sep 09 10:31:33 AM UTC 24 8817030368 ps
T854 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.1984567946 Sep 09 10:31:28 AM UTC 24 Sep 09 10:31:33 AM UTC 24 528565722 ps
T855 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.263624908 Sep 09 10:30:30 AM UTC 24 Sep 09 10:31:34 AM UTC 24 12192468327 ps
T856 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_perf_precise.4294269092 Sep 09 10:30:32 AM UTC 24 Sep 09 10:31:34 AM UTC 24 2764894954 ps
T857 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_stretch_timeout.1523921479 Sep 09 10:30:32 AM UTC 24 Sep 09 10:31:35 AM UTC 24 2688608429 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.1207693095 Sep 09 10:31:32 AM UTC 24 Sep 09 10:31:35 AM UTC 24 397477171 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.78526592 Sep 09 10:31:01 AM UTC 24 Sep 09 10:31:37 AM UTC 24 1530982566 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.3723077253 Sep 09 10:31:36 AM UTC 24 Sep 09 10:31:38 AM UTC 24 215305778 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.1236923704 Sep 09 10:31:36 AM UTC 24 Sep 09 10:31:39 AM UTC 24 318672984 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.1337577559 Sep 09 10:31:31 AM UTC 24 Sep 09 10:31:39 AM UTC 24 9666376954 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.4222929561 Sep 09 10:31:28 AM UTC 24 Sep 09 10:31:40 AM UTC 24 941285101 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.2320094370 Sep 09 10:31:32 AM UTC 24 Sep 09 10:31:43 AM UTC 24 6747225573 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.1504568719 Sep 09 10:31:30 AM UTC 24 Sep 09 10:31:44 AM UTC 24 4289645112 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.2911487491 Sep 09 10:31:38 AM UTC 24 Sep 09 10:31:44 AM UTC 24 570586126 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_perf.1352675107 Sep 09 10:31:36 AM UTC 24 Sep 09 10:31:44 AM UTC 24 2327149238 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_hrst.2366023627 Sep 09 10:31:39 AM UTC 24 Sep 09 10:31:45 AM UTC 24 341010047 ps
T256 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.2643780058 Sep 09 10:31:40 AM UTC 24 Sep 09 10:31:46 AM UTC 24 5260534255 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.4217998819 Sep 09 10:31:41 AM UTC 24 Sep 09 10:31:46 AM UTC 24 381067292 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.2898320718 Sep 09 10:31:34 AM UTC 24 Sep 09 10:31:47 AM UTC 24 2321782667 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.2395535749 Sep 09 10:31:44 AM UTC 24 Sep 09 10:31:47 AM UTC 24 171374119 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_alert_test.1611413337 Sep 09 10:31:47 AM UTC 24 Sep 09 10:31:49 AM UTC 24 33852855 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.3772985012 Sep 09 10:31:44 AM UTC 24 Sep 09 10:31:50 AM UTC 24 3496995182 ps
T149 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_override.2929201597 Sep 09 10:31:48 AM UTC 24 Sep 09 10:31:50 AM UTC 24 30095083 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.299831882 Sep 09 10:31:45 AM UTC 24 Sep 09 10:31:50 AM UTC 24 466985808 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.2855296932 Sep 09 10:31:29 AM UTC 24 Sep 09 10:31:51 AM UTC 24 839208808 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.3853748073 Sep 09 10:31:03 AM UTC 24 Sep 09 10:31:51 AM UTC 24 15086178298 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.1521063089 Sep 09 10:31:44 AM UTC 24 Sep 09 10:31:51 AM UTC 24 146006544 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.2718343965 Sep 09 10:31:49 AM UTC 24 Sep 09 10:31:51 AM UTC 24 75788684 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.1873408882 Sep 09 10:31:46 AM UTC 24 Sep 09 10:31:52 AM UTC 24 598659891 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.2595147191 Sep 09 10:31:31 AM UTC 24 Sep 09 10:31:52 AM UTC 24 20859267893 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.1090164663 Sep 09 10:31:51 AM UTC 24 Sep 09 10:31:54 AM UTC 24 80681026 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.3862129594 Sep 09 10:31:53 AM UTC 24 Sep 09 10:31:57 AM UTC 24 609858965 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.1025822111 Sep 09 10:31:25 AM UTC 24 Sep 09 10:31:58 AM UTC 24 1747703178 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.304476364 Sep 09 10:31:50 AM UTC 24 Sep 09 10:31:58 AM UTC 24 225266189 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.2843268077 Sep 09 10:31:51 AM UTC 24 Sep 09 10:31:59 AM UTC 24 832358972 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.211043296 Sep 09 10:31:53 AM UTC 24 Sep 09 10:32:08 AM UTC 24 925182826 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.3850204050 Sep 09 10:31:58 AM UTC 24 Sep 09 10:32:08 AM UTC 24 322580142 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.53289141 Sep 09 10:31:59 AM UTC 24 Sep 09 10:32:09 AM UTC 24 3749691213 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.2335674318 Sep 09 10:25:41 AM UTC 24 Sep 09 10:32:10 AM UTC 24 28199843182 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.2086815976 Sep 09 10:30:31 AM UTC 24 Sep 09 10:32:12 AM UTC 24 8017417977 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.2493958295 Sep 09 10:31:15 AM UTC 24 Sep 09 10:32:13 AM UTC 24 8985395285 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.2702968933 Sep 09 10:32:10 AM UTC 24 Sep 09 10:32:14 AM UTC 24 211708459 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.3022098510 Sep 09 10:32:11 AM UTC 24 Sep 09 10:32:14 AM UTC 24 1020843832 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.4045546778 Sep 09 10:30:58 AM UTC 24 Sep 09 10:32:14 AM UTC 24 12421052109 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.2118506876 Sep 09 10:31:53 AM UTC 24 Sep 09 10:32:22 AM UTC 24 546353731 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.4102579954 Sep 09 10:32:19 AM UTC 24 Sep 09 10:32:22 AM UTC 24 359903107 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.640859859 Sep 09 10:32:20 AM UTC 24 Sep 09 10:32:23 AM UTC 24 197551469 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.3373338557 Sep 09 10:32:16 AM UTC 24 Sep 09 10:32:26 AM UTC 24 563111927 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.907299885 Sep 09 10:30:58 AM UTC 24 Sep 09 10:32:26 AM UTC 24 7429848516 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.1150966465 Sep 09 10:32:22 AM UTC 24 Sep 09 10:32:27 AM UTC 24 94306129 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/17.i2c_target_intr_stress_wr.3978862961 Sep 09 10:28:36 AM UTC 24 Sep 09 10:32:27 AM UTC 24 18708431005 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.1325853966 Sep 09 10:32:22 AM UTC 24 Sep 09 10:32:27 AM UTC 24 1672651090 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.2820953451 Sep 09 10:32:23 AM UTC 24 Sep 09 10:32:28 AM UTC 24 2194830984 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_alert_test.3253460822 Sep 09 10:33:35 AM UTC 24 Sep 09 10:33:37 AM UTC 24 24924753 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_alert_test.4150967554 Sep 09 10:32:26 AM UTC 24 Sep 09 10:32:28 AM UTC 24 26112538 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.4145448978 Sep 09 10:32:23 AM UTC 24 Sep 09 10:32:29 AM UTC 24 631538210 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_override.2702401945 Sep 09 10:32:28 AM UTC 24 Sep 09 10:32:30 AM UTC 24 51390031 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.3983871364 Sep 09 10:32:29 AM UTC 24 Sep 09 10:32:31 AM UTC 24 57927252 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.2702829845 Sep 09 10:32:29 AM UTC 24 Sep 09 10:32:34 AM UTC 24 707522662 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.766432106 Sep 09 10:29:32 AM UTC 24 Sep 09 10:32:35 AM UTC 24 6502190153 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.941353291 Sep 09 10:31:56 AM UTC 24 Sep 09 10:32:35 AM UTC 24 20302668198 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.3569637919 Sep 09 10:32:32 AM UTC 24 Sep 09 10:32:36 AM UTC 24 76451105 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.461672802 Sep 09 10:31:59 AM UTC 24 Sep 09 10:32:37 AM UTC 24 4064939808 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.3509549787 Sep 09 10:32:29 AM UTC 24 Sep 09 10:32:37 AM UTC 24 540405172 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.2151814429 Sep 09 10:29:29 AM UTC 24 Sep 09 10:32:42 AM UTC 24 15027253500 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.2293884915 Sep 09 10:31:27 AM UTC 24 Sep 09 10:32:45 AM UTC 24 2977824198 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.3826410189 Sep 09 10:32:37 AM UTC 24 Sep 09 10:32:48 AM UTC 24 44366321332 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.377699224 Sep 09 10:32:38 AM UTC 24 Sep 09 10:32:49 AM UTC 24 920463907 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.1388834701 Sep 09 10:32:35 AM UTC 24 Sep 09 10:32:50 AM UTC 24 1912341608 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.3088273324 Sep 09 10:32:46 AM UTC 24 Sep 09 10:32:51 AM UTC 24 3670222719 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.1431525724 Sep 09 10:31:29 AM UTC 24 Sep 09 10:32:52 AM UTC 24 1945208079 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.3001934911 Sep 09 10:32:40 AM UTC 24 Sep 09 10:32:53 AM UTC 24 3100405636 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.167091783 Sep 09 10:32:50 AM UTC 24 Sep 09 10:32:53 AM UTC 24 174622482 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.923138983 Sep 09 10:32:44 AM UTC 24 Sep 09 10:32:53 AM UTC 24 3066773550 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.571360743 Sep 09 10:32:51 AM UTC 24 Sep 09 10:32:54 AM UTC 24 1605486367 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.2806764482 Sep 09 10:31:00 AM UTC 24 Sep 09 10:32:55 AM UTC 24 5470938708 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_hrst.259145861 Sep 09 10:32:54 AM UTC 24 Sep 09 10:32:58 AM UTC 24 1367322571 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.653727613 Sep 09 10:32:56 AM UTC 24 Sep 09 10:32:58 AM UTC 24 313157749 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.1971878487 Sep 09 10:31:48 AM UTC 24 Sep 09 10:33:00 AM UTC 24 3589791588 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.1438684438 Sep 09 10:32:56 AM UTC 24 Sep 09 10:33:00 AM UTC 24 1117157443 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.1556323447 Sep 09 10:32:53 AM UTC 24 Sep 09 10:33:01 AM UTC 24 6541847482 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.1108549713 Sep 09 10:32:28 AM UTC 24 Sep 09 10:33:01 AM UTC 24 3150839705 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_perf.1423877173 Sep 09 10:32:52 AM UTC 24 Sep 09 10:33:01 AM UTC 24 1292802516 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.2887699462 Sep 09 10:32:49 AM UTC 24 Sep 09 10:33:02 AM UTC 24 4563384698 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_perf.2523054974 Sep 09 10:32:30 AM UTC 24 Sep 09 10:33:02 AM UTC 24 8086220964 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.2811070241 Sep 09 10:32:59 AM UTC 24 Sep 09 10:33:03 AM UTC 24 538514320 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_alert_test.3610048544 Sep 09 10:33:01 AM UTC 24 Sep 09 10:33:03 AM UTC 24 51017650 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.1422031630 Sep 09 10:31:28 AM UTC 24 Sep 09 10:33:04 AM UTC 24 1984305766 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_override.2082880857 Sep 09 10:33:02 AM UTC 24 Sep 09 10:33:04 AM UTC 24 80939742 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_nack_txstretch.3157791394 Sep 09 10:33:01 AM UTC 24 Sep 09 10:33:05 AM UTC 24 597765761 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.2308742398 Sep 09 10:32:59 AM UTC 24 Sep 09 10:33:05 AM UTC 24 231746992 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.3250579756 Sep 09 10:33:03 AM UTC 24 Sep 09 10:33:06 AM UTC 24 91540298 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.3260013308 Sep 09 10:32:54 AM UTC 24 Sep 09 10:33:06 AM UTC 24 2676679653 ps
T90 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.2031191038 Sep 09 10:32:37 AM UTC 24 Sep 09 10:33:06 AM UTC 24 863912741 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.2982211602 Sep 09 10:33:01 AM UTC 24 Sep 09 10:33:07 AM UTC 24 2200731054 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.721291456 Sep 09 10:33:01 AM UTC 24 Sep 09 10:33:07 AM UTC 24 1951540014 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.201269246 Sep 09 10:31:48 AM UTC 24 Sep 09 10:33:10 AM UTC 24 5078950704 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.730453926 Sep 09 10:32:00 AM UTC 24 Sep 09 10:33:10 AM UTC 24 16167388989 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.2344086035 Sep 09 10:33:04 AM UTC 24 Sep 09 10:33:16 AM UTC 24 619216206 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.4072453306 Sep 09 10:33:11 AM UTC 24 Sep 09 10:33:18 AM UTC 24 992954386 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.990927984 Sep 09 10:31:49 AM UTC 24 Sep 09 10:33:20 AM UTC 24 2747366339 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.1041325214 Sep 09 10:33:07 AM UTC 24 Sep 09 10:33:21 AM UTC 24 740437940 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.3990847580 Sep 09 10:33:10 AM UTC 24 Sep 09 10:33:21 AM UTC 24 1806707664 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.3831119877 Sep 09 10:33:06 AM UTC 24 Sep 09 10:33:22 AM UTC 24 649794563 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.776339674 Sep 09 10:33:08 AM UTC 24 Sep 09 10:33:24 AM UTC 24 736317498 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.3273734741 Sep 09 10:33:21 AM UTC 24 Sep 09 10:33:25 AM UTC 24 269726262 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.2937328880 Sep 09 10:33:22 AM UTC 24 Sep 09 10:33:25 AM UTC 24 194389186 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_mode_toggle.772102785 Sep 09 10:33:25 AM UTC 24 Sep 09 10:33:28 AM UTC 24 81373282 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.1644064789 Sep 09 10:33:20 AM UTC 24 Sep 09 10:33:29 AM UTC 24 14147809847 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.1784639383 Sep 09 10:33:23 AM UTC 24 Sep 09 10:33:30 AM UTC 24 5422586213 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_perf.3834823888 Sep 09 10:33:23 AM UTC 24 Sep 09 10:33:31 AM UTC 24 573200418 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.3467972376 Sep 09 10:33:29 AM UTC 24 Sep 09 10:33:32 AM UTC 24 409211906 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.2082047936 Sep 09 10:33:17 AM UTC 24 Sep 09 10:33:34 AM UTC 24 4403642553 ps
T264 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.769736560 Sep 09 10:33:26 AM UTC 24 Sep 09 10:33:34 AM UTC 24 602118477 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/22.i2c_host_perf.2438076327 Sep 09 10:31:00 AM UTC 24 Sep 09 10:33:34 AM UTC 24 49640753718 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.3585147679 Sep 09 10:33:02 AM UTC 24 Sep 09 10:33:35 AM UTC 24 5162342946 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.2989297804 Sep 09 10:33:29 AM UTC 24 Sep 09 10:33:36 AM UTC 24 2043357829 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.1597613289 Sep 09 10:33:31 AM UTC 24 Sep 09 10:33:37 AM UTC 24 211459615 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.95974784 Sep 09 10:33:31 AM UTC 24 Sep 09 10:33:38 AM UTC 24 577832363 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.3847402230 Sep 09 10:33:35 AM UTC 24 Sep 09 10:33:38 AM UTC 24 479431911 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.3722518326 Sep 09 10:31:51 AM UTC 24 Sep 09 10:33:39 AM UTC 24 17049982342 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.2004788870 Sep 09 10:33:32 AM UTC 24 Sep 09 10:33:39 AM UTC 24 1207641655 ps
T150 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_override.2087709072 Sep 09 10:33:37 AM UTC 24 Sep 09 10:33:39 AM UTC 24 30080224 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.635363709 Sep 09 10:33:35 AM UTC 24 Sep 09 10:33:40 AM UTC 24 1405878727 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.794347562 Sep 09 10:33:03 AM UTC 24 Sep 09 10:33:40 AM UTC 24 2194239437 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.4140630641 Sep 09 10:33:02 AM UTC 24 Sep 09 10:33:40 AM UTC 24 3382108522 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.2735691244 Sep 09 10:33:39 AM UTC 24 Sep 09 10:33:42 AM UTC 24 159431318 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.1897289592 Sep 09 10:33:08 AM UTC 24 Sep 09 10:34:52 AM UTC 24 26454352802 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_perf_precise.3010780615 Sep 09 10:30:04 AM UTC 24 Sep 09 10:33:42 AM UTC 24 24447205049 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.3297461024 Sep 09 10:33:40 AM UTC 24 Sep 09 10:33:45 AM UTC 24 219990188 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.2503497364 Sep 09 10:33:39 AM UTC 24 Sep 09 10:33:46 AM UTC 24 521983060 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.1538947386 Sep 09 10:32:28 AM UTC 24 Sep 09 10:33:47 AM UTC 24 8055929023 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.3762958615 Sep 09 10:33:07 AM UTC 24 Sep 09 10:33:47 AM UTC 24 1111139534 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.690460361 Sep 09 10:33:39 AM UTC 24 Sep 09 10:33:48 AM UTC 24 1263700183 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.4282186040 Sep 09 10:32:30 AM UTC 24 Sep 09 10:33:48 AM UTC 24 11864118019 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.706854118 Sep 09 10:32:52 AM UTC 24 Sep 09 10:33:50 AM UTC 24 8688289953 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.721377838 Sep 09 10:33:41 AM UTC 24 Sep 09 10:33:51 AM UTC 24 644241821 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.3392249696 Sep 09 10:34:52 AM UTC 24 Sep 09 10:34:59 AM UTC 24 1446766631 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.1227967419 Sep 09 10:31:26 AM UTC 24 Sep 09 10:33:53 AM UTC 24 10022209967 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.680051375 Sep 09 10:33:51 AM UTC 24 Sep 09 10:33:54 AM UTC 24 299118996 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.2958428401 Sep 09 10:33:43 AM UTC 24 Sep 09 10:33:54 AM UTC 24 755246199 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.325898684 Sep 09 10:33:52 AM UTC 24 Sep 09 10:33:55 AM UTC 24 195003206 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.2384983145 Sep 09 10:33:47 AM UTC 24 Sep 09 10:33:56 AM UTC 24 3603022230 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.2710461842 Sep 09 10:32:28 AM UTC 24 Sep 09 10:33:57 AM UTC 24 2393666200 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.623590095 Sep 09 10:33:48 AM UTC 24 Sep 09 10:33:57 AM UTC 24 5031069384 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.1532160803 Sep 09 10:33:58 AM UTC 24 Sep 09 10:34:01 AM UTC 24 115717336 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.198092243 Sep 09 10:33:54 AM UTC 24 Sep 09 10:34:01 AM UTC 24 1742888717 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_perf.646619724 Sep 09 10:33:53 AM UTC 24 Sep 09 10:34:02 AM UTC 24 546778979 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.1241529171 Sep 09 10:33:58 AM UTC 24 Sep 09 10:34:02 AM UTC 24 336014991 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.2263752726 Sep 09 10:33:49 AM UTC 24 Sep 09 10:34:02 AM UTC 24 4774641629 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_alert_test.2626610048 Sep 09 10:34:03 AM UTC 24 Sep 09 10:34:05 AM UTC 24 17811597 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_perf.2196435821 Sep 09 10:33:40 AM UTC 24 Sep 09 10:34:06 AM UTC 24 5515817881 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.2779466751 Sep 09 10:34:44 AM UTC 24 Sep 09 10:34:51 AM UTC 24 675079796 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.779681345 Sep 09 10:34:02 AM UTC 24 Sep 09 10:34:07 AM UTC 24 2178050366 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.1629531697 Sep 09 10:34:01 AM UTC 24 Sep 09 10:34:07 AM UTC 24 213669002 ps
T54 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.3346307058 Sep 09 10:34:02 AM UTC 24 Sep 09 10:34:08 AM UTC 24 1006649083 ps
T48 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.229034215 Sep 09 10:34:03 AM UTC 24 Sep 09 10:34:08 AM UTC 24 1689127175 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_override.3297839453 Sep 09 10:34:06 AM UTC 24 Sep 09 10:34:08 AM UTC 24 27020937 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.3761433253 Sep 09 10:33:57 AM UTC 24 Sep 09 10:34:11 AM UTC 24 463686556 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.3029346098 Sep 09 10:34:09 AM UTC 24 Sep 09 10:34:11 AM UTC 24 229737578 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.477534686 Sep 09 10:34:12 AM UTC 24 Sep 09 10:34:15 AM UTC 24 53777817 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.793140630 Sep 09 10:34:09 AM UTC 24 Sep 09 10:34:16 AM UTC 24 329943928 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.3498128912 Sep 09 10:33:46 AM UTC 24 Sep 09 10:34:17 AM UTC 24 23497382375 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.2187642475 Sep 09 10:34:09 AM UTC 24 Sep 09 10:34:19 AM UTC 24 730573779 ps
T1008 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_perf.1512671730 Sep 09 10:34:12 AM UTC 24 Sep 09 10:34:19 AM UTC 24 601569430 ps
T1009 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.2725168691 Sep 09 10:34:16 AM UTC 24 Sep 09 10:34:20 AM UTC 24 132860512 ps
T1010 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.4273103915 Sep 09 10:33:02 AM UTC 24 Sep 09 10:34:21 AM UTC 24 3130195689 ps
T1011 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.1893993390 Sep 09 10:34:20 AM UTC 24 Sep 09 10:34:25 AM UTC 24 1629090165 ps
T1012 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.3240254898 Sep 09 10:33:41 AM UTC 24 Sep 09 10:34:25 AM UTC 24 915191367 ps
T1013 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.311277594 Sep 09 10:34:23 AM UTC 24 Sep 09 10:34:26 AM UTC 24 256760304 ps
T1014 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.1475319737 Sep 09 10:34:21 AM UTC 24 Sep 09 10:34:26 AM UTC 24 1567355911 ps
T1015 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/18.i2c_host_perf_precise.1874923201 Sep 09 10:28:57 AM UTC 24 Sep 09 10:34:27 AM UTC 24 6041994162 ps
T1016 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.3497308220 Sep 09 10:34:27 AM UTC 24 Sep 09 10:34:29 AM UTC 24 146729634 ps
T1017 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.3290878920 Sep 09 10:34:13 AM UTC 24 Sep 09 10:34:29 AM UTC 24 608548850 ps
T1018 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.2357598094 Sep 09 10:33:36 AM UTC 24 Sep 09 10:34:29 AM UTC 24 1198265392 ps
T1019 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.402939653 Sep 09 10:34:27 AM UTC 24 Sep 09 10:34:30 AM UTC 24 514794921 ps
T1020 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.3203332692 Sep 09 10:34:20 AM UTC 24 Sep 09 10:34:54 AM UTC 24 3632996708 ps
T1021 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.4246787734 Sep 09 10:34:19 AM UTC 24 Sep 09 10:34:34 AM UTC 24 20687276342 ps
T1022 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.3131457746 Sep 09 10:34:17 AM UTC 24 Sep 09 10:34:35 AM UTC 24 1032507789 ps
T1023 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.2144518057 Sep 09 10:34:26 AM UTC 24 Sep 09 10:34:36 AM UTC 24 3056954204 ps
T1024 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_perf.271880932 Sep 09 10:34:28 AM UTC 24 Sep 09 10:34:36 AM UTC 24 4531402528 ps
T1025 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.3552977020 Sep 09 10:34:33 AM UTC 24 Sep 09 10:34:38 AM UTC 24 2779064205 ps
T1026 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.2028548843 Sep 09 10:34:34 AM UTC 24 Sep 09 10:34:38 AM UTC 24 640907831 ps
T1027 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/20.i2c_host_fifo_watermark.4112747429 Sep 09 10:30:02 AM UTC 24 Sep 09 10:34:39 AM UTC 24 6410560767 ps
T1028 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_nack_txstretch.3959153324 Sep 09 10:34:37 AM UTC 24 Sep 09 10:34:40 AM UTC 24 958893591 ps
T1029 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.3522128124 Sep 09 10:34:34 AM UTC 24 Sep 09 10:34:40 AM UTC 24 125549140 ps
T1030 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.3367261071 Sep 09 10:34:36 AM UTC 24 Sep 09 10:34:40 AM UTC 24 3673728449 ps
T1031 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.2482554203 Sep 09 10:34:06 AM UTC 24 Sep 09 10:34:40 AM UTC 24 1783354312 ps
T1032 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.3333468769 Sep 09 10:34:36 AM UTC 24 Sep 09 10:34:41 AM UTC 24 458547255 ps
T1033 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_alert_test.2519500322 Sep 09 10:34:39 AM UTC 24 Sep 09 10:34:41 AM UTC 24 20359496 ps
T151 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_override.3811223254 Sep 09 10:34:40 AM UTC 24 Sep 09 10:34:42 AM UTC 24 99863906 ps
T1034 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.44545156 Sep 09 10:34:30 AM UTC 24 Sep 09 10:34:42 AM UTC 24 1661918949 ps
T1035 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.292012962 Sep 09 10:34:37 AM UTC 24 Sep 09 10:34:43 AM UTC 24 523015320 ps
T1036 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.1742939407 Sep 09 10:34:41 AM UTC 24 Sep 09 10:34:44 AM UTC 24 735520870 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.3777110958 Sep 09 10:34:30 AM UTC 24 Sep 09 10:34:46 AM UTC 24 1267124418 ps
T1037 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.1216851695 Sep 09 10:34:42 AM UTC 24 Sep 09 10:34:48 AM UTC 24 476569621 ps
T1038 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_host_perf.872620269 Sep 09 10:30:31 AM UTC 24 Sep 09 10:34:48 AM UTC 24 25914681996 ps
T1039 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.2360894197 Sep 09 10:34:41 AM UTC 24 Sep 09 10:35:00 AM UTC 24 289431070 ps
T1040 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_host_perf.3513272560 Sep 09 10:31:29 AM UTC 24 Sep 09 10:35:01 AM UTC 24 18480765007 ps
T1041 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.257523277 Sep 09 10:33:06 AM UTC 24 Sep 09 10:35:02 AM UTC 24 2486881068 ps
T1042 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.181084660 Sep 09 10:34:53 AM UTC 24 Sep 09 10:35:04 AM UTC 24 6261733818 ps
T1043 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.80597918 Sep 09 10:33:05 AM UTC 24 Sep 09 10:35:04 AM UTC 24 6472216723 ps
T1044 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.3104446723 Sep 09 10:35:01 AM UTC 24 Sep 09 10:35:05 AM UTC 24 197890192 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.3384055721 Sep 09 10:35:02 AM UTC 24 Sep 09 10:35:05 AM UTC 24 420319121 ps
T1045 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.1987247613 Sep 09 10:34:44 AM UTC 24 Sep 09 10:35:05 AM UTC 24 2949888637 ps
T1046 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.3350722589 Sep 09 10:30:48 AM UTC 24 Sep 09 10:35:07 AM UTC 24 25491513372 ps
T1047 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/38.i2c_target_hrst.3399536614 Sep 09 10:41:09 AM UTC 24 Sep 09 10:41:14 AM UTC 24 327367328 ps
T1048 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.1443870066 Sep 09 10:33:38 AM UTC 24 Sep 09 10:35:09 AM UTC 24 9660077435 ps
T1049 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.2928404167 Sep 09 10:36:11 AM UTC 24 Sep 09 10:36:14 AM UTC 24 2018443692 ps
T1050 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_perf.2381343192 Sep 09 10:35:05 AM UTC 24 Sep 09 10:35:10 AM UTC 24 1744165476 ps
T1051 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.3561208318 Sep 09 10:34:47 AM UTC 24 Sep 09 10:35:11 AM UTC 24 784796114 ps
T1052 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.1083561732 Sep 09 10:35:08 AM UTC 24 Sep 09 10:35:13 AM UTC 24 565295898 ps
T1053 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.1018983562 Sep 09 10:35:10 AM UTC 24 Sep 09 10:35:13 AM UTC 24 161867235 ps
T1054 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.1538795907 Sep 09 10:31:34 AM UTC 24 Sep 09 10:35:14 AM UTC 24 18443853460 ps
T1055 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.3827570274 Sep 09 10:35:10 AM UTC 24 Sep 09 10:35:14 AM UTC 24 68132181 ps
T1056 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.2095046539 Sep 09 10:35:00 AM UTC 24 Sep 09 10:35:14 AM UTC 24 1383936029 ps
T1057 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.1009013309 Sep 09 10:35:06 AM UTC 24 Sep 09 10:35:14 AM UTC 24 2919365057 ps
T1058 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.3808986444 Sep 09 10:35:07 AM UTC 24 Sep 09 10:35:15 AM UTC 24 712431782 ps
T1059 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.639159992 Sep 09 10:35:10 AM UTC 24 Sep 09 10:35:15 AM UTC 24 3838563939 ps
T1060 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_alert_test.2629999552 Sep 09 10:35:14 AM UTC 24 Sep 09 10:35:16 AM UTC 24 40383270 ps
T1061 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.1887292368 Sep 09 10:36:04 AM UTC 24 Sep 09 10:36:18 AM UTC 24 7201134721 ps
T1062 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_host_override.3847499888 Sep 09 10:35:16 AM UTC 24 Sep 09 10:35:18 AM UTC 24 72955774 ps
T1063 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.3294707817 Sep 09 10:35:12 AM UTC 24 Sep 09 10:35:18 AM UTC 24 1068658658 ps
T1064 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_nack_txstretch.3098224738 Sep 09 10:35:14 AM UTC 24 Sep 09 10:35:18 AM UTC 24 720809940 ps
T1065 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.2417257150 Sep 09 10:35:16 AM UTC 24 Sep 09 10:35:19 AM UTC 24 181943006 ps
T1066 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.1030456503 Sep 09 10:35:13 AM UTC 24 Sep 09 10:35:19 AM UTC 24 5481096852 ps
T1067 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.3734131651 Sep 09 10:34:39 AM UTC 24 Sep 09 10:35:20 AM UTC 24 2150582802 ps
T1068 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.1310862148 Sep 09 10:34:45 AM UTC 24 Sep 09 10:35:20 AM UTC 24 2874857002 ps
T1069 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.278195773 Sep 09 10:35:59 AM UTC 24 Sep 09 10:36:16 AM UTC 24 2463877905 ps
T1070 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.1888021319 Sep 09 10:34:07 AM UTC 24 Sep 09 10:35:21 AM UTC 24 4307425587 ps
T1071 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.1879140588 Sep 09 10:34:09 AM UTC 24 Sep 09 10:35:23 AM UTC 24 5405191170 ps
T1072 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.3525578022 Sep 09 10:35:20 AM UTC 24 Sep 09 10:35:26 AM UTC 24 168434920 ps
T1073 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.2701729007 Sep 09 10:35:17 AM UTC 24 Sep 09 10:35:28 AM UTC 24 419260353 ps
T1074 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.2680320356 Sep 09 10:33:40 AM UTC 24 Sep 09 10:35:31 AM UTC 24 2083478522 ps
T1075 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.1710974186 Sep 09 10:34:07 AM UTC 24 Sep 09 10:35:32 AM UTC 24 4652808811 ps
T1076 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.3608102433 Sep 09 10:35:18 AM UTC 24 Sep 09 10:35:33 AM UTC 24 794233255 ps
T1077 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.1785193360 Sep 09 10:35:19 AM UTC 24 Sep 09 10:35:34 AM UTC 24 784991197 ps
T1078 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/0.i2c_host_perf_precise.719121779 Sep 09 10:21:13 AM UTC 24 Sep 09 10:35:35 AM UTC 24 24293307613 ps
T1079 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.2220266066 Sep 09 10:35:22 AM UTC 24 Sep 09 10:35:36 AM UTC 24 667821257 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.997590126 Sep 09 10:35:34 AM UTC 24 Sep 09 10:35:37 AM UTC 24 854573494 ps
T1080 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.4217444387 Sep 09 10:34:49 AM UTC 24 Sep 09 10:35:38 AM UTC 24 974580880 ps
T1081 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.4111338380 Sep 09 10:35:35 AM UTC 24 Sep 09 10:35:38 AM UTC 24 228390269 ps
T1082 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.2234914799 Sep 09 10:35:29 AM UTC 24 Sep 09 10:35:40 AM UTC 24 6379744949 ps
T1083 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_target_hrst.125414059 Sep 09 10:35:38 AM UTC 24 Sep 09 10:35:42 AM UTC 24 248100860 ps
T1084 /workspaces/repo/scratch/os_regression_2024_09_08/i2c-sim-vcs/coverage/default/30.i2c_target_perf.124023888 Sep 09 10:35:36 AM UTC 24 Sep 09 10:35:45 AM UTC 24 1413644168 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%