| T172 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.819030097 |
|
|
Aug 27 06:55:36 AM UTC 24 |
Aug 27 06:55:54 AM UTC 24 |
1947585162 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.388741322 |
|
|
Aug 27 06:55:31 AM UTC 24 |
Aug 27 06:55:54 AM UTC 24 |
1412440126 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_jtag_state_failure.3658285976 |
|
|
Aug 27 06:55:01 AM UTC 24 |
Aug 27 06:55:55 AM UTC 24 |
2924835409 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.2471657669 |
|
|
Aug 27 06:55:46 AM UTC 24 |
Aug 27 06:55:55 AM UTC 24 |
181122571 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.424807102 |
|
|
Aug 27 06:55:34 AM UTC 24 |
Aug 27 06:55:56 AM UTC 24 |
2951598370 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.3755142475 |
|
|
Aug 27 06:55:53 AM UTC 24 |
Aug 27 06:55:57 AM UTC 24 |
73446350 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_post_trans.1102482330 |
|
|
Aug 27 06:55:27 AM UTC 24 |
Aug 27 06:55:57 AM UTC 24 |
2789244159 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.3962052476 |
|
|
Aug 27 06:55:42 AM UTC 24 |
Aug 27 06:55:57 AM UTC 24 |
421218659 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_state_failure.1878595959 |
|
|
Aug 27 06:55:11 AM UTC 24 |
Aug 27 06:55:58 AM UTC 24 |
8792563413 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.2783243622 |
|
|
Aug 27 06:55:57 AM UTC 24 |
Aug 27 06:55:59 AM UTC 24 |
110766354 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.2061090357 |
|
|
Aug 27 06:55:44 AM UTC 24 |
Aug 27 06:56:00 AM UTC 24 |
1471609439 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.495424096 |
|
|
Aug 27 06:55:26 AM UTC 24 |
Aug 27 06:56:00 AM UTC 24 |
249257897 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.631656525 |
|
|
Aug 27 06:55:44 AM UTC 24 |
Aug 27 06:56:00 AM UTC 24 |
424242661 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.1583043726 |
|
|
Aug 27 06:55:58 AM UTC 24 |
Aug 27 06:56:00 AM UTC 24 |
15282061 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.78647174 |
|
|
Aug 27 06:55:13 AM UTC 24 |
Aug 27 06:56:00 AM UTC 24 |
3315641491 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.57447386 |
|
|
Aug 27 06:55:46 AM UTC 24 |
Aug 27 06:56:01 AM UTC 24 |
2672297745 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.73404877 |
|
|
Aug 27 06:55:55 AM UTC 24 |
Aug 27 06:56:01 AM UTC 24 |
152125819 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.3306857384 |
|
|
Aug 27 06:55:58 AM UTC 24 |
Aug 27 06:56:01 AM UTC 24 |
94896558 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.343321348 |
|
|
Aug 27 06:55:53 AM UTC 24 |
Aug 27 06:56:02 AM UTC 24 |
605879904 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.3999749576 |
|
|
Aug 27 06:55:51 AM UTC 24 |
Aug 27 06:56:02 AM UTC 24 |
719726307 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.549085661 |
|
|
Aug 27 06:55:55 AM UTC 24 |
Aug 27 06:56:03 AM UTC 24 |
653207274 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_jtag_errors.1095074388 |
|
|
Aug 27 06:54:51 AM UTC 24 |
Aug 27 06:56:04 AM UTC 24 |
8725231525 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.3197140778 |
|
|
Aug 27 06:55:46 AM UTC 24 |
Aug 27 06:56:04 AM UTC 24 |
1281307893 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.1149298155 |
|
|
Aug 27 06:56:19 AM UTC 24 |
Aug 27 06:56:24 AM UTC 24 |
509981529 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.2505639055 |
|
|
Aug 27 06:55:59 AM UTC 24 |
Aug 27 06:56:04 AM UTC 24 |
287145597 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.3013213288 |
|
|
Aug 27 06:56:00 AM UTC 24 |
Aug 27 06:56:04 AM UTC 24 |
451338646 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.2663177400 |
|
|
Aug 27 06:56:02 AM UTC 24 |
Aug 27 06:56:05 AM UTC 24 |
349580845 ps |
| T59 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.1547160588 |
|
|
Aug 27 06:55:28 AM UTC 24 |
Aug 27 06:56:05 AM UTC 24 |
8052812452 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.2149618153 |
|
|
Aug 27 06:56:02 AM UTC 24 |
Aug 27 06:56:05 AM UTC 24 |
203765642 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.1017245109 |
|
|
Aug 27 06:55:55 AM UTC 24 |
Aug 27 06:56:06 AM UTC 24 |
823569357 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.1231035385 |
|
|
Aug 27 06:55:53 AM UTC 24 |
Aug 27 06:56:06 AM UTC 24 |
2527145802 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.3581694737 |
|
|
Aug 27 06:55:40 AM UTC 24 |
Aug 27 06:56:06 AM UTC 24 |
342569273 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.2225446676 |
|
|
Aug 27 06:55:34 AM UTC 24 |
Aug 27 06:56:06 AM UTC 24 |
4787893216 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.3445193145 |
|
|
Aug 27 06:55:35 AM UTC 24 |
Aug 27 06:56:07 AM UTC 24 |
7142414562 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.2042440687 |
|
|
Aug 27 06:55:57 AM UTC 24 |
Aug 27 06:56:07 AM UTC 24 |
431073068 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.1595202308 |
|
|
Aug 27 06:55:55 AM UTC 24 |
Aug 27 06:56:08 AM UTC 24 |
446302551 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.883278130 |
|
|
Aug 27 06:56:06 AM UTC 24 |
Aug 27 06:56:09 AM UTC 24 |
39649300 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.3678324257 |
|
|
Aug 27 06:56:06 AM UTC 24 |
Aug 27 06:56:09 AM UTC 24 |
11147676 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.4263880329 |
|
|
Aug 27 06:56:06 AM UTC 24 |
Aug 27 06:56:09 AM UTC 24 |
75193324 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/5.lc_ctrl_stress_all_with_rand_reset.4183938078 |
|
|
Aug 27 06:54:47 AM UTC 24 |
Aug 27 06:56:09 AM UTC 24 |
12624778553 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.3371827434 |
|
|
Aug 27 06:56:02 AM UTC 24 |
Aug 27 06:56:09 AM UTC 24 |
993430029 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.3846013693 |
|
|
Aug 27 06:56:06 AM UTC 24 |
Aug 27 06:56:10 AM UTC 24 |
130510018 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.2834408522 |
|
|
Aug 27 06:55:57 AM UTC 24 |
Aug 27 06:56:10 AM UTC 24 |
299738863 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.990304277 |
|
|
Aug 27 06:55:46 AM UTC 24 |
Aug 27 06:56:10 AM UTC 24 |
2799679733 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.3092853610 |
|
|
Aug 27 06:55:49 AM UTC 24 |
Aug 27 06:56:10 AM UTC 24 |
515382887 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.1639371938 |
|
|
Aug 27 06:55:55 AM UTC 24 |
Aug 27 06:56:12 AM UTC 24 |
665827280 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.2384383111 |
|
|
Aug 27 06:56:08 AM UTC 24 |
Aug 27 06:56:12 AM UTC 24 |
268281291 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.2040575356 |
|
|
Aug 27 06:56:11 AM UTC 24 |
Aug 27 06:56:14 AM UTC 24 |
27211748 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.212721771 |
|
|
Aug 27 06:56:12 AM UTC 24 |
Aug 27 06:56:14 AM UTC 24 |
126486046 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.4145326954 |
|
|
Aug 27 06:56:03 AM UTC 24 |
Aug 27 06:56:15 AM UTC 24 |
332835512 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.2634532223 |
|
|
Aug 27 06:56:12 AM UTC 24 |
Aug 27 06:56:16 AM UTC 24 |
135678467 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.1435474226 |
|
|
Aug 27 06:56:09 AM UTC 24 |
Aug 27 06:56:17 AM UTC 24 |
615975037 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.491101091 |
|
|
Aug 27 06:56:06 AM UTC 24 |
Aug 27 06:56:17 AM UTC 24 |
447567496 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.2310741902 |
|
|
Aug 27 06:56:08 AM UTC 24 |
Aug 27 06:56:17 AM UTC 24 |
1587946289 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.580196965 |
|
|
Aug 27 06:56:00 AM UTC 24 |
Aug 27 06:56:17 AM UTC 24 |
686200347 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.4191434587 |
|
|
Aug 27 06:56:14 AM UTC 24 |
Aug 27 06:56:18 AM UTC 24 |
53510913 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.2689789229 |
|
|
Aug 27 06:56:08 AM UTC 24 |
Aug 27 06:56:19 AM UTC 24 |
2831370336 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.3385484560 |
|
|
Aug 27 06:56:02 AM UTC 24 |
Aug 27 06:56:19 AM UTC 24 |
2160238060 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.3852973694 |
|
|
Aug 27 06:56:02 AM UTC 24 |
Aug 27 06:56:20 AM UTC 24 |
1725025582 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.4039332170 |
|
|
Aug 27 06:55:19 AM UTC 24 |
Aug 27 06:56:20 AM UTC 24 |
2252644977 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_jtag_errors.532489234 |
|
|
Aug 27 06:55:03 AM UTC 24 |
Aug 27 06:56:21 AM UTC 24 |
5419992976 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.635607682 |
|
|
Aug 27 06:56:11 AM UTC 24 |
Aug 27 06:56:21 AM UTC 24 |
475609576 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.4055015329 |
|
|
Aug 27 06:56:05 AM UTC 24 |
Aug 27 06:56:22 AM UTC 24 |
414529236 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.3766447033 |
|
|
Aug 27 06:56:17 AM UTC 24 |
Aug 27 06:56:22 AM UTC 24 |
226774409 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.1729535763 |
|
|
Aug 27 06:56:09 AM UTC 24 |
Aug 27 06:56:23 AM UTC 24 |
303784658 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.2368607027 |
|
|
Aug 27 06:55:44 AM UTC 24 |
Aug 27 06:56:24 AM UTC 24 |
1359750941 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.1232452033 |
|
|
Aug 27 06:56:13 AM UTC 24 |
Aug 27 06:56:24 AM UTC 24 |
1100588408 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.1359648257 |
|
|
Aug 27 06:56:22 AM UTC 24 |
Aug 27 06:56:25 AM UTC 24 |
93018036 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.2658880205 |
|
|
Aug 27 06:56:08 AM UTC 24 |
Aug 27 06:56:26 AM UTC 24 |
854194891 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.2296305397 |
|
|
Aug 27 06:56:23 AM UTC 24 |
Aug 27 06:56:26 AM UTC 24 |
47625462 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.2531814099 |
|
|
Aug 27 06:56:03 AM UTC 24 |
Aug 27 06:56:26 AM UTC 24 |
1712532132 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.2016497780 |
|
|
Aug 27 06:56:17 AM UTC 24 |
Aug 27 06:56:26 AM UTC 24 |
1135757740 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.2969097369 |
|
|
Aug 27 06:56:18 AM UTC 24 |
Aug 27 06:56:27 AM UTC 24 |
177955332 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.1407216303 |
|
|
Aug 27 06:56:23 AM UTC 24 |
Aug 27 06:56:28 AM UTC 24 |
297216973 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.4175427278 |
|
|
Aug 27 06:55:36 AM UTC 24 |
Aug 27 06:56:28 AM UTC 24 |
2150526096 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.1257826888 |
|
|
Aug 27 06:55:58 AM UTC 24 |
Aug 27 06:56:28 AM UTC 24 |
477358712 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.2478922967 |
|
|
Aug 27 06:57:00 AM UTC 24 |
Aug 27 06:57:02 AM UTC 24 |
23939586 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.1219009275 |
|
|
Aug 27 06:56:18 AM UTC 24 |
Aug 27 06:56:29 AM UTC 24 |
1065570037 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.3430975595 |
|
|
Aug 27 06:56:26 AM UTC 24 |
Aug 27 06:56:29 AM UTC 24 |
38602795 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.1572066473 |
|
|
Aug 27 06:56:15 AM UTC 24 |
Aug 27 06:56:30 AM UTC 24 |
362489006 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.1936713746 |
|
|
Aug 27 06:56:11 AM UTC 24 |
Aug 27 06:56:32 AM UTC 24 |
1464629094 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.574380815 |
|
|
Aug 27 06:56:06 AM UTC 24 |
Aug 27 06:56:33 AM UTC 24 |
908739523 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.2359671166 |
|
|
Aug 27 06:56:20 AM UTC 24 |
Aug 27 06:56:33 AM UTC 24 |
828750862 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.2761333256 |
|
|
Aug 27 06:56:19 AM UTC 24 |
Aug 27 06:56:33 AM UTC 24 |
1466189540 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.1401924455 |
|
|
Aug 27 06:56:31 AM UTC 24 |
Aug 27 06:56:34 AM UTC 24 |
58079876 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.1393837350 |
|
|
Aug 27 06:56:26 AM UTC 24 |
Aug 27 06:56:35 AM UTC 24 |
233201688 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.2439833395 |
|
|
Aug 27 06:55:55 AM UTC 24 |
Aug 27 06:56:35 AM UTC 24 |
9867403535 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.2095334225 |
|
|
Aug 27 06:56:34 AM UTC 24 |
Aug 27 06:56:36 AM UTC 24 |
31732097 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.3622590573 |
|
|
Aug 27 06:56:12 AM UTC 24 |
Aug 27 06:56:36 AM UTC 24 |
172585301 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.2353645638 |
|
|
Aug 27 06:56:27 AM UTC 24 |
Aug 27 06:56:36 AM UTC 24 |
253041029 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.707158123 |
|
|
Aug 27 06:56:26 AM UTC 24 |
Aug 27 06:56:36 AM UTC 24 |
535441029 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.3414252843 |
|
|
Aug 27 06:56:08 AM UTC 24 |
Aug 27 06:56:37 AM UTC 24 |
846984507 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.1682445934 |
|
|
Aug 27 06:56:27 AM UTC 24 |
Aug 27 06:56:37 AM UTC 24 |
1828267687 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.4142313127 |
|
|
Aug 27 06:55:06 AM UTC 24 |
Aug 27 06:56:37 AM UTC 24 |
18273641646 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.525531895 |
|
|
Aug 27 06:56:41 AM UTC 24 |
Aug 27 06:57:02 AM UTC 24 |
172237407 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.4135786756 |
|
|
Aug 27 06:56:26 AM UTC 24 |
Aug 27 06:56:39 AM UTC 24 |
1609545506 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.1560760 |
|
|
Aug 27 06:56:35 AM UTC 24 |
Aug 27 06:56:39 AM UTC 24 |
25465505 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.1319644005 |
|
|
Aug 27 06:56:31 AM UTC 24 |
Aug 27 06:56:39 AM UTC 24 |
87114616 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.681803447 |
|
|
Aug 27 06:56:29 AM UTC 24 |
Aug 27 06:56:39 AM UTC 24 |
1030368099 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.1812332911 |
|
|
Aug 27 06:56:29 AM UTC 24 |
Aug 27 06:56:39 AM UTC 24 |
1254724773 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.4182218049 |
|
|
Aug 27 06:56:02 AM UTC 24 |
Aug 27 06:56:39 AM UTC 24 |
3955859275 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.2754684492 |
|
|
Aug 27 06:56:09 AM UTC 24 |
Aug 27 06:56:40 AM UTC 24 |
842834575 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.1248708279 |
|
|
Aug 27 06:56:36 AM UTC 24 |
Aug 27 06:56:40 AM UTC 24 |
93712951 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.2129133282 |
|
|
Aug 27 06:55:22 AM UTC 24 |
Aug 27 06:56:41 AM UTC 24 |
5337069027 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.2802563899 |
|
|
Aug 27 06:55:46 AM UTC 24 |
Aug 27 06:56:41 AM UTC 24 |
8049017873 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.4069377503 |
|
|
Aug 27 06:56:20 AM UTC 24 |
Aug 27 06:56:41 AM UTC 24 |
597833365 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.3840649185 |
|
|
Aug 27 06:56:38 AM UTC 24 |
Aug 27 06:56:41 AM UTC 24 |
51990643 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.3025111623 |
|
|
Aug 27 06:56:38 AM UTC 24 |
Aug 27 06:56:42 AM UTC 24 |
672080451 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.1728149824 |
|
|
Aug 27 06:55:42 AM UTC 24 |
Aug 27 06:56:42 AM UTC 24 |
27926605354 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.311213954 |
|
|
Aug 27 06:56:29 AM UTC 24 |
Aug 27 06:56:42 AM UTC 24 |
354750790 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.1943100034 |
|
|
Aug 27 06:56:41 AM UTC 24 |
Aug 27 06:56:43 AM UTC 24 |
41019134 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.1156210084 |
|
|
Aug 27 06:56:29 AM UTC 24 |
Aug 27 06:56:43 AM UTC 24 |
402992623 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.2962375676 |
|
|
Aug 27 06:56:41 AM UTC 24 |
Aug 27 06:56:43 AM UTC 24 |
14796277 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.3451948525 |
|
|
Aug 27 06:56:41 AM UTC 24 |
Aug 27 06:56:44 AM UTC 24 |
172848578 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.149417715 |
|
|
Aug 27 06:56:35 AM UTC 24 |
Aug 27 06:56:46 AM UTC 24 |
1246701019 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.1813936710 |
|
|
Aug 27 06:56:42 AM UTC 24 |
Aug 27 06:56:46 AM UTC 24 |
70296934 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.2242782722 |
|
|
Aug 27 06:56:35 AM UTC 24 |
Aug 27 06:56:47 AM UTC 24 |
225158422 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.1425643326 |
|
|
Aug 27 06:56:44 AM UTC 24 |
Aug 27 06:56:47 AM UTC 24 |
40367624 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.900967623 |
|
|
Aug 27 06:56:36 AM UTC 24 |
Aug 27 06:56:47 AM UTC 24 |
566496998 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.3125616292 |
|
|
Aug 27 06:56:42 AM UTC 24 |
Aug 27 06:56:48 AM UTC 24 |
3212991400 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.2759768092 |
|
|
Aug 27 06:56:39 AM UTC 24 |
Aug 27 06:56:48 AM UTC 24 |
2404802854 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.2601104152 |
|
|
Aug 27 06:56:48 AM UTC 24 |
Aug 27 06:56:50 AM UTC 24 |
62845821 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.1380430455 |
|
|
Aug 27 06:56:48 AM UTC 24 |
Aug 27 06:56:51 AM UTC 24 |
42453484 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.410938281 |
|
|
Aug 27 06:56:48 AM UTC 24 |
Aug 27 06:56:51 AM UTC 24 |
26121566 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.1330191648 |
|
|
Aug 27 06:56:39 AM UTC 24 |
Aug 27 06:56:51 AM UTC 24 |
277091917 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.3679941407 |
|
|
Aug 27 06:56:38 AM UTC 24 |
Aug 27 06:56:52 AM UTC 24 |
1916318235 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.2123459134 |
|
|
Aug 27 06:56:23 AM UTC 24 |
Aug 27 06:56:52 AM UTC 24 |
333836439 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.810177834 |
|
|
Aug 27 06:56:41 AM UTC 24 |
Aug 27 06:56:53 AM UTC 24 |
1504610979 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.4203647746 |
|
|
Aug 27 06:56:27 AM UTC 24 |
Aug 27 06:56:53 AM UTC 24 |
920715143 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.3766320167 |
|
|
Aug 27 06:56:42 AM UTC 24 |
Aug 27 06:56:54 AM UTC 24 |
962256370 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.49876617 |
|
|
Aug 27 06:56:42 AM UTC 24 |
Aug 27 06:56:54 AM UTC 24 |
760930736 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.3789745140 |
|
|
Aug 27 06:56:08 AM UTC 24 |
Aug 27 06:56:54 AM UTC 24 |
1846402237 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.2835055795 |
|
|
Aug 27 06:56:02 AM UTC 24 |
Aug 27 06:56:54 AM UTC 24 |
1919316325 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.3578746227 |
|
|
Aug 27 06:56:49 AM UTC 24 |
Aug 27 06:56:54 AM UTC 24 |
544006622 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.4261380091 |
|
|
Aug 27 06:56:44 AM UTC 24 |
Aug 27 06:56:55 AM UTC 24 |
5762208042 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.3816923148 |
|
|
Aug 27 06:55:18 AM UTC 24 |
Aug 27 06:56:55 AM UTC 24 |
11900714228 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.168992239 |
|
|
Aug 27 06:56:44 AM UTC 24 |
Aug 27 06:56:55 AM UTC 24 |
236268446 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.786644557 |
|
|
Aug 27 06:55:55 AM UTC 24 |
Aug 27 06:56:56 AM UTC 24 |
3468990970 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.2007977787 |
|
|
Aug 27 06:56:51 AM UTC 24 |
Aug 27 06:56:58 AM UTC 24 |
672004511 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.4066906912 |
|
|
Aug 27 06:56:56 AM UTC 24 |
Aug 27 06:56:58 AM UTC 24 |
130621192 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.831420490 |
|
|
Aug 27 06:56:56 AM UTC 24 |
Aug 27 06:56:58 AM UTC 24 |
24992468 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.4195154128 |
|
|
Aug 27 06:56:27 AM UTC 24 |
Aug 27 06:56:58 AM UTC 24 |
6642891978 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.2084762018 |
|
|
Aug 27 06:56:44 AM UTC 24 |
Aug 27 06:56:58 AM UTC 24 |
5299605210 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.2959091571 |
|
|
Aug 27 06:56:56 AM UTC 24 |
Aug 27 06:56:59 AM UTC 24 |
28863801 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.3069877420 |
|
|
Aug 27 06:56:56 AM UTC 24 |
Aug 27 06:57:01 AM UTC 24 |
409292094 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.669614709 |
|
|
Aug 27 06:56:49 AM UTC 24 |
Aug 27 06:57:01 AM UTC 24 |
439979703 ps |
| T60 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/0.lc_ctrl_stress_all.4118904252 |
|
|
Aug 27 06:53:52 AM UTC 24 |
Aug 27 06:57:03 AM UTC 24 |
6584437980 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.1708826333 |
|
|
Aug 27 06:56:44 AM UTC 24 |
Aug 27 06:57:03 AM UTC 24 |
1911170543 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.4274859318 |
|
|
Aug 27 06:56:56 AM UTC 24 |
Aug 27 06:57:04 AM UTC 24 |
155649268 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.1006483056 |
|
|
Aug 27 06:57:02 AM UTC 24 |
Aug 27 06:57:04 AM UTC 24 |
42187757 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.869221370 |
|
|
Aug 27 06:55:27 AM UTC 24 |
Aug 27 06:57:05 AM UTC 24 |
13995332863 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.3181070269 |
|
|
Aug 27 06:56:57 AM UTC 24 |
Aug 27 06:57:05 AM UTC 24 |
235260637 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.4156590045 |
|
|
Aug 27 06:56:05 AM UTC 24 |
Aug 27 06:57:05 AM UTC 24 |
4982519049 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.3382249274 |
|
|
Aug 27 06:56:42 AM UTC 24 |
Aug 27 06:57:05 AM UTC 24 |
5912765427 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.4279425606 |
|
|
Aug 27 06:56:54 AM UTC 24 |
Aug 27 06:57:06 AM UTC 24 |
1137857074 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.2946678244 |
|
|
Aug 27 06:56:18 AM UTC 24 |
Aug 27 06:57:06 AM UTC 24 |
3705116877 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.1498802858 |
|
|
Aug 27 06:56:39 AM UTC 24 |
Aug 27 06:57:07 AM UTC 24 |
1508099605 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.379662665 |
|
|
Aug 27 06:57:02 AM UTC 24 |
Aug 27 06:57:07 AM UTC 24 |
56986928 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.231546374 |
|
|
Aug 27 06:56:51 AM UTC 24 |
Aug 27 06:57:07 AM UTC 24 |
568211581 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.3037443910 |
|
|
Aug 27 06:56:51 AM UTC 24 |
Aug 27 06:57:07 AM UTC 24 |
420774702 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.1905474642 |
|
|
Aug 27 06:57:04 AM UTC 24 |
Aug 27 06:57:08 AM UTC 24 |
63640472 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.1043341399 |
|
|
Aug 27 06:56:53 AM UTC 24 |
Aug 27 06:57:08 AM UTC 24 |
750073536 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.1876044724 |
|
|
Aug 27 06:56:54 AM UTC 24 |
Aug 27 06:57:09 AM UTC 24 |
398900016 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.3339033095 |
|
|
Aug 27 06:57:07 AM UTC 24 |
Aug 27 06:57:09 AM UTC 24 |
18608013 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.1320911949 |
|
|
Aug 27 06:56:27 AM UTC 24 |
Aug 27 06:57:09 AM UTC 24 |
6913895278 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.3856334820 |
|
|
Aug 27 06:56:57 AM UTC 24 |
Aug 27 06:57:10 AM UTC 24 |
307378230 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3932796127 |
|
|
Aug 27 06:57:08 AM UTC 24 |
Aug 27 06:57:11 AM UTC 24 |
15193813 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.2337026069 |
|
|
Aug 27 06:56:34 AM UTC 24 |
Aug 27 06:57:11 AM UTC 24 |
2931332842 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.956285140 |
|
|
Aug 27 06:56:19 AM UTC 24 |
Aug 27 06:57:12 AM UTC 24 |
7070700676 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.1455085740 |
|
|
Aug 27 06:57:04 AM UTC 24 |
Aug 27 06:57:12 AM UTC 24 |
369679111 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.1277097511 |
|
|
Aug 27 06:57:08 AM UTC 24 |
Aug 27 06:57:12 AM UTC 24 |
47950617 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.713761066 |
|
|
Aug 27 06:57:08 AM UTC 24 |
Aug 27 06:57:13 AM UTC 24 |
82604078 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.3771691029 |
|
|
Aug 27 06:56:48 AM UTC 24 |
Aug 27 06:57:13 AM UTC 24 |
875086468 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.4023908358 |
|
|
Aug 27 06:56:57 AM UTC 24 |
Aug 27 06:57:13 AM UTC 24 |
739508982 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.1687478663 |
|
|
Aug 27 06:56:58 AM UTC 24 |
Aug 27 06:57:14 AM UTC 24 |
972621920 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.796265538 |
|
|
Aug 27 06:57:05 AM UTC 24 |
Aug 27 06:57:14 AM UTC 24 |
663418115 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.3997585075 |
|
|
Aug 27 06:56:58 AM UTC 24 |
Aug 27 06:57:15 AM UTC 24 |
436148731 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.3552204598 |
|
|
Aug 27 06:57:13 AM UTC 24 |
Aug 27 06:57:15 AM UTC 24 |
28705239 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.3965123018 |
|
|
Aug 27 06:57:13 AM UTC 24 |
Aug 27 06:57:16 AM UTC 24 |
43805094 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.1237212569 |
|
|
Aug 27 06:57:14 AM UTC 24 |
Aug 27 06:57:16 AM UTC 24 |
14277716 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.1520826521 |
|
|
Aug 27 06:57:07 AM UTC 24 |
Aug 27 06:57:17 AM UTC 24 |
799388243 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.1193288914 |
|
|
Aug 27 06:57:04 AM UTC 24 |
Aug 27 06:57:17 AM UTC 24 |
342107044 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.3894404835 |
|
|
Aug 27 06:57:07 AM UTC 24 |
Aug 27 06:57:18 AM UTC 24 |
270043318 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.4292779515 |
|
|
Aug 27 06:57:08 AM UTC 24 |
Aug 27 06:57:18 AM UTC 24 |
935048200 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.2490679985 |
|
|
Aug 27 06:56:56 AM UTC 24 |
Aug 27 06:57:19 AM UTC 24 |
1022132870 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.1837522423 |
|
|
Aug 27 06:55:57 AM UTC 24 |
Aug 27 06:57:20 AM UTC 24 |
12925907050 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.3074872278 |
|
|
Aug 27 06:55:57 AM UTC 24 |
Aug 27 06:57:20 AM UTC 24 |
2684254269 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.867614694 |
|
|
Aug 27 06:57:15 AM UTC 24 |
Aug 27 06:57:20 AM UTC 24 |
196378273 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.3823907814 |
|
|
Aug 27 06:57:19 AM UTC 24 |
Aug 27 06:57:22 AM UTC 24 |
32184370 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.960075976 |
|
|
Aug 27 06:57:10 AM UTC 24 |
Aug 27 06:57:22 AM UTC 24 |
2715792948 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.3113657046 |
|
|
Aug 27 06:57:10 AM UTC 24 |
Aug 27 06:57:22 AM UTC 24 |
958687382 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.1587319731 |
|
|
Aug 27 06:57:11 AM UTC 24 |
Aug 27 06:57:23 AM UTC 24 |
396225320 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.539167485 |
|
|
Aug 27 06:56:58 AM UTC 24 |
Aug 27 06:57:23 AM UTC 24 |
700106027 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.4137637868 |
|
|
Aug 27 06:57:20 AM UTC 24 |
Aug 27 06:57:24 AM UTC 24 |
26599268 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.2190967697 |
|
|
Aug 27 06:57:17 AM UTC 24 |
Aug 27 06:57:24 AM UTC 24 |
532976731 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.4229587384 |
|
|
Aug 27 06:57:22 AM UTC 24 |
Aug 27 06:57:24 AM UTC 24 |
14659900 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.3336100105 |
|
|
Aug 27 06:56:05 AM UTC 24 |
Aug 27 06:57:25 AM UTC 24 |
4055394920 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.3445886480 |
|
|
Aug 27 06:57:10 AM UTC 24 |
Aug 27 06:57:26 AM UTC 24 |
2445785508 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.3959929135 |
|
|
Aug 27 06:57:11 AM UTC 24 |
Aug 27 06:57:26 AM UTC 24 |
310189198 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.338105924 |
|
|
Aug 27 06:57:08 AM UTC 24 |
Aug 27 06:57:26 AM UTC 24 |
338657068 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.12058109 |
|
|
Aug 27 06:56:36 AM UTC 24 |
Aug 27 06:57:27 AM UTC 24 |
5416833972 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_errors.1821511482 |
|
|
Aug 27 06:57:15 AM UTC 24 |
Aug 27 06:57:27 AM UTC 24 |
241364102 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.3178297314 |
|
|
Aug 27 06:57:11 AM UTC 24 |
Aug 27 06:57:27 AM UTC 24 |
350968985 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.2026496982 |
|
|
Aug 27 06:57:04 AM UTC 24 |
Aug 27 06:57:27 AM UTC 24 |
160181157 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.4248442479 |
|
|
Aug 27 06:55:29 AM UTC 24 |
Aug 27 06:57:27 AM UTC 24 |
4025267049 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.185784966 |
|
|
Aug 27 06:57:18 AM UTC 24 |
Aug 27 06:57:28 AM UTC 24 |
191542408 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.4275038978 |
|
|
Aug 27 06:57:17 AM UTC 24 |
Aug 27 06:57:28 AM UTC 24 |
1030890461 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.463911061 |
|
|
Aug 27 06:57:23 AM UTC 24 |
Aug 27 06:57:29 AM UTC 24 |
63390757 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.467729355 |
|
|
Aug 27 06:57:14 AM UTC 24 |
Aug 27 06:57:29 AM UTC 24 |
618489688 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.2432082599 |
|
|
Aug 27 06:57:17 AM UTC 24 |
Aug 27 06:57:30 AM UTC 24 |
300579443 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.660936359 |
|
|
Aug 27 06:57:28 AM UTC 24 |
Aug 27 06:57:30 AM UTC 24 |
39666722 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.579814640 |
|
|
Aug 27 06:57:28 AM UTC 24 |
Aug 27 06:57:31 AM UTC 24 |
35471638 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.2521718018 |
|
|
Aug 27 06:57:05 AM UTC 24 |
Aug 27 06:57:32 AM UTC 24 |
4913505693 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.1973134943 |
|
|
Aug 27 06:57:07 AM UTC 24 |
Aug 27 06:57:33 AM UTC 24 |
1175143259 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.1899245850 |
|
|
Aug 27 06:57:25 AM UTC 24 |
Aug 27 06:57:33 AM UTC 24 |
875725561 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.1815414728 |
|
|
Aug 27 06:57:23 AM UTC 24 |
Aug 27 06:57:33 AM UTC 24 |
888631810 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.4231761247 |
|
|
Aug 27 06:57:23 AM UTC 24 |
Aug 27 06:57:33 AM UTC 24 |
1079782920 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.3886092876 |
|
|
Aug 27 06:57:28 AM UTC 24 |
Aug 27 06:57:33 AM UTC 24 |
144038206 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3524472212 |
|
|
Aug 27 06:57:31 AM UTC 24 |
Aug 27 06:57:34 AM UTC 24 |
77939536 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.80575699 |
|
|
Aug 27 06:57:28 AM UTC 24 |
Aug 27 06:57:34 AM UTC 24 |
91700082 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.1218974611 |
|
|
Aug 27 06:57:25 AM UTC 24 |
Aug 27 06:57:35 AM UTC 24 |
512123801 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.3426571386 |
|
|
Aug 27 06:57:32 AM UTC 24 |
Aug 27 06:57:36 AM UTC 24 |
22721733 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.4251202026 |
|
|
Aug 27 06:57:34 AM UTC 24 |
Aug 27 06:57:36 AM UTC 24 |
14812978 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.274008636 |
|
|
Aug 27 06:57:18 AM UTC 24 |
Aug 27 06:57:37 AM UTC 24 |
4365893793 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.1173321968 |
|
|
Aug 27 06:57:23 AM UTC 24 |
Aug 27 06:57:37 AM UTC 24 |
1126037860 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.467368538 |
|
|
Aug 27 06:56:44 AM UTC 24 |
Aug 27 06:57:38 AM UTC 24 |
2077187709 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.3329257675 |
|
|
Aug 27 06:57:34 AM UTC 24 |
Aug 27 06:57:38 AM UTC 24 |
120127712 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.1675446685 |
|
|
Aug 27 06:57:28 AM UTC 24 |
Aug 27 06:57:39 AM UTC 24 |
187965535 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.2027323237 |
|
|
Aug 27 06:57:22 AM UTC 24 |
Aug 27 06:57:39 AM UTC 24 |
192419322 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.1961655411 |
|
|
Aug 27 06:57:30 AM UTC 24 |
Aug 27 06:57:40 AM UTC 24 |
844386026 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.1848971895 |
|
|
Aug 27 06:57:30 AM UTC 24 |
Aug 27 06:57:41 AM UTC 24 |
304229279 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.1000926684 |
|
|
Aug 27 06:57:39 AM UTC 24 |
Aug 27 06:57:41 AM UTC 24 |
154028780 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.3147646183 |
|
|
Aug 27 06:54:54 AM UTC 24 |
Aug 27 06:57:41 AM UTC 24 |
10782043655 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3324345414 |
|
|
Aug 27 06:57:39 AM UTC 24 |
Aug 27 06:57:41 AM UTC 24 |
66400118 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.2587322128 |
|
|
Aug 27 06:57:14 AM UTC 24 |
Aug 27 06:57:42 AM UTC 24 |
1195891570 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.552721470 |
|
|
Aug 27 06:57:39 AM UTC 24 |
Aug 27 06:57:43 AM UTC 24 |
36172096 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.2048934576 |
|
|
Aug 27 06:57:35 AM UTC 24 |
Aug 27 06:57:43 AM UTC 24 |
372732453 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_errors.1147712615 |
|
|
Aug 27 06:57:30 AM UTC 24 |
Aug 27 06:57:44 AM UTC 24 |
7287715775 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_errors.1490117338 |
|
|
Aug 27 06:57:34 AM UTC 24 |
Aug 27 06:57:44 AM UTC 24 |
395683365 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.3144403901 |
|
|
Aug 27 06:56:38 AM UTC 24 |
Aug 27 06:57:44 AM UTC 24 |
1848299485 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.1144774053 |
|
|
Aug 27 06:58:03 AM UTC 24 |
Aug 27 06:58:14 AM UTC 24 |
264808206 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.1586287138 |
|
|
Aug 27 06:57:25 AM UTC 24 |
Aug 27 06:57:45 AM UTC 24 |
370650364 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.2526944180 |
|
|
Aug 27 06:57:36 AM UTC 24 |
Aug 27 06:57:45 AM UTC 24 |
168061147 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.1173370696 |
|
|
Aug 27 06:56:22 AM UTC 24 |
Aug 27 06:57:46 AM UTC 24 |
2602418229 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.4235255491 |
|
|
Aug 27 06:57:41 AM UTC 24 |
Aug 27 06:57:46 AM UTC 24 |
70154386 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.2127395137 |
|
|
Aug 27 06:58:10 AM UTC 24 |
Aug 27 06:58:13 AM UTC 24 |
51076573 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.2874750660 |
|
|
Aug 27 06:57:30 AM UTC 24 |
Aug 27 06:57:46 AM UTC 24 |
444577512 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.3718341360 |
|
|
Aug 27 06:57:35 AM UTC 24 |
Aug 27 06:57:47 AM UTC 24 |
705174876 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.3512462987 |
|
|
Aug 27 06:57:34 AM UTC 24 |
Aug 27 06:57:47 AM UTC 24 |
868803056 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.1451658894 |
|
|
Aug 27 06:57:43 AM UTC 24 |
Aug 27 06:57:47 AM UTC 24 |
232358276 ps |