| T226 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.2754567064 |
|
|
Aug 27 06:57:22 AM UTC 24 |
Aug 27 06:57:47 AM UTC 24 |
247359288 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.1102213026 |
|
|
Aug 27 06:57:30 AM UTC 24 |
Aug 27 06:57:47 AM UTC 24 |
2090021255 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.4125598596 |
|
|
Aug 27 06:57:46 AM UTC 24 |
Aug 27 06:57:48 AM UTC 24 |
68979533 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.303505725 |
|
|
Aug 27 06:58:00 AM UTC 24 |
Aug 27 06:58:14 AM UTC 24 |
294290567 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.2360734290 |
|
|
Aug 27 06:57:46 AM UTC 24 |
Aug 27 06:57:48 AM UTC 24 |
14909282 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.4160702456 |
|
|
Aug 27 06:57:28 AM UTC 24 |
Aug 27 06:57:49 AM UTC 24 |
155237943 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.2648160708 |
|
|
Aug 27 06:57:46 AM UTC 24 |
Aug 27 06:57:50 AM UTC 24 |
46589362 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.1582587416 |
|
|
Aug 27 06:57:38 AM UTC 24 |
Aug 27 06:57:50 AM UTC 24 |
366263200 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.2057987207 |
|
|
Aug 27 06:57:30 AM UTC 24 |
Aug 27 06:57:50 AM UTC 24 |
3060969952 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.3502283038 |
|
|
Aug 27 06:57:49 AM UTC 24 |
Aug 27 06:57:51 AM UTC 24 |
75489930 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.2979994999 |
|
|
Aug 27 06:57:50 AM UTC 24 |
Aug 27 06:57:53 AM UTC 24 |
54872485 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.3837895428 |
|
|
Aug 27 06:57:50 AM UTC 24 |
Aug 27 06:57:53 AM UTC 24 |
196364112 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.1441983882 |
|
|
Aug 27 06:57:44 AM UTC 24 |
Aug 27 06:57:53 AM UTC 24 |
1495110117 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_errors.703522736 |
|
|
Aug 27 06:57:43 AM UTC 24 |
Aug 27 06:57:54 AM UTC 24 |
418048638 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.3580583953 |
|
|
Aug 27 06:57:46 AM UTC 24 |
Aug 27 06:57:54 AM UTC 24 |
207219811 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.1761416773 |
|
|
Aug 27 06:57:48 AM UTC 24 |
Aug 27 06:57:54 AM UTC 24 |
59895065 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.1281250534 |
|
|
Aug 27 06:56:42 AM UTC 24 |
Aug 27 06:57:54 AM UTC 24 |
2305193262 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.1034946626 |
|
|
Aug 27 06:57:43 AM UTC 24 |
Aug 27 06:57:55 AM UTC 24 |
521990224 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.899010338 |
|
|
Aug 27 06:57:35 AM UTC 24 |
Aug 27 06:57:56 AM UTC 24 |
2595290817 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.2904765564 |
|
|
Aug 27 06:57:55 AM UTC 24 |
Aug 27 06:57:57 AM UTC 24 |
34971065 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.1040392331 |
|
|
Aug 27 06:57:34 AM UTC 24 |
Aug 27 06:57:57 AM UTC 24 |
354616818 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.927290936 |
|
|
Aug 27 06:57:51 AM UTC 24 |
Aug 27 06:57:58 AM UTC 24 |
102526427 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.83723949 |
|
|
Aug 27 06:57:48 AM UTC 24 |
Aug 27 06:57:59 AM UTC 24 |
2511175935 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.1975555829 |
|
|
Aug 27 06:57:44 AM UTC 24 |
Aug 27 06:57:59 AM UTC 24 |
1617511625 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.3156638795 |
|
|
Aug 27 06:57:57 AM UTC 24 |
Aug 27 06:57:59 AM UTC 24 |
51913061 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all.2389804124 |
|
|
Aug 27 06:56:40 AM UTC 24 |
Aug 27 06:58:01 AM UTC 24 |
8112616281 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_errors.3890486143 |
|
|
Aug 27 06:57:48 AM UTC 24 |
Aug 27 06:58:02 AM UTC 24 |
309257375 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.4188325962 |
|
|
Aug 27 06:57:57 AM UTC 24 |
Aug 27 06:58:02 AM UTC 24 |
422847962 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.1635979162 |
|
|
Aug 27 06:57:43 AM UTC 24 |
Aug 27 06:58:02 AM UTC 24 |
2923332598 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.3054702042 |
|
|
Aug 27 06:57:59 AM UTC 24 |
Aug 27 06:58:03 AM UTC 24 |
31954592 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.2572622766 |
|
|
Aug 27 06:57:49 AM UTC 24 |
Aug 27 06:58:03 AM UTC 24 |
272405612 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.3338611117 |
|
|
Aug 27 06:57:51 AM UTC 24 |
Aug 27 06:58:03 AM UTC 24 |
198989616 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.1856309144 |
|
|
Aug 27 06:57:53 AM UTC 24 |
Aug 27 06:58:04 AM UTC 24 |
354150667 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.1793049440 |
|
|
Aug 27 06:57:59 AM UTC 24 |
Aug 27 06:58:04 AM UTC 24 |
105143657 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.2471034122 |
|
|
Aug 27 06:57:49 AM UTC 24 |
Aug 27 06:58:04 AM UTC 24 |
633803032 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.2650914714 |
|
|
Aug 27 06:57:54 AM UTC 24 |
Aug 27 06:58:05 AM UTC 24 |
633985834 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.3982069625 |
|
|
Aug 27 06:57:43 AM UTC 24 |
Aug 27 06:58:05 AM UTC 24 |
700513856 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.1240122487 |
|
|
Aug 27 06:57:00 AM UTC 24 |
Aug 27 06:58:06 AM UTC 24 |
5480725034 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.4283421916 |
|
|
Aug 27 06:57:49 AM UTC 24 |
Aug 27 06:58:48 AM UTC 24 |
12655666545 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_errors.2095985445 |
|
|
Aug 27 06:57:52 AM UTC 24 |
Aug 27 06:58:06 AM UTC 24 |
337086622 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.2308957706 |
|
|
Aug 27 06:57:55 AM UTC 24 |
Aug 27 06:58:06 AM UTC 24 |
3033748741 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.1519076245 |
|
|
Aug 27 06:57:48 AM UTC 24 |
Aug 27 06:58:06 AM UTC 24 |
1173990797 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.3428619439 |
|
|
Aug 27 06:58:04 AM UTC 24 |
Aug 27 06:58:06 AM UTC 24 |
23791538 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.1144492753 |
|
|
Aug 27 06:57:40 AM UTC 24 |
Aug 27 06:58:07 AM UTC 24 |
289064286 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.2251467826 |
|
|
Aug 27 06:58:04 AM UTC 24 |
Aug 27 06:58:07 AM UTC 24 |
39833805 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.1105052791 |
|
|
Aug 27 06:57:48 AM UTC 24 |
Aug 27 06:58:07 AM UTC 24 |
546175506 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.4071521227 |
|
|
Aug 27 06:58:05 AM UTC 24 |
Aug 27 06:58:08 AM UTC 24 |
50354972 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.747926743 |
|
|
Aug 27 06:57:55 AM UTC 24 |
Aug 27 06:58:09 AM UTC 24 |
304206687 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.1501631234 |
|
|
Aug 27 06:58:00 AM UTC 24 |
Aug 27 06:58:09 AM UTC 24 |
3026706544 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.180384124 |
|
|
Aug 27 06:58:06 AM UTC 24 |
Aug 27 06:58:10 AM UTC 24 |
98313675 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.3349518565 |
|
|
Aug 27 06:57:50 AM UTC 24 |
Aug 27 06:58:11 AM UTC 24 |
427023663 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.275205691 |
|
|
Aug 27 06:58:03 AM UTC 24 |
Aug 27 06:58:11 AM UTC 24 |
3003324134 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.3568182997 |
|
|
Aug 27 06:58:09 AM UTC 24 |
Aug 27 06:58:11 AM UTC 24 |
106579584 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.1953707232 |
|
|
Aug 27 06:58:09 AM UTC 24 |
Aug 27 06:58:12 AM UTC 24 |
27499927 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.2542037408 |
|
|
Aug 27 06:58:01 AM UTC 24 |
Aug 27 06:58:12 AM UTC 24 |
328813440 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_errors.3571882249 |
|
|
Aug 27 06:58:00 AM UTC 24 |
Aug 27 06:58:12 AM UTC 24 |
356636129 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.396031970 |
|
|
Aug 27 06:57:46 AM UTC 24 |
Aug 27 06:58:12 AM UTC 24 |
1133853419 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.3444611225 |
|
|
Aug 27 06:58:07 AM UTC 24 |
Aug 27 06:58:15 AM UTC 24 |
791748833 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.2845327597 |
|
|
Aug 27 06:58:06 AM UTC 24 |
Aug 27 06:58:16 AM UTC 24 |
43658913 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.4206051350 |
|
|
Aug 27 06:56:30 AM UTC 24 |
Aug 27 06:58:16 AM UTC 24 |
5931384897 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.1864636663 |
|
|
Aug 27 06:58:07 AM UTC 24 |
Aug 27 06:58:17 AM UTC 24 |
3031707358 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.1431121221 |
|
|
Aug 27 06:57:54 AM UTC 24 |
Aug 27 06:58:17 AM UTC 24 |
1489519045 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.3554957795 |
|
|
Aug 27 06:57:07 AM UTC 24 |
Aug 27 06:58:18 AM UTC 24 |
11741684010 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.1616164789 |
|
|
Aug 27 06:58:35 AM UTC 24 |
Aug 27 06:58:47 AM UTC 24 |
261359936 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.838513722 |
|
|
Aug 27 06:58:12 AM UTC 24 |
Aug 27 06:58:18 AM UTC 24 |
86094224 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.718658423 |
|
|
Aug 27 06:58:07 AM UTC 24 |
Aug 27 06:58:18 AM UTC 24 |
1215532228 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.1113663684 |
|
|
Aug 27 06:58:16 AM UTC 24 |
Aug 27 06:58:18 AM UTC 24 |
22388609 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.2696788421 |
|
|
Aug 27 06:58:16 AM UTC 24 |
Aug 27 06:58:18 AM UTC 24 |
92225877 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.2247062739 |
|
|
Aug 27 06:57:13 AM UTC 24 |
Aug 27 06:58:21 AM UTC 24 |
2895907362 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.768192528 |
|
|
Aug 27 06:58:13 AM UTC 24 |
Aug 27 06:58:21 AM UTC 24 |
531421713 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.4229148300 |
|
|
Aug 27 06:58:16 AM UTC 24 |
Aug 27 06:58:21 AM UTC 24 |
186564216 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.1383354827 |
|
|
Aug 27 06:59:16 AM UTC 24 |
Aug 27 06:59:23 AM UTC 24 |
704316898 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_errors.1593299947 |
|
|
Aug 27 06:58:06 AM UTC 24 |
Aug 27 06:58:21 AM UTC 24 |
2126773388 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.1085780019 |
|
|
Aug 27 06:58:11 AM UTC 24 |
Aug 27 06:58:22 AM UTC 24 |
74347296 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.1095987610 |
|
|
Aug 27 06:58:13 AM UTC 24 |
Aug 27 06:58:23 AM UTC 24 |
200261094 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.3818903247 |
|
|
Aug 27 06:57:31 AM UTC 24 |
Aug 27 06:59:23 AM UTC 24 |
37418230459 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.2982727273 |
|
|
Aug 27 06:58:17 AM UTC 24 |
Aug 27 06:58:24 AM UTC 24 |
969724187 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.1790907582 |
|
|
Aug 27 06:58:08 AM UTC 24 |
Aug 27 06:58:24 AM UTC 24 |
1847553875 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.1087096000 |
|
|
Aug 27 06:57:58 AM UTC 24 |
Aug 27 06:58:24 AM UTC 24 |
853330652 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.3491794287 |
|
|
Aug 27 06:58:17 AM UTC 24 |
Aug 27 06:58:24 AM UTC 24 |
80813510 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.571736746 |
|
|
Aug 27 06:58:22 AM UTC 24 |
Aug 27 06:58:24 AM UTC 24 |
15465439 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.3505384243 |
|
|
Aug 27 06:58:22 AM UTC 24 |
Aug 27 06:58:24 AM UTC 24 |
17689195 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.422795921 |
|
|
Aug 27 06:58:22 AM UTC 24 |
Aug 27 06:58:25 AM UTC 24 |
41429330 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.2345861718 |
|
|
Aug 27 06:56:47 AM UTC 24 |
Aug 27 06:58:25 AM UTC 24 |
5090588452 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_errors.3656243407 |
|
|
Aug 27 06:58:13 AM UTC 24 |
Aug 27 06:58:25 AM UTC 24 |
1185420779 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3083209822 |
|
|
Aug 27 06:58:13 AM UTC 24 |
Aug 27 06:58:25 AM UTC 24 |
368463033 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.4229105423 |
|
|
Aug 27 06:58:07 AM UTC 24 |
Aug 27 06:58:25 AM UTC 24 |
3729522736 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.1430285285 |
|
|
Aug 27 06:58:19 AM UTC 24 |
Aug 27 06:58:26 AM UTC 24 |
1712679909 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.2734691561 |
|
|
Aug 27 06:58:14 AM UTC 24 |
Aug 27 06:58:26 AM UTC 24 |
626349696 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.3373427156 |
|
|
Aug 27 06:58:10 AM UTC 24 |
Aug 27 06:58:26 AM UTC 24 |
190788219 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.2192995709 |
|
|
Aug 27 06:58:07 AM UTC 24 |
Aug 27 06:58:27 AM UTC 24 |
478381912 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.3376253474 |
|
|
Aug 27 06:57:38 AM UTC 24 |
Aug 27 07:00:22 AM UTC 24 |
19842941451 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.390096951 |
|
|
Aug 27 06:58:14 AM UTC 24 |
Aug 27 06:58:28 AM UTC 24 |
313116187 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/8.lc_ctrl_stress_all.3329387881 |
|
|
Aug 27 06:55:15 AM UTC 24 |
Aug 27 06:58:28 AM UTC 24 |
20613184391 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_errors.2631857223 |
|
|
Aug 27 06:58:18 AM UTC 24 |
Aug 27 06:58:28 AM UTC 24 |
470959012 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.3826730235 |
|
|
Aug 27 06:58:26 AM UTC 24 |
Aug 27 06:58:29 AM UTC 24 |
77322070 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.1932501679 |
|
|
Aug 27 06:58:24 AM UTC 24 |
Aug 27 06:58:29 AM UTC 24 |
61820552 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.2952754473 |
|
|
Aug 27 06:58:25 AM UTC 24 |
Aug 27 06:58:30 AM UTC 24 |
3660205705 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.886175144 |
|
|
Aug 27 06:58:28 AM UTC 24 |
Aug 27 06:58:30 AM UTC 24 |
19688895 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.1631129674 |
|
|
Aug 27 06:58:26 AM UTC 24 |
Aug 27 06:58:30 AM UTC 24 |
264043314 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.1664185391 |
|
|
Aug 27 06:58:19 AM UTC 24 |
Aug 27 06:58:31 AM UTC 24 |
1167447486 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.3695064172 |
|
|
Aug 27 06:58:18 AM UTC 24 |
Aug 27 06:58:32 AM UTC 24 |
365450431 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.469159455 |
|
|
Aug 27 06:58:28 AM UTC 24 |
Aug 27 06:58:32 AM UTC 24 |
207207834 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.3300435198 |
|
|
Aug 27 06:58:05 AM UTC 24 |
Aug 27 06:58:33 AM UTC 24 |
1058867461 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.834019942 |
|
|
Aug 27 06:58:30 AM UTC 24 |
Aug 27 06:58:33 AM UTC 24 |
107734981 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.1480819156 |
|
|
Aug 27 06:58:31 AM UTC 24 |
Aug 27 06:58:34 AM UTC 24 |
41514383 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.3168561066 |
|
|
Aug 27 06:58:24 AM UTC 24 |
Aug 27 06:58:34 AM UTC 24 |
165947187 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.1733975389 |
|
|
Aug 27 06:58:31 AM UTC 24 |
Aug 27 06:58:34 AM UTC 24 |
25989565 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.226628000 |
|
|
Aug 27 06:58:19 AM UTC 24 |
Aug 27 06:58:34 AM UTC 24 |
1183455873 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.163735628 |
|
|
Aug 27 06:58:32 AM UTC 24 |
Aug 27 06:58:34 AM UTC 24 |
12573532 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.3905276715 |
|
|
Aug 27 06:58:24 AM UTC 24 |
Aug 27 06:58:35 AM UTC 24 |
246733522 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.3622922402 |
|
|
Aug 27 06:58:19 AM UTC 24 |
Aug 27 06:58:35 AM UTC 24 |
390230626 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.19572798 |
|
|
Aug 27 06:58:26 AM UTC 24 |
Aug 27 06:58:36 AM UTC 24 |
262003874 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.94209061 |
|
|
Aug 27 06:58:35 AM UTC 24 |
Aug 27 06:58:45 AM UTC 24 |
1174696461 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_errors.3821841702 |
|
|
Aug 27 06:58:28 AM UTC 24 |
Aug 27 06:58:46 AM UTC 24 |
478210149 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.2313960823 |
|
|
Aug 27 06:58:33 AM UTC 24 |
Aug 27 06:58:38 AM UTC 24 |
241590697 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.375166026 |
|
|
Aug 27 06:58:35 AM UTC 24 |
Aug 27 06:58:38 AM UTC 24 |
59718513 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.2493957177 |
|
|
Aug 27 06:58:36 AM UTC 24 |
Aug 27 06:58:39 AM UTC 24 |
30812385 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.2571855234 |
|
|
Aug 27 06:58:26 AM UTC 24 |
Aug 27 06:58:39 AM UTC 24 |
1518300285 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.1621607835 |
|
|
Aug 27 06:58:28 AM UTC 24 |
Aug 27 06:58:39 AM UTC 24 |
1028900888 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.1000500166 |
|
|
Aug 27 06:58:28 AM UTC 24 |
Aug 27 06:58:39 AM UTC 24 |
71771512 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.2663545431 |
|
|
Aug 27 06:58:26 AM UTC 24 |
Aug 27 06:58:40 AM UTC 24 |
748426543 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.234818213 |
|
|
Aug 27 06:58:39 AM UTC 24 |
Aug 27 06:58:41 AM UTC 24 |
16396248 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.821683051 |
|
|
Aug 27 06:58:30 AM UTC 24 |
Aug 27 06:58:41 AM UTC 24 |
295459002 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.1022349500 |
|
|
Aug 27 06:58:30 AM UTC 24 |
Aug 27 06:58:43 AM UTC 24 |
313436358 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.3972103894 |
|
|
Aug 27 06:58:30 AM UTC 24 |
Aug 27 06:58:43 AM UTC 24 |
786051938 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all_with_rand_reset.3950569682 |
|
|
Aug 27 06:56:54 AM UTC 24 |
Aug 27 06:58:43 AM UTC 24 |
9970428410 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.1656165321 |
|
|
Aug 27 06:58:45 AM UTC 24 |
Aug 27 06:58:47 AM UTC 24 |
24454868 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.609429416 |
|
|
Aug 27 06:58:39 AM UTC 24 |
Aug 27 06:58:43 AM UTC 24 |
355819215 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_errors.907542198 |
|
|
Aug 27 06:58:24 AM UTC 24 |
Aug 27 06:58:43 AM UTC 24 |
2451719715 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.4032178112 |
|
|
Aug 27 06:58:35 AM UTC 24 |
Aug 27 06:58:47 AM UTC 24 |
572014136 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.1825746559 |
|
|
Aug 27 06:58:16 AM UTC 24 |
Aug 27 06:58:44 AM UTC 24 |
487747682 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.726193066 |
|
|
Aug 27 06:58:35 AM UTC 24 |
Aug 27 06:58:45 AM UTC 24 |
650739172 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.3278658255 |
|
|
Aug 27 06:58:40 AM UTC 24 |
Aug 27 06:58:45 AM UTC 24 |
1313900244 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.798432103 |
|
|
Aug 27 06:56:30 AM UTC 24 |
Aug 27 06:58:46 AM UTC 24 |
17350165693 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.274740632 |
|
|
Aug 27 06:58:45 AM UTC 24 |
Aug 27 06:58:48 AM UTC 24 |
37272683 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.582572647 |
|
|
Aug 27 06:58:35 AM UTC 24 |
Aug 27 06:58:48 AM UTC 24 |
3432146373 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.1493255296 |
|
|
Aug 27 06:58:45 AM UTC 24 |
Aug 27 06:58:48 AM UTC 24 |
24440065 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.3922633957 |
|
|
Aug 27 06:58:39 AM UTC 24 |
Aug 27 06:58:48 AM UTC 24 |
330316471 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_errors.532082736 |
|
|
Aug 27 06:58:35 AM UTC 24 |
Aug 27 06:58:49 AM UTC 24 |
548250787 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.2689668130 |
|
|
Aug 27 06:58:45 AM UTC 24 |
Aug 27 06:58:50 AM UTC 24 |
117972984 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.2029696276 |
|
|
Aug 27 06:58:23 AM UTC 24 |
Aug 27 06:58:50 AM UTC 24 |
1203014127 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.2376923166 |
|
|
Aug 27 06:58:28 AM UTC 24 |
Aug 27 06:58:51 AM UTC 24 |
213911262 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.2456545640 |
|
|
Aug 27 06:58:41 AM UTC 24 |
Aug 27 06:58:51 AM UTC 24 |
3138952784 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.291535208 |
|
|
Aug 27 06:58:41 AM UTC 24 |
Aug 27 06:58:51 AM UTC 24 |
2341342768 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.1995771527 |
|
|
Aug 27 06:58:49 AM UTC 24 |
Aug 27 06:58:52 AM UTC 24 |
19274759 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.1765977222 |
|
|
Aug 27 06:58:49 AM UTC 24 |
Aug 27 06:58:52 AM UTC 24 |
70518248 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.3931692848 |
|
|
Aug 27 06:58:49 AM UTC 24 |
Aug 27 06:58:52 AM UTC 24 |
18039227 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.2743024297 |
|
|
Aug 27 06:58:33 AM UTC 24 |
Aug 27 06:58:52 AM UTC 24 |
1584240434 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.1211635840 |
|
|
Aug 27 06:59:10 AM UTC 24 |
Aug 27 06:59:21 AM UTC 24 |
3673584512 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.710555112 |
|
|
Aug 27 06:58:45 AM UTC 24 |
Aug 27 06:58:53 AM UTC 24 |
75191054 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.3711003863 |
|
|
Aug 27 06:57:46 AM UTC 24 |
Aug 27 06:58:53 AM UTC 24 |
25256750264 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.3151955089 |
|
|
Aug 27 06:58:42 AM UTC 24 |
Aug 27 06:58:53 AM UTC 24 |
426414890 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.3507783789 |
|
|
Aug 27 06:58:41 AM UTC 24 |
Aug 27 06:58:55 AM UTC 24 |
5261699735 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.2395657906 |
|
|
Aug 27 06:58:50 AM UTC 24 |
Aug 27 06:58:56 AM UTC 24 |
74050849 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.1510362078 |
|
|
Aug 27 06:58:54 AM UTC 24 |
Aug 27 06:58:56 AM UTC 24 |
23541915 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.3911184315 |
|
|
Aug 27 06:58:47 AM UTC 24 |
Aug 27 06:58:56 AM UTC 24 |
444581499 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.4148905022 |
|
|
Aug 27 06:58:54 AM UTC 24 |
Aug 27 06:58:56 AM UTC 24 |
15687920 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.210782739 |
|
|
Aug 27 06:58:54 AM UTC 24 |
Aug 27 06:58:56 AM UTC 24 |
18559750 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_errors.1039445562 |
|
|
Aug 27 06:58:41 AM UTC 24 |
Aug 27 06:58:57 AM UTC 24 |
2164775308 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.4131528702 |
|
|
Aug 27 06:58:47 AM UTC 24 |
Aug 27 06:58:57 AM UTC 24 |
269402916 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.500453059 |
|
|
Aug 27 06:58:49 AM UTC 24 |
Aug 27 06:58:58 AM UTC 24 |
2178593354 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.3771212028 |
|
|
Aug 27 06:58:47 AM UTC 24 |
Aug 27 06:58:58 AM UTC 24 |
511667186 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.3523311978 |
|
|
Aug 27 06:58:49 AM UTC 24 |
Aug 27 06:58:58 AM UTC 24 |
67967481 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.3077193834 |
|
|
Aug 27 06:58:56 AM UTC 24 |
Aug 27 06:58:59 AM UTC 24 |
81501931 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.3991556762 |
|
|
Aug 27 06:58:42 AM UTC 24 |
Aug 27 06:58:59 AM UTC 24 |
510339876 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all.1800399947 |
|
|
Aug 27 06:58:07 AM UTC 24 |
Aug 27 06:59:00 AM UTC 24 |
4355412563 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_errors.245719915 |
|
|
Aug 27 06:58:45 AM UTC 24 |
Aug 27 06:59:00 AM UTC 24 |
277994243 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.3489482645 |
|
|
Aug 27 06:58:39 AM UTC 24 |
Aug 27 06:59:01 AM UTC 24 |
1823309014 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.1477631928 |
|
|
Aug 27 06:58:59 AM UTC 24 |
Aug 27 06:59:01 AM UTC 24 |
33386647 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.622443271 |
|
|
Aug 27 06:58:56 AM UTC 24 |
Aug 27 06:59:03 AM UTC 24 |
759142400 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.2333174475 |
|
|
Aug 27 06:59:00 AM UTC 24 |
Aug 27 06:59:03 AM UTC 24 |
157636571 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_stress_all_with_rand_reset.887469503 |
|
|
Aug 27 06:58:14 AM UTC 24 |
Aug 27 06:59:04 AM UTC 24 |
2254940047 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.1022015548 |
|
|
Aug 27 06:58:47 AM UTC 24 |
Aug 27 06:59:04 AM UTC 24 |
649662477 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.634402539 |
|
|
Aug 27 06:58:54 AM UTC 24 |
Aug 27 06:59:04 AM UTC 24 |
82781857 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.2965931539 |
|
|
Aug 27 06:58:54 AM UTC 24 |
Aug 27 06:59:23 AM UTC 24 |
296874579 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.956051251 |
|
|
Aug 27 06:58:52 AM UTC 24 |
Aug 27 06:59:05 AM UTC 24 |
249430076 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.563402089 |
|
|
Aug 27 06:58:57 AM UTC 24 |
Aug 27 06:59:05 AM UTC 24 |
1921295570 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.206486176 |
|
|
Aug 27 06:59:02 AM UTC 24 |
Aug 27 06:59:05 AM UTC 24 |
244158492 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.156880936 |
|
|
Aug 27 06:58:57 AM UTC 24 |
Aug 27 06:59:05 AM UTC 24 |
196479538 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.1801051330 |
|
|
Aug 27 06:58:59 AM UTC 24 |
Aug 27 06:59:06 AM UTC 24 |
139111424 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.3641130490 |
|
|
Aug 27 06:58:52 AM UTC 24 |
Aug 27 06:59:06 AM UTC 24 |
326096949 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_errors.105088088 |
|
|
Aug 27 06:58:51 AM UTC 24 |
Aug 27 06:59:06 AM UTC 24 |
1909897333 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all.1994059439 |
|
|
Aug 27 06:57:49 AM UTC 24 |
Aug 27 06:59:07 AM UTC 24 |
2832964931 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.3744580224 |
|
|
Aug 27 06:59:06 AM UTC 24 |
Aug 27 06:59:08 AM UTC 24 |
37266406 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.3923643231 |
|
|
Aug 27 06:58:52 AM UTC 24 |
Aug 27 06:59:09 AM UTC 24 |
302183497 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.2189508893 |
|
|
Aug 27 06:58:59 AM UTC 24 |
Aug 27 06:59:09 AM UTC 24 |
410531421 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.309451971 |
|
|
Aug 27 06:59:07 AM UTC 24 |
Aug 27 06:59:09 AM UTC 24 |
13557500 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.2063919746 |
|
|
Aug 27 06:58:53 AM UTC 24 |
Aug 27 06:59:10 AM UTC 24 |
349303572 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.2929561238 |
|
|
Aug 27 06:59:00 AM UTC 24 |
Aug 27 06:59:10 AM UTC 24 |
72382793 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.3098089215 |
|
|
Aug 27 06:58:57 AM UTC 24 |
Aug 27 06:59:11 AM UTC 24 |
4041671775 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.2493626705 |
|
|
Aug 27 06:59:04 AM UTC 24 |
Aug 27 06:59:11 AM UTC 24 |
393407300 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.911542095 |
|
|
Aug 27 06:58:49 AM UTC 24 |
Aug 27 06:59:12 AM UTC 24 |
634114702 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.2621696757 |
|
|
Aug 27 06:59:06 AM UTC 24 |
Aug 27 06:59:12 AM UTC 24 |
128959843 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_errors.233751206 |
|
|
Aug 27 06:59:02 AM UTC 24 |
Aug 27 06:59:13 AM UTC 24 |
1199952037 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.3355968366 |
|
|
Aug 27 06:59:07 AM UTC 24 |
Aug 27 06:59:14 AM UTC 24 |
117055233 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all_with_rand_reset.1739561803 |
|
|
Aug 27 06:58:26 AM UTC 24 |
Aug 27 06:59:14 AM UTC 24 |
1757405736 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.2520758201 |
|
|
Aug 27 06:59:12 AM UTC 24 |
Aug 27 06:59:15 AM UTC 24 |
28932084 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.971530398 |
|
|
Aug 27 06:58:45 AM UTC 24 |
Aug 27 06:59:15 AM UTC 24 |
536668786 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.276867571 |
|
|
Aug 27 06:59:05 AM UTC 24 |
Aug 27 06:59:15 AM UTC 24 |
694054355 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.3616555408 |
|
|
Aug 27 06:58:52 AM UTC 24 |
Aug 27 06:59:16 AM UTC 24 |
814693231 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.1514721756 |
|
|
Aug 27 06:59:14 AM UTC 24 |
Aug 27 06:59:16 AM UTC 24 |
20905570 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.2993432324 |
|
|
Aug 27 06:59:14 AM UTC 24 |
Aug 27 06:59:16 AM UTC 24 |
143122870 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.1257664630 |
|
|
Aug 27 06:59:07 AM UTC 24 |
Aug 27 06:59:17 AM UTC 24 |
61009926 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.3867470643 |
|
|
Aug 27 06:59:10 AM UTC 24 |
Aug 27 06:59:22 AM UTC 24 |
1397043178 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.3318917665 |
|
|
Aug 27 06:59:03 AM UTC 24 |
Aug 27 06:59:17 AM UTC 24 |
694488972 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.1918815628 |
|
|
Aug 27 06:59:05 AM UTC 24 |
Aug 27 06:59:19 AM UTC 24 |
369349857 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.1300631258 |
|
|
Aug 27 06:59:11 AM UTC 24 |
Aug 27 06:59:22 AM UTC 24 |
469458676 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all_with_rand_reset.3104205280 |
|
|
Aug 27 06:57:19 AM UTC 24 |
Aug 27 06:59:20 AM UTC 24 |
24519417919 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_errors.3814640633 |
|
|
Aug 27 06:59:08 AM UTC 24 |
Aug 27 06:59:20 AM UTC 24 |
1069750474 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.2506972863 |
|
|
Aug 27 06:59:04 AM UTC 24 |
Aug 27 06:59:20 AM UTC 24 |
405626447 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_errors.3829729705 |
|
|
Aug 27 06:58:56 AM UTC 24 |
Aug 27 06:59:20 AM UTC 24 |
1651366232 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.4051778289 |
|
|
Aug 27 06:59:15 AM UTC 24 |
Aug 27 06:59:20 AM UTC 24 |
765966583 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.110680756 |
|
|
Aug 27 06:59:18 AM UTC 24 |
Aug 27 06:59:20 AM UTC 24 |
58051968 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.1034514211 |
|
|
Aug 27 06:59:15 AM UTC 24 |
Aug 27 06:59:23 AM UTC 24 |
271039735 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.2248429112 |
|
|
Aug 27 06:59:11 AM UTC 24 |
Aug 27 06:59:23 AM UTC 24 |
1226510331 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.1086370222 |
|
|
Aug 27 06:59:20 AM UTC 24 |
Aug 27 06:59:24 AM UTC 24 |
205594474 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.3529926716 |
|
|
Aug 27 06:59:22 AM UTC 24 |
Aug 27 06:59:24 AM UTC 24 |
13305265 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.4268443827 |
|
|
Aug 27 06:59:16 AM UTC 24 |
Aug 27 06:59:24 AM UTC 24 |
246886928 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.1161485758 |
|
|
Aug 27 06:59:10 AM UTC 24 |
Aug 27 06:59:25 AM UTC 24 |
1638135254 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.3922467336 |
|
|
Aug 27 06:59:22 AM UTC 24 |
Aug 27 06:59:27 AM UTC 24 |
353728555 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.1374739216 |
|
|
Aug 27 06:59:16 AM UTC 24 |
Aug 27 06:59:27 AM UTC 24 |
2757960308 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.4028636539 |
|
|
Aug 27 06:59:25 AM UTC 24 |
Aug 27 06:59:27 AM UTC 24 |
15714521 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.2403402993 |
|
|
Aug 27 06:59:25 AM UTC 24 |
Aug 27 06:59:28 AM UTC 24 |
12734102 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.1943194851 |
|
|
Aug 27 06:59:18 AM UTC 24 |
Aug 27 06:59:28 AM UTC 24 |
229087893 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_errors.2014477640 |
|
|
Aug 27 06:59:16 AM UTC 24 |
Aug 27 06:59:28 AM UTC 24 |
1601216304 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.1330294374 |
|
|
Aug 27 06:59:25 AM UTC 24 |
Aug 27 06:59:29 AM UTC 24 |
82117812 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.2212608701 |
|
|
Aug 27 06:59:25 AM UTC 24 |
Aug 27 06:59:29 AM UTC 24 |
37893324 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.182256858 |
|
|
Aug 27 06:59:22 AM UTC 24 |
Aug 27 06:59:31 AM UTC 24 |
437252292 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.488992712 |
|
|
Aug 27 06:59:22 AM UTC 24 |
Aug 27 06:59:31 AM UTC 24 |
2215433675 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.3628956303 |
|
|
Aug 27 06:59:00 AM UTC 24 |
Aug 27 06:59:31 AM UTC 24 |
507583257 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_errors.2039685515 |
|
|
Aug 27 06:59:22 AM UTC 24 |
Aug 27 06:59:31 AM UTC 24 |
1177671595 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.566102335 |
|
|
Aug 27 06:59:07 AM UTC 24 |
Aug 27 06:59:32 AM UTC 24 |
703006002 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_stress_all_with_rand_reset.823821698 |
|
|
Aug 27 06:57:26 AM UTC 24 |
Aug 27 06:59:32 AM UTC 24 |
13538805078 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.3924574557 |
|
|
Aug 27 06:59:22 AM UTC 24 |
Aug 27 06:59:32 AM UTC 24 |
55344048 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.3545596889 |
|
|
Aug 27 06:59:23 AM UTC 24 |
Aug 27 06:59:32 AM UTC 24 |
184030166 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.1507877044 |
|
|
Aug 27 06:59:25 AM UTC 24 |
Aug 27 06:59:33 AM UTC 24 |
252076420 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.318785703 |
|
|
Aug 27 06:59:30 AM UTC 24 |
Aug 27 06:59:33 AM UTC 24 |
63492153 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.507749807 |
|
|
Aug 27 06:59:31 AM UTC 24 |
Aug 27 06:59:35 AM UTC 24 |
156101977 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.2170872215 |
|
|
Aug 27 06:59:22 AM UTC 24 |
Aug 27 06:59:36 AM UTC 24 |
716514632 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.828455005 |
|
|
Aug 27 06:59:33 AM UTC 24 |
Aug 27 06:59:36 AM UTC 24 |
14155499 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all.569006367 |
|
|
Aug 27 06:57:55 AM UTC 24 |
Aug 27 06:59:36 AM UTC 24 |
6176751625 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_security_escalation.1258729499 |
|
|
Aug 27 06:59:28 AM UTC 24 |
Aug 27 06:59:37 AM UTC 24 |
175068104 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_prog_failure.3482170735 |
|
|
Aug 27 06:59:33 AM UTC 24 |
Aug 27 06:59:37 AM UTC 24 |
54184347 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_sec_token_mux.2240948001 |
|
|
Aug 27 06:59:29 AM UTC 24 |
Aug 27 06:59:39 AM UTC 24 |
219279879 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_errors.1451153093 |
|
|
Aug 27 06:59:27 AM UTC 24 |
Aug 27 06:59:39 AM UTC 24 |
908971371 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_alert_test.137277207 |
|
|
Aug 27 06:59:37 AM UTC 24 |
Aug 27 06:59:39 AM UTC 24 |
18301047 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_stress_all_with_rand_reset.3954012065 |
|
|
Aug 27 06:58:59 AM UTC 24 |
Aug 27 06:59:39 AM UTC 24 |
10532697940 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.2906382755 |
|
|
Aug 27 06:59:16 AM UTC 24 |
Aug 27 06:59:40 AM UTC 24 |
3772114054 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_26/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_stress_all.3146775705 |
|
|
Aug 27 06:59:23 AM UTC 24 |
Aug 27 07:00:15 AM UTC 24 |
1307279400 ps |