| T352 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.1707310408 |
|
|
Sep 01 12:33:43 PM UTC 24 |
Sep 01 12:34:07 PM UTC 24 |
937374419 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.1001566407 |
|
|
Sep 01 12:33:53 PM UTC 24 |
Sep 01 12:34:08 PM UTC 24 |
1142918754 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_errors.3145198849 |
|
|
Sep 01 12:33:45 PM UTC 24 |
Sep 01 12:34:08 PM UTC 24 |
619294342 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.2122998773 |
|
|
Sep 01 12:33:29 PM UTC 24 |
Sep 01 12:34:08 PM UTC 24 |
252791407 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.349138220 |
|
|
Sep 01 12:34:05 PM UTC 24 |
Sep 01 12:34:10 PM UTC 24 |
162688668 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.4055676255 |
|
|
Sep 01 12:34:08 PM UTC 24 |
Sep 01 12:34:12 PM UTC 24 |
52595615 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.509674933 |
|
|
Sep 01 12:33:56 PM UTC 24 |
Sep 01 12:34:12 PM UTC 24 |
396874723 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_post_trans.3507427978 |
|
|
Sep 01 12:34:01 PM UTC 24 |
Sep 01 12:34:14 PM UTC 24 |
1010489853 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.3063941306 |
|
|
Sep 01 12:34:14 PM UTC 24 |
Sep 01 12:34:16 PM UTC 24 |
98042547 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.3539985048 |
|
|
Sep 01 12:34:09 PM UTC 24 |
Sep 01 12:34:16 PM UTC 24 |
3692999619 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_errors.3103567723 |
|
|
Sep 01 12:34:03 PM UTC 24 |
Sep 01 12:34:17 PM UTC 24 |
221595519 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.3208988587 |
|
|
Sep 01 12:34:15 PM UTC 24 |
Sep 01 12:34:18 PM UTC 24 |
36513761 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.3445855615 |
|
|
Sep 01 12:34:08 PM UTC 24 |
Sep 01 12:34:19 PM UTC 24 |
782534888 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.830319976 |
|
|
Sep 01 12:35:23 PM UTC 24 |
Sep 01 12:35:25 PM UTC 24 |
63219710 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.3236740957 |
|
|
Sep 01 12:34:05 PM UTC 24 |
Sep 01 12:34:19 PM UTC 24 |
670608386 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.300526290 |
|
|
Sep 01 12:31:30 PM UTC 24 |
Sep 01 12:34:19 PM UTC 24 |
11595038387 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.195724171 |
|
|
Sep 01 12:33:50 PM UTC 24 |
Sep 01 12:34:19 PM UTC 24 |
3283339953 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.1645477136 |
|
|
Sep 01 12:34:17 PM UTC 24 |
Sep 01 12:34:19 PM UTC 24 |
14223357 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.3932968750 |
|
|
Sep 01 12:34:09 PM UTC 24 |
Sep 01 12:34:23 PM UTC 24 |
324930806 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.635825155 |
|
|
Sep 01 12:34:09 PM UTC 24 |
Sep 01 12:34:24 PM UTC 24 |
553682415 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.3758791559 |
|
|
Sep 01 12:34:01 PM UTC 24 |
Sep 01 12:34:24 PM UTC 24 |
762826797 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.3786304863 |
|
|
Sep 01 12:34:19 PM UTC 24 |
Sep 01 12:34:25 PM UTC 24 |
589725570 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.2552452398 |
|
|
Sep 01 12:34:21 PM UTC 24 |
Sep 01 12:34:27 PM UTC 24 |
1100466740 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.3824379288 |
|
|
Sep 01 12:34:19 PM UTC 24 |
Sep 01 12:34:30 PM UTC 24 |
503255786 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.4179372162 |
|
|
Sep 01 12:34:18 PM UTC 24 |
Sep 01 12:34:30 PM UTC 24 |
260302868 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.1309233553 |
|
|
Sep 01 12:34:09 PM UTC 24 |
Sep 01 12:34:31 PM UTC 24 |
1140396907 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.3212823863 |
|
|
Sep 01 12:34:24 PM UTC 24 |
Sep 01 12:34:33 PM UTC 24 |
162660678 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.810209147 |
|
|
Sep 01 12:33:33 PM UTC 24 |
Sep 01 12:34:34 PM UTC 24 |
1885981083 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.3185138745 |
|
|
Sep 01 12:34:19 PM UTC 24 |
Sep 01 12:34:35 PM UTC 24 |
305254861 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.1420555228 |
|
|
Sep 01 12:34:21 PM UTC 24 |
Sep 01 12:34:36 PM UTC 24 |
769828954 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.1943526108 |
|
|
Sep 01 12:34:34 PM UTC 24 |
Sep 01 12:34:36 PM UTC 24 |
62158204 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.2543804805 |
|
|
Sep 01 12:34:25 PM UTC 24 |
Sep 01 12:34:37 PM UTC 24 |
381295163 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.3938503144 |
|
|
Sep 01 12:34:36 PM UTC 24 |
Sep 01 12:34:39 PM UTC 24 |
14430513 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.1151344471 |
|
|
Sep 01 12:34:35 PM UTC 24 |
Sep 01 12:34:39 PM UTC 24 |
30779094 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.128846815 |
|
|
Sep 01 12:34:39 PM UTC 24 |
Sep 01 12:34:42 PM UTC 24 |
95993097 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.1917905825 |
|
|
Sep 01 12:34:28 PM UTC 24 |
Sep 01 12:34:43 PM UTC 24 |
1184886018 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.570670375 |
|
|
Sep 01 12:34:25 PM UTC 24 |
Sep 01 12:34:48 PM UTC 24 |
7259038546 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.3685470663 |
|
|
Sep 01 12:34:43 PM UTC 24 |
Sep 01 12:34:48 PM UTC 24 |
586007606 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.2050536351 |
|
|
Sep 01 12:34:40 PM UTC 24 |
Sep 01 12:34:49 PM UTC 24 |
188809852 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.616257543 |
|
|
Sep 01 12:34:37 PM UTC 24 |
Sep 01 12:34:50 PM UTC 24 |
90528792 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.2344314418 |
|
|
Sep 01 12:34:17 PM UTC 24 |
Sep 01 12:34:51 PM UTC 24 |
1123544749 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.2692741304 |
|
|
Sep 01 12:34:40 PM UTC 24 |
Sep 01 12:34:53 PM UTC 24 |
811378749 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.4053625672 |
|
|
Sep 01 12:34:51 PM UTC 24 |
Sep 01 12:34:56 PM UTC 24 |
325184720 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/7.lc_ctrl_stress_all.1357105010 |
|
|
Sep 01 12:32:43 PM UTC 24 |
Sep 01 12:34:56 PM UTC 24 |
11076829593 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.2693296706 |
|
|
Sep 01 12:33:51 PM UTC 24 |
Sep 01 12:35:03 PM UTC 24 |
2366544988 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.1926320238 |
|
|
Sep 01 12:34:49 PM UTC 24 |
Sep 01 12:35:04 PM UTC 24 |
1056769509 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.1358453826 |
|
|
Sep 01 12:35:04 PM UTC 24 |
Sep 01 12:35:06 PM UTC 24 |
20018818 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.1915178334 |
|
|
Sep 01 12:34:31 PM UTC 24 |
Sep 01 12:35:08 PM UTC 24 |
4513444559 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.3423306031 |
|
|
Sep 01 12:35:05 PM UTC 24 |
Sep 01 12:35:09 PM UTC 24 |
64921561 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.2712032305 |
|
|
Sep 01 12:34:49 PM UTC 24 |
Sep 01 12:35:09 PM UTC 24 |
1006688606 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.3233166778 |
|
|
Sep 01 12:33:37 PM UTC 24 |
Sep 01 12:35:09 PM UTC 24 |
3072522361 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.2253288773 |
|
|
Sep 01 12:35:07 PM UTC 24 |
Sep 01 12:35:10 PM UTC 24 |
71910884 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.3789813420 |
|
|
Sep 01 12:34:54 PM UTC 24 |
Sep 01 12:35:11 PM UTC 24 |
711674083 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.2088933345 |
|
|
Sep 01 12:34:21 PM UTC 24 |
Sep 01 12:35:11 PM UTC 24 |
1075222956 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.2178415349 |
|
|
Sep 01 12:33:14 PM UTC 24 |
Sep 01 12:35:11 PM UTC 24 |
3502260822 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.2342880776 |
|
|
Sep 01 12:35:16 PM UTC 24 |
Sep 01 12:35:20 PM UTC 24 |
304530982 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.2017691202 |
|
|
Sep 01 12:34:05 PM UTC 24 |
Sep 01 12:35:21 PM UTC 24 |
2335966858 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.3009125316 |
|
|
Sep 01 12:35:23 PM UTC 24 |
Sep 01 12:35:29 PM UTC 24 |
68562704 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all_with_rand_reset.1217066476 |
|
|
Sep 01 12:33:39 PM UTC 24 |
Sep 01 12:35:12 PM UTC 24 |
6152570253 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.597938230 |
|
|
Sep 01 12:34:57 PM UTC 24 |
Sep 01 12:35:13 PM UTC 24 |
933042801 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.407485949 |
|
|
Sep 01 12:34:52 PM UTC 24 |
Sep 01 12:35:14 PM UTC 24 |
564639392 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.1943751052 |
|
|
Sep 01 12:34:37 PM UTC 24 |
Sep 01 12:35:14 PM UTC 24 |
635776485 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.1020250909 |
|
|
Sep 01 12:35:11 PM UTC 24 |
Sep 01 12:35:16 PM UTC 24 |
44214694 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.2430173088 |
|
|
Sep 01 12:34:25 PM UTC 24 |
Sep 01 12:35:17 PM UTC 24 |
11765486365 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.4054243285 |
|
|
Sep 01 12:33:47 PM UTC 24 |
Sep 01 12:35:20 PM UTC 24 |
2098993851 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.1770025583 |
|
|
Sep 01 12:35:10 PM UTC 24 |
Sep 01 12:35:21 PM UTC 24 |
194266940 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.3837109738 |
|
|
Sep 01 12:35:12 PM UTC 24 |
Sep 01 12:35:21 PM UTC 24 |
631407028 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.1052187373 |
|
|
Sep 01 12:35:16 PM UTC 24 |
Sep 01 12:35:27 PM UTC 24 |
297484997 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.4245077160 |
|
|
Sep 01 12:35:11 PM UTC 24 |
Sep 01 12:35:28 PM UTC 24 |
2909100524 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.3745068727 |
|
|
Sep 01 12:35:11 PM UTC 24 |
Sep 01 12:35:31 PM UTC 24 |
2906913853 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.3545849808 |
|
|
Sep 01 12:35:13 PM UTC 24 |
Sep 01 12:35:31 PM UTC 24 |
1567157850 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.885593571 |
|
|
Sep 01 12:35:28 PM UTC 24 |
Sep 01 12:35:32 PM UTC 24 |
337671924 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.2365182498 |
|
|
Sep 01 12:35:16 PM UTC 24 |
Sep 01 12:35:33 PM UTC 24 |
2375485903 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.208446248 |
|
|
Sep 01 12:35:31 PM UTC 24 |
Sep 01 12:35:35 PM UTC 24 |
535980592 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.2946317092 |
|
|
Sep 01 12:34:10 PM UTC 24 |
Sep 01 12:35:35 PM UTC 24 |
11754949485 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.1839347537 |
|
|
Sep 01 12:33:56 PM UTC 24 |
Sep 01 12:35:35 PM UTC 24 |
3350428600 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.1459443368 |
|
|
Sep 01 12:35:30 PM UTC 24 |
Sep 01 12:35:39 PM UTC 24 |
514397866 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.2305592682 |
|
|
Sep 01 12:35:26 PM UTC 24 |
Sep 01 12:35:41 PM UTC 24 |
631554902 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.527977190 |
|
|
Sep 01 12:35:09 PM UTC 24 |
Sep 01 12:35:43 PM UTC 24 |
1038016339 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.1917811535 |
|
|
Sep 01 12:35:33 PM UTC 24 |
Sep 01 12:35:44 PM UTC 24 |
889839809 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.3098264659 |
|
|
Sep 01 12:35:28 PM UTC 24 |
Sep 01 12:35:45 PM UTC 24 |
738311668 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.1294460915 |
|
|
Sep 01 12:35:44 PM UTC 24 |
Sep 01 12:35:46 PM UTC 24 |
29186487 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.2707141731 |
|
|
Sep 01 12:34:08 PM UTC 24 |
Sep 01 12:35:48 PM UTC 24 |
2466337700 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.468297217 |
|
|
Sep 01 12:35:48 PM UTC 24 |
Sep 01 12:35:50 PM UTC 24 |
42450889 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.4113182737 |
|
|
Sep 01 12:35:45 PM UTC 24 |
Sep 01 12:35:50 PM UTC 24 |
32513347 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.1587498726 |
|
|
Sep 01 12:35:17 PM UTC 24 |
Sep 01 12:35:51 PM UTC 24 |
3593135329 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.1458427490 |
|
|
Sep 01 12:35:32 PM UTC 24 |
Sep 01 12:35:54 PM UTC 24 |
1354452619 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.79100111 |
|
|
Sep 01 12:35:36 PM UTC 24 |
Sep 01 12:35:54 PM UTC 24 |
3603923033 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.1895470791 |
|
|
Sep 01 12:35:37 PM UTC 24 |
Sep 01 12:35:56 PM UTC 24 |
730055607 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.3419381378 |
|
|
Sep 01 12:35:36 PM UTC 24 |
Sep 01 12:35:58 PM UTC 24 |
6450861476 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.2062830546 |
|
|
Sep 01 12:35:40 PM UTC 24 |
Sep 01 12:35:58 PM UTC 24 |
3300702941 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.2474706647 |
|
|
Sep 01 12:33:39 PM UTC 24 |
Sep 01 12:35:58 PM UTC 24 |
5400160064 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.1736891643 |
|
|
Sep 01 12:35:51 PM UTC 24 |
Sep 01 12:35:58 PM UTC 24 |
1085019662 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.935524865 |
|
|
Sep 01 12:34:12 PM UTC 24 |
Sep 01 12:35:59 PM UTC 24 |
9442090961 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.3788602170 |
|
|
Sep 01 12:35:55 PM UTC 24 |
Sep 01 12:36:01 PM UTC 24 |
318210544 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.3197847485 |
|
|
Sep 01 12:35:51 PM UTC 24 |
Sep 01 12:36:03 PM UTC 24 |
200964540 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.1662358571 |
|
|
Sep 01 12:35:03 PM UTC 24 |
Sep 01 12:36:04 PM UTC 24 |
2614621573 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.3500486344 |
|
|
Sep 01 12:35:26 PM UTC 24 |
Sep 01 12:36:05 PM UTC 24 |
471883215 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.3112738079 |
|
|
Sep 01 12:35:52 PM UTC 24 |
Sep 01 12:36:09 PM UTC 24 |
333935402 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.2631322157 |
|
|
Sep 01 12:35:54 PM UTC 24 |
Sep 01 12:36:10 PM UTC 24 |
346057845 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.2312682247 |
|
|
Sep 01 12:35:12 PM UTC 24 |
Sep 01 12:36:11 PM UTC 24 |
8952824277 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.3007263361 |
|
|
Sep 01 12:35:59 PM UTC 24 |
Sep 01 12:36:12 PM UTC 24 |
637100809 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.2353741055 |
|
|
Sep 01 12:36:10 PM UTC 24 |
Sep 01 12:36:12 PM UTC 24 |
32526130 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.3539713487 |
|
|
Sep 01 12:36:02 PM UTC 24 |
Sep 01 12:36:14 PM UTC 24 |
267398129 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.1849032794 |
|
|
Sep 01 12:36:12 PM UTC 24 |
Sep 01 12:36:14 PM UTC 24 |
16771620 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.2407361376 |
|
|
Sep 01 12:36:11 PM UTC 24 |
Sep 01 12:36:15 PM UTC 24 |
217059352 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.1161082451 |
|
|
Sep 01 12:35:34 PM UTC 24 |
Sep 01 12:36:16 PM UTC 24 |
898578483 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.4105661747 |
|
|
Sep 01 12:36:01 PM UTC 24 |
Sep 01 12:36:17 PM UTC 24 |
1603311960 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all.4253246965 |
|
|
Sep 01 12:31:05 PM UTC 24 |
Sep 01 12:36:19 PM UTC 24 |
37297814409 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.2392998408 |
|
|
Sep 01 12:35:59 PM UTC 24 |
Sep 01 12:36:20 PM UTC 24 |
839168471 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.725963717 |
|
|
Sep 01 12:36:17 PM UTC 24 |
Sep 01 12:36:24 PM UTC 24 |
520951279 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.2995362687 |
|
|
Sep 01 12:36:01 PM UTC 24 |
Sep 01 12:36:25 PM UTC 24 |
694731489 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.1733714277 |
|
|
Sep 01 12:36:15 PM UTC 24 |
Sep 01 12:36:25 PM UTC 24 |
167831117 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.2773195976 |
|
|
Sep 01 12:36:13 PM UTC 24 |
Sep 01 12:36:26 PM UTC 24 |
102146293 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.2945127105 |
|
|
Sep 01 12:35:50 PM UTC 24 |
Sep 01 12:36:29 PM UTC 24 |
599245699 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.1056656991 |
|
|
Sep 01 12:34:44 PM UTC 24 |
Sep 01 12:36:31 PM UTC 24 |
1485139263 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.3410194910 |
|
|
Sep 01 12:36:03 PM UTC 24 |
Sep 01 12:36:31 PM UTC 24 |
6183526045 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.252523022 |
|
|
Sep 01 12:36:20 PM UTC 24 |
Sep 01 12:36:31 PM UTC 24 |
733537527 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.3301804435 |
|
|
Sep 01 12:35:44 PM UTC 24 |
Sep 01 12:36:32 PM UTC 24 |
7924526961 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.1774614518 |
|
|
Sep 01 12:36:27 PM UTC 24 |
Sep 01 12:36:34 PM UTC 24 |
1114358282 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.2605031775 |
|
|
Sep 01 12:36:49 PM UTC 24 |
Sep 01 12:37:00 PM UTC 24 |
1315663614 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.2871943323 |
|
|
Sep 01 12:36:33 PM UTC 24 |
Sep 01 12:36:35 PM UTC 24 |
26351776 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.1327999866 |
|
|
Sep 01 12:35:32 PM UTC 24 |
Sep 01 12:36:35 PM UTC 24 |
9775575112 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.1716232148 |
|
|
Sep 01 12:36:15 PM UTC 24 |
Sep 01 12:36:37 PM UTC 24 |
1400295320 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.2306807367 |
|
|
Sep 01 12:36:35 PM UTC 24 |
Sep 01 12:36:37 PM UTC 24 |
19106479 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.2385242572 |
|
|
Sep 01 12:36:33 PM UTC 24 |
Sep 01 12:36:37 PM UTC 24 |
38623285 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.484830098 |
|
|
Sep 01 12:36:17 PM UTC 24 |
Sep 01 12:36:40 PM UTC 24 |
413324527 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.3322292997 |
|
|
Sep 01 12:36:36 PM UTC 24 |
Sep 01 12:36:41 PM UTC 24 |
50068701 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.2579454769 |
|
|
Sep 01 12:36:01 PM UTC 24 |
Sep 01 12:36:41 PM UTC 24 |
5487005051 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.4042776428 |
|
|
Sep 01 12:36:20 PM UTC 24 |
Sep 01 12:36:44 PM UTC 24 |
1950758464 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.3884669208 |
|
|
Sep 01 12:36:27 PM UTC 24 |
Sep 01 12:36:45 PM UTC 24 |
1034780102 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.3437830818 |
|
|
Sep 01 12:36:39 PM UTC 24 |
Sep 01 12:36:46 PM UTC 24 |
188197709 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all_with_rand_reset.2100469563 |
|
|
Sep 01 12:35:22 PM UTC 24 |
Sep 01 12:36:46 PM UTC 24 |
3159165221 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.3945122175 |
|
|
Sep 01 12:35:12 PM UTC 24 |
Sep 01 12:36:47 PM UTC 24 |
1942013318 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.3629669066 |
|
|
Sep 01 12:36:30 PM UTC 24 |
Sep 01 12:36:49 PM UTC 24 |
711505812 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.1728265158 |
|
|
Sep 01 12:34:49 PM UTC 24 |
Sep 01 12:36:52 PM UTC 24 |
15042382760 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.4265326818 |
|
|
Sep 01 12:36:36 PM UTC 24 |
Sep 01 12:36:52 PM UTC 24 |
782008801 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.963853191 |
|
|
Sep 01 12:35:15 PM UTC 24 |
Sep 01 12:36:54 PM UTC 24 |
6762171505 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.1978302148 |
|
|
Sep 01 12:36:27 PM UTC 24 |
Sep 01 12:36:55 PM UTC 24 |
1506739878 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.217290839 |
|
|
Sep 01 12:36:52 PM UTC 24 |
Sep 01 12:36:55 PM UTC 24 |
64759579 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.3781102794 |
|
|
Sep 01 12:36:39 PM UTC 24 |
Sep 01 12:36:56 PM UTC 24 |
1362635070 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.1493081094 |
|
|
Sep 01 12:36:42 PM UTC 24 |
Sep 01 12:36:57 PM UTC 24 |
491761606 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.266984862 |
|
|
Sep 01 12:36:54 PM UTC 24 |
Sep 01 12:36:57 PM UTC 24 |
25925908 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.2260846422 |
|
|
Sep 01 12:36:56 PM UTC 24 |
Sep 01 12:36:58 PM UTC 24 |
12618656 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.1126817938 |
|
|
Sep 01 12:36:47 PM UTC 24 |
Sep 01 12:37:00 PM UTC 24 |
906051074 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.2478375558 |
|
|
Sep 01 12:36:38 PM UTC 24 |
Sep 01 12:37:01 PM UTC 24 |
1130612218 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.519260111 |
|
|
Sep 01 12:36:42 PM UTC 24 |
Sep 01 12:37:01 PM UTC 24 |
1547660180 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.1773498689 |
|
|
Sep 01 12:36:47 PM UTC 24 |
Sep 01 12:37:01 PM UTC 24 |
1272236438 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.1344269494 |
|
|
Sep 01 12:36:57 PM UTC 24 |
Sep 01 12:37:02 PM UTC 24 |
57278980 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.2193119870 |
|
|
Sep 01 12:35:56 PM UTC 24 |
Sep 01 12:37:03 PM UTC 24 |
1283069490 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.1995427007 |
|
|
Sep 01 12:36:13 PM UTC 24 |
Sep 01 12:37:05 PM UTC 24 |
1697967115 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.4004614562 |
|
|
Sep 01 12:37:00 PM UTC 24 |
Sep 01 12:37:06 PM UTC 24 |
165669563 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.3810386987 |
|
|
Sep 01 12:37:04 PM UTC 24 |
Sep 01 12:37:07 PM UTC 24 |
61236773 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.3640690501 |
|
|
Sep 01 12:37:06 PM UTC 24 |
Sep 01 12:37:08 PM UTC 24 |
15747497 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.937760124 |
|
|
Sep 01 12:36:18 PM UTC 24 |
Sep 01 12:37:09 PM UTC 24 |
2773722897 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1271258169 |
|
|
Sep 01 12:37:07 PM UTC 24 |
Sep 01 12:37:09 PM UTC 24 |
62097182 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.3512249316 |
|
|
Sep 01 12:36:57 PM UTC 24 |
Sep 01 12:37:09 PM UTC 24 |
313058724 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.225591652 |
|
|
Sep 01 12:36:46 PM UTC 24 |
Sep 01 12:37:10 PM UTC 24 |
791315425 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.3538040858 |
|
|
Sep 01 12:37:02 PM UTC 24 |
Sep 01 12:37:11 PM UTC 24 |
234016341 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.1342708914 |
|
|
Sep 01 12:37:10 PM UTC 24 |
Sep 01 12:37:14 PM UTC 24 |
67695630 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.663933045 |
|
|
Sep 01 12:37:10 PM UTC 24 |
Sep 01 12:37:15 PM UTC 24 |
71076348 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.2547168007 |
|
|
Sep 01 12:36:59 PM UTC 24 |
Sep 01 12:37:16 PM UTC 24 |
818212747 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.736132140 |
|
|
Sep 01 12:37:02 PM UTC 24 |
Sep 01 12:37:16 PM UTC 24 |
347489270 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.2827645216 |
|
|
Sep 01 12:35:42 PM UTC 24 |
Sep 01 12:37:17 PM UTC 24 |
45921017095 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all.2418531904 |
|
|
Sep 01 12:33:26 PM UTC 24 |
Sep 01 12:37:18 PM UTC 24 |
33364294980 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.1771652732 |
|
|
Sep 01 12:36:58 PM UTC 24 |
Sep 01 12:37:19 PM UTC 24 |
1535269283 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.3097920845 |
|
|
Sep 01 12:37:09 PM UTC 24 |
Sep 01 12:37:21 PM UTC 24 |
98259485 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.561234416 |
|
|
Sep 01 12:37:19 PM UTC 24 |
Sep 01 12:37:21 PM UTC 24 |
102066440 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.1760805496 |
|
|
Sep 01 12:37:10 PM UTC 24 |
Sep 01 12:37:22 PM UTC 24 |
182096784 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.2811121803 |
|
|
Sep 01 12:37:20 PM UTC 24 |
Sep 01 12:37:22 PM UTC 24 |
132376158 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.1814198646 |
|
|
Sep 01 12:36:45 PM UTC 24 |
Sep 01 12:37:23 PM UTC 24 |
1264636718 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2754891526 |
|
|
Sep 01 12:37:57 PM UTC 24 |
Sep 01 12:38:07 PM UTC 24 |
236383947 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.99495827 |
|
|
Sep 01 12:36:07 PM UTC 24 |
Sep 01 12:37:23 PM UTC 24 |
11709502799 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.117712310 |
|
|
Sep 01 12:36:36 PM UTC 24 |
Sep 01 12:37:23 PM UTC 24 |
248450789 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.750021542 |
|
|
Sep 01 12:37:15 PM UTC 24 |
Sep 01 12:37:26 PM UTC 24 |
571373356 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.1242780791 |
|
|
Sep 01 12:37:23 PM UTC 24 |
Sep 01 12:37:27 PM UTC 24 |
196477570 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.748702377 |
|
|
Sep 01 12:37:19 PM UTC 24 |
Sep 01 12:37:27 PM UTC 24 |
146099720 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.955141761 |
|
|
Sep 01 12:37:02 PM UTC 24 |
Sep 01 12:37:28 PM UTC 24 |
873081552 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.386331153 |
|
|
Sep 01 12:37:12 PM UTC 24 |
Sep 01 12:37:29 PM UTC 24 |
524114211 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.2100130345 |
|
|
Sep 01 12:37:10 PM UTC 24 |
Sep 01 12:37:30 PM UTC 24 |
696287179 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.3417465510 |
|
|
Sep 01 12:37:29 PM UTC 24 |
Sep 01 12:37:32 PM UTC 24 |
24177177 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.1857251209 |
|
|
Sep 01 12:37:31 PM UTC 24 |
Sep 01 12:37:33 PM UTC 24 |
14599972 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.336821703 |
|
|
Sep 01 12:37:25 PM UTC 24 |
Sep 01 12:37:34 PM UTC 24 |
1309490915 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.341628135 |
|
|
Sep 01 12:37:16 PM UTC 24 |
Sep 01 12:37:35 PM UTC 24 |
688924580 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.2368853643 |
|
|
Sep 01 12:37:25 PM UTC 24 |
Sep 01 12:37:36 PM UTC 24 |
373124623 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.232401572 |
|
|
Sep 01 12:37:25 PM UTC 24 |
Sep 01 12:37:36 PM UTC 24 |
226773122 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.3792705808 |
|
|
Sep 01 12:36:56 PM UTC 24 |
Sep 01 12:37:38 PM UTC 24 |
1060846111 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.2045855638 |
|
|
Sep 01 12:37:31 PM UTC 24 |
Sep 01 12:37:38 PM UTC 24 |
72697413 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.3984014199 |
|
|
Sep 01 12:37:22 PM UTC 24 |
Sep 01 12:37:38 PM UTC 24 |
200526325 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.3298237168 |
|
|
Sep 01 12:37:23 PM UTC 24 |
Sep 01 12:37:39 PM UTC 24 |
714456753 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.3802560164 |
|
|
Sep 01 12:37:34 PM UTC 24 |
Sep 01 12:37:39 PM UTC 24 |
49273197 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.3760499932 |
|
|
Sep 01 12:36:24 PM UTC 24 |
Sep 01 12:37:41 PM UTC 24 |
2157978481 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.1889081852 |
|
|
Sep 01 12:37:25 PM UTC 24 |
Sep 01 12:37:41 PM UTC 24 |
1453946418 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.2728362873 |
|
|
Sep 01 12:37:27 PM UTC 24 |
Sep 01 12:37:42 PM UTC 24 |
2356033538 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.1257737376 |
|
|
Sep 01 12:37:27 PM UTC 24 |
Sep 01 12:37:42 PM UTC 24 |
1373018758 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.853803790 |
|
|
Sep 01 12:37:41 PM UTC 24 |
Sep 01 12:37:44 PM UTC 24 |
18293602 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.2658437535 |
|
|
Sep 01 12:37:34 PM UTC 24 |
Sep 01 12:37:45 PM UTC 24 |
60603528 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.3677190688 |
|
|
Sep 01 12:37:37 PM UTC 24 |
Sep 01 12:37:45 PM UTC 24 |
206505345 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.1322101869 |
|
|
Sep 01 12:37:43 PM UTC 24 |
Sep 01 12:37:46 PM UTC 24 |
45127668 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.2891553314 |
|
|
Sep 01 12:36:41 PM UTC 24 |
Sep 01 12:37:46 PM UTC 24 |
3147238987 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.1360252710 |
|
|
Sep 01 12:36:04 PM UTC 24 |
Sep 01 12:37:46 PM UTC 24 |
7990143129 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all_with_rand_reset.4069972249 |
|
|
Sep 01 12:36:33 PM UTC 24 |
Sep 01 12:37:48 PM UTC 24 |
9936526183 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.899737332 |
|
|
Sep 01 12:37:43 PM UTC 24 |
Sep 01 12:37:49 PM UTC 24 |
125297874 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.4147704123 |
|
|
Sep 01 12:37:44 PM UTC 24 |
Sep 01 12:37:49 PM UTC 24 |
151397875 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.4020940380 |
|
|
Sep 01 12:37:47 PM UTC 24 |
Sep 01 12:37:53 PM UTC 24 |
226865652 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.1586514457 |
|
|
Sep 01 12:37:37 PM UTC 24 |
Sep 01 12:37:53 PM UTC 24 |
952075569 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.2458160805 |
|
|
Sep 01 12:37:39 PM UTC 24 |
Sep 01 12:37:53 PM UTC 24 |
2523619307 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.968860346 |
|
|
Sep 01 12:37:36 PM UTC 24 |
Sep 01 12:37:54 PM UTC 24 |
889705188 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.1678318413 |
|
|
Sep 01 12:37:43 PM UTC 24 |
Sep 01 12:37:54 PM UTC 24 |
87827728 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/6.lc_ctrl_stress_all.1767259137 |
|
|
Sep 01 12:32:21 PM UTC 24 |
Sep 01 12:37:55 PM UTC 24 |
20543610187 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.3286383311 |
|
|
Sep 01 12:37:39 PM UTC 24 |
Sep 01 12:37:55 PM UTC 24 |
945509059 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.2208785894 |
|
|
Sep 01 12:37:33 PM UTC 24 |
Sep 01 12:37:55 PM UTC 24 |
736527819 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.758267378 |
|
|
Sep 01 12:37:08 PM UTC 24 |
Sep 01 12:37:56 PM UTC 24 |
3263720991 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_errors.2569714157 |
|
|
Sep 01 12:37:45 PM UTC 24 |
Sep 01 12:37:57 PM UTC 24 |
1405130711 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.1495346987 |
|
|
Sep 01 12:37:55 PM UTC 24 |
Sep 01 12:37:57 PM UTC 24 |
75144500 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.2182033452 |
|
|
Sep 01 12:37:22 PM UTC 24 |
Sep 01 12:37:57 PM UTC 24 |
822299481 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.287714907 |
|
|
Sep 01 12:37:55 PM UTC 24 |
Sep 01 12:37:57 PM UTC 24 |
21998670 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.3589507492 |
|
|
Sep 01 12:37:55 PM UTC 24 |
Sep 01 12:37:58 PM UTC 24 |
17845041 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.585125997 |
|
|
Sep 01 12:37:56 PM UTC 24 |
Sep 01 12:38:01 PM UTC 24 |
246329663 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.1587958257 |
|
|
Sep 01 12:37:47 PM UTC 24 |
Sep 01 12:38:03 PM UTC 24 |
666573466 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.2737273215 |
|
|
Sep 01 12:37:58 PM UTC 24 |
Sep 01 12:38:03 PM UTC 24 |
587502061 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.1773858575 |
|
|
Sep 01 12:37:47 PM UTC 24 |
Sep 01 12:38:03 PM UTC 24 |
1320693631 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.1823023402 |
|
|
Sep 01 12:38:02 PM UTC 24 |
Sep 01 12:38:05 PM UTC 24 |
27786457 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.1548604006 |
|
|
Sep 01 12:37:39 PM UTC 24 |
Sep 01 12:38:06 PM UTC 24 |
1541467198 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.3101630872 |
|
|
Sep 01 12:38:04 PM UTC 24 |
Sep 01 12:38:06 PM UTC 24 |
33385216 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.3730116706 |
|
|
Sep 01 12:38:04 PM UTC 24 |
Sep 01 12:38:07 PM UTC 24 |
117943553 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.1740759188 |
|
|
Sep 01 12:37:58 PM UTC 24 |
Sep 01 12:38:10 PM UTC 24 |
985646797 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.3175587210 |
|
|
Sep 01 12:37:47 PM UTC 24 |
Sep 01 12:38:11 PM UTC 24 |
847307281 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.95189919 |
|
|
Sep 01 12:38:06 PM UTC 24 |
Sep 01 12:38:12 PM UTC 24 |
95512942 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.3220824171 |
|
|
Sep 01 12:37:56 PM UTC 24 |
Sep 01 12:38:13 PM UTC 24 |
293493022 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.736582800 |
|
|
Sep 01 12:39:13 PM UTC 24 |
Sep 01 12:39:15 PM UTC 24 |
12870408 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.3060765929 |
|
|
Sep 01 12:35:22 PM UTC 24 |
Sep 01 12:38:13 PM UTC 24 |
5923877276 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.1368016264 |
|
|
Sep 01 12:38:07 PM UTC 24 |
Sep 01 12:38:14 PM UTC 24 |
562102837 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.216747183 |
|
|
Sep 01 12:37:58 PM UTC 24 |
Sep 01 12:38:14 PM UTC 24 |
485644968 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.4197373575 |
|
|
Sep 01 12:37:57 PM UTC 24 |
Sep 01 12:38:15 PM UTC 24 |
716889101 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.2822306502 |
|
|
Sep 01 12:37:58 PM UTC 24 |
Sep 01 12:38:16 PM UTC 24 |
589076465 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3008591414 |
|
|
Sep 01 12:38:14 PM UTC 24 |
Sep 01 12:38:17 PM UTC 24 |
18205160 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.152438362 |
|
|
Sep 01 12:38:16 PM UTC 24 |
Sep 01 12:38:18 PM UTC 24 |
71215562 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.1441149925 |
|
|
Sep 01 12:37:48 PM UTC 24 |
Sep 01 12:38:19 PM UTC 24 |
2808637773 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.3338244478 |
|
|
Sep 01 12:38:14 PM UTC 24 |
Sep 01 12:38:21 PM UTC 24 |
50400970 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all_with_rand_reset.3081039507 |
|
|
Sep 01 12:37:17 PM UTC 24 |
Sep 01 12:38:21 PM UTC 24 |
18119196998 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.346270737 |
|
|
Sep 01 12:38:08 PM UTC 24 |
Sep 01 12:38:22 PM UTC 24 |
729993023 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.436597555 |
|
|
Sep 01 12:38:17 PM UTC 24 |
Sep 01 12:38:22 PM UTC 24 |
139692750 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.3839329190 |
|
|
Sep 01 12:38:08 PM UTC 24 |
Sep 01 12:38:23 PM UTC 24 |
3147030084 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.3873330605 |
|
|
Sep 01 12:38:17 PM UTC 24 |
Sep 01 12:38:23 PM UTC 24 |
292463314 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.3074911326 |
|
|
Sep 01 12:37:43 PM UTC 24 |
Sep 01 12:38:25 PM UTC 24 |
219333283 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.927263310 |
|
|
Sep 01 12:38:11 PM UTC 24 |
Sep 01 12:38:25 PM UTC 24 |
3916864792 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.1089060436 |
|
|
Sep 01 12:38:12 PM UTC 24 |
Sep 01 12:38:26 PM UTC 24 |
1486256970 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.559775879 |
|
|
Sep 01 12:37:55 PM UTC 24 |
Sep 01 12:38:26 PM UTC 24 |
1926923429 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_31/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_errors.4013324011 |
|
|
Sep 01 12:38:07 PM UTC 24 |
Sep 01 12:38:28 PM UTC 24 |
301689053 ps |