| T584 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.1288010217 |
|
|
Sep 11 08:10:11 AM UTC 24 |
Sep 11 08:10:16 AM UTC 24 |
333936283 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.3158419634 |
|
|
Sep 11 08:10:12 AM UTC 24 |
Sep 11 08:10:18 AM UTC 24 |
329193396 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.1492941519 |
|
|
Sep 11 08:09:16 AM UTC 24 |
Sep 11 08:10:52 AM UTC 24 |
6581079516 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.4292763341 |
|
|
Sep 11 08:10:11 AM UTC 24 |
Sep 11 08:10:19 AM UTC 24 |
1005729896 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.894617994 |
|
|
Sep 11 08:10:04 AM UTC 24 |
Sep 11 08:10:19 AM UTC 24 |
868328968 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.907126737 |
|
|
Sep 11 08:10:17 AM UTC 24 |
Sep 11 08:10:19 AM UTC 24 |
41079323 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.122463393 |
|
|
Sep 11 08:10:04 AM UTC 24 |
Sep 11 08:10:20 AM UTC 24 |
306913173 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.1250289346 |
|
|
Sep 11 08:10:02 AM UTC 24 |
Sep 11 08:10:21 AM UTC 24 |
5349263698 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.4274846718 |
|
|
Sep 11 08:10:04 AM UTC 24 |
Sep 11 08:10:21 AM UTC 24 |
1340224690 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1727226875 |
|
|
Sep 11 08:10:19 AM UTC 24 |
Sep 11 08:10:22 AM UTC 24 |
12357936 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.2891975382 |
|
|
Sep 11 08:10:19 AM UTC 24 |
Sep 11 08:10:22 AM UTC 24 |
37217726 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.4157145410 |
|
|
Sep 11 08:08:10 AM UTC 24 |
Sep 11 08:10:23 AM UTC 24 |
87957272365 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.3366281223 |
|
|
Sep 11 08:10:02 AM UTC 24 |
Sep 11 08:10:23 AM UTC 24 |
594905340 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.3546662505 |
|
|
Sep 11 08:10:11 AM UTC 24 |
Sep 11 08:10:23 AM UTC 24 |
304342554 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.1036322225 |
|
|
Sep 11 08:09:59 AM UTC 24 |
Sep 11 08:10:24 AM UTC 24 |
320198483 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.1191796402 |
|
|
Sep 11 08:09:52 AM UTC 24 |
Sep 11 08:10:26 AM UTC 24 |
422940328 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_errors.3297761288 |
|
|
Sep 11 08:10:11 AM UTC 24 |
Sep 11 08:10:27 AM UTC 24 |
819564674 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.2575902763 |
|
|
Sep 11 08:10:17 AM UTC 24 |
Sep 11 08:10:27 AM UTC 24 |
190131858 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.288545167 |
|
|
Sep 11 08:10:14 AM UTC 24 |
Sep 11 08:10:28 AM UTC 24 |
799177391 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.1325818421 |
|
|
Sep 11 08:10:22 AM UTC 24 |
Sep 11 08:10:29 AM UTC 24 |
91261274 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.3803388693 |
|
|
Sep 11 08:10:27 AM UTC 24 |
Sep 11 08:10:29 AM UTC 24 |
56452785 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.1164957012 |
|
|
Sep 11 08:08:26 AM UTC 24 |
Sep 11 08:10:30 AM UTC 24 |
10711608359 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.1033071164 |
|
|
Sep 11 08:10:28 AM UTC 24 |
Sep 11 08:10:31 AM UTC 24 |
77762638 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.946854329 |
|
|
Sep 11 08:12:43 AM UTC 24 |
Sep 11 08:12:59 AM UTC 24 |
640229543 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.3338999916 |
|
|
Sep 11 08:10:22 AM UTC 24 |
Sep 11 08:10:32 AM UTC 24 |
215203863 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.3951640341 |
|
|
Sep 11 08:10:45 AM UTC 24 |
Sep 11 08:10:52 AM UTC 24 |
866515593 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_errors.3557827362 |
|
|
Sep 11 08:10:22 AM UTC 24 |
Sep 11 08:10:32 AM UTC 24 |
277093586 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.1832911298 |
|
|
Sep 11 08:10:20 AM UTC 24 |
Sep 11 08:10:33 AM UTC 24 |
100991735 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.3053604128 |
|
|
Sep 11 08:09:43 AM UTC 24 |
Sep 11 08:10:34 AM UTC 24 |
6426011227 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.3445801157 |
|
|
Sep 11 08:10:15 AM UTC 24 |
Sep 11 08:10:34 AM UTC 24 |
334902649 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.1248438655 |
|
|
Sep 11 08:10:25 AM UTC 24 |
Sep 11 08:10:34 AM UTC 24 |
684763560 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.2249686421 |
|
|
Sep 11 08:08:53 AM UTC 24 |
Sep 11 08:10:34 AM UTC 24 |
2569498818 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.630721866 |
|
|
Sep 11 08:10:30 AM UTC 24 |
Sep 11 08:10:35 AM UTC 24 |
64727846 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.3106299754 |
|
|
Sep 11 08:10:25 AM UTC 24 |
Sep 11 08:10:37 AM UTC 24 |
1660366355 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.1208426245 |
|
|
Sep 11 08:10:34 AM UTC 24 |
Sep 11 08:10:37 AM UTC 24 |
69527105 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.1623620398 |
|
|
Sep 11 08:10:27 AM UTC 24 |
Sep 11 08:10:37 AM UTC 24 |
356724591 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.840645483 |
|
|
Sep 11 08:10:23 AM UTC 24 |
Sep 11 08:10:38 AM UTC 24 |
1884950991 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.2545761503 |
|
|
Sep 11 08:10:36 AM UTC 24 |
Sep 11 08:10:38 AM UTC 24 |
46600451 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.2725486241 |
|
|
Sep 11 08:10:35 AM UTC 24 |
Sep 11 08:10:39 AM UTC 24 |
137202014 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.209590947 |
|
|
Sep 11 08:10:36 AM UTC 24 |
Sep 11 08:10:39 AM UTC 24 |
60013610 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_errors.3858337685 |
|
|
Sep 11 08:10:30 AM UTC 24 |
Sep 11 08:10:40 AM UTC 24 |
743489827 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.3327808972 |
|
|
Sep 11 08:10:23 AM UTC 24 |
Sep 11 08:10:41 AM UTC 24 |
3436171063 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.2086740397 |
|
|
Sep 11 08:10:30 AM UTC 24 |
Sep 11 08:10:41 AM UTC 24 |
765681787 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.1870967215 |
|
|
Sep 11 08:10:36 AM UTC 24 |
Sep 11 08:10:42 AM UTC 24 |
54756720 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.2054654894 |
|
|
Sep 11 08:10:32 AM UTC 24 |
Sep 11 08:10:44 AM UTC 24 |
198843136 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.614703882 |
|
|
Sep 11 08:10:32 AM UTC 24 |
Sep 11 08:10:45 AM UTC 24 |
639273114 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.1726896057 |
|
|
Sep 11 08:10:42 AM UTC 24 |
Sep 11 08:10:45 AM UTC 24 |
54460573 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.1321556629 |
|
|
Sep 11 08:10:32 AM UTC 24 |
Sep 11 08:10:45 AM UTC 24 |
266800960 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.2420568417 |
|
|
Sep 11 08:10:43 AM UTC 24 |
Sep 11 08:10:46 AM UTC 24 |
11689699 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.2332188114 |
|
|
Sep 11 08:10:09 AM UTC 24 |
Sep 11 08:10:47 AM UTC 24 |
761262240 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3624027500 |
|
|
Sep 11 08:10:32 AM UTC 24 |
Sep 11 08:10:47 AM UTC 24 |
285574524 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.1418655435 |
|
|
Sep 11 08:10:42 AM UTC 24 |
Sep 11 08:10:48 AM UTC 24 |
56045128 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.2598751757 |
|
|
Sep 11 08:10:33 AM UTC 24 |
Sep 11 08:10:48 AM UTC 24 |
2617905058 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.1439817538 |
|
|
Sep 11 08:10:45 AM UTC 24 |
Sep 11 08:10:49 AM UTC 24 |
18410144 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.1128390085 |
|
|
Sep 11 08:10:37 AM UTC 24 |
Sep 11 08:10:49 AM UTC 24 |
251947228 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.1260802456 |
|
|
Sep 11 08:10:39 AM UTC 24 |
Sep 11 08:10:51 AM UTC 24 |
937099188 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.1837835107 |
|
|
Sep 11 08:10:40 AM UTC 24 |
Sep 11 08:10:53 AM UTC 24 |
614629600 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.768631648 |
|
|
Sep 11 08:10:52 AM UTC 24 |
Sep 11 08:10:54 AM UTC 24 |
32857805 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.3611302701 |
|
|
Sep 11 08:10:52 AM UTC 24 |
Sep 11 08:10:54 AM UTC 24 |
11569375 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.2070103143 |
|
|
Sep 11 08:10:52 AM UTC 24 |
Sep 11 08:10:54 AM UTC 24 |
11228024 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.4055357944 |
|
|
Sep 11 08:10:40 AM UTC 24 |
Sep 11 08:10:58 AM UTC 24 |
903402353 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_errors.1756052070 |
|
|
Sep 11 08:10:37 AM UTC 24 |
Sep 11 08:10:59 AM UTC 24 |
552770137 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.3461529366 |
|
|
Sep 11 08:10:47 AM UTC 24 |
Sep 11 08:10:59 AM UTC 24 |
299958412 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.3210225184 |
|
|
Sep 11 08:10:39 AM UTC 24 |
Sep 11 08:10:59 AM UTC 24 |
1573334680 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.2279945230 |
|
|
Sep 11 08:10:54 AM UTC 24 |
Sep 11 08:10:59 AM UTC 24 |
197122533 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.3017552366 |
|
|
Sep 11 08:10:48 AM UTC 24 |
Sep 11 08:11:02 AM UTC 24 |
2541179649 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.2606176767 |
|
|
Sep 11 08:10:49 AM UTC 24 |
Sep 11 08:11:03 AM UTC 24 |
633091025 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.4124946675 |
|
|
Sep 11 08:10:26 AM UTC 24 |
Sep 11 08:11:04 AM UTC 24 |
6559856774 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_errors.830940586 |
|
|
Sep 11 08:10:47 AM UTC 24 |
Sep 11 08:11:04 AM UTC 24 |
988720620 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3783075009 |
|
|
Sep 11 08:10:55 AM UTC 24 |
Sep 11 08:11:05 AM UTC 24 |
617752641 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.273036793 |
|
|
Sep 11 08:11:02 AM UTC 24 |
Sep 11 08:11:05 AM UTC 24 |
22587415 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.2000046425 |
|
|
Sep 11 08:10:53 AM UTC 24 |
Sep 11 08:11:05 AM UTC 24 |
66867398 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.2304926499 |
|
|
Sep 11 08:10:49 AM UTC 24 |
Sep 11 08:11:06 AM UTC 24 |
576732958 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.3844515055 |
|
|
Sep 11 08:11:13 AM UTC 24 |
Sep 11 08:11:49 AM UTC 24 |
309050645 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all_with_rand_reset.2866227576 |
|
|
Sep 11 08:09:29 AM UTC 24 |
Sep 11 08:11:07 AM UTC 24 |
1700905880 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.1248404205 |
|
|
Sep 11 08:11:05 AM UTC 24 |
Sep 11 08:11:07 AM UTC 24 |
38140450 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.4270330124 |
|
|
Sep 11 08:10:28 AM UTC 24 |
Sep 11 08:11:08 AM UTC 24 |
988193445 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.1969390594 |
|
|
Sep 11 08:10:55 AM UTC 24 |
Sep 11 08:11:08 AM UTC 24 |
711848652 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.2204713021 |
|
|
Sep 11 08:11:04 AM UTC 24 |
Sep 11 08:11:08 AM UTC 24 |
65557552 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_errors.2125134855 |
|
|
Sep 11 08:10:55 AM UTC 24 |
Sep 11 08:11:09 AM UTC 24 |
961336324 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.3509747103 |
|
|
Sep 11 08:11:45 AM UTC 24 |
Sep 11 08:11:49 AM UTC 24 |
49119734 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.3077207060 |
|
|
Sep 11 08:11:06 AM UTC 24 |
Sep 11 08:11:11 AM UTC 24 |
188184434 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.3162057278 |
|
|
Sep 11 08:11:00 AM UTC 24 |
Sep 11 08:11:11 AM UTC 24 |
214081662 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.3012278854 |
|
|
Sep 11 08:11:06 AM UTC 24 |
Sep 11 08:11:11 AM UTC 24 |
363489917 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.4152449718 |
|
|
Sep 11 08:11:00 AM UTC 24 |
Sep 11 08:11:12 AM UTC 24 |
3011070967 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.2091958578 |
|
|
Sep 11 08:11:10 AM UTC 24 |
Sep 11 08:11:12 AM UTC 24 |
18658606 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.2764634131 |
|
|
Sep 11 08:10:59 AM UTC 24 |
Sep 11 08:11:13 AM UTC 24 |
1500167413 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.663582945 |
|
|
Sep 11 08:11:07 AM UTC 24 |
Sep 11 08:11:14 AM UTC 24 |
234221286 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.2325355324 |
|
|
Sep 11 08:11:12 AM UTC 24 |
Sep 11 08:11:15 AM UTC 24 |
24400739 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.3267083624 |
|
|
Sep 11 08:09:08 AM UTC 24 |
Sep 11 08:11:16 AM UTC 24 |
3038303766 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.3712611074 |
|
|
Sep 11 08:11:12 AM UTC 24 |
Sep 11 08:11:17 AM UTC 24 |
167006830 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.649124037 |
|
|
Sep 11 08:10:20 AM UTC 24 |
Sep 11 08:11:18 AM UTC 24 |
1226795336 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.1639280616 |
|
|
Sep 11 08:11:14 AM UTC 24 |
Sep 11 08:11:19 AM UTC 24 |
288451433 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.1494945145 |
|
|
Sep 11 08:10:17 AM UTC 24 |
Sep 11 08:11:19 AM UTC 24 |
1394519491 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.1817964489 |
|
|
Sep 11 08:11:15 AM UTC 24 |
Sep 11 08:11:19 AM UTC 24 |
132021939 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.3669982804 |
|
|
Sep 11 08:10:45 AM UTC 24 |
Sep 11 08:11:20 AM UTC 24 |
224489331 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.3679683640 |
|
|
Sep 11 08:11:09 AM UTC 24 |
Sep 11 08:11:20 AM UTC 24 |
1230082679 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_errors.3306632392 |
|
|
Sep 11 08:11:06 AM UTC 24 |
Sep 11 08:11:21 AM UTC 24 |
279929043 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.4233594705 |
|
|
Sep 11 08:11:09 AM UTC 24 |
Sep 11 08:11:22 AM UTC 24 |
396378046 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.1351273710 |
|
|
Sep 11 08:11:20 AM UTC 24 |
Sep 11 08:11:22 AM UTC 24 |
69757441 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.312394154 |
|
|
Sep 11 08:11:07 AM UTC 24 |
Sep 11 08:11:22 AM UTC 24 |
733206442 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.1904964327 |
|
|
Sep 11 08:11:13 AM UTC 24 |
Sep 11 08:11:23 AM UTC 24 |
77446465 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.1022233353 |
|
|
Sep 11 08:11:21 AM UTC 24 |
Sep 11 08:11:24 AM UTC 24 |
29104017 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all.917083134 |
|
|
Sep 11 08:08:41 AM UTC 24 |
Sep 11 08:11:25 AM UTC 24 |
19435011257 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.3549060890 |
|
|
Sep 11 08:11:09 AM UTC 24 |
Sep 11 08:11:25 AM UTC 24 |
327150745 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.2105164142 |
|
|
Sep 11 08:11:23 AM UTC 24 |
Sep 11 08:11:27 AM UTC 24 |
135024611 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.361659852 |
|
|
Sep 11 08:11:17 AM UTC 24 |
Sep 11 08:11:27 AM UTC 24 |
849385577 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.1949483312 |
|
|
Sep 11 08:11:20 AM UTC 24 |
Sep 11 08:11:28 AM UTC 24 |
274577592 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.2047219251 |
|
|
Sep 11 08:11:15 AM UTC 24 |
Sep 11 08:11:30 AM UTC 24 |
451028785 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.615105694 |
|
|
Sep 11 08:10:53 AM UTC 24 |
Sep 11 08:11:31 AM UTC 24 |
687530856 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.2039466 |
|
|
Sep 11 08:12:52 AM UTC 24 |
Sep 11 08:12:58 AM UTC 24 |
195938443 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.2270643365 |
|
|
Sep 11 08:11:16 AM UTC 24 |
Sep 11 08:11:31 AM UTC 24 |
1530831205 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_errors.2119095513 |
|
|
Sep 11 08:11:14 AM UTC 24 |
Sep 11 08:11:31 AM UTC 24 |
320750555 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.43827687 |
|
|
Sep 11 08:10:36 AM UTC 24 |
Sep 11 08:11:32 AM UTC 24 |
643816480 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.796916392 |
|
|
Sep 11 08:11:29 AM UTC 24 |
Sep 11 08:11:32 AM UTC 24 |
55668802 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.727538608 |
|
|
Sep 11 08:11:23 AM UTC 24 |
Sep 11 08:11:32 AM UTC 24 |
188076736 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.3942997600 |
|
|
Sep 11 08:11:18 AM UTC 24 |
Sep 11 08:11:33 AM UTC 24 |
2505085958 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.2770102854 |
|
|
Sep 11 08:11:32 AM UTC 24 |
Sep 11 08:11:34 AM UTC 24 |
55969984 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all.2479578598 |
|
|
Sep 11 08:10:17 AM UTC 24 |
Sep 11 08:11:34 AM UTC 24 |
3312449714 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.2663971872 |
|
|
Sep 11 08:11:24 AM UTC 24 |
Sep 11 08:11:35 AM UTC 24 |
358860353 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.2116649948 |
|
|
Sep 11 08:11:30 AM UTC 24 |
Sep 11 08:11:35 AM UTC 24 |
128950988 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.2097862910 |
|
|
Sep 11 08:11:33 AM UTC 24 |
Sep 11 08:11:37 AM UTC 24 |
138756309 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.1016912669 |
|
|
Sep 11 08:11:24 AM UTC 24 |
Sep 11 08:11:39 AM UTC 24 |
1539511892 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.1145393740 |
|
|
Sep 11 08:11:27 AM UTC 24 |
Sep 11 08:11:40 AM UTC 24 |
715089640 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.2795624509 |
|
|
Sep 11 08:11:24 AM UTC 24 |
Sep 11 08:11:41 AM UTC 24 |
1579617656 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.3669219107 |
|
|
Sep 11 08:11:40 AM UTC 24 |
Sep 11 08:11:42 AM UTC 24 |
24635493 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_errors.3759686245 |
|
|
Sep 11 08:11:23 AM UTC 24 |
Sep 11 08:11:43 AM UTC 24 |
4730362869 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.4080871662 |
|
|
Sep 11 08:11:27 AM UTC 24 |
Sep 11 08:11:43 AM UTC 24 |
449425509 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_errors.851065343 |
|
|
Sep 11 08:11:33 AM UTC 24 |
Sep 11 08:11:43 AM UTC 24 |
574001915 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.1676182994 |
|
|
Sep 11 08:11:41 AM UTC 24 |
Sep 11 08:11:44 AM UTC 24 |
131584347 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.1446710670 |
|
|
Sep 11 08:11:42 AM UTC 24 |
Sep 11 08:11:44 AM UTC 24 |
13258729 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.1656387977 |
|
|
Sep 11 08:11:05 AM UTC 24 |
Sep 11 08:11:46 AM UTC 24 |
325235087 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.2733978706 |
|
|
Sep 11 08:11:33 AM UTC 24 |
Sep 11 08:11:48 AM UTC 24 |
266309872 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.1857389489 |
|
|
Sep 11 08:11:32 AM UTC 24 |
Sep 11 08:11:48 AM UTC 24 |
705518336 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.1348352202 |
|
|
Sep 11 08:11:35 AM UTC 24 |
Sep 11 08:11:48 AM UTC 24 |
272598680 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.3754035558 |
|
|
Sep 11 08:11:36 AM UTC 24 |
Sep 11 08:11:52 AM UTC 24 |
1042936428 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.3201016421 |
|
|
Sep 11 08:11:50 AM UTC 24 |
Sep 11 08:11:53 AM UTC 24 |
19514555 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.3126646887 |
|
|
Sep 11 08:11:50 AM UTC 24 |
Sep 11 08:11:54 AM UTC 24 |
30287253 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.4283448795 |
|
|
Sep 11 08:11:34 AM UTC 24 |
Sep 11 08:11:54 AM UTC 24 |
1340630340 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_errors.3002598761 |
|
|
Sep 11 08:11:45 AM UTC 24 |
Sep 11 08:11:56 AM UTC 24 |
256658015 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.1392031821 |
|
|
Sep 11 08:11:53 AM UTC 24 |
Sep 11 08:11:56 AM UTC 24 |
35320779 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.1828774974 |
|
|
Sep 11 08:11:45 AM UTC 24 |
Sep 11 08:11:58 AM UTC 24 |
833957544 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.2697437958 |
|
|
Sep 11 08:11:43 AM UTC 24 |
Sep 11 08:11:58 AM UTC 24 |
63342612 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.3037746646 |
|
|
Sep 11 08:11:21 AM UTC 24 |
Sep 11 08:11:58 AM UTC 24 |
419255636 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.103225096 |
|
|
Sep 11 08:11:45 AM UTC 24 |
Sep 11 08:11:59 AM UTC 24 |
915547853 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.1328043482 |
|
|
Sep 11 08:11:55 AM UTC 24 |
Sep 11 08:12:01 AM UTC 24 |
243868770 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.2657928125 |
|
|
Sep 11 08:09:16 AM UTC 24 |
Sep 11 08:12:02 AM UTC 24 |
21215560972 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all.2013439177 |
|
|
Sep 11 08:11:19 AM UTC 24 |
Sep 11 08:12:03 AM UTC 24 |
5305858855 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.1703330132 |
|
|
Sep 11 08:12:46 AM UTC 24 |
Sep 11 08:12:55 AM UTC 24 |
1233620064 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.2344657966 |
|
|
Sep 11 08:11:48 AM UTC 24 |
Sep 11 08:12:06 AM UTC 24 |
377563712 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.1119560025 |
|
|
Sep 11 08:12:04 AM UTC 24 |
Sep 11 08:12:06 AM UTC 24 |
23100506 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.3384485794 |
|
|
Sep 11 08:11:35 AM UTC 24 |
Sep 11 08:12:06 AM UTC 24 |
3636192792 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.755702699 |
|
|
Sep 11 08:11:32 AM UTC 24 |
Sep 11 08:12:06 AM UTC 24 |
618043612 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.737443411 |
|
|
Sep 11 08:11:47 AM UTC 24 |
Sep 11 08:12:06 AM UTC 24 |
848769804 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.2798931511 |
|
|
Sep 11 08:11:57 AM UTC 24 |
Sep 11 08:12:07 AM UTC 24 |
643203464 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.1754077537 |
|
|
Sep 11 08:11:54 AM UTC 24 |
Sep 11 08:12:07 AM UTC 24 |
87637897 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.3968268609 |
|
|
Sep 11 08:11:50 AM UTC 24 |
Sep 11 08:12:08 AM UTC 24 |
328816795 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.3349022631 |
|
|
Sep 11 08:12:06 AM UTC 24 |
Sep 11 08:12:08 AM UTC 24 |
10031681 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.1960672927 |
|
|
Sep 11 08:10:06 AM UTC 24 |
Sep 11 08:12:09 AM UTC 24 |
9701600554 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.822998563 |
|
|
Sep 11 08:12:06 AM UTC 24 |
Sep 11 08:12:11 AM UTC 24 |
182678616 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.1700446462 |
|
|
Sep 11 08:12:08 AM UTC 24 |
Sep 11 08:12:12 AM UTC 24 |
105794626 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.3418437975 |
|
|
Sep 11 08:12:00 AM UTC 24 |
Sep 11 08:12:14 AM UTC 24 |
2183813087 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.2660482251 |
|
|
Sep 11 08:12:12 AM UTC 24 |
Sep 11 08:12:14 AM UTC 24 |
358607404 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.1344831881 |
|
|
Sep 11 08:11:59 AM UTC 24 |
Sep 11 08:12:16 AM UTC 24 |
2318522140 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.2879453788 |
|
|
Sep 11 08:12:15 AM UTC 24 |
Sep 11 08:12:18 AM UTC 24 |
43085283 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.1286529233 |
|
|
Sep 11 08:12:14 AM UTC 24 |
Sep 11 08:12:19 AM UTC 24 |
84062604 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.1756551939 |
|
|
Sep 11 08:11:59 AM UTC 24 |
Sep 11 08:12:20 AM UTC 24 |
1282518265 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.2111614086 |
|
|
Sep 11 08:12:08 AM UTC 24 |
Sep 11 08:12:20 AM UTC 24 |
4275194630 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.2690165632 |
|
|
Sep 11 08:12:09 AM UTC 24 |
Sep 11 08:12:20 AM UTC 24 |
289218276 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.472985408 |
|
|
Sep 11 08:11:53 AM UTC 24 |
Sep 11 08:12:20 AM UTC 24 |
215626806 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.1740539882 |
|
|
Sep 11 08:12:00 AM UTC 24 |
Sep 11 08:12:21 AM UTC 24 |
397564491 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_errors.3412311978 |
|
|
Sep 11 08:11:57 AM UTC 24 |
Sep 11 08:12:23 AM UTC 24 |
1447190011 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.1353645690 |
|
|
Sep 11 08:12:19 AM UTC 24 |
Sep 11 08:12:24 AM UTC 24 |
60719010 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.280794297 |
|
|
Sep 11 08:11:43 AM UTC 24 |
Sep 11 08:12:26 AM UTC 24 |
1225238570 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.4003689786 |
|
|
Sep 11 08:12:08 AM UTC 24 |
Sep 11 08:12:26 AM UTC 24 |
76678653 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.3762851967 |
|
|
Sep 11 08:12:08 AM UTC 24 |
Sep 11 08:12:27 AM UTC 24 |
488634484 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.301436173 |
|
|
Sep 11 08:12:10 AM UTC 24 |
Sep 11 08:12:29 AM UTC 24 |
980897153 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.3732272846 |
|
|
Sep 11 08:12:27 AM UTC 24 |
Sep 11 08:12:29 AM UTC 24 |
35582899 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.2878719375 |
|
|
Sep 11 08:12:21 AM UTC 24 |
Sep 11 08:12:29 AM UTC 24 |
1474912806 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_errors.933319510 |
|
|
Sep 11 08:12:08 AM UTC 24 |
Sep 11 08:12:30 AM UTC 24 |
312354498 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.540348944 |
|
|
Sep 11 08:12:28 AM UTC 24 |
Sep 11 08:12:31 AM UTC 24 |
176126890 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.2472553538 |
|
|
Sep 11 08:12:08 AM UTC 24 |
Sep 11 08:12:31 AM UTC 24 |
1761917202 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.4188830573 |
|
|
Sep 11 08:12:27 AM UTC 24 |
Sep 11 08:12:32 AM UTC 24 |
380003926 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.2837845590 |
|
|
Sep 11 08:12:21 AM UTC 24 |
Sep 11 08:12:32 AM UTC 24 |
1012226649 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.351951262 |
|
|
Sep 11 08:12:18 AM UTC 24 |
Sep 11 08:12:32 AM UTC 24 |
243896603 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.2326301277 |
|
|
Sep 11 08:12:31 AM UTC 24 |
Sep 11 08:12:34 AM UTC 24 |
39198034 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_errors.3066501262 |
|
|
Sep 11 08:12:21 AM UTC 24 |
Sep 11 08:12:35 AM UTC 24 |
997640303 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.114346650 |
|
|
Sep 11 08:10:33 AM UTC 24 |
Sep 11 08:12:36 AM UTC 24 |
32711764486 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.2826938511 |
|
|
Sep 11 08:12:22 AM UTC 24 |
Sep 11 08:12:37 AM UTC 24 |
1115084699 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_stress_all.1998521398 |
|
|
Sep 11 08:11:50 AM UTC 24 |
Sep 11 08:12:37 AM UTC 24 |
5721128173 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.3850133718 |
|
|
Sep 11 08:12:23 AM UTC 24 |
Sep 11 08:12:37 AM UTC 24 |
344564660 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.1887407225 |
|
|
Sep 11 08:12:36 AM UTC 24 |
Sep 11 08:12:38 AM UTC 24 |
27086293 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.863468551 |
|
|
Sep 11 08:12:32 AM UTC 24 |
Sep 11 08:12:39 AM UTC 24 |
1029048000 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.3753515831 |
|
|
Sep 11 08:12:38 AM UTC 24 |
Sep 11 08:12:40 AM UTC 24 |
43149393 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.1955011166 |
|
|
Sep 11 08:12:31 AM UTC 24 |
Sep 11 08:12:42 AM UTC 24 |
885494614 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.820456593 |
|
|
Sep 11 08:12:37 AM UTC 24 |
Sep 11 08:12:44 AM UTC 24 |
539676793 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.3844231384 |
|
|
Sep 11 08:12:30 AM UTC 24 |
Sep 11 08:12:45 AM UTC 24 |
204459397 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.1918957613 |
|
|
Sep 11 08:12:40 AM UTC 24 |
Sep 11 08:12:46 AM UTC 24 |
95128984 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.3549664369 |
|
|
Sep 11 08:12:45 AM UTC 24 |
Sep 11 08:12:57 AM UTC 24 |
781748471 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.1450303036 |
|
|
Sep 11 08:12:32 AM UTC 24 |
Sep 11 08:12:47 AM UTC 24 |
198506249 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.1330323196 |
|
|
Sep 11 08:12:33 AM UTC 24 |
Sep 11 08:12:48 AM UTC 24 |
671504660 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_stress_all_with_rand_reset.265236313 |
|
|
Sep 11 08:12:25 AM UTC 24 |
Sep 11 08:12:55 AM UTC 24 |
1497909888 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.3857500257 |
|
|
Sep 11 08:12:38 AM UTC 24 |
Sep 11 08:12:49 AM UTC 24 |
242114997 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.3335095900 |
|
|
Sep 11 08:12:21 AM UTC 24 |
Sep 11 08:12:50 AM UTC 24 |
1744403260 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.413277943 |
|
|
Sep 11 08:12:49 AM UTC 24 |
Sep 11 08:12:51 AM UTC 24 |
34458702 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.1654136292 |
|
|
Sep 11 08:12:33 AM UTC 24 |
Sep 11 08:12:52 AM UTC 24 |
1165705335 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_errors.2622789831 |
|
|
Sep 11 08:12:31 AM UTC 24 |
Sep 11 08:12:52 AM UTC 24 |
812962451 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.4143836589 |
|
|
Sep 11 08:12:50 AM UTC 24 |
Sep 11 08:12:52 AM UTC 24 |
14214115 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.539820584 |
|
|
Sep 11 08:12:28 AM UTC 24 |
Sep 11 08:12:53 AM UTC 24 |
605923343 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.2018953282 |
|
|
Sep 11 08:10:50 AM UTC 24 |
Sep 11 08:12:54 AM UTC 24 |
4649858035 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.2104348748 |
|
|
Sep 11 08:12:06 AM UTC 24 |
Sep 11 08:12:54 AM UTC 24 |
623441931 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.961158523 |
|
|
Sep 11 08:12:50 AM UTC 24 |
Sep 11 08:12:55 AM UTC 24 |
42368383 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.2547987401 |
|
|
Sep 11 08:12:42 AM UTC 24 |
Sep 11 08:12:57 AM UTC 24 |
643436202 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_errors.1280821271 |
|
|
Sep 11 08:12:40 AM UTC 24 |
Sep 11 08:12:55 AM UTC 24 |
1289988097 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.3437379207 |
|
|
Sep 11 08:12:17 AM UTC 24 |
Sep 11 08:12:56 AM UTC 24 |
367882055 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.892991923 |
|
|
Sep 11 08:12:58 AM UTC 24 |
Sep 11 08:13:00 AM UTC 24 |
78522321 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.2838097698 |
|
|
Sep 11 08:12:58 AM UTC 24 |
Sep 11 08:13:01 AM UTC 24 |
91746594 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.3752024838 |
|
|
Sep 11 08:12:46 AM UTC 24 |
Sep 11 08:13:04 AM UTC 24 |
2454856503 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_stress_all.997944831 |
|
|
Sep 11 08:13:26 AM UTC 24 |
Sep 11 08:14:09 AM UTC 24 |
3137485340 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.885415158 |
|
|
Sep 11 08:12:55 AM UTC 24 |
Sep 11 08:13:05 AM UTC 24 |
1777192552 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.4187278040 |
|
|
Sep 11 08:12:52 AM UTC 24 |
Sep 11 08:13:06 AM UTC 24 |
179917142 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.2939564866 |
|
|
Sep 11 08:12:59 AM UTC 24 |
Sep 11 08:13:06 AM UTC 24 |
228415478 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.2447644989 |
|
|
Sep 11 08:13:00 AM UTC 24 |
Sep 11 08:13:06 AM UTC 24 |
132521877 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_stress_all_with_rand_reset.570829690 |
|
|
Sep 11 08:11:39 AM UTC 24 |
Sep 11 08:13:07 AM UTC 24 |
12104488432 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.1739284773 |
|
|
Sep 11 08:12:38 AM UTC 24 |
Sep 11 08:13:07 AM UTC 24 |
467580741 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.2701831635 |
|
|
Sep 11 08:12:56 AM UTC 24 |
Sep 11 08:13:07 AM UTC 24 |
283466961 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.1817546665 |
|
|
Sep 11 08:13:02 AM UTC 24 |
Sep 11 08:13:08 AM UTC 24 |
249805995 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.2270044122 |
|
|
Sep 11 08:13:07 AM UTC 24 |
Sep 11 08:13:09 AM UTC 24 |
18397193 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.3446459487 |
|
|
Sep 11 08:12:55 AM UTC 24 |
Sep 11 08:13:10 AM UTC 24 |
324996863 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.2225446457 |
|
|
Sep 11 08:12:53 AM UTC 24 |
Sep 11 08:13:10 AM UTC 24 |
468218754 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.19334420 |
|
|
Sep 11 08:12:56 AM UTC 24 |
Sep 11 08:13:11 AM UTC 24 |
499447468 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.230742772 |
|
|
Sep 11 08:13:09 AM UTC 24 |
Sep 11 08:13:11 AM UTC 24 |
12971044 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.237698732 |
|
|
Sep 11 08:13:01 AM UTC 24 |
Sep 11 08:13:11 AM UTC 24 |
1707929058 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.994245800 |
|
|
Sep 11 08:13:08 AM UTC 24 |
Sep 11 08:13:14 AM UTC 24 |
64050321 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.3132671027 |
|
|
Sep 11 08:13:10 AM UTC 24 |
Sep 11 08:13:14 AM UTC 24 |
193407751 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_jtag_access.1784364780 |
|
|
Sep 11 08:13:12 AM UTC 24 |
Sep 11 08:13:15 AM UTC 24 |
90834400 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_stress_all_with_rand_reset.3671371327 |
|
|
Sep 11 08:12:04 AM UTC 24 |
Sep 11 08:13:16 AM UTC 24 |
2603027815 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_errors.3712508612 |
|
|
Sep 11 08:12:52 AM UTC 24 |
Sep 11 08:13:19 AM UTC 24 |
573824059 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.3695469916 |
|
|
Sep 11 08:13:04 AM UTC 24 |
Sep 11 08:13:20 AM UTC 24 |
331331957 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_errors.3341222993 |
|
|
Sep 11 08:13:00 AM UTC 24 |
Sep 11 08:13:20 AM UTC 24 |
733767763 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.2867642202 |
|
|
Sep 11 08:13:09 AM UTC 24 |
Sep 11 08:13:20 AM UTC 24 |
80032260 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.4162596312 |
|
|
Sep 11 08:13:17 AM UTC 24 |
Sep 11 08:13:21 AM UTC 24 |
17395191 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.3175526338 |
|
|
Sep 11 08:13:06 AM UTC 24 |
Sep 11 08:13:21 AM UTC 24 |
1236544040 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_security_escalation.986142708 |
|
|
Sep 11 08:13:11 AM UTC 24 |
Sep 11 08:13:22 AM UTC 24 |
431849876 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.1579152652 |
|
|
Sep 11 08:13:06 AM UTC 24 |
Sep 11 08:13:23 AM UTC 24 |
1341765657 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.1187106652 |
|
|
Sep 11 08:13:21 AM UTC 24 |
Sep 11 08:13:24 AM UTC 24 |
40001861 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.1937866256 |
|
|
Sep 11 08:13:20 AM UTC 24 |
Sep 11 08:13:25 AM UTC 24 |
68957327 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_stress_all.198298935 |
|
|
Sep 11 08:12:33 AM UTC 24 |
Sep 11 08:13:25 AM UTC 24 |
1576361143 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_sec_token_mux.998376579 |
|
|
Sep 11 08:13:12 AM UTC 24 |
Sep 11 08:13:25 AM UTC 24 |
257354085 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_10/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/47.lc_ctrl_prog_failure.4100694553 |
|
|
Sep 11 08:13:21 AM UTC 24 |
Sep 11 08:13:26 AM UTC 24 |
59325397 ps |