| T372 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_mubi.4205639121 |
|
|
Sep 18 09:22:27 PM UTC 24 |
Sep 18 09:22:43 PM UTC 24 |
2705976023 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_state_failure.3263445160 |
|
|
Sep 18 09:22:09 PM UTC 24 |
Sep 18 09:22:44 PM UTC 24 |
345921987 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_post_trans.1340820291 |
|
|
Sep 18 09:22:34 PM UTC 24 |
Sep 18 09:22:44 PM UTC 24 |
94374095 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.1646011024 |
|
|
Sep 18 09:22:42 PM UTC 24 |
Sep 18 09:22:44 PM UTC 24 |
18115948 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.1475111098 |
|
|
Sep 18 09:22:35 PM UTC 24 |
Sep 18 09:22:45 PM UTC 24 |
285870058 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.38672528 |
|
|
Sep 18 09:22:14 PM UTC 24 |
Sep 18 09:22:45 PM UTC 24 |
3518944322 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_sec_token_digest.2679231476 |
|
|
Sep 18 09:22:17 PM UTC 24 |
Sep 18 09:22:45 PM UTC 24 |
5943375226 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.23195756 |
|
|
Sep 18 09:22:36 PM UTC 24 |
Sep 18 09:22:45 PM UTC 24 |
948326841 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.114804806 |
|
|
Sep 18 09:22:39 PM UTC 24 |
Sep 18 09:22:45 PM UTC 24 |
221071357 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_state_failure.1001003446 |
|
|
Sep 18 09:21:44 PM UTC 24 |
Sep 18 09:22:46 PM UTC 24 |
11310177789 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.2929943850 |
|
|
Sep 18 09:22:44 PM UTC 24 |
Sep 18 09:22:47 PM UTC 24 |
24475387 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.1619237752 |
|
|
Sep 18 09:22:38 PM UTC 24 |
Sep 18 09:22:47 PM UTC 24 |
1832664072 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_errors.702248538 |
|
|
Sep 18 09:22:34 PM UTC 24 |
Sep 18 09:22:47 PM UTC 24 |
315655919 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.2491872980 |
|
|
Sep 18 09:22:44 PM UTC 24 |
Sep 18 09:22:48 PM UTC 24 |
39004901 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.2247930025 |
|
|
Sep 18 09:22:24 PM UTC 24 |
Sep 18 09:22:50 PM UTC 24 |
634255262 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.2779864542 |
|
|
Sep 18 09:22:39 PM UTC 24 |
Sep 18 09:22:51 PM UTC 24 |
232378151 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.3585114091 |
|
|
Sep 18 09:21:59 PM UTC 24 |
Sep 18 09:22:51 PM UTC 24 |
6588148706 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.4213790231 |
|
|
Sep 18 09:22:40 PM UTC 24 |
Sep 18 09:22:52 PM UTC 24 |
1368025119 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.5866210 |
|
|
Sep 18 09:22:47 PM UTC 24 |
Sep 18 09:22:52 PM UTC 24 |
698081632 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.2924998556 |
|
|
Sep 18 09:22:39 PM UTC 24 |
Sep 18 09:22:52 PM UTC 24 |
843728039 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.978120308 |
|
|
Sep 18 09:22:46 PM UTC 24 |
Sep 18 09:22:53 PM UTC 24 |
92859891 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.4213506634 |
|
|
Sep 18 09:22:48 PM UTC 24 |
Sep 18 09:22:54 PM UTC 24 |
685948968 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.2410591921 |
|
|
Sep 18 09:22:52 PM UTC 24 |
Sep 18 09:22:54 PM UTC 24 |
125880532 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.4099553532 |
|
|
Sep 18 09:22:29 PM UTC 24 |
Sep 18 09:22:55 PM UTC 24 |
712634398 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.1754402517 |
|
|
Sep 18 09:22:53 PM UTC 24 |
Sep 18 09:22:56 PM UTC 24 |
258924921 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.207233237 |
|
|
Sep 18 09:22:53 PM UTC 24 |
Sep 18 09:22:56 PM UTC 24 |
20398330 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.1035850297 |
|
|
Sep 18 09:22:41 PM UTC 24 |
Sep 18 09:22:57 PM UTC 24 |
303185490 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.1113676541 |
|
|
Sep 18 09:22:33 PM UTC 24 |
Sep 18 09:22:57 PM UTC 24 |
225642279 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/8.lc_ctrl_jtag_errors.2285255730 |
|
|
Sep 18 09:21:45 PM UTC 24 |
Sep 18 09:22:57 PM UTC 24 |
3965865119 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.3679307836 |
|
|
Sep 18 09:23:00 PM UTC 24 |
Sep 18 09:23:13 PM UTC 24 |
1571938264 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.2720594324 |
|
|
Sep 18 09:22:46 PM UTC 24 |
Sep 18 09:22:58 PM UTC 24 |
194128097 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.1581846567 |
|
|
Sep 18 09:22:46 PM UTC 24 |
Sep 18 09:22:59 PM UTC 24 |
494370442 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.302536940 |
|
|
Sep 18 09:22:54 PM UTC 24 |
Sep 18 09:22:59 PM UTC 24 |
64452740 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.3690867922 |
|
|
Sep 18 09:20:51 PM UTC 24 |
Sep 18 09:22:59 PM UTC 24 |
4128612487 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.3792330153 |
|
|
Sep 18 09:22:46 PM UTC 24 |
Sep 18 09:23:00 PM UTC 24 |
3902163591 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.3414532146 |
|
|
Sep 18 09:22:21 PM UTC 24 |
Sep 18 09:23:00 PM UTC 24 |
656767314 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.3865968780 |
|
|
Sep 18 09:22:46 PM UTC 24 |
Sep 18 09:23:00 PM UTC 24 |
2870662100 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.3064413320 |
|
|
Sep 18 09:22:48 PM UTC 24 |
Sep 18 09:23:00 PM UTC 24 |
1713502060 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.3108020635 |
|
|
Sep 18 09:22:48 PM UTC 24 |
Sep 18 09:23:01 PM UTC 24 |
1228874553 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_errors.1818122398 |
|
|
Sep 18 09:22:46 PM UTC 24 |
Sep 18 09:23:01 PM UTC 24 |
1565655417 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.1895716763 |
|
|
Sep 18 09:22:53 PM UTC 24 |
Sep 18 09:23:03 PM UTC 24 |
86294151 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.478682710 |
|
|
Sep 18 09:22:57 PM UTC 24 |
Sep 18 09:23:03 PM UTC 24 |
110524082 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.1694234099 |
|
|
Sep 18 09:23:11 PM UTC 24 |
Sep 18 09:23:16 PM UTC 24 |
74101212 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.783951903 |
|
|
Sep 18 09:22:58 PM UTC 24 |
Sep 18 09:23:04 PM UTC 24 |
468536897 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.2823311542 |
|
|
Sep 18 09:23:02 PM UTC 24 |
Sep 18 09:23:04 PM UTC 24 |
15131494 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.382043572 |
|
|
Sep 18 09:23:02 PM UTC 24 |
Sep 18 09:23:04 PM UTC 24 |
73713347 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.128835127 |
|
|
Sep 18 09:23:02 PM UTC 24 |
Sep 18 09:23:05 PM UTC 24 |
20846585 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.4098908528 |
|
|
Sep 18 09:22:24 PM UTC 24 |
Sep 18 09:23:05 PM UTC 24 |
2048436309 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.686409409 |
|
|
Sep 18 09:22:58 PM UTC 24 |
Sep 18 09:23:05 PM UTC 24 |
331503922 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.2166135683 |
|
|
Sep 18 09:23:02 PM UTC 24 |
Sep 18 09:23:06 PM UTC 24 |
78065079 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.507980045 |
|
|
Sep 18 09:23:00 PM UTC 24 |
Sep 18 09:23:07 PM UTC 24 |
224639243 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.3658104359 |
|
|
Sep 18 09:21:58 PM UTC 24 |
Sep 18 09:23:07 PM UTC 24 |
11248710019 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.590474898 |
|
|
Sep 18 09:22:13 PM UTC 24 |
Sep 18 09:23:07 PM UTC 24 |
1213128754 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.4073466611 |
|
|
Sep 18 09:22:37 PM UTC 24 |
Sep 18 09:23:08 PM UTC 24 |
3366657158 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.1163163561 |
|
|
Sep 18 09:22:27 PM UTC 24 |
Sep 18 09:23:09 PM UTC 24 |
19946946457 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.748082826 |
|
|
Sep 18 09:23:05 PM UTC 24 |
Sep 18 09:23:09 PM UTC 24 |
146270273 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.1088309337 |
|
|
Sep 18 09:23:00 PM UTC 24 |
Sep 18 09:23:10 PM UTC 24 |
1383305976 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.20364647 |
|
|
Sep 18 09:22:45 PM UTC 24 |
Sep 18 09:23:10 PM UTC 24 |
541079301 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.2269756662 |
|
|
Sep 18 09:23:02 PM UTC 24 |
Sep 18 09:23:10 PM UTC 24 |
402852681 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_errors.3809546070 |
|
|
Sep 18 09:22:54 PM UTC 24 |
Sep 18 09:23:11 PM UTC 24 |
1270567920 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.210877646 |
|
|
Sep 18 09:23:09 PM UTC 24 |
Sep 18 09:23:11 PM UTC 24 |
32623881 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.3025018871 |
|
|
Sep 18 09:22:56 PM UTC 24 |
Sep 18 09:23:11 PM UTC 24 |
5758968521 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.2983767805 |
|
|
Sep 18 09:22:49 PM UTC 24 |
Sep 18 09:23:11 PM UTC 24 |
648975158 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.2722917410 |
|
|
Sep 18 09:23:10 PM UTC 24 |
Sep 18 09:23:13 PM UTC 24 |
41168293 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.2513826557 |
|
|
Sep 18 09:23:09 PM UTC 24 |
Sep 18 09:23:14 PM UTC 24 |
48816688 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.1372305370 |
|
|
Sep 18 09:23:04 PM UTC 24 |
Sep 18 09:23:15 PM UTC 24 |
645232787 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_errors.729625988 |
|
|
Sep 18 09:23:03 PM UTC 24 |
Sep 18 09:23:17 PM UTC 24 |
500434963 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.3313659923 |
|
|
Sep 18 09:23:06 PM UTC 24 |
Sep 18 09:23:20 PM UTC 24 |
317999930 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.640549381 |
|
|
Sep 18 09:23:11 PM UTC 24 |
Sep 18 09:23:20 PM UTC 24 |
536991012 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.1835670199 |
|
|
Sep 18 09:22:39 PM UTC 24 |
Sep 18 09:23:20 PM UTC 24 |
25106512800 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.3615344912 |
|
|
Sep 18 09:23:06 PM UTC 24 |
Sep 18 09:23:20 PM UTC 24 |
1588586069 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.49922599 |
|
|
Sep 18 09:23:07 PM UTC 24 |
Sep 18 09:23:21 PM UTC 24 |
1274643677 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.3759984863 |
|
|
Sep 18 09:22:53 PM UTC 24 |
Sep 18 09:23:21 PM UTC 24 |
1148190654 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.4185847117 |
|
|
Sep 18 09:22:37 PM UTC 24 |
Sep 18 09:23:21 PM UTC 24 |
1202915355 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_errors.1763669260 |
|
|
Sep 18 09:23:12 PM UTC 24 |
Sep 18 09:23:22 PM UTC 24 |
544449776 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.389957531 |
|
|
Sep 18 09:23:20 PM UTC 24 |
Sep 18 09:23:22 PM UTC 24 |
14106553 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.3733880325 |
|
|
Sep 18 09:23:12 PM UTC 24 |
Sep 18 09:23:22 PM UTC 24 |
2697974637 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.58229793 |
|
|
Sep 18 09:23:14 PM UTC 24 |
Sep 18 09:23:22 PM UTC 24 |
1099338056 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.319865845 |
|
|
Sep 18 09:23:22 PM UTC 24 |
Sep 18 09:23:24 PM UTC 24 |
97977054 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.4011505454 |
|
|
Sep 18 09:23:06 PM UTC 24 |
Sep 18 09:23:24 PM UTC 24 |
972951213 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all.2012875561 |
|
|
Sep 18 09:22:03 PM UTC 24 |
Sep 18 09:23:25 PM UTC 24 |
3230265422 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.1249014568 |
|
|
Sep 18 09:23:12 PM UTC 24 |
Sep 18 09:23:26 PM UTC 24 |
326431474 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.4146849024 |
|
|
Sep 18 09:23:04 PM UTC 24 |
Sep 18 09:23:26 PM UTC 24 |
607951733 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.541254268 |
|
|
Sep 18 09:23:22 PM UTC 24 |
Sep 18 09:23:26 PM UTC 24 |
220984230 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.3145359707 |
|
|
Sep 18 09:23:22 PM UTC 24 |
Sep 18 09:23:26 PM UTC 24 |
44342452 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.1058224644 |
|
|
Sep 18 09:22:48 PM UTC 24 |
Sep 18 09:23:26 PM UTC 24 |
8139785987 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.1255712991 |
|
|
Sep 18 09:22:46 PM UTC 24 |
Sep 18 09:23:27 PM UTC 24 |
6747935358 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.2383398019 |
|
|
Sep 18 09:23:02 PM UTC 24 |
Sep 18 09:23:27 PM UTC 24 |
358107104 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.2121307631 |
|
|
Sep 18 09:23:22 PM UTC 24 |
Sep 18 09:23:27 PM UTC 24 |
105932908 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.2470070515 |
|
|
Sep 18 09:23:12 PM UTC 24 |
Sep 18 09:23:27 PM UTC 24 |
6981976856 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.587107120 |
|
|
Sep 18 09:23:05 PM UTC 24 |
Sep 18 09:23:29 PM UTC 24 |
1070963441 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.2804705144 |
|
|
Sep 18 09:22:57 PM UTC 24 |
Sep 18 09:23:29 PM UTC 24 |
1094695668 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.731368460 |
|
|
Sep 18 09:23:27 PM UTC 24 |
Sep 18 09:23:30 PM UTC 24 |
28905915 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.2349441449 |
|
|
Sep 18 09:23:12 PM UTC 24 |
Sep 18 09:23:30 PM UTC 24 |
349460267 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.1879101372 |
|
|
Sep 18 09:23:15 PM UTC 24 |
Sep 18 09:23:30 PM UTC 24 |
4603310597 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.2350430790 |
|
|
Sep 18 09:22:04 PM UTC 24 |
Sep 18 09:23:31 PM UTC 24 |
1807561815 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.1525939477 |
|
|
Sep 18 09:23:29 PM UTC 24 |
Sep 18 09:23:31 PM UTC 24 |
25969922 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.1755550508 |
|
|
Sep 18 09:23:16 PM UTC 24 |
Sep 18 09:23:31 PM UTC 24 |
645562228 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.3161037479 |
|
|
Sep 18 09:23:29 PM UTC 24 |
Sep 18 09:23:32 PM UTC 24 |
40236152 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.4050946379 |
|
|
Sep 18 09:23:24 PM UTC 24 |
Sep 18 09:23:35 PM UTC 24 |
958460842 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.1308398251 |
|
|
Sep 18 09:23:00 PM UTC 24 |
Sep 18 09:23:35 PM UTC 24 |
747221777 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_errors.3345760921 |
|
|
Sep 18 09:23:23 PM UTC 24 |
Sep 18 09:23:35 PM UTC 24 |
175876521 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.2678878739 |
|
|
Sep 18 09:23:31 PM UTC 24 |
Sep 18 09:23:36 PM UTC 24 |
130748141 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.651223796 |
|
|
Sep 18 09:23:30 PM UTC 24 |
Sep 18 09:23:36 PM UTC 24 |
311903514 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.2250519006 |
|
|
Sep 18 09:23:05 PM UTC 24 |
Sep 18 09:23:36 PM UTC 24 |
3623793855 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.735191188 |
|
|
Sep 18 09:23:26 PM UTC 24 |
Sep 18 09:23:38 PM UTC 24 |
708820255 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.2843464742 |
|
|
Sep 18 09:23:05 PM UTC 24 |
Sep 18 09:23:38 PM UTC 24 |
7669842772 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.1049537648 |
|
|
Sep 18 09:23:27 PM UTC 24 |
Sep 18 09:23:39 PM UTC 24 |
443942217 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.1270035226 |
|
|
Sep 18 09:22:30 PM UTC 24 |
Sep 18 09:23:39 PM UTC 24 |
2659497705 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.1544550691 |
|
|
Sep 18 09:22:58 PM UTC 24 |
Sep 18 09:23:40 PM UTC 24 |
4677255362 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.571544147 |
|
|
Sep 18 09:23:23 PM UTC 24 |
Sep 18 09:23:40 PM UTC 24 |
613383385 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.442074666 |
|
|
Sep 18 09:23:23 PM UTC 24 |
Sep 18 09:23:41 PM UTC 24 |
1595558847 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.1261569758 |
|
|
Sep 18 09:23:31 PM UTC 24 |
Sep 18 09:23:41 PM UTC 24 |
593772004 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.3157134724 |
|
|
Sep 18 09:23:36 PM UTC 24 |
Sep 18 09:23:41 PM UTC 24 |
528390570 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.269960573 |
|
|
Sep 18 09:23:14 PM UTC 24 |
Sep 18 09:23:41 PM UTC 24 |
405868001 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.1323662637 |
|
|
Sep 18 09:23:39 PM UTC 24 |
Sep 18 09:23:41 PM UTC 24 |
20730822 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.3532508912 |
|
|
Sep 18 09:23:23 PM UTC 24 |
Sep 18 09:23:41 PM UTC 24 |
768535451 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_errors.4051457102 |
|
|
Sep 18 09:23:42 PM UTC 24 |
Sep 18 09:24:02 PM UTC 24 |
655839512 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.2694880914 |
|
|
Sep 18 09:23:30 PM UTC 24 |
Sep 18 09:23:42 PM UTC 24 |
198956489 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.990367039 |
|
|
Sep 18 09:23:40 PM UTC 24 |
Sep 18 09:23:42 PM UTC 24 |
139385759 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.3087418740 |
|
|
Sep 18 09:23:10 PM UTC 24 |
Sep 18 09:23:43 PM UTC 24 |
1103793125 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_errors.261699058 |
|
|
Sep 18 09:23:30 PM UTC 24 |
Sep 18 09:23:43 PM UTC 24 |
2672976385 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.2663358936 |
|
|
Sep 18 09:23:36 PM UTC 24 |
Sep 18 09:23:43 PM UTC 24 |
179752391 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.1253826575 |
|
|
Sep 18 09:23:41 PM UTC 24 |
Sep 18 09:23:45 PM UTC 24 |
109582073 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.1133087989 |
|
|
Sep 18 09:23:27 PM UTC 24 |
Sep 18 09:23:46 PM UTC 24 |
1094031451 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.847249426 |
|
|
Sep 18 09:23:39 PM UTC 24 |
Sep 18 09:23:46 PM UTC 24 |
92970934 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.3598589761 |
|
|
Sep 18 09:23:42 PM UTC 24 |
Sep 18 09:23:48 PM UTC 24 |
231315195 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.2781717317 |
|
|
Sep 18 09:23:27 PM UTC 24 |
Sep 18 09:23:48 PM UTC 24 |
2465944355 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.838342180 |
|
|
Sep 18 09:23:33 PM UTC 24 |
Sep 18 09:23:48 PM UTC 24 |
870737228 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.792528245 |
|
|
Sep 18 09:23:47 PM UTC 24 |
Sep 18 09:23:50 PM UTC 24 |
40277942 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.2525322383 |
|
|
Sep 18 09:23:36 PM UTC 24 |
Sep 18 09:23:50 PM UTC 24 |
387794893 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.963647191 |
|
|
Sep 18 09:23:22 PM UTC 24 |
Sep 18 09:23:51 PM UTC 24 |
831891329 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.2485776334 |
|
|
Sep 18 09:23:43 PM UTC 24 |
Sep 18 09:23:51 PM UTC 24 |
1220173670 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.2213535614 |
|
|
Sep 18 09:23:48 PM UTC 24 |
Sep 18 09:23:51 PM UTC 24 |
19861308 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.2906728417 |
|
|
Sep 18 09:23:57 PM UTC 24 |
Sep 18 09:24:01 PM UTC 24 |
156406191 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.3215340258 |
|
|
Sep 18 09:23:41 PM UTC 24 |
Sep 18 09:23:51 PM UTC 24 |
82881750 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.3991352702 |
|
|
Sep 18 09:23:51 PM UTC 24 |
Sep 18 09:23:54 PM UTC 24 |
84515951 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.2853055789 |
|
|
Sep 18 09:23:45 PM UTC 24 |
Sep 18 09:23:55 PM UTC 24 |
600227165 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.125514469 |
|
|
Sep 18 09:23:43 PM UTC 24 |
Sep 18 09:23:55 PM UTC 24 |
1156707956 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.671958903 |
|
|
Sep 18 09:23:48 PM UTC 24 |
Sep 18 09:23:55 PM UTC 24 |
123192818 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.999459314 |
|
|
Sep 18 09:23:42 PM UTC 24 |
Sep 18 09:23:56 PM UTC 24 |
406526360 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.3776095774 |
|
|
Sep 18 09:23:52 PM UTC 24 |
Sep 18 09:23:57 PM UTC 24 |
3704947377 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.2133530933 |
|
|
Sep 18 09:23:57 PM UTC 24 |
Sep 18 09:23:59 PM UTC 24 |
84483441 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.32283321 |
|
|
Sep 18 09:23:45 PM UTC 24 |
Sep 18 09:23:59 PM UTC 24 |
351117789 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.645611480 |
|
|
Sep 18 09:23:50 PM UTC 24 |
Sep 18 09:24:00 PM UTC 24 |
508967027 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1218366477 |
|
|
Sep 18 09:23:58 PM UTC 24 |
Sep 18 09:24:00 PM UTC 24 |
33740097 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.2286570962 |
|
|
Sep 18 09:23:12 PM UTC 24 |
Sep 18 09:24:01 PM UTC 24 |
1492461861 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.4207703318 |
|
|
Sep 18 09:23:44 PM UTC 24 |
Sep 18 09:24:03 PM UTC 24 |
669298109 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.562007891 |
|
|
Sep 18 09:23:32 PM UTC 24 |
Sep 18 09:24:03 PM UTC 24 |
935946424 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.1098158823 |
|
|
Sep 18 09:24:00 PM UTC 24 |
Sep 18 09:24:03 PM UTC 24 |
26670321 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.1685266939 |
|
|
Sep 18 09:23:25 PM UTC 24 |
Sep 18 09:24:03 PM UTC 24 |
4613547153 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.4178839629 |
|
|
Sep 18 09:23:43 PM UTC 24 |
Sep 18 09:24:03 PM UTC 24 |
471309788 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.787043194 |
|
|
Sep 18 09:23:33 PM UTC 24 |
Sep 18 09:24:05 PM UTC 24 |
4210802913 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.2717573162 |
|
|
Sep 18 09:23:52 PM UTC 24 |
Sep 18 09:24:05 PM UTC 24 |
205423506 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.2405295703 |
|
|
Sep 18 09:23:49 PM UTC 24 |
Sep 18 09:24:06 PM UTC 24 |
598474646 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.819581359 |
|
|
Sep 18 09:23:52 PM UTC 24 |
Sep 18 09:24:06 PM UTC 24 |
293379671 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.3204952037 |
|
|
Sep 18 09:24:39 PM UTC 24 |
Sep 18 09:24:42 PM UTC 24 |
107247111 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.2559002924 |
|
|
Sep 18 09:23:36 PM UTC 24 |
Sep 18 09:24:06 PM UTC 24 |
1492799372 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.2228668815 |
|
|
Sep 18 09:22:30 PM UTC 24 |
Sep 18 09:24:07 PM UTC 24 |
3910546811 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.404747884 |
|
|
Sep 18 09:24:04 PM UTC 24 |
Sep 18 09:24:07 PM UTC 24 |
32840499 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_errors.907185196 |
|
|
Sep 18 09:23:51 PM UTC 24 |
Sep 18 09:24:07 PM UTC 24 |
375960660 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.3515938624 |
|
|
Sep 18 09:24:04 PM UTC 24 |
Sep 18 09:24:07 PM UTC 24 |
16982922 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.2418527644 |
|
|
Sep 18 09:23:29 PM UTC 24 |
Sep 18 09:24:07 PM UTC 24 |
229027925 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.3592482553 |
|
|
Sep 18 09:23:54 PM UTC 24 |
Sep 18 09:24:07 PM UTC 24 |
264377445 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.2628812339 |
|
|
Sep 18 09:24:04 PM UTC 24 |
Sep 18 09:24:07 PM UTC 24 |
78218830 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.1257641769 |
|
|
Sep 18 09:23:52 PM UTC 24 |
Sep 18 09:24:08 PM UTC 24 |
571737252 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all.936346682 |
|
|
Sep 18 09:23:37 PM UTC 24 |
Sep 18 09:24:08 PM UTC 24 |
779742237 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.2113974265 |
|
|
Sep 18 09:23:40 PM UTC 24 |
Sep 18 09:24:09 PM UTC 24 |
2927029943 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.719052052 |
|
|
Sep 18 09:24:03 PM UTC 24 |
Sep 18 09:24:09 PM UTC 24 |
715482487 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.1889883040 |
|
|
Sep 18 09:24:00 PM UTC 24 |
Sep 18 09:24:10 PM UTC 24 |
742868244 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.954200326 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:24:11 PM UTC 24 |
31657694 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.2550545765 |
|
|
Sep 18 09:24:07 PM UTC 24 |
Sep 18 09:24:12 PM UTC 24 |
228677522 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.2646103343 |
|
|
Sep 18 09:24:01 PM UTC 24 |
Sep 18 09:24:12 PM UTC 24 |
1537476857 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_errors.1194093733 |
|
|
Sep 18 09:24:01 PM UTC 24 |
Sep 18 09:24:12 PM UTC 24 |
252766336 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.1719357811 |
|
|
Sep 18 09:24:10 PM UTC 24 |
Sep 18 09:24:13 PM UTC 24 |
16028734 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.724607316 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:24:14 PM UTC 24 |
242422962 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.629091049 |
|
|
Sep 18 09:24:11 PM UTC 24 |
Sep 18 09:24:15 PM UTC 24 |
20923741 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.4062988729 |
|
|
Sep 18 09:22:57 PM UTC 24 |
Sep 18 09:24:16 PM UTC 24 |
5289796405 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.444627124 |
|
|
Sep 18 09:23:14 PM UTC 24 |
Sep 18 09:24:16 PM UTC 24 |
7665620570 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.3451889577 |
|
|
Sep 18 09:24:07 PM UTC 24 |
Sep 18 09:24:17 PM UTC 24 |
146860720 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.3972561794 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:24:18 PM UTC 24 |
316569837 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.3346866801 |
|
|
Sep 18 09:24:35 PM UTC 24 |
Sep 18 09:24:38 PM UTC 24 |
233217432 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.3742470138 |
|
|
Sep 18 09:24:04 PM UTC 24 |
Sep 18 09:24:18 PM UTC 24 |
285331885 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.2676539620 |
|
|
Sep 18 09:24:16 PM UTC 24 |
Sep 18 09:24:18 PM UTC 24 |
16092220 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.3950256745 |
|
|
Sep 18 09:24:10 PM UTC 24 |
Sep 18 09:24:19 PM UTC 24 |
74293402 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.1936291453 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:24:20 PM UTC 24 |
339668685 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.327237890 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:24:20 PM UTC 24 |
427626007 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_errors.149398226 |
|
|
Sep 18 09:24:07 PM UTC 24 |
Sep 18 09:24:38 PM UTC 24 |
558844604 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.596621856 |
|
|
Sep 18 09:23:31 PM UTC 24 |
Sep 18 09:24:20 PM UTC 24 |
5971368516 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.2682987832 |
|
|
Sep 18 09:24:19 PM UTC 24 |
Sep 18 09:24:21 PM UTC 24 |
43735495 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.3561074067 |
|
|
Sep 18 09:24:17 PM UTC 24 |
Sep 18 09:24:21 PM UTC 24 |
84063559 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.4239936339 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:24:22 PM UTC 24 |
1382402539 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.1177852909 |
|
|
Sep 18 09:23:59 PM UTC 24 |
Sep 18 09:24:23 PM UTC 24 |
941343743 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.231662373 |
|
|
Sep 18 09:24:12 PM UTC 24 |
Sep 18 09:24:24 PM UTC 24 |
4263132119 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.2751032294 |
|
|
Sep 18 09:24:14 PM UTC 24 |
Sep 18 09:24:24 PM UTC 24 |
1186034076 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.1504861155 |
|
|
Sep 18 09:24:20 PM UTC 24 |
Sep 18 09:24:25 PM UTC 24 |
74226067 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.3127900218 |
|
|
Sep 18 09:24:02 PM UTC 24 |
Sep 18 09:24:26 PM UTC 24 |
803589657 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.3652833564 |
|
|
Sep 18 09:24:19 PM UTC 24 |
Sep 18 09:24:26 PM UTC 24 |
545438957 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_errors.3593901435 |
|
|
Sep 18 09:24:12 PM UTC 24 |
Sep 18 09:24:27 PM UTC 24 |
225302615 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.3060570051 |
|
|
Sep 18 09:24:03 PM UTC 24 |
Sep 18 09:24:27 PM UTC 24 |
522270352 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.4233298333 |
|
|
Sep 18 09:24:25 PM UTC 24 |
Sep 18 09:24:28 PM UTC 24 |
53034497 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.3749185279 |
|
|
Sep 18 09:24:25 PM UTC 24 |
Sep 18 09:24:28 PM UTC 24 |
16886080 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.2434634970 |
|
|
Sep 18 09:23:43 PM UTC 24 |
Sep 18 09:24:28 PM UTC 24 |
1423489348 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.3576684930 |
|
|
Sep 18 09:24:14 PM UTC 24 |
Sep 18 09:24:28 PM UTC 24 |
2688987946 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.994815009 |
|
|
Sep 18 09:24:25 PM UTC 24 |
Sep 18 09:24:28 PM UTC 24 |
21667924 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all_with_rand_reset.1491949801 |
|
|
Sep 18 09:23:27 PM UTC 24 |
Sep 18 09:24:30 PM UTC 24 |
4469224994 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.442165772 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:24:31 PM UTC 24 |
2236793013 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.1349585490 |
|
|
Sep 18 09:24:14 PM UTC 24 |
Sep 18 09:24:31 PM UTC 24 |
836843499 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.60599095 |
|
|
Sep 18 09:24:22 PM UTC 24 |
Sep 18 09:24:33 PM UTC 24 |
1132788561 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.2012500574 |
|
|
Sep 18 09:24:15 PM UTC 24 |
Sep 18 09:24:33 PM UTC 24 |
2382519217 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.2420744873 |
|
|
Sep 18 09:24:06 PM UTC 24 |
Sep 18 09:24:33 PM UTC 24 |
1635862373 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.854503441 |
|
|
Sep 18 09:24:22 PM UTC 24 |
Sep 18 09:24:33 PM UTC 24 |
432493065 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.3223994710 |
|
|
Sep 18 09:24:28 PM UTC 24 |
Sep 18 09:24:33 PM UTC 24 |
593163041 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.482145806 |
|
|
Sep 18 09:24:32 PM UTC 24 |
Sep 18 09:24:34 PM UTC 24 |
29090609 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.4054380091 |
|
|
Sep 18 09:24:23 PM UTC 24 |
Sep 18 09:24:35 PM UTC 24 |
293938620 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.2508360263 |
|
|
Sep 18 09:24:22 PM UTC 24 |
Sep 18 09:24:35 PM UTC 24 |
379157458 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_errors.2711919381 |
|
|
Sep 18 09:24:21 PM UTC 24 |
Sep 18 09:24:35 PM UTC 24 |
999585981 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.4115360202 |
|
|
Sep 18 09:24:29 PM UTC 24 |
Sep 18 09:24:36 PM UTC 24 |
1008779410 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.2661289225 |
|
|
Sep 18 09:24:22 PM UTC 24 |
Sep 18 09:24:37 PM UTC 24 |
325497002 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.3282981528 |
|
|
Sep 18 09:23:23 PM UTC 24 |
Sep 18 09:24:37 PM UTC 24 |
7088583128 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.3665776183 |
|
|
Sep 18 09:24:34 PM UTC 24 |
Sep 18 09:24:37 PM UTC 24 |
115164690 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.955383229 |
|
|
Sep 18 09:24:33 PM UTC 24 |
Sep 18 09:24:37 PM UTC 24 |
57725641 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2110179077 |
|
|
Sep 18 09:24:29 PM UTC 24 |
Sep 18 09:24:38 PM UTC 24 |
300944832 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.1212971960 |
|
|
Sep 18 09:24:29 PM UTC 24 |
Sep 18 09:24:38 PM UTC 24 |
900328926 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.1045462657 |
|
|
Sep 18 09:24:27 PM UTC 24 |
Sep 18 09:24:38 PM UTC 24 |
334602881 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all.2845267771 |
|
|
Sep 18 09:23:47 PM UTC 24 |
Sep 18 09:24:40 PM UTC 24 |
1197267511 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.1537992155 |
|
|
Sep 18 09:25:01 PM UTC 24 |
Sep 18 09:25:13 PM UTC 24 |
390739177 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.527930335 |
|
|
Sep 18 09:23:02 PM UTC 24 |
Sep 18 09:24:40 PM UTC 24 |
4958220536 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.2103559758 |
|
|
Sep 18 09:24:39 PM UTC 24 |
Sep 18 09:24:42 PM UTC 24 |
17070933 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3177049080 |
|
|
Sep 18 09:24:39 PM UTC 24 |
Sep 18 09:24:42 PM UTC 24 |
73645313 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.3505521870 |
|
|
Sep 18 09:24:29 PM UTC 24 |
Sep 18 09:24:42 PM UTC 24 |
391771906 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.45396109 |
|
|
Sep 18 09:24:29 PM UTC 24 |
Sep 18 09:24:43 PM UTC 24 |
1088439376 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.1426941974 |
|
|
Sep 18 09:24:39 PM UTC 24 |
Sep 18 09:24:43 PM UTC 24 |
30265700 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.2248328629 |
|
|
Sep 18 09:24:10 PM UTC 24 |
Sep 18 09:24:43 PM UTC 24 |
1019661995 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_errors.1329092535 |
|
|
Sep 18 09:24:28 PM UTC 24 |
Sep 18 09:24:44 PM UTC 24 |
1700059598 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.1791615831 |
|
|
Sep 18 09:24:34 PM UTC 24 |
Sep 18 09:24:44 PM UTC 24 |
298515826 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.4203623620 |
|
|
Sep 18 09:24:39 PM UTC 24 |
Sep 18 09:24:45 PM UTC 24 |
89951460 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.116795011 |
|
|
Sep 18 09:24:44 PM UTC 24 |
Sep 18 09:24:46 PM UTC 24 |
58891454 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_failure.1536968332 |
|
|
Sep 18 09:23:43 PM UTC 24 |
Sep 18 09:24:46 PM UTC 24 |
2911053215 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_stress_all_with_rand_reset.2148505721 |
|
|
Sep 18 09:24:32 PM UTC 24 |
Sep 18 09:24:46 PM UTC 24 |
432680682 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.688685514 |
|
|
Sep 18 09:24:38 PM UTC 24 |
Sep 18 09:24:47 PM UTC 24 |
530213290 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_digest.583227621 |
|
|
Sep 18 09:24:38 PM UTC 24 |
Sep 18 09:24:47 PM UTC 24 |
655833845 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.10687992 |
|
|
Sep 18 09:24:45 PM UTC 24 |
Sep 18 09:24:47 PM UTC 24 |
40526519 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.2383211366 |
|
|
Sep 18 09:24:44 PM UTC 24 |
Sep 18 09:24:48 PM UTC 24 |
37755342 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/16.lc_ctrl_stress_all.977767576 |
|
|
Sep 18 09:23:17 PM UTC 24 |
Sep 18 09:24:48 PM UTC 24 |
22283074060 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.3292738277 |
|
|
Sep 18 09:24:19 PM UTC 24 |
Sep 18 09:24:49 PM UTC 24 |
515150172 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.2804363376 |
|
|
Sep 18 09:22:52 PM UTC 24 |
Sep 18 09:24:49 PM UTC 24 |
26309427092 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_errors.1900705478 |
|
|
Sep 18 09:24:36 PM UTC 24 |
Sep 18 09:24:50 PM UTC 24 |
2605425697 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_errors.312229619 |
|
|
Sep 18 09:24:39 PM UTC 24 |
Sep 18 09:24:50 PM UTC 24 |
395505493 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.4022660359 |
|
|
Sep 18 09:24:36 PM UTC 24 |
Sep 18 09:24:50 PM UTC 24 |
307286159 ps |