| T587 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.4126373526 |
|
|
Sep 18 09:25:05 PM UTC 24 |
Sep 18 09:25:14 PM UTC 24 |
186922482 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_state_failure.2393282282 |
|
|
Sep 18 09:24:26 PM UTC 24 |
Sep 18 09:24:51 PM UTC 24 |
779953078 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.2620494132 |
|
|
Sep 18 09:24:34 PM UTC 24 |
Sep 18 09:24:52 PM UTC 24 |
374307125 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.3580963043 |
|
|
Sep 18 09:24:46 PM UTC 24 |
Sep 18 09:24:52 PM UTC 24 |
644480175 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all_with_rand_reset.2251082957 |
|
|
Sep 18 09:24:16 PM UTC 24 |
Sep 18 09:25:14 PM UTC 24 |
8406318834 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.948864700 |
|
|
Sep 18 09:24:51 PM UTC 24 |
Sep 18 09:24:53 PM UTC 24 |
32868854 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.2277322821 |
|
|
Sep 18 09:24:51 PM UTC 24 |
Sep 18 09:24:53 PM UTC 24 |
12946746 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.1645622679 |
|
|
Sep 18 09:24:41 PM UTC 24 |
Sep 18 09:24:54 PM UTC 24 |
281501125 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.299184111 |
|
|
Sep 18 09:25:52 PM UTC 24 |
Sep 18 09:25:55 PM UTC 24 |
24981784 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.3397384418 |
|
|
Sep 18 09:24:48 PM UTC 24 |
Sep 18 09:24:54 PM UTC 24 |
181364991 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.3791983305 |
|
|
Sep 18 09:24:42 PM UTC 24 |
Sep 18 09:24:54 PM UTC 24 |
831608216 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.3052887343 |
|
|
Sep 18 09:24:51 PM UTC 24 |
Sep 18 09:24:55 PM UTC 24 |
157074804 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.2489148926 |
|
|
Sep 18 09:24:36 PM UTC 24 |
Sep 18 09:24:55 PM UTC 24 |
392637602 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.2405112960 |
|
|
Sep 18 09:24:45 PM UTC 24 |
Sep 18 09:24:56 PM UTC 24 |
214707793 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_security_escalation.2995851882 |
|
|
Sep 18 09:24:41 PM UTC 24 |
Sep 18 09:24:56 PM UTC 24 |
1333499630 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.3169396991 |
|
|
Sep 18 09:24:52 PM UTC 24 |
Sep 18 09:24:57 PM UTC 24 |
197090659 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_jtag_access.676595663 |
|
|
Sep 18 09:24:41 PM UTC 24 |
Sep 18 09:24:57 PM UTC 24 |
1028076619 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.1217529293 |
|
|
Sep 18 09:24:36 PM UTC 24 |
Sep 18 09:24:57 PM UTC 24 |
4667026569 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.3586632724 |
|
|
Sep 18 09:24:54 PM UTC 24 |
Sep 18 09:24:58 PM UTC 24 |
264825329 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.3515449557 |
|
|
Sep 18 09:24:55 PM UTC 24 |
Sep 18 09:24:58 PM UTC 24 |
107444246 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.1139467705 |
|
|
Sep 18 09:24:51 PM UTC 24 |
Sep 18 09:24:59 PM UTC 24 |
390646762 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.638703726 |
|
|
Sep 18 09:24:57 PM UTC 24 |
Sep 18 09:25:00 PM UTC 24 |
13498668 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.534819232 |
|
|
Sep 18 09:24:47 PM UTC 24 |
Sep 18 09:25:00 PM UTC 24 |
440893038 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_mux.535320392 |
|
|
Sep 18 09:24:42 PM UTC 24 |
Sep 18 09:25:00 PM UTC 24 |
1537487895 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.1519679388 |
|
|
Sep 18 09:24:49 PM UTC 24 |
Sep 18 09:25:00 PM UTC 24 |
1351861657 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.3749541873 |
|
|
Sep 18 09:25:09 PM UTC 24 |
Sep 18 09:25:14 PM UTC 24 |
99288557 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.3860145279 |
|
|
Sep 18 09:24:56 PM UTC 24 |
Sep 18 09:25:01 PM UTC 24 |
177205067 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.4223200296 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:25:12 PM UTC 24 |
4511721429 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.2553155496 |
|
|
Sep 18 09:25:01 PM UTC 24 |
Sep 18 09:25:15 PM UTC 24 |
346048393 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_errors.3791570411 |
|
|
Sep 18 09:24:47 PM UTC 24 |
Sep 18 09:25:02 PM UTC 24 |
343714335 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.759381019 |
|
|
Sep 18 09:23:07 PM UTC 24 |
Sep 18 09:25:03 PM UTC 24 |
4343733869 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.2928769256 |
|
|
Sep 18 09:24:59 PM UTC 24 |
Sep 18 09:25:03 PM UTC 24 |
244115429 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_errors.1373548588 |
|
|
Sep 18 09:24:52 PM UTC 24 |
Sep 18 09:25:03 PM UTC 24 |
2415053673 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.2291534075 |
|
|
Sep 18 09:24:39 PM UTC 24 |
Sep 18 09:25:04 PM UTC 24 |
802501156 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.2361147200 |
|
|
Sep 18 09:24:49 PM UTC 24 |
Sep 18 09:25:04 PM UTC 24 |
439154348 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.2502265841 |
|
|
Sep 18 09:24:52 PM UTC 24 |
Sep 18 09:25:04 PM UTC 24 |
2250971054 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.4097148438 |
|
|
Sep 18 09:25:03 PM UTC 24 |
Sep 18 09:25:05 PM UTC 24 |
11580109 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.3698872052 |
|
|
Sep 18 09:25:03 PM UTC 24 |
Sep 18 09:25:06 PM UTC 24 |
64764661 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.3225840180 |
|
|
Sep 18 09:24:54 PM UTC 24 |
Sep 18 09:25:07 PM UTC 24 |
1130494355 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.2474464735 |
|
|
Sep 18 09:24:59 PM UTC 24 |
Sep 18 09:25:08 PM UTC 24 |
1453153333 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.2189990764 |
|
|
Sep 18 09:24:49 PM UTC 24 |
Sep 18 09:25:08 PM UTC 24 |
804631916 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.3873421927 |
|
|
Sep 18 09:25:03 PM UTC 24 |
Sep 18 09:25:08 PM UTC 24 |
182638722 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.993251824 |
|
|
Sep 18 09:24:58 PM UTC 24 |
Sep 18 09:25:08 PM UTC 24 |
284910448 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.3417253829 |
|
|
Sep 18 09:24:59 PM UTC 24 |
Sep 18 09:25:08 PM UTC 24 |
426099966 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.1226540848 |
|
|
Sep 18 09:24:55 PM UTC 24 |
Sep 18 09:25:09 PM UTC 24 |
603449788 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.2003389661 |
|
|
Sep 18 09:25:08 PM UTC 24 |
Sep 18 09:25:10 PM UTC 24 |
24449051 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.2299518458 |
|
|
Sep 18 09:25:49 PM UTC 24 |
Sep 18 09:25:55 PM UTC 24 |
1859811254 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.1787794069 |
|
|
Sep 18 09:25:05 PM UTC 24 |
Sep 18 09:25:11 PM UTC 24 |
388794327 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.1010914586 |
|
|
Sep 18 09:25:05 PM UTC 24 |
Sep 18 09:25:12 PM UTC 24 |
1263380148 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.2285344079 |
|
|
Sep 18 09:25:09 PM UTC 24 |
Sep 18 09:25:12 PM UTC 24 |
24441012 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.348329821 |
|
|
Sep 18 09:25:03 PM UTC 24 |
Sep 18 09:25:12 PM UTC 24 |
99444538 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_errors.1746352182 |
|
|
Sep 18 09:24:59 PM UTC 24 |
Sep 18 09:25:12 PM UTC 24 |
624079746 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3924963966 |
|
|
Sep 18 09:25:00 PM UTC 24 |
Sep 18 09:25:12 PM UTC 24 |
451851789 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.786345274 |
|
|
Sep 18 09:25:09 PM UTC 24 |
Sep 18 09:25:13 PM UTC 24 |
50645003 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.3623684111 |
|
|
Sep 18 09:25:05 PM UTC 24 |
Sep 18 09:25:14 PM UTC 24 |
498315418 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.1428560470 |
|
|
Sep 18 09:22:41 PM UTC 24 |
Sep 18 09:25:15 PM UTC 24 |
24538124522 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.4254717287 |
|
|
Sep 18 09:25:09 PM UTC 24 |
Sep 18 09:25:15 PM UTC 24 |
380378552 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_errors.2886083303 |
|
|
Sep 18 09:25:05 PM UTC 24 |
Sep 18 09:25:16 PM UTC 24 |
170427608 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.1348631784 |
|
|
Sep 18 09:25:15 PM UTC 24 |
Sep 18 09:25:17 PM UTC 24 |
17729882 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.2653794170 |
|
|
Sep 18 09:25:14 PM UTC 24 |
Sep 18 09:25:17 PM UTC 24 |
126797876 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.2690488695 |
|
|
Sep 18 09:24:45 PM UTC 24 |
Sep 18 09:25:18 PM UTC 24 |
5077174114 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.3121904462 |
|
|
Sep 18 09:25:14 PM UTC 24 |
Sep 18 09:25:19 PM UTC 24 |
35422284 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3981790506 |
|
|
Sep 18 09:25:17 PM UTC 24 |
Sep 18 09:25:20 PM UTC 24 |
70598837 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_errors.3365272291 |
|
|
Sep 18 09:25:41 PM UTC 24 |
Sep 18 09:25:55 PM UTC 24 |
3425238662 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.2258525415 |
|
|
Sep 18 09:25:19 PM UTC 24 |
Sep 18 09:25:21 PM UTC 24 |
35199320 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_errors.1777532499 |
|
|
Sep 18 09:25:09 PM UTC 24 |
Sep 18 09:25:21 PM UTC 24 |
889880063 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.368127620 |
|
|
Sep 18 09:25:05 PM UTC 24 |
Sep 18 09:25:22 PM UTC 24 |
2023711030 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.2542747709 |
|
|
Sep 18 09:25:17 PM UTC 24 |
Sep 18 09:25:22 PM UTC 24 |
68126333 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.889038750 |
|
|
Sep 18 09:25:05 PM UTC 24 |
Sep 18 09:25:22 PM UTC 24 |
2139764000 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.2255891745 |
|
|
Sep 18 09:25:13 PM UTC 24 |
Sep 18 09:25:23 PM UTC 24 |
11964158451 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.3383706654 |
|
|
Sep 18 09:25:21 PM UTC 24 |
Sep 18 09:25:23 PM UTC 24 |
97262590 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.4012179349 |
|
|
Sep 18 09:24:54 PM UTC 24 |
Sep 18 09:25:23 PM UTC 24 |
989336824 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.669389319 |
|
|
Sep 18 09:25:52 PM UTC 24 |
Sep 18 09:25:54 PM UTC 24 |
11347789 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.542027858 |
|
|
Sep 18 09:25:10 PM UTC 24 |
Sep 18 09:25:23 PM UTC 24 |
1037521050 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.3506492714 |
|
|
Sep 18 09:25:20 PM UTC 24 |
Sep 18 09:25:23 PM UTC 24 |
65168089 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.375440345 |
|
|
Sep 18 09:25:13 PM UTC 24 |
Sep 18 09:25:24 PM UTC 24 |
1348232391 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.721084652 |
|
|
Sep 18 09:24:51 PM UTC 24 |
Sep 18 09:25:24 PM UTC 24 |
491315883 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.2054834147 |
|
|
Sep 18 09:24:58 PM UTC 24 |
Sep 18 09:25:24 PM UTC 24 |
284788969 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.3165412113 |
|
|
Sep 18 09:25:22 PM UTC 24 |
Sep 18 09:25:25 PM UTC 24 |
72639247 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.875050593 |
|
|
Sep 18 09:25:13 PM UTC 24 |
Sep 18 09:25:26 PM UTC 24 |
4187834562 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.2991246471 |
|
|
Sep 18 09:25:22 PM UTC 24 |
Sep 18 09:25:26 PM UTC 24 |
293899428 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.1333073361 |
|
|
Sep 18 09:25:17 PM UTC 24 |
Sep 18 09:25:27 PM UTC 24 |
75014057 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.138204298 |
|
|
Sep 18 09:25:17 PM UTC 24 |
Sep 18 09:25:28 PM UTC 24 |
470085048 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.1930404980 |
|
|
Sep 18 09:25:25 PM UTC 24 |
Sep 18 09:25:28 PM UTC 24 |
200381564 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.289987592 |
|
|
Sep 18 09:24:16 PM UTC 24 |
Sep 18 09:25:29 PM UTC 24 |
8249528871 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_errors.2742752277 |
|
|
Sep 18 09:25:17 PM UTC 24 |
Sep 18 09:25:29 PM UTC 24 |
423145498 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.1619745174 |
|
|
Sep 18 09:25:27 PM UTC 24 |
Sep 18 09:25:29 PM UTC 24 |
19981577 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.3351899156 |
|
|
Sep 18 09:25:17 PM UTC 24 |
Sep 18 09:25:30 PM UTC 24 |
1690526746 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.3637533100 |
|
|
Sep 18 09:25:23 PM UTC 24 |
Sep 18 09:25:31 PM UTC 24 |
369651896 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.4029462572 |
|
|
Sep 18 09:25:03 PM UTC 24 |
Sep 18 09:25:31 PM UTC 24 |
270728579 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.3569025363 |
|
|
Sep 18 09:25:13 PM UTC 24 |
Sep 18 09:25:32 PM UTC 24 |
2037714442 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.3455893929 |
|
|
Sep 18 09:25:27 PM UTC 24 |
Sep 18 09:25:32 PM UTC 24 |
208419341 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.2372000667 |
|
|
Sep 18 09:25:23 PM UTC 24 |
Sep 18 09:25:32 PM UTC 24 |
337651172 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.1248441936 |
|
|
Sep 18 09:25:25 PM UTC 24 |
Sep 18 09:25:33 PM UTC 24 |
602268867 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_errors.1264356511 |
|
|
Sep 18 09:25:23 PM UTC 24 |
Sep 18 09:25:34 PM UTC 24 |
262897208 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.2150491720 |
|
|
Sep 18 09:25:18 PM UTC 24 |
Sep 18 09:25:34 PM UTC 24 |
737037762 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.1239582026 |
|
|
Sep 18 09:25:09 PM UTC 24 |
Sep 18 09:25:35 PM UTC 24 |
251157397 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.506517661 |
|
|
Sep 18 09:25:32 PM UTC 24 |
Sep 18 09:25:35 PM UTC 24 |
62878177 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.2270820649 |
|
|
Sep 18 09:25:25 PM UTC 24 |
Sep 18 09:25:36 PM UTC 24 |
361938531 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.1549555738 |
|
|
Sep 18 09:25:17 PM UTC 24 |
Sep 18 09:25:37 PM UTC 24 |
453430603 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.819486845 |
|
|
Sep 18 09:25:34 PM UTC 24 |
Sep 18 09:25:37 PM UTC 24 |
17358662 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.2323090672 |
|
|
Sep 18 09:25:23 PM UTC 24 |
Sep 18 09:25:37 PM UTC 24 |
2010092622 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.2070133423 |
|
|
Sep 18 09:25:34 PM UTC 24 |
Sep 18 09:25:38 PM UTC 24 |
31621992 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.2740959116 |
|
|
Sep 18 09:25:27 PM UTC 24 |
Sep 18 09:25:38 PM UTC 24 |
124098066 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_errors.887777790 |
|
|
Sep 18 09:25:28 PM UTC 24 |
Sep 18 09:25:39 PM UTC 24 |
229233917 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.517851496 |
|
|
Sep 18 09:25:23 PM UTC 24 |
Sep 18 09:25:40 PM UTC 24 |
603503004 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.3317406485 |
|
|
Sep 18 09:25:34 PM UTC 24 |
Sep 18 09:25:40 PM UTC 24 |
297715938 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.1025563326 |
|
|
Sep 18 09:25:28 PM UTC 24 |
Sep 18 09:25:40 PM UTC 24 |
1649893773 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.343084625 |
|
|
Sep 18 09:24:44 PM UTC 24 |
Sep 18 09:25:40 PM UTC 24 |
3565922078 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.1636040254 |
|
|
Sep 18 09:25:39 PM UTC 24 |
Sep 18 09:25:41 PM UTC 24 |
62156486 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.3071086450 |
|
|
Sep 18 09:25:30 PM UTC 24 |
Sep 18 09:25:42 PM UTC 24 |
326122024 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.3033216431 |
|
|
Sep 18 09:25:15 PM UTC 24 |
Sep 18 09:25:42 PM UTC 24 |
840734437 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.3405701529 |
|
|
Sep 18 09:25:40 PM UTC 24 |
Sep 18 09:25:42 PM UTC 24 |
20953285 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.3737712800 |
|
|
Sep 18 09:25:32 PM UTC 24 |
Sep 18 09:25:43 PM UTC 24 |
597770679 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.3335461074 |
|
|
Sep 18 09:25:30 PM UTC 24 |
Sep 18 09:25:43 PM UTC 24 |
334112782 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.1920295432 |
|
|
Sep 18 09:25:39 PM UTC 24 |
Sep 18 09:25:43 PM UTC 24 |
342849616 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.4267291884 |
|
|
Sep 18 09:25:30 PM UTC 24 |
Sep 18 09:25:44 PM UTC 24 |
1115438623 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.2098009532 |
|
|
Sep 18 09:25:22 PM UTC 24 |
Sep 18 09:25:44 PM UTC 24 |
195499858 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.1628893801 |
|
|
Sep 18 09:25:37 PM UTC 24 |
Sep 18 09:25:45 PM UTC 24 |
455674641 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.730971243 |
|
|
Sep 18 09:25:34 PM UTC 24 |
Sep 18 09:25:46 PM UTC 24 |
165648719 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.1982635230 |
|
|
Sep 18 09:25:41 PM UTC 24 |
Sep 18 09:25:46 PM UTC 24 |
235487240 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.3750298974 |
|
|
Sep 18 09:25:44 PM UTC 24 |
Sep 18 09:25:46 PM UTC 24 |
25637945 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all.3055176321 |
|
|
Sep 18 09:24:55 PM UTC 24 |
Sep 18 09:25:47 PM UTC 24 |
2450072996 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.874866131 |
|
|
Sep 18 09:25:37 PM UTC 24 |
Sep 18 09:25:47 PM UTC 24 |
267694454 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.1698487439 |
|
|
Sep 18 09:25:45 PM UTC 24 |
Sep 18 09:25:48 PM UTC 24 |
12950339 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.1378587629 |
|
|
Sep 18 09:25:37 PM UTC 24 |
Sep 18 09:25:48 PM UTC 24 |
1086236246 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.1426374006 |
|
|
Sep 18 09:25:45 PM UTC 24 |
Sep 18 09:25:49 PM UTC 24 |
21713542 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.3891341929 |
|
|
Sep 18 09:25:41 PM UTC 24 |
Sep 18 09:25:49 PM UTC 24 |
169059702 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.1315459141 |
|
|
Sep 18 09:25:42 PM UTC 24 |
Sep 18 09:25:49 PM UTC 24 |
2159905395 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.3990008507 |
|
|
Sep 18 09:25:38 PM UTC 24 |
Sep 18 09:25:51 PM UTC 24 |
595041853 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.2290732012 |
|
|
Sep 18 09:25:42 PM UTC 24 |
Sep 18 09:25:51 PM UTC 24 |
2456482096 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_errors.909442017 |
|
|
Sep 18 09:25:37 PM UTC 24 |
Sep 18 09:25:51 PM UTC 24 |
194869340 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.3670285086 |
|
|
Sep 18 09:25:48 PM UTC 24 |
Sep 18 09:25:52 PM UTC 24 |
78072381 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.95797019 |
|
|
Sep 18 09:25:51 PM UTC 24 |
Sep 18 09:25:53 PM UTC 24 |
59023038 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.954684964 |
|
|
Sep 18 09:25:27 PM UTC 24 |
Sep 18 09:25:54 PM UTC 24 |
415686568 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.132790944 |
|
|
Sep 18 09:25:43 PM UTC 24 |
Sep 18 09:25:55 PM UTC 24 |
476786045 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.990655497 |
|
|
Sep 18 09:25:43 PM UTC 24 |
Sep 18 09:25:56 PM UTC 24 |
294497027 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.2770570352 |
|
|
Sep 18 09:25:43 PM UTC 24 |
Sep 18 09:25:56 PM UTC 24 |
837866630 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.4097490936 |
|
|
Sep 18 09:25:48 PM UTC 24 |
Sep 18 09:25:57 PM UTC 24 |
206097230 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.2835454652 |
|
|
Sep 18 09:25:46 PM UTC 24 |
Sep 18 09:25:57 PM UTC 24 |
77229410 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.3944520322 |
|
|
Sep 18 09:25:38 PM UTC 24 |
Sep 18 09:25:57 PM UTC 24 |
1161759984 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.3971983150 |
|
|
Sep 18 09:24:55 PM UTC 24 |
Sep 18 09:25:59 PM UTC 24 |
40589056961 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.4051155952 |
|
|
Sep 18 09:25:54 PM UTC 24 |
Sep 18 09:25:59 PM UTC 24 |
103716854 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.636799702 |
|
|
Sep 18 09:26:12 PM UTC 24 |
Sep 18 09:26:33 PM UTC 24 |
418523713 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.3107732679 |
|
|
Sep 18 09:25:49 PM UTC 24 |
Sep 18 09:25:59 PM UTC 24 |
338357759 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.3445665131 |
|
|
Sep 18 09:25:49 PM UTC 24 |
Sep 18 09:26:00 PM UTC 24 |
1310232200 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.189987508 |
|
|
Sep 18 09:25:57 PM UTC 24 |
Sep 18 09:26:00 PM UTC 24 |
68151441 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.4152397905 |
|
|
Sep 18 09:25:56 PM UTC 24 |
Sep 18 09:26:00 PM UTC 24 |
174744549 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_errors.2398948242 |
|
|
Sep 18 09:25:48 PM UTC 24 |
Sep 18 09:26:01 PM UTC 24 |
6228423872 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.1648287926 |
|
|
Sep 18 09:25:59 PM UTC 24 |
Sep 18 09:26:01 PM UTC 24 |
84653089 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.3884448556 |
|
|
Sep 18 09:25:53 PM UTC 24 |
Sep 18 09:26:01 PM UTC 24 |
343552273 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.4074850947 |
|
|
Sep 18 09:25:59 PM UTC 24 |
Sep 18 09:26:01 PM UTC 24 |
38672541 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.1373494916 |
|
|
Sep 18 09:24:04 PM UTC 24 |
Sep 18 09:26:03 PM UTC 24 |
4154212031 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.2541496353 |
|
|
Sep 18 09:25:34 PM UTC 24 |
Sep 18 09:26:05 PM UTC 24 |
254393854 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.4095862584 |
|
|
Sep 18 09:22:49 PM UTC 24 |
Sep 18 09:26:05 PM UTC 24 |
8233269157 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all_with_rand_reset.2037026122 |
|
|
Sep 18 09:24:44 PM UTC 24 |
Sep 18 09:26:05 PM UTC 24 |
7502027940 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.477862264 |
|
|
Sep 18 09:26:03 PM UTC 24 |
Sep 18 09:26:06 PM UTC 24 |
19806376 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.1910133169 |
|
|
Sep 18 09:25:56 PM UTC 24 |
Sep 18 09:26:07 PM UTC 24 |
356757854 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.138563642 |
|
|
Sep 18 09:24:38 PM UTC 24 |
Sep 18 09:26:07 PM UTC 24 |
5764253698 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.1054847583 |
|
|
Sep 18 09:26:02 PM UTC 24 |
Sep 18 09:26:08 PM UTC 24 |
267659487 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.3474926513 |
|
|
Sep 18 09:25:41 PM UTC 24 |
Sep 18 09:26:08 PM UTC 24 |
738939908 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.868533463 |
|
|
Sep 18 09:26:00 PM UTC 24 |
Sep 18 09:26:08 PM UTC 24 |
483133940 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.2317999849 |
|
|
Sep 18 09:26:06 PM UTC 24 |
Sep 18 09:26:09 PM UTC 24 |
41869600 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.3043790870 |
|
|
Sep 18 09:23:55 PM UTC 24 |
Sep 18 09:26:09 PM UTC 24 |
21149125243 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.1868307530 |
|
|
Sep 18 09:26:06 PM UTC 24 |
Sep 18 09:26:10 PM UTC 24 |
84802071 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_errors.4173677181 |
|
|
Sep 18 09:25:54 PM UTC 24 |
Sep 18 09:26:10 PM UTC 24 |
5737279892 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.649491043 |
|
|
Sep 18 09:25:45 PM UTC 24 |
Sep 18 09:26:11 PM UTC 24 |
908239741 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.1089491051 |
|
|
Sep 18 09:26:22 PM UTC 24 |
Sep 18 09:26:33 PM UTC 24 |
3600724908 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.740982243 |
|
|
Sep 18 09:25:56 PM UTC 24 |
Sep 18 09:26:11 PM UTC 24 |
2623904118 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.2027623143 |
|
|
Sep 18 09:26:05 PM UTC 24 |
Sep 18 09:26:11 PM UTC 24 |
132865683 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.3979553690 |
|
|
Sep 18 09:26:00 PM UTC 24 |
Sep 18 09:26:11 PM UTC 24 |
690365250 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.2292606752 |
|
|
Sep 18 09:26:00 PM UTC 24 |
Sep 18 09:26:12 PM UTC 24 |
140952935 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.1135357360 |
|
|
Sep 18 09:25:56 PM UTC 24 |
Sep 18 09:26:13 PM UTC 24 |
1067641161 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.893706369 |
|
|
Sep 18 09:26:02 PM UTC 24 |
Sep 18 09:26:14 PM UTC 24 |
1006460812 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/49.lc_ctrl_sec_token_digest.2089645468 |
|
|
Sep 18 09:26:56 PM UTC 24 |
Sep 18 09:27:10 PM UTC 24 |
385684764 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.3361124438 |
|
|
Sep 18 09:26:12 PM UTC 24 |
Sep 18 09:26:14 PM UTC 24 |
29806531 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.3823551083 |
|
|
Sep 18 09:26:12 PM UTC 24 |
Sep 18 09:26:14 PM UTC 24 |
22506557 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_errors.3037122592 |
|
|
Sep 18 09:26:00 PM UTC 24 |
Sep 18 09:26:15 PM UTC 24 |
340946485 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.2982921129 |
|
|
Sep 18 09:25:52 PM UTC 24 |
Sep 18 09:26:15 PM UTC 24 |
300630048 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.3299035017 |
|
|
Sep 18 09:26:22 PM UTC 24 |
Sep 18 09:26:33 PM UTC 24 |
1274032037 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.521068099 |
|
|
Sep 18 09:26:06 PM UTC 24 |
Sep 18 09:26:16 PM UTC 24 |
89036685 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.492826688 |
|
|
Sep 18 09:26:02 PM UTC 24 |
Sep 18 09:26:17 PM UTC 24 |
2083142861 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.1559342084 |
|
|
Sep 18 09:26:13 PM UTC 24 |
Sep 18 09:26:17 PM UTC 24 |
81884987 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.2975946292 |
|
|
Sep 18 09:25:50 PM UTC 24 |
Sep 18 09:26:19 PM UTC 24 |
663275434 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.557203612 |
|
|
Sep 18 09:26:09 PM UTC 24 |
Sep 18 09:26:19 PM UTC 24 |
2675785805 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.4173655 |
|
|
Sep 18 09:26:09 PM UTC 24 |
Sep 18 09:26:19 PM UTC 24 |
981849537 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.4190057182 |
|
|
Sep 18 09:26:12 PM UTC 24 |
Sep 18 09:26:19 PM UTC 24 |
511077275 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.4550609 |
|
|
Sep 18 09:26:02 PM UTC 24 |
Sep 18 09:26:19 PM UTC 24 |
607386208 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.3110915550 |
|
|
Sep 18 09:26:18 PM UTC 24 |
Sep 18 09:26:20 PM UTC 24 |
33110044 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.3768874001 |
|
|
Sep 18 09:26:18 PM UTC 24 |
Sep 18 09:26:20 PM UTC 24 |
23935942 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.2645094599 |
|
|
Sep 18 09:26:09 PM UTC 24 |
Sep 18 09:26:21 PM UTC 24 |
720751041 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.2039440823 |
|
|
Sep 18 09:25:57 PM UTC 24 |
Sep 18 09:26:21 PM UTC 24 |
742611460 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.1866723343 |
|
|
Sep 18 09:26:15 PM UTC 24 |
Sep 18 09:26:21 PM UTC 24 |
980059918 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.3411735210 |
|
|
Sep 18 09:24:09 PM UTC 24 |
Sep 18 09:26:22 PM UTC 24 |
55089962062 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.1116124517 |
|
|
Sep 18 09:26:20 PM UTC 24 |
Sep 18 09:26:22 PM UTC 24 |
104839432 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.2206503353 |
|
|
Sep 18 09:26:13 PM UTC 24 |
Sep 18 09:26:23 PM UTC 24 |
217636231 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.2621916949 |
|
|
Sep 18 09:26:31 PM UTC 24 |
Sep 18 09:26:33 PM UTC 24 |
41861022 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all.3429275985 |
|
|
Sep 18 09:25:07 PM UTC 24 |
Sep 18 09:26:23 PM UTC 24 |
5379525026 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_errors.3275318635 |
|
|
Sep 18 09:26:07 PM UTC 24 |
Sep 18 09:26:24 PM UTC 24 |
1662296073 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_errors.4204181662 |
|
|
Sep 18 09:26:14 PM UTC 24 |
Sep 18 09:26:33 PM UTC 24 |
758243469 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.4235619221 |
|
|
Sep 18 09:26:15 PM UTC 24 |
Sep 18 09:26:25 PM UTC 24 |
392462193 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.4062465887 |
|
|
Sep 18 09:26:20 PM UTC 24 |
Sep 18 09:26:25 PM UTC 24 |
122365477 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.3844883445 |
|
|
Sep 18 09:26:23 PM UTC 24 |
Sep 18 09:26:26 PM UTC 24 |
38264881 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all.1056125252 |
|
|
Sep 18 09:25:01 PM UTC 24 |
Sep 18 09:26:26 PM UTC 24 |
3837261080 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.326485531 |
|
|
Sep 18 09:26:09 PM UTC 24 |
Sep 18 09:26:26 PM UTC 24 |
728639843 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.334572777 |
|
|
Sep 18 09:26:25 PM UTC 24 |
Sep 18 09:26:27 PM UTC 24 |
62490743 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.1230035793 |
|
|
Sep 18 09:22:18 PM UTC 24 |
Sep 18 09:26:28 PM UTC 24 |
21950314716 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.840126325 |
|
|
Sep 18 09:26:23 PM UTC 24 |
Sep 18 09:26:28 PM UTC 24 |
630103100 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.3676231525 |
|
|
Sep 18 09:26:09 PM UTC 24 |
Sep 18 09:26:30 PM UTC 24 |
722399256 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.431300414 |
|
|
Sep 18 09:26:20 PM UTC 24 |
Sep 18 09:26:30 PM UTC 24 |
1070684185 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.1745426323 |
|
|
Sep 18 09:26:26 PM UTC 24 |
Sep 18 09:26:31 PM UTC 24 |
163277816 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.1542345226 |
|
|
Sep 18 09:26:16 PM UTC 24 |
Sep 18 09:26:31 PM UTC 24 |
1399562583 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.3556464812 |
|
|
Sep 18 09:25:59 PM UTC 24 |
Sep 18 09:26:32 PM UTC 24 |
1127883693 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.3983371358 |
|
|
Sep 18 09:26:16 PM UTC 24 |
Sep 18 09:26:32 PM UTC 24 |
4726076324 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_stress_all_with_rand_reset.616815762 |
|
|
Sep 18 09:25:44 PM UTC 24 |
Sep 18 09:26:32 PM UTC 24 |
18794477870 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_stress_all.2721296641 |
|
|
Sep 18 09:25:44 PM UTC 24 |
Sep 18 09:26:33 PM UTC 24 |
1123786910 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_stress_all_with_rand_reset.1016879158 |
|
|
Sep 18 09:26:10 PM UTC 24 |
Sep 18 09:26:34 PM UTC 24 |
1100035890 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.2805078938 |
|
|
Sep 18 09:26:28 PM UTC 24 |
Sep 18 09:26:34 PM UTC 24 |
1458142611 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.2501866165 |
|
|
Sep 18 09:26:16 PM UTC 24 |
Sep 18 09:26:35 PM UTC 24 |
2439497910 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.3893821220 |
|
|
Sep 18 09:26:22 PM UTC 24 |
Sep 18 09:26:35 PM UTC 24 |
1077505531 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_stress_all_with_rand_reset.3279367786 |
|
|
Sep 18 09:26:03 PM UTC 24 |
Sep 18 09:26:35 PM UTC 24 |
856675646 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.2032979354 |
|
|
Sep 18 09:26:32 PM UTC 24 |
Sep 18 09:26:35 PM UTC 24 |
99348844 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.3550690502 |
|
|
Sep 18 09:26:33 PM UTC 24 |
Sep 18 09:26:35 PM UTC 24 |
41664715 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.3937596477 |
|
|
Sep 18 09:26:26 PM UTC 24 |
Sep 18 09:26:36 PM UTC 24 |
808225871 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.898103350 |
|
|
Sep 18 09:26:33 PM UTC 24 |
Sep 18 09:26:37 PM UTC 24 |
224561389 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_errors.474404554 |
|
|
Sep 18 09:26:20 PM UTC 24 |
Sep 18 09:26:38 PM UTC 24 |
1130723793 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.4289239818 |
|
|
Sep 18 09:26:22 PM UTC 24 |
Sep 18 09:26:38 PM UTC 24 |
2322892884 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.804718057 |
|
|
Sep 18 09:26:36 PM UTC 24 |
Sep 18 09:26:38 PM UTC 24 |
43089763 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.3335516630 |
|
|
Sep 18 09:26:36 PM UTC 24 |
Sep 18 09:26:38 PM UTC 24 |
48121219 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.3976214907 |
|
|
Sep 18 09:26:28 PM UTC 24 |
Sep 18 09:26:38 PM UTC 24 |
1372663881 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.646272904 |
|
|
Sep 18 09:26:25 PM UTC 24 |
Sep 18 09:26:39 PM UTC 24 |
397561124 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.2400940328 |
|
|
Sep 18 09:26:06 PM UTC 24 |
Sep 18 09:26:40 PM UTC 24 |
373766316 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/49.lc_ctrl_errors.971756024 |
|
|
Sep 18 09:26:54 PM UTC 24 |
Sep 18 09:27:09 PM UTC 24 |
347267209 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.2057458941 |
|
|
Sep 18 09:26:29 PM UTC 24 |
Sep 18 09:26:40 PM UTC 24 |
242802065 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.3443516631 |
|
|
Sep 18 09:26:36 PM UTC 24 |
Sep 18 09:26:41 PM UTC 24 |
256580235 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.1052324889 |
|
|
Sep 18 09:26:37 PM UTC 24 |
Sep 18 09:26:41 PM UTC 24 |
120972157 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.3225866081 |
|
|
Sep 18 09:26:28 PM UTC 24 |
Sep 18 09:26:43 PM UTC 24 |
678472187 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.3987063087 |
|
|
Sep 18 09:26:20 PM UTC 24 |
Sep 18 09:26:43 PM UTC 24 |
650055439 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_jtag_access.956053759 |
|
|
Sep 18 09:26:38 PM UTC 24 |
Sep 18 09:26:43 PM UTC 24 |
757916316 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.3128515472 |
|
|
Sep 18 09:26:41 PM UTC 24 |
Sep 18 09:26:44 PM UTC 24 |
75021783 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.2739069394 |
|
|
Sep 18 09:26:42 PM UTC 24 |
Sep 18 09:26:45 PM UTC 24 |
14022080 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.2431434156 |
|
|
Sep 18 09:26:35 PM UTC 24 |
Sep 18 09:26:45 PM UTC 24 |
2542026962 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.3087953708 |
|
|
Sep 18 09:26:41 PM UTC 24 |
Sep 18 09:26:45 PM UTC 24 |
49432784 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.1350824633 |
|
|
Sep 18 09:26:35 PM UTC 24 |
Sep 18 09:26:45 PM UTC 24 |
769683047 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_errors.1771568158 |
|
|
Sep 18 09:26:33 PM UTC 24 |
Sep 18 09:26:46 PM UTC 24 |
866088329 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_errors.1986775377 |
|
|
Sep 18 09:26:26 PM UTC 24 |
Sep 18 09:26:46 PM UTC 24 |
315141992 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.2055664705 |
|
|
Sep 18 09:26:35 PM UTC 24 |
Sep 18 09:26:46 PM UTC 24 |
1057000044 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.3681810789 |
|
|
Sep 18 09:26:33 PM UTC 24 |
Sep 18 09:26:46 PM UTC 24 |
113477002 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_digest.2847625315 |
|
|
Sep 18 09:26:35 PM UTC 24 |
Sep 18 09:26:47 PM UTC 24 |
246034876 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_security_escalation.2600560559 |
|
|
Sep 18 09:26:38 PM UTC 24 |
Sep 18 09:26:47 PM UTC 24 |
561048672 ps |