Unified Coverage Report :: Module :: prim_and2

Module : prim_and2

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/rv_dm-sim-vcs/default/sim-vcs/../src/lowrisc_prim_abstract_and2_0/prim_and2.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[0].u_prim_blanker_h2d.u_blank_and
tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[0].u_prim_blanker_d2h.u_blank_and
tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[1].u_prim_blanker_h2d.u_blank_and
tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[1].u_prim_blanker_d2h.u_blank_and
tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[0].u_prim_blanker_h2d.u_blank_and
tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[0].u_prim_blanker_d2h.u_blank_and
tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[1].u_prim_blanker_h2d.u_blank_and
tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[1].u_prim_blanker_d2h.u_blank_and

---

Module Instance : tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[0].u_prim_blanker_h2d.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[0].u_prim_blanker_h2d

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[0].u_prim_blanker_d2h.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[0].u_prim_blanker_d2h

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[1].u_prim_blanker_h2d.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[1].u_prim_blanker_h2d

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_tlul_lc_gate_sba.gen_lc_gating_muxes[1].u_prim_blanker_d2h.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[1].u_prim_blanker_d2h

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[0].u_prim_blanker_h2d.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[0].u_prim_blanker_h2d

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[0].u_prim_blanker_d2h.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[0].u_prim_blanker_d2h

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[1].u_prim_blanker_h2d.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[1].u_prim_blanker_h2d

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00

---

Module Instance : tb.dut.u_tlul_lc_gate_rom.gen_lc_gating_muxes[1].u_prim_blanker_d2h.u_blank_and

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
							gen_lc_gating_muxes[1].u_prim_blanker_d2h

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
gen_generic.u_impl_generic	100.00	100.00