Module Definition
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Module : spid_addr_4b
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spid_addr_4b.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_spid_addr_4b 100.00 100.00 100.00 100.00



Module Instance : tb.dut.u_spid_addr_4b

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
86.34 97.59 77.78 95.00 75.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
91.69 94.25 84.31 96.94 87.50 95.45 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_spi2sys_sync 100.00 100.00 100.00
u_sys2spi_sync 81.90 95.92 66.67 90.00 75.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : spid_addr_4b
Line No.TotalCoveredPercent
TOTAL2828100.00
ALWAYS5366100.00
ALWAYS6344100.00
CONT_ASSIGN9211100.00
CONT_ASSIGN9311100.00
ALWAYS11233100.00
ALWAYS12477100.00
ALWAYS13944100.00
CONT_ASSIGN14611100.00
CONT_ASSIGN14711100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spid_addr_4b.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spid_addr_4b.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
53 1 1
54 1 1
55 1 1
56 1 1
57 1 1
58 1 1
MISSING_ELSE
63 1 1
64 1 1
65 1 1
66 1 1
MISSING_ELSE
92 1 1
93 1 1
112 1 1
113 1 1
115 1 1
124 1 1
126 1 1
128 1 1
129 1 1
131 1 1
132 1 1
134 1 1
MISSING_ELSE
139 1 1
140 1 1
141 1 1
142 1 1
MISSING_ELSE
146 1 1
147 1 1


Cond Coverage for Module : spid_addr_4b
TotalCoveredPercent
Conditions33100.00
Logical33100.00
Non-Logical00
Event00

 LINE       92
 EXPRESSION (spi_fw_new_addr_mode_req & cmd_sync_pulse_i)
             ------------1-----------   --------2-------
-1--2-StatusTests
01CoveredT1,T2,T5
10CoveredT1,T2,T5
11CoveredT1,T2,T5

Branch Coverage for Module : spid_addr_4b
Line No.TotalCoveredPercent
Branches 16 16 100.00
IF 53 4 4 100.00
IF 63 3 3 100.00
IF 112 2 2 100.00
IF 126 4 4 100.00
IF 139 3 3 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spid_addr_4b.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spid_addr_4b.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 53 if ((!sys_rst_ni)) -2-: 55 if (reg2hw_addr_mode_addr_4b_en_qe_i) -3-: 57 if (sys_fw_new_addr_mode_ack)

Branches:
-1--2--3-StatusTests
1 - - Covered T1,T2,T3
0 1 - Covered T1,T2,T5
0 0 1 Covered T1,T2,T5
0 0 0 Covered T1,T2,T3


LineNo. Expression -1-: 63 if ((!sys_rst_ni)) -2-: 65 if (reg2hw_addr_mode_addr_4b_en_qe_i)

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Covered T1,T2,T5
0 0 Covered T1,T2,T3


LineNo. Expression -1-: 112 if (sys_fw_new_addr_mode_req)

Branches:
-1-StatusTests
1 Covered T1,T2,T5
0 Covered T1,T2,T3


LineNo. Expression -1-: 126 if (spi_addr_4b_set_i) -2-: 129 if (spi_addr_4b_clr_i) -3-: 132 if (spi_fw_new_addr_mode_req)

Branches:
-1--2--3-StatusTests
1 - - Covered T5,T7,T9
0 1 - Covered T5,T7,T9
0 0 1 Covered T1,T2,T5
0 0 0 Covered T1,T2,T3


LineNo. Expression -1-: 139 if ((!sys_rst_ni)) -2-: 141 if (cmd_sync_pulse_i)

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Covered T1,T2,T5
0 0 Covered T1,T2,T3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%