| T217 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.2798272226 |
|
|
Aug 25 10:45:35 AM UTC 24 |
Aug 25 10:45:44 AM UTC 24 |
773134394 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.2179028432 |
|
|
Aug 25 10:45:16 AM UTC 24 |
Aug 25 10:45:45 AM UTC 24 |
6063538839 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode.1751503317 |
|
|
Aug 25 10:45:40 AM UTC 24 |
Aug 25 10:45:45 AM UTC 24 |
212893536 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_tpm_all.3330185862 |
|
|
Aug 25 10:44:46 AM UTC 24 |
Aug 25 10:45:45 AM UTC 24 |
7417613570 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_cfg_cmd.628337208 |
|
|
Aug 25 10:45:39 AM UTC 24 |
Aug 25 10:45:47 AM UTC 24 |
193626214 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_flash_mode_ignore_cmds.3808050695 |
|
|
Aug 25 10:43:01 AM UTC 24 |
Aug 25 10:45:48 AM UTC 24 |
168623989570 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.741663444 |
|
|
Aug 25 10:45:27 AM UTC 24 |
Aug 25 10:45:49 AM UTC 24 |
13540338778 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_stress_all.3295627300 |
|
|
Aug 25 10:45:46 AM UTC 24 |
Aug 25 10:45:49 AM UTC 24 |
235104851 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.3993274462 |
|
|
Aug 25 10:45:47 AM UTC 24 |
Aug 25 10:45:49 AM UTC 24 |
13977240 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.3997271743 |
|
|
Aug 25 10:45:48 AM UTC 24 |
Aug 25 10:45:50 AM UTC 24 |
12842966 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.3758551029 |
|
|
Aug 25 10:45:52 AM UTC 24 |
Aug 25 10:45:54 AM UTC 24 |
21031075 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_and_tpm.3734762799 |
|
|
Aug 25 10:42:50 AM UTC 24 |
Aug 25 10:45:54 AM UTC 24 |
29515500332 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_all.917746493 |
|
|
Aug 25 10:45:06 AM UTC 24 |
Aug 25 10:45:56 AM UTC 24 |
2040678460 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.1172555511 |
|
|
Aug 25 10:45:53 AM UTC 24 |
Aug 25 10:45:56 AM UTC 24 |
347139277 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.406937197 |
|
|
Aug 25 10:45:44 AM UTC 24 |
Aug 25 10:45:57 AM UTC 24 |
1345778976 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_intercept.2057079415 |
|
|
Aug 25 10:45:36 AM UTC 24 |
Aug 25 10:45:58 AM UTC 24 |
3846023099 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.311727615 |
|
|
Aug 25 10:45:35 AM UTC 24 |
Aug 25 10:46:00 AM UTC 24 |
8376084529 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_mailbox.3169862771 |
|
|
Aug 25 10:45:10 AM UTC 24 |
Aug 25 10:46:01 AM UTC 24 |
6266157323 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.212214886 |
|
|
Aug 25 10:45:49 AM UTC 24 |
Aug 25 10:46:01 AM UTC 24 |
1621968547 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_all.3202585506 |
|
|
Aug 25 10:44:02 AM UTC 24 |
Aug 25 10:46:01 AM UTC 24 |
3543264488 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode.1280593907 |
|
|
Aug 25 10:45:14 AM UTC 24 |
Aug 25 10:46:06 AM UTC 24 |
3047360822 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.1130360867 |
|
|
Aug 25 10:45:55 AM UTC 24 |
Aug 25 10:46:08 AM UTC 24 |
1236267812 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/3.spi_device_flash_and_tpm_min_idle.1699599669 |
|
|
Aug 25 10:42:17 AM UTC 24 |
Aug 25 10:46:08 AM UTC 24 |
26443090583 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.1667183553 |
|
|
Aug 25 10:45:55 AM UTC 24 |
Aug 25 10:46:09 AM UTC 24 |
1885053759 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.659817418 |
|
|
Aug 25 10:46:01 AM UTC 24 |
Aug 25 10:46:09 AM UTC 24 |
1270308017 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.623943054 |
|
|
Aug 25 10:45:50 AM UTC 24 |
Aug 25 10:46:10 AM UTC 24 |
894136843 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.4126241490 |
|
|
Aug 25 10:45:57 AM UTC 24 |
Aug 25 10:46:11 AM UTC 24 |
692440767 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.2130044399 |
|
|
Aug 25 10:46:10 AM UTC 24 |
Aug 25 10:46:12 AM UTC 24 |
12763382 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.3735257429 |
|
|
Aug 25 10:46:46 AM UTC 24 |
Aug 25 10:46:48 AM UTC 24 |
96982683 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.3058338079 |
|
|
Aug 25 10:46:10 AM UTC 24 |
Aug 25 10:46:12 AM UTC 24 |
48862185 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.2512746786 |
|
|
Aug 25 10:46:10 AM UTC 24 |
Aug 25 10:46:12 AM UTC 24 |
65392983 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.1520282566 |
|
|
Aug 25 10:45:46 AM UTC 24 |
Aug 25 10:46:14 AM UTC 24 |
4802580265 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.318869695 |
|
|
Aug 25 10:46:13 AM UTC 24 |
Aug 25 10:46:16 AM UTC 24 |
11349283 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.4117809094 |
|
|
Aug 25 10:46:13 AM UTC 24 |
Aug 25 10:46:16 AM UTC 24 |
30599779 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.180872696 |
|
|
Aug 25 10:44:34 AM UTC 24 |
Aug 25 10:46:17 AM UTC 24 |
14940465951 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_mode_ignore_cmds.2691733737 |
|
|
Aug 25 10:43:37 AM UTC 24 |
Aug 25 10:46:17 AM UTC 24 |
18429321365 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.3653318126 |
|
|
Aug 25 10:45:58 AM UTC 24 |
Aug 25 10:46:17 AM UTC 24 |
5840695157 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.2848937140 |
|
|
Aug 25 10:46:13 AM UTC 24 |
Aug 25 10:46:17 AM UTC 24 |
76267410 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_all.616048611 |
|
|
Aug 25 10:44:38 AM UTC 24 |
Aug 25 10:46:19 AM UTC 24 |
11783801013 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.343483896 |
|
|
Aug 25 10:46:18 AM UTC 24 |
Aug 25 10:46:20 AM UTC 24 |
20942056 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.473481025 |
|
|
Aug 25 10:46:02 AM UTC 24 |
Aug 25 10:46:20 AM UTC 24 |
1284967527 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.2803718707 |
|
|
Aug 25 10:46:19 AM UTC 24 |
Aug 25 10:46:21 AM UTC 24 |
15479867 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.225821411 |
|
|
Aug 25 10:46:16 AM UTC 24 |
Aug 25 10:46:23 AM UTC 24 |
982659643 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.1997055952 |
|
|
Aug 25 10:46:18 AM UTC 24 |
Aug 25 10:46:24 AM UTC 24 |
75543323 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.2564073163 |
|
|
Aug 25 10:46:17 AM UTC 24 |
Aug 25 10:46:25 AM UTC 24 |
1253283111 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.4081721980 |
|
|
Aug 25 10:46:11 AM UTC 24 |
Aug 25 10:46:25 AM UTC 24 |
4176677217 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.1272285096 |
|
|
Aug 25 10:46:23 AM UTC 24 |
Aug 25 10:46:26 AM UTC 24 |
47474984 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.660034929 |
|
|
Aug 25 10:46:18 AM UTC 24 |
Aug 25 10:46:26 AM UTC 24 |
154639258 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.4059960352 |
|
|
Aug 25 10:46:26 AM UTC 24 |
Aug 25 10:46:28 AM UTC 24 |
41075994 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.2804144907 |
|
|
Aug 25 10:46:46 AM UTC 24 |
Aug 25 10:46:49 AM UTC 24 |
40048516 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.972905750 |
|
|
Aug 25 10:46:26 AM UTC 24 |
Aug 25 10:46:28 AM UTC 24 |
64996873 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.647382447 |
|
|
Aug 25 10:46:18 AM UTC 24 |
Aug 25 10:46:29 AM UTC 24 |
343753902 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.4089864370 |
|
|
Aug 25 10:46:27 AM UTC 24 |
Aug 25 10:46:30 AM UTC 24 |
72336059 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_stress_all.51023075 |
|
|
Aug 25 10:44:24 AM UTC 24 |
Aug 25 10:46:30 AM UTC 24 |
7805798828 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.1683089355 |
|
|
Aug 25 10:46:27 AM UTC 24 |
Aug 25 10:46:31 AM UTC 24 |
71112354 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.4068346864 |
|
|
Aug 25 10:46:31 AM UTC 24 |
Aug 25 10:46:36 AM UTC 24 |
190352579 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.2829363039 |
|
|
Aug 25 10:46:31 AM UTC 24 |
Aug 25 10:46:36 AM UTC 24 |
67476459 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_mode_ignore_cmds.1587942947 |
|
|
Aug 25 10:42:50 AM UTC 24 |
Aug 25 10:46:36 AM UTC 24 |
10766296825 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.3491409628 |
|
|
Aug 25 10:46:29 AM UTC 24 |
Aug 25 10:46:39 AM UTC 24 |
5233718471 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.1173274018 |
|
|
Aug 25 10:46:13 AM UTC 24 |
Aug 25 10:46:40 AM UTC 24 |
53318021918 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.1471098809 |
|
|
Aug 25 10:46:38 AM UTC 24 |
Aug 25 10:46:44 AM UTC 24 |
113202920 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.628262628 |
|
|
Aug 25 10:45:14 AM UTC 24 |
Aug 25 10:46:45 AM UTC 24 |
2281696296 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.1678912410 |
|
|
Aug 25 10:46:09 AM UTC 24 |
Aug 25 10:46:46 AM UTC 24 |
5091281975 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.4268874238 |
|
|
Aug 25 10:46:29 AM UTC 24 |
Aug 25 10:46:48 AM UTC 24 |
12555488581 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.3176851799 |
|
|
Aug 25 10:46:17 AM UTC 24 |
Aug 25 10:46:49 AM UTC 24 |
20696105509 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.4137253386 |
|
|
Aug 25 10:47:53 AM UTC 24 |
Aug 25 10:48:06 AM UTC 24 |
1297729087 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.78572219 |
|
|
Aug 25 10:43:40 AM UTC 24 |
Aug 25 10:46:50 AM UTC 24 |
6960374941 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.647705738 |
|
|
Aug 25 10:46:49 AM UTC 24 |
Aug 25 10:46:52 AM UTC 24 |
61263091 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.1129735979 |
|
|
Aug 25 10:46:50 AM UTC 24 |
Aug 25 10:46:52 AM UTC 24 |
17735103 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_upload.3004580047 |
|
|
Aug 25 10:46:30 AM UTC 24 |
Aug 25 10:46:55 AM UTC 24 |
4430944530 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.1502064814 |
|
|
Aug 25 10:46:53 AM UTC 24 |
Aug 25 10:46:57 AM UTC 24 |
106657632 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.1334497091 |
|
|
Aug 25 10:46:29 AM UTC 24 |
Aug 25 10:46:57 AM UTC 24 |
4419818281 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.1294109054 |
|
|
Aug 25 10:46:50 AM UTC 24 |
Aug 25 10:47:02 AM UTC 24 |
5207186805 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.2315800431 |
|
|
Aug 25 10:46:51 AM UTC 24 |
Aug 25 10:47:03 AM UTC 24 |
1661200546 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.1949061663 |
|
|
Aug 25 10:46:51 AM UTC 24 |
Aug 25 10:47:03 AM UTC 24 |
1245758064 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.1262346895 |
|
|
Aug 25 10:46:58 AM UTC 24 |
Aug 25 10:47:03 AM UTC 24 |
39412729 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.1800236012 |
|
|
Aug 25 10:46:56 AM UTC 24 |
Aug 25 10:47:07 AM UTC 24 |
443495723 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.2371964429 |
|
|
Aug 25 10:45:57 AM UTC 24 |
Aug 25 10:47:07 AM UTC 24 |
3755358810 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.2585747029 |
|
|
Aug 25 10:46:53 AM UTC 24 |
Aug 25 10:47:07 AM UTC 24 |
1646135906 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.2251058188 |
|
|
Aug 25 10:47:07 AM UTC 24 |
Aug 25 10:47:09 AM UTC 24 |
10868936 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.4288481724 |
|
|
Aug 25 10:47:08 AM UTC 24 |
Aug 25 10:47:11 AM UTC 24 |
22509944 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.1968250756 |
|
|
Aug 25 10:45:03 AM UTC 24 |
Aug 25 10:47:11 AM UTC 24 |
18140469252 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.601332214 |
|
|
Aug 25 10:47:12 AM UTC 24 |
Aug 25 10:47:15 AM UTC 24 |
138575684 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.3276392382 |
|
|
Aug 25 10:47:12 AM UTC 24 |
Aug 25 10:47:15 AM UTC 24 |
186852544 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.1467007899 |
|
|
Aug 25 10:46:58 AM UTC 24 |
Aug 25 10:47:15 AM UTC 24 |
481533234 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.4277985949 |
|
|
Aug 25 10:46:47 AM UTC 24 |
Aug 25 10:47:16 AM UTC 24 |
6525956179 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_flash_all.3570388368 |
|
|
Aug 25 10:42:27 AM UTC 24 |
Aug 25 10:47:19 AM UTC 24 |
55165536457 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.2762282885 |
|
|
Aug 25 10:46:27 AM UTC 24 |
Aug 25 10:47:20 AM UTC 24 |
2157141285 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.1899596766 |
|
|
Aug 25 10:47:16 AM UTC 24 |
Aug 25 10:47:21 AM UTC 24 |
94589838 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.3185926261 |
|
|
Aug 25 10:46:45 AM UTC 24 |
Aug 25 10:47:21 AM UTC 24 |
3037630256 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.1589160517 |
|
|
Aug 25 10:47:00 AM UTC 24 |
Aug 25 10:47:25 AM UTC 24 |
5225495716 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.1960631272 |
|
|
Aug 25 10:47:21 AM UTC 24 |
Aug 25 10:47:25 AM UTC 24 |
396881817 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_all.1036696226 |
|
|
Aug 25 10:46:12 AM UTC 24 |
Aug 25 10:47:26 AM UTC 24 |
37939265521 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.455199478 |
|
|
Aug 25 10:46:37 AM UTC 24 |
Aug 25 10:47:27 AM UTC 24 |
8701651012 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.1247471353 |
|
|
Aug 25 10:46:49 AM UTC 24 |
Aug 25 10:47:27 AM UTC 24 |
1407913138 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.2146580493 |
|
|
Aug 25 10:46:21 AM UTC 24 |
Aug 25 10:47:30 AM UTC 24 |
6066265682 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.1959942364 |
|
|
Aug 25 10:47:28 AM UTC 24 |
Aug 25 10:47:30 AM UTC 24 |
12699703 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.324305590 |
|
|
Aug 25 10:45:36 AM UTC 24 |
Aug 25 10:47:30 AM UTC 24 |
55447507852 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.3191328900 |
|
|
Aug 25 10:47:08 AM UTC 24 |
Aug 25 10:47:32 AM UTC 24 |
4430136153 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.3621476242 |
|
|
Aug 25 10:47:20 AM UTC 24 |
Aug 25 10:47:32 AM UTC 24 |
1635750720 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/0.spi_device_flash_and_tpm_min_idle.2733352014 |
|
|
Aug 25 10:41:50 AM UTC 24 |
Aug 25 10:47:32 AM UTC 24 |
24612423214 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.2596824773 |
|
|
Aug 25 10:47:31 AM UTC 24 |
Aug 25 10:47:33 AM UTC 24 |
146422825 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.2211272640 |
|
|
Aug 25 10:47:16 AM UTC 24 |
Aug 25 10:47:34 AM UTC 24 |
4909226378 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.3859363214 |
|
|
Aug 25 10:47:32 AM UTC 24 |
Aug 25 10:47:35 AM UTC 24 |
95031366 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/0.spi_device_flash_mode_ignore_cmds.2174621427 |
|
|
Aug 25 10:41:44 AM UTC 24 |
Aug 25 10:47:36 AM UTC 24 |
131753692238 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.1315794532 |
|
|
Aug 25 10:47:33 AM UTC 24 |
Aug 25 10:47:36 AM UTC 24 |
160261557 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.1069855979 |
|
|
Aug 25 10:47:31 AM UTC 24 |
Aug 25 10:47:39 AM UTC 24 |
794802930 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.3225982615 |
|
|
Aug 25 10:47:24 AM UTC 24 |
Aug 25 10:47:39 AM UTC 24 |
3399580635 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.1440559868 |
|
|
Aug 25 10:47:16 AM UTC 24 |
Aug 25 10:47:40 AM UTC 24 |
1481092845 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.286601766 |
|
|
Aug 25 10:45:58 AM UTC 24 |
Aug 25 10:47:41 AM UTC 24 |
69305350620 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.3301016575 |
|
|
Aug 25 10:47:11 AM UTC 24 |
Aug 25 10:47:41 AM UTC 24 |
6098398454 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.1571729273 |
|
|
Aug 25 10:47:36 AM UTC 24 |
Aug 25 10:47:42 AM UTC 24 |
568933680 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.2006470508 |
|
|
Aug 25 10:47:35 AM UTC 24 |
Aug 25 10:47:42 AM UTC 24 |
2148452645 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.1938477766 |
|
|
Aug 25 10:47:43 AM UTC 24 |
Aug 25 10:47:45 AM UTC 24 |
45579892 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.2085397842 |
|
|
Aug 25 10:47:37 AM UTC 24 |
Aug 25 10:47:45 AM UTC 24 |
207272753 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.165344276 |
|
|
Aug 25 10:47:17 AM UTC 24 |
Aug 25 10:47:46 AM UTC 24 |
15515137162 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.1291777794 |
|
|
Aug 25 10:47:33 AM UTC 24 |
Aug 25 10:47:47 AM UTC 24 |
1764098669 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_all.1862669644 |
|
|
Aug 25 10:47:41 AM UTC 24 |
Aug 25 10:47:48 AM UTC 24 |
562549577 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.1642317733 |
|
|
Aug 25 10:47:46 AM UTC 24 |
Aug 25 10:47:48 AM UTC 24 |
159065203 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.4062248532 |
|
|
Aug 25 10:47:48 AM UTC 24 |
Aug 25 10:47:51 AM UTC 24 |
111696439 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_and_tpm_min_idle.1271792730 |
|
|
Aug 25 10:42:52 AM UTC 24 |
Aug 25 10:47:52 AM UTC 24 |
44204057187 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.2047185586 |
|
|
Aug 25 10:47:49 AM UTC 24 |
Aug 25 10:47:52 AM UTC 24 |
64471035 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.2459384061 |
|
|
Aug 25 10:47:31 AM UTC 24 |
Aug 25 10:47:52 AM UTC 24 |
938518444 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.1193019631 |
|
|
Aug 25 10:47:41 AM UTC 24 |
Aug 25 10:47:53 AM UTC 24 |
6734249093 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_stress_all.1111945834 |
|
|
Aug 25 10:45:04 AM UTC 24 |
Aug 25 10:47:55 AM UTC 24 |
10133189092 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.3304048486 |
|
|
Aug 25 10:45:20 AM UTC 24 |
Aug 25 10:47:56 AM UTC 24 |
39221437777 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.3873296960 |
|
|
Aug 25 10:47:54 AM UTC 24 |
Aug 25 10:47:58 AM UTC 24 |
172930451 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.2343571937 |
|
|
Aug 25 10:47:53 AM UTC 24 |
Aug 25 10:47:59 AM UTC 24 |
1029804830 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.1951200189 |
|
|
Aug 25 10:47:52 AM UTC 24 |
Aug 25 10:48:01 AM UTC 24 |
378224987 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.2702913211 |
|
|
Aug 25 10:47:27 AM UTC 24 |
Aug 25 10:48:01 AM UTC 24 |
4542304040 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.2228830904 |
|
|
Aug 25 10:47:53 AM UTC 24 |
Aug 25 10:48:03 AM UTC 24 |
208816557 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.2372177509 |
|
|
Aug 25 10:47:46 AM UTC 24 |
Aug 25 10:48:03 AM UTC 24 |
12499638044 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.3595581588 |
|
|
Aug 25 10:47:59 AM UTC 24 |
Aug 25 10:48:05 AM UTC 24 |
109211227 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.793751708 |
|
|
Aug 25 10:47:56 AM UTC 24 |
Aug 25 10:48:05 AM UTC 24 |
427388161 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.1928396271 |
|
|
Aug 25 10:48:04 AM UTC 24 |
Aug 25 10:48:06 AM UTC 24 |
20186967 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.735962494 |
|
|
Aug 25 10:47:47 AM UTC 24 |
Aug 25 10:48:06 AM UTC 24 |
2575073338 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.4167858251 |
|
|
Aug 25 10:47:22 AM UTC 24 |
Aug 25 10:48:07 AM UTC 24 |
2118502061 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.2284139381 |
|
|
Aug 25 10:48:06 AM UTC 24 |
Aug 25 10:48:08 AM UTC 24 |
55140969 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.2000228448 |
|
|
Aug 25 10:47:37 AM UTC 24 |
Aug 25 10:48:08 AM UTC 24 |
5461731026 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.642897952 |
|
|
Aug 25 10:48:07 AM UTC 24 |
Aug 25 10:48:09 AM UTC 24 |
54714434 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.1710041976 |
|
|
Aug 25 10:48:07 AM UTC 24 |
Aug 25 10:48:12 AM UTC 24 |
393291908 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.2318404441 |
|
|
Aug 25 10:47:34 AM UTC 24 |
Aug 25 10:48:13 AM UTC 24 |
5588213163 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.2492559100 |
|
|
Aug 25 10:47:04 AM UTC 24 |
Aug 25 10:48:18 AM UTC 24 |
5109616244 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.3507388632 |
|
|
Aug 25 10:48:09 AM UTC 24 |
Aug 25 10:48:18 AM UTC 24 |
166778503 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.1942343519 |
|
|
Aug 25 10:48:14 AM UTC 24 |
Aug 25 10:48:18 AM UTC 24 |
188347861 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.2538867994 |
|
|
Aug 25 10:48:09 AM UTC 24 |
Aug 25 10:48:18 AM UTC 24 |
197626346 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_flash_and_tpm_min_idle.2816836245 |
|
|
Aug 25 10:43:06 AM UTC 24 |
Aug 25 10:48:19 AM UTC 24 |
78787189410 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.1395686688 |
|
|
Aug 25 10:47:04 AM UTC 24 |
Aug 25 10:48:19 AM UTC 24 |
7499849570 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_stress_all.3382848108 |
|
|
Aug 25 10:44:07 AM UTC 24 |
Aug 25 10:48:21 AM UTC 24 |
23468102130 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.2809849766 |
|
|
Aug 25 10:48:13 AM UTC 24 |
Aug 25 10:48:23 AM UTC 24 |
2258270811 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.1313977577 |
|
|
Aug 25 10:48:08 AM UTC 24 |
Aug 25 10:48:24 AM UTC 24 |
2438350666 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.717410944 |
|
|
Aug 25 10:49:15 AM UTC 24 |
Aug 25 10:49:24 AM UTC 24 |
8704132696 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/1.spi_device_flash_and_tpm.2545769864 |
|
|
Aug 25 10:41:58 AM UTC 24 |
Aug 25 10:48:24 AM UTC 24 |
137228995476 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.4225185426 |
|
|
Aug 25 10:48:24 AM UTC 24 |
Aug 25 10:48:27 AM UTC 24 |
23020882 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.2717389917 |
|
|
Aug 25 10:47:21 AM UTC 24 |
Aug 25 10:48:27 AM UTC 24 |
3674174418 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.845486821 |
|
|
Aug 25 10:48:24 AM UTC 24 |
Aug 25 10:48:27 AM UTC 24 |
16301618 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.3266581057 |
|
|
Aug 25 10:46:30 AM UTC 24 |
Aug 25 10:48:27 AM UTC 24 |
8526525534 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.3791225683 |
|
|
Aug 25 10:48:11 AM UTC 24 |
Aug 25 10:48:28 AM UTC 24 |
395631112 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.1620668762 |
|
|
Aug 25 10:48:19 AM UTC 24 |
Aug 25 10:48:28 AM UTC 24 |
371187312 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.236788771 |
|
|
Aug 25 10:48:06 AM UTC 24 |
Aug 25 10:48:30 AM UTC 24 |
4260517665 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.2522813940 |
|
|
Aug 25 10:48:28 AM UTC 24 |
Aug 25 10:48:30 AM UTC 24 |
26986197 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.3110788739 |
|
|
Aug 25 10:47:49 AM UTC 24 |
Aug 25 10:48:31 AM UTC 24 |
12388281648 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.1040428766 |
|
|
Aug 25 10:48:28 AM UTC 24 |
Aug 25 10:48:31 AM UTC 24 |
47694113 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.3897056668 |
|
|
Aug 25 10:48:29 AM UTC 24 |
Aug 25 10:48:36 AM UTC 24 |
647264869 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.182164869 |
|
|
Aug 25 10:48:31 AM UTC 24 |
Aug 25 10:48:36 AM UTC 24 |
115795216 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.964981460 |
|
|
Aug 25 10:48:29 AM UTC 24 |
Aug 25 10:48:36 AM UTC 24 |
852457717 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.2304236774 |
|
|
Aug 25 10:48:31 AM UTC 24 |
Aug 25 10:48:37 AM UTC 24 |
275098787 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.1121763683 |
|
|
Aug 25 10:48:37 AM UTC 24 |
Aug 25 10:48:39 AM UTC 24 |
13807972 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2399095615 |
|
|
Aug 25 10:48:19 AM UTC 24 |
Aug 25 10:48:40 AM UTC 24 |
5491210158 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.4265176336 |
|
|
Aug 25 10:43:39 AM UTC 24 |
Aug 25 10:48:40 AM UTC 24 |
176220243888 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.1025571807 |
|
|
Aug 25 10:48:29 AM UTC 24 |
Aug 25 10:48:41 AM UTC 24 |
6103941297 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.1335947811 |
|
|
Aug 25 10:48:41 AM UTC 24 |
Aug 25 10:48:44 AM UTC 24 |
17037422 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.1951184228 |
|
|
Aug 25 10:48:42 AM UTC 24 |
Aug 25 10:48:45 AM UTC 24 |
15447137 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.3602841244 |
|
|
Aug 25 10:46:08 AM UTC 24 |
Aug 25 10:48:46 AM UTC 24 |
18155421700 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.3098502153 |
|
|
Aug 25 10:48:07 AM UTC 24 |
Aug 25 10:48:47 AM UTC 24 |
28206732757 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.4153378486 |
|
|
Aug 25 10:48:37 AM UTC 24 |
Aug 25 10:48:48 AM UTC 24 |
1403526507 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.3101736815 |
|
|
Aug 25 10:44:07 AM UTC 24 |
Aug 25 10:48:49 AM UTC 24 |
45765355995 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.217272798 |
|
|
Aug 25 10:48:47 AM UTC 24 |
Aug 25 10:48:49 AM UTC 24 |
19109122 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.3908311593 |
|
|
Aug 25 10:48:48 AM UTC 24 |
Aug 25 10:48:52 AM UTC 24 |
188449981 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.2103618301 |
|
|
Aug 25 10:47:39 AM UTC 24 |
Aug 25 10:48:54 AM UTC 24 |
4214786324 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.2021686641 |
|
|
Aug 25 10:48:45 AM UTC 24 |
Aug 25 10:48:55 AM UTC 24 |
648733831 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.2972316760 |
|
|
Aug 25 10:48:50 AM UTC 24 |
Aug 25 10:48:57 AM UTC 24 |
661358388 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_all.3961157030 |
|
|
Aug 25 10:48:38 AM UTC 24 |
Aug 25 10:48:59 AM UTC 24 |
3176690230 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.1880973348 |
|
|
Aug 25 10:48:54 AM UTC 24 |
Aug 25 10:48:59 AM UTC 24 |
602568339 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_all.3865426885 |
|
|
Aug 25 10:42:50 AM UTC 24 |
Aug 25 10:48:59 AM UTC 24 |
56763645331 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.1566743595 |
|
|
Aug 25 10:48:56 AM UTC 24 |
Aug 25 10:49:01 AM UTC 24 |
62752299 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.4034520321 |
|
|
Aug 25 10:47:36 AM UTC 24 |
Aug 25 10:49:05 AM UTC 24 |
4775242246 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.1378310137 |
|
|
Aug 25 10:48:55 AM UTC 24 |
Aug 25 10:49:06 AM UTC 24 |
755580306 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.709842830 |
|
|
Aug 25 10:48:26 AM UTC 24 |
Aug 25 10:49:07 AM UTC 24 |
15424975383 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.1646645529 |
|
|
Aug 25 10:48:45 AM UTC 24 |
Aug 25 10:49:07 AM UTC 24 |
3571761036 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.600732719 |
|
|
Aug 25 10:46:02 AM UTC 24 |
Aug 25 10:49:08 AM UTC 24 |
19736280305 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.3317232661 |
|
|
Aug 25 10:49:00 AM UTC 24 |
Aug 25 10:49:08 AM UTC 24 |
258010146 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.1456107104 |
|
|
Aug 25 10:49:07 AM UTC 24 |
Aug 25 10:49:09 AM UTC 24 |
11783422 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.4264375947 |
|
|
Aug 25 10:49:08 AM UTC 24 |
Aug 25 10:49:10 AM UTC 24 |
67198492 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.2087977683 |
|
|
Aug 25 10:47:04 AM UTC 24 |
Aug 25 10:49:11 AM UTC 24 |
3848286344 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.3741183971 |
|
|
Aug 25 10:49:09 AM UTC 24 |
Aug 25 10:49:12 AM UTC 24 |
13803422 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.3758494079 |
|
|
Aug 25 10:48:31 AM UTC 24 |
Aug 25 10:49:12 AM UTC 24 |
11117334953 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_rw.3107679403 |
|
|
Aug 25 10:49:11 AM UTC 24 |
Aug 25 10:49:13 AM UTC 24 |
339267530 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.617581203 |
|
|
Aug 25 10:42:42 AM UTC 24 |
Aug 25 10:49:14 AM UTC 24 |
287241458284 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.626195555 |
|
|
Aug 25 10:46:01 AM UTC 24 |
Aug 25 10:49:15 AM UTC 24 |
64994988052 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.1803585516 |
|
|
Aug 25 10:48:50 AM UTC 24 |
Aug 25 10:49:15 AM UTC 24 |
6720011984 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.3139882525 |
|
|
Aug 25 10:46:38 AM UTC 24 |
Aug 25 10:49:16 AM UTC 24 |
10473489588 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_all.665717418 |
|
|
Aug 25 10:44:22 AM UTC 24 |
Aug 25 10:49:18 AM UTC 24 |
90484363652 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.1286351089 |
|
|
Aug 25 10:49:13 AM UTC 24 |
Aug 25 10:49:18 AM UTC 24 |
263694372 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.526755568 |
|
|
Aug 25 10:49:12 AM UTC 24 |
Aug 25 10:49:18 AM UTC 24 |
373633557 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.3330974868 |
|
|
Aug 25 10:44:39 AM UTC 24 |
Aug 25 10:49:20 AM UTC 24 |
66242272736 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.3748305347 |
|
|
Aug 25 10:49:14 AM UTC 24 |
Aug 25 10:49:20 AM UTC 24 |
722496682 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.2805333676 |
|
|
Aug 25 10:49:12 AM UTC 24 |
Aug 25 10:49:20 AM UTC 24 |
906692773 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.3493289447 |
|
|
Aug 25 10:48:28 AM UTC 24 |
Aug 25 10:49:23 AM UTC 24 |
7592112763 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.2053311150 |
|
|
Aug 25 10:49:21 AM UTC 24 |
Aug 25 10:49:23 AM UTC 24 |
15202077 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.2887846062 |
|
|
Aug 25 10:49:21 AM UTC 24 |
Aug 25 10:49:23 AM UTC 24 |
52142905 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.757137492 |
|
|
Aug 25 10:48:50 AM UTC 24 |
Aug 25 10:49:24 AM UTC 24 |
2650685333 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.2038639976 |
|
|
Aug 25 10:49:17 AM UTC 24 |
Aug 25 10:49:24 AM UTC 24 |
245254072 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.2432420027 |
|
|
Aug 25 10:49:24 AM UTC 24 |
Aug 25 10:49:27 AM UTC 24 |
212458379 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.1577218211 |
|
|
Aug 25 10:49:25 AM UTC 24 |
Aug 25 10:49:28 AM UTC 24 |
14228461 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.3461733185 |
|
|
Aug 25 10:49:08 AM UTC 24 |
Aug 25 10:49:28 AM UTC 24 |
15171291949 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.3347125030 |
|
|
Aug 25 10:49:25 AM UTC 24 |
Aug 25 10:49:29 AM UTC 24 |
49505976 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.4123468233 |
|
|
Aug 25 10:49:25 AM UTC 24 |
Aug 25 10:49:29 AM UTC 24 |
33263909 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.41414236 |
|
|
Aug 25 10:49:16 AM UTC 24 |
Aug 25 10:49:29 AM UTC 24 |
616526594 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.1190215100 |
|
|
Aug 25 10:48:30 AM UTC 24 |
Aug 25 10:49:34 AM UTC 24 |
5594076816 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_all.2404890123 |
|
|
Aug 25 10:43:20 AM UTC 24 |
Aug 25 10:49:36 AM UTC 24 |
139904859568 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.1509317107 |
|
|
Aug 25 10:49:30 AM UTC 24 |
Aug 25 10:49:37 AM UTC 24 |
413459419 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.3286833264 |
|
|
Aug 25 10:49:35 AM UTC 24 |
Aug 25 10:49:37 AM UTC 24 |
24135658 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.939494244 |
|
|
Aug 25 10:49:28 AM UTC 24 |
Aug 25 10:49:38 AM UTC 24 |
3884016746 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.2354395819 |
|
|
Aug 25 10:49:31 AM UTC 24 |
Aug 25 10:49:39 AM UTC 24 |
686218873 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.2900702240 |
|
|
Aug 25 10:48:53 AM UTC 24 |
Aug 25 10:49:39 AM UTC 24 |
8138307320 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.1319033282 |
|
|
Aug 25 10:49:39 AM UTC 24 |
Aug 25 10:49:41 AM UTC 24 |
15389902 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.1167058428 |
|
|
Aug 25 10:49:40 AM UTC 24 |
Aug 25 10:49:42 AM UTC 24 |
28173831 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.1678637251 |
|
|
Aug 25 10:49:29 AM UTC 24 |
Aug 25 10:49:43 AM UTC 24 |
1374138786 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.2508371951 |
|
|
Aug 25 10:49:43 AM UTC 24 |
Aug 25 10:49:45 AM UTC 24 |
27679852 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.3712217403 |
|
|
Aug 25 10:49:24 AM UTC 24 |
Aug 25 10:49:45 AM UTC 24 |
5886396286 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.2028341825 |
|
|
Aug 25 10:49:30 AM UTC 24 |
Aug 25 10:49:46 AM UTC 24 |
1569014556 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode.797975198 |
|
|
Aug 25 10:49:16 AM UTC 24 |
Aug 25 10:49:48 AM UTC 24 |
5072437453 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.3922132485 |
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Aug 25 10:49:44 AM UTC 24 |
Aug 25 10:49:48 AM UTC 24 |
457546969 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.3153523342 |
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Aug 25 10:48:20 AM UTC 24 |
Aug 25 10:49:49 AM UTC 24 |
10930316902 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.1430781763 |
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|
Aug 25 10:49:46 AM UTC 24 |
Aug 25 10:49:50 AM UTC 24 |
127700595 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.616352606 |
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Aug 25 10:49:46 AM UTC 24 |
Aug 25 10:49:51 AM UTC 24 |
183838352 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.1390220140 |
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Aug 25 10:47:42 AM UTC 24 |
Aug 25 10:49:54 AM UTC 24 |
33357531023 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.2949592817 |
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Aug 25 10:49:08 AM UTC 24 |
Aug 25 10:49:56 AM UTC 24 |
6991524156 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.3706295421 |
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Aug 25 10:49:50 AM UTC 24 |
Aug 25 10:49:57 AM UTC 24 |
140154822 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.4099521822 |
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Aug 25 10:49:41 AM UTC 24 |
Aug 25 10:49:58 AM UTC 24 |
10916724944 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.4233993114 |
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|
Aug 25 10:49:29 AM UTC 24 |
Aug 25 10:49:58 AM UTC 24 |
1891755467 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_mailbox.192737248 |
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|
Aug 25 10:49:13 AM UTC 24 |
Aug 25 10:49:59 AM UTC 24 |
20600913780 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.1008740352 |
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Aug 25 10:46:41 AM UTC 24 |
Aug 25 10:50:01 AM UTC 24 |
30337061939 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.663306514 |
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Aug 25 10:47:26 AM UTC 24 |
Aug 25 10:50:01 AM UTC 24 |
41690013068 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.2197012438 |
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Aug 25 10:49:47 AM UTC 24 |
Aug 25 10:50:02 AM UTC 24 |
884421112 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.2089349453 |
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Aug 25 10:50:00 AM UTC 24 |
Aug 25 10:50:02 AM UTC 24 |
12346966 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.519822896 |
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Aug 25 10:49:24 AM UTC 24 |
Aug 25 10:50:03 AM UTC 24 |
8397991732 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.1533939030 |
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Aug 25 10:48:40 AM UTC 24 |
Aug 25 10:50:04 AM UTC 24 |
2831083470 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.4087372111 |
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Aug 25 10:50:01 AM UTC 24 |
Aug 25 10:50:04 AM UTC 24 |
22562040 ps |