| T634 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.867727740 |
|
|
Aug 25 10:49:55 AM UTC 24 |
Aug 25 10:50:05 AM UTC 24 |
440580107 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.3286015327 |
|
|
Aug 25 10:48:02 AM UTC 24 |
Aug 25 10:50:06 AM UTC 24 |
16720307118 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.1097595381 |
|
|
Aug 25 10:50:04 AM UTC 24 |
Aug 25 10:50:07 AM UTC 24 |
106211027 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.1032622099 |
|
|
Aug 25 10:50:04 AM UTC 24 |
Aug 25 10:50:07 AM UTC 24 |
39048957 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.4130938720 |
|
|
Aug 25 10:49:52 AM UTC 24 |
Aug 25 10:50:09 AM UTC 24 |
2875958262 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.1355963849 |
|
|
Aug 25 10:48:38 AM UTC 24 |
Aug 25 10:50:09 AM UTC 24 |
8623293157 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.1411285014 |
|
|
Aug 25 10:50:05 AM UTC 24 |
Aug 25 10:50:09 AM UTC 24 |
62687634 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.584416414 |
|
|
Aug 25 10:50:02 AM UTC 24 |
Aug 25 10:50:10 AM UTC 24 |
4203518921 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.1355213705 |
|
|
Aug 25 10:50:07 AM UTC 24 |
Aug 25 10:50:12 AM UTC 24 |
108665658 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.1590235448 |
|
|
Aug 25 10:49:50 AM UTC 24 |
Aug 25 10:50:13 AM UTC 24 |
43579615256 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.634631728 |
|
|
Aug 25 10:50:04 AM UTC 24 |
Aug 25 10:50:14 AM UTC 24 |
544594043 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_all.222130992 |
|
|
Aug 25 10:42:41 AM UTC 24 |
Aug 25 10:50:14 AM UTC 24 |
37472291853 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.2005696665 |
|
|
Aug 25 10:46:40 AM UTC 24 |
Aug 25 10:50:14 AM UTC 24 |
13921745414 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_stress_all.3982357830 |
|
|
Aug 25 10:48:04 AM UTC 24 |
Aug 25 10:50:15 AM UTC 24 |
22625264048 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.4231777693 |
|
|
Aug 25 10:50:15 AM UTC 24 |
Aug 25 10:50:17 AM UTC 24 |
33489072 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.1136968223 |
|
|
Aug 25 10:50:15 AM UTC 24 |
Aug 25 10:50:17 AM UTC 24 |
46642977 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.20593759 |
|
|
Aug 25 10:50:11 AM UTC 24 |
Aug 25 10:50:18 AM UTC 24 |
122486172 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.3737368517 |
|
|
Aug 25 10:49:48 AM UTC 24 |
Aug 25 10:50:18 AM UTC 24 |
3472063759 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.6458367 |
|
|
Aug 25 10:50:07 AM UTC 24 |
Aug 25 10:50:19 AM UTC 24 |
1852529548 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.1698958695 |
|
|
Aug 25 10:50:18 AM UTC 24 |
Aug 25 10:50:21 AM UTC 24 |
37775149 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_stress_all.3633898254 |
|
|
Aug 25 10:47:28 AM UTC 24 |
Aug 25 10:50:21 AM UTC 24 |
18123311670 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.2494711209 |
|
|
Aug 25 10:50:06 AM UTC 24 |
Aug 25 10:50:21 AM UTC 24 |
6331203472 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.1599024362 |
|
|
Aug 25 10:50:18 AM UTC 24 |
Aug 25 10:50:21 AM UTC 24 |
103334598 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/1.spi_device_flash_all.961076715 |
|
|
Aug 25 10:41:58 AM UTC 24 |
Aug 25 10:50:23 AM UTC 24 |
511765829603 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.1848484823 |
|
|
Aug 25 10:50:19 AM UTC 24 |
Aug 25 10:50:24 AM UTC 24 |
119789216 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.2042408037 |
|
|
Aug 25 10:49:06 AM UTC 24 |
Aug 25 10:50:25 AM UTC 24 |
19902584093 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.1888724372 |
|
|
Aug 25 10:50:25 AM UTC 24 |
Aug 25 10:50:34 AM UTC 24 |
479659129 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.4016818166 |
|
|
Aug 25 10:50:16 AM UTC 24 |
Aug 25 10:50:26 AM UTC 24 |
8939079258 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.1767665959 |
|
|
Aug 25 10:50:22 AM UTC 24 |
Aug 25 10:50:27 AM UTC 24 |
153128867 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.2909380457 |
|
|
Aug 25 10:49:20 AM UTC 24 |
Aug 25 10:50:28 AM UTC 24 |
18808257893 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.4240406532 |
|
|
Aug 25 10:50:19 AM UTC 24 |
Aug 25 10:50:28 AM UTC 24 |
313201680 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.3212819215 |
|
|
Aug 25 10:50:26 AM UTC 24 |
Aug 25 10:50:28 AM UTC 24 |
12837670 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.1039036450 |
|
|
Aug 25 10:48:57 AM UTC 24 |
Aug 25 10:50:31 AM UTC 24 |
46732222059 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.2010066438 |
|
|
Aug 25 10:50:22 AM UTC 24 |
Aug 25 10:50:32 AM UTC 24 |
564011471 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.2742008819 |
|
|
Aug 25 10:50:30 AM UTC 24 |
Aug 25 10:50:32 AM UTC 24 |
13764195 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.1126143469 |
|
|
Aug 25 10:50:30 AM UTC 24 |
Aug 25 10:50:32 AM UTC 24 |
78654709 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.877178309 |
|
|
Aug 25 10:49:42 AM UTC 24 |
Aug 25 10:50:32 AM UTC 24 |
4478812324 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.2816904173 |
|
|
Aug 25 10:50:07 AM UTC 24 |
Aug 25 10:50:32 AM UTC 24 |
912611211 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.2402676703 |
|
|
Aug 25 10:50:19 AM UTC 24 |
Aug 25 10:50:34 AM UTC 24 |
1650146256 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.1534193065 |
|
|
Aug 25 10:50:33 AM UTC 24 |
Aug 25 10:50:35 AM UTC 24 |
37055946 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.2168832416 |
|
|
Aug 25 10:50:33 AM UTC 24 |
Aug 25 10:50:35 AM UTC 24 |
43215631 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.3807052469 |
|
|
Aug 25 10:45:20 AM UTC 24 |
Aug 25 10:50:36 AM UTC 24 |
21269148172 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.3926602054 |
|
|
Aug 25 10:50:33 AM UTC 24 |
Aug 25 10:50:38 AM UTC 24 |
144588897 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.2317749883 |
|
|
Aug 25 10:44:21 AM UTC 24 |
Aug 25 10:50:38 AM UTC 24 |
125253957072 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.19183809 |
|
|
Aug 25 10:48:20 AM UTC 24 |
Aug 25 10:50:39 AM UTC 24 |
87575782848 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.4112784007 |
|
|
Aug 25 10:50:35 AM UTC 24 |
Aug 25 10:50:41 AM UTC 24 |
870968967 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.3017871797 |
|
|
Aug 25 10:50:37 AM UTC 24 |
Aug 25 10:50:42 AM UTC 24 |
202238896 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.229684986 |
|
|
Aug 25 10:50:37 AM UTC 24 |
Aug 25 10:50:42 AM UTC 24 |
65638110 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.2296067952 |
|
|
Aug 25 10:50:22 AM UTC 24 |
Aug 25 10:50:42 AM UTC 24 |
12317190307 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.4259198115 |
|
|
Aug 25 10:50:22 AM UTC 24 |
Aug 25 10:50:43 AM UTC 24 |
2233322193 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.2627096609 |
|
|
Aug 25 10:50:35 AM UTC 24 |
Aug 25 10:50:43 AM UTC 24 |
449853184 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.477284368 |
|
|
Aug 25 10:50:39 AM UTC 24 |
Aug 25 10:50:45 AM UTC 24 |
87240426 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.3848186296 |
|
|
Aug 25 10:50:44 AM UTC 24 |
Aug 25 10:50:46 AM UTC 24 |
24066936 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.3033168884 |
|
|
Aug 25 10:50:44 AM UTC 24 |
Aug 25 10:50:46 AM UTC 24 |
17370129 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_stress_all.2230742463 |
|
|
Aug 25 10:50:43 AM UTC 24 |
Aug 25 10:50:46 AM UTC 24 |
44477936 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.700045961 |
|
|
Aug 25 10:50:33 AM UTC 24 |
Aug 25 10:50:47 AM UTC 24 |
1651072550 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.1360573695 |
|
|
Aug 25 10:50:45 AM UTC 24 |
Aug 25 10:50:49 AM UTC 24 |
735262998 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.1260373227 |
|
|
Aug 25 10:50:37 AM UTC 24 |
Aug 25 10:50:49 AM UTC 24 |
3285264497 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.4080735215 |
|
|
Aug 25 10:50:47 AM UTC 24 |
Aug 25 10:50:50 AM UTC 24 |
106402994 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.701785505 |
|
|
Aug 25 10:50:48 AM UTC 24 |
Aug 25 10:50:52 AM UTC 24 |
178436991 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.782371654 |
|
|
Aug 25 10:50:47 AM UTC 24 |
Aug 25 10:50:53 AM UTC 24 |
272150348 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.2357902731 |
|
|
Aug 25 10:51:05 AM UTC 24 |
Aug 25 10:51:40 AM UTC 24 |
3405560520 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.1155187597 |
|
|
Aug 25 10:49:19 AM UTC 24 |
Aug 25 10:51:41 AM UTC 24 |
34877305263 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.3004307424 |
|
|
Aug 25 10:50:24 AM UTC 24 |
Aug 25 10:50:56 AM UTC 24 |
6336224765 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.2288254102 |
|
|
Aug 25 10:50:50 AM UTC 24 |
Aug 25 10:50:56 AM UTC 24 |
774196053 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.4074244486 |
|
|
Aug 25 10:50:16 AM UTC 24 |
Aug 25 10:50:57 AM UTC 24 |
6328305865 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.2042887614 |
|
|
Aug 25 10:49:52 AM UTC 24 |
Aug 25 10:50:58 AM UTC 24 |
52403152859 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.2506395373 |
|
|
Aug 25 10:50:47 AM UTC 24 |
Aug 25 10:51:00 AM UTC 24 |
1518687846 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.303132728 |
|
|
Aug 25 10:50:50 AM UTC 24 |
Aug 25 10:51:02 AM UTC 24 |
1038016923 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.480392656 |
|
|
Aug 25 10:50:39 AM UTC 24 |
Aug 25 10:51:02 AM UTC 24 |
15557625683 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.1286550269 |
|
|
Aug 25 10:50:54 AM UTC 24 |
Aug 25 10:51:02 AM UTC 24 |
336174004 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.4195530031 |
|
|
Aug 25 10:48:22 AM UTC 24 |
Aug 25 10:51:03 AM UTC 24 |
7991030008 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.1282490263 |
|
|
Aug 25 10:50:57 AM UTC 24 |
Aug 25 10:51:05 AM UTC 24 |
984316984 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.2589515667 |
|
|
Aug 25 10:51:04 AM UTC 24 |
Aug 25 10:51:06 AM UTC 24 |
25043046 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.3283456109 |
|
|
Aug 25 10:51:04 AM UTC 24 |
Aug 25 10:51:06 AM UTC 24 |
19608322 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.3567403822 |
|
|
Aug 25 10:51:06 AM UTC 24 |
Aug 25 10:51:08 AM UTC 24 |
83483586 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.4227348621 |
|
|
Aug 25 10:50:51 AM UTC 24 |
Aug 25 10:51:08 AM UTC 24 |
1144056548 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.840264327 |
|
|
Aug 25 10:50:27 AM UTC 24 |
Aug 25 10:51:10 AM UTC 24 |
4214554973 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.3126543246 |
|
|
Aug 25 10:51:07 AM UTC 24 |
Aug 25 10:51:10 AM UTC 24 |
82513875 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.1232852021 |
|
|
Aug 25 10:50:34 AM UTC 24 |
Aug 25 10:51:12 AM UTC 24 |
12267143053 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.855539056 |
|
|
Aug 25 10:51:08 AM UTC 24 |
Aug 25 10:51:12 AM UTC 24 |
32020616 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.2936344581 |
|
|
Aug 25 10:49:00 AM UTC 24 |
Aug 25 10:51:14 AM UTC 24 |
12295713201 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.1575489439 |
|
|
Aug 25 10:51:09 AM UTC 24 |
Aug 25 10:51:14 AM UTC 24 |
163891458 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.2046328796 |
|
|
Aug 25 10:51:09 AM UTC 24 |
Aug 25 10:51:15 AM UTC 24 |
108762296 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.965892011 |
|
|
Aug 25 10:51:13 AM UTC 24 |
Aug 25 10:51:15 AM UTC 24 |
15213715 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.4234096249 |
|
|
Aug 25 10:49:57 AM UTC 24 |
Aug 25 10:51:16 AM UTC 24 |
2105219268 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.3016447878 |
|
|
Aug 25 10:50:05 AM UTC 24 |
Aug 25 10:51:17 AM UTC 24 |
54237043871 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.2976336573 |
|
|
Aug 25 10:51:17 AM UTC 24 |
Aug 25 10:51:20 AM UTC 24 |
14587890 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.3127232268 |
|
|
Aug 25 10:50:33 AM UTC 24 |
Aug 25 10:51:20 AM UTC 24 |
5167876283 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.3371514880 |
|
|
Aug 25 10:50:11 AM UTC 24 |
Aug 25 10:51:20 AM UTC 24 |
2794832750 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.3359725339 |
|
|
Aug 25 10:47:03 AM UTC 24 |
Aug 25 10:51:22 AM UTC 24 |
99778256302 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.4117081989 |
|
|
Aug 25 10:51:15 AM UTC 24 |
Aug 25 10:51:22 AM UTC 24 |
127816027 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.2921180263 |
|
|
Aug 25 10:51:21 AM UTC 24 |
Aug 25 10:51:23 AM UTC 24 |
43175019 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.2115897492 |
|
|
Aug 25 10:51:13 AM UTC 24 |
Aug 25 10:51:24 AM UTC 24 |
319058634 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.914433681 |
|
|
Aug 25 10:51:11 AM UTC 24 |
Aug 25 10:51:25 AM UTC 24 |
4177006160 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.518636598 |
|
|
Aug 25 10:51:23 AM UTC 24 |
Aug 25 10:51:25 AM UTC 24 |
214602524 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.1474438785 |
|
|
Aug 25 10:51:23 AM UTC 24 |
Aug 25 10:51:26 AM UTC 24 |
72726717 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_flash_and_tpm.1542941626 |
|
|
Aug 25 10:43:06 AM UTC 24 |
Aug 25 10:51:28 AM UTC 24 |
76481361422 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.1736419399 |
|
|
Aug 25 10:51:22 AM UTC 24 |
Aug 25 10:51:28 AM UTC 24 |
1046902495 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.1001855453 |
|
|
Aug 25 10:51:22 AM UTC 24 |
Aug 25 10:51:29 AM UTC 24 |
2226118539 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_stress_all.4178854077 |
|
|
Aug 25 10:50:15 AM UTC 24 |
Aug 25 10:51:30 AM UTC 24 |
7869988123 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.2164500092 |
|
|
Aug 25 10:51:25 AM UTC 24 |
Aug 25 10:51:30 AM UTC 24 |
300676886 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.3152035330 |
|
|
Aug 25 10:50:11 AM UTC 24 |
Aug 25 10:51:31 AM UTC 24 |
26588913882 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.3198730199 |
|
|
Aug 25 10:51:07 AM UTC 24 |
Aug 25 10:51:32 AM UTC 24 |
3847514976 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.2781304959 |
|
|
Aug 25 10:51:05 AM UTC 24 |
Aug 25 10:51:33 AM UTC 24 |
13240234922 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.4062076995 |
|
|
Aug 25 10:51:24 AM UTC 24 |
Aug 25 10:51:33 AM UTC 24 |
1287500231 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.4066758044 |
|
|
Aug 25 10:51:29 AM UTC 24 |
Aug 25 10:51:34 AM UTC 24 |
156060584 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_all.2904508451 |
|
|
Aug 25 10:51:31 AM UTC 24 |
Aug 25 10:51:35 AM UTC 24 |
26827385 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.1728474199 |
|
|
Aug 25 10:50:46 AM UTC 24 |
Aug 25 10:51:40 AM UTC 24 |
25758167869 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.1617887787 |
|
|
Aug 25 10:50:54 AM UTC 24 |
Aug 25 10:51:40 AM UTC 24 |
26555937391 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_stress_all.10494897 |
|
|
Aug 25 10:51:04 AM UTC 24 |
Aug 25 10:51:38 AM UTC 24 |
1588328581 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.1342987353 |
|
|
Aug 25 10:51:35 AM UTC 24 |
Aug 25 10:51:38 AM UTC 24 |
13251043 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.3957957416 |
|
|
Aug 25 10:51:35 AM UTC 24 |
Aug 25 10:51:38 AM UTC 24 |
33175159 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.4116676589 |
|
|
Aug 25 10:51:35 AM UTC 24 |
Aug 25 10:51:38 AM UTC 24 |
64641002 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.4213745511 |
|
|
Aug 25 10:51:25 AM UTC 24 |
Aug 25 10:51:39 AM UTC 24 |
2799265509 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.942686036 |
|
|
Aug 25 10:51:40 AM UTC 24 |
Aug 25 10:51:42 AM UTC 24 |
14168662 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.1874682412 |
|
|
Aug 25 10:51:40 AM UTC 24 |
Aug 25 10:51:43 AM UTC 24 |
90518973 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.3762434253 |
|
|
Aug 25 10:51:40 AM UTC 24 |
Aug 25 10:51:46 AM UTC 24 |
69855479 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.2063634387 |
|
|
Aug 25 10:51:45 AM UTC 24 |
Aug 25 10:51:47 AM UTC 24 |
24653003 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.994476034 |
|
|
Aug 25 10:51:42 AM UTC 24 |
Aug 25 10:51:48 AM UTC 24 |
1192891065 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.376033925 |
|
|
Aug 25 10:50:40 AM UTC 24 |
Aug 25 10:51:48 AM UTC 24 |
9039126539 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.2113534421 |
|
|
Aug 25 10:51:11 AM UTC 24 |
Aug 25 10:51:52 AM UTC 24 |
12633086289 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.75429381 |
|
|
Aug 25 10:51:26 AM UTC 24 |
Aug 25 10:51:53 AM UTC 24 |
6779308807 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.3959391513 |
|
|
Aug 25 10:51:15 AM UTC 24 |
Aug 25 10:51:54 AM UTC 24 |
4521516088 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.3331555616 |
|
|
Aug 25 10:51:42 AM UTC 24 |
Aug 25 10:51:55 AM UTC 24 |
4607562028 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.3598073809 |
|
|
Aug 25 10:51:53 AM UTC 24 |
Aug 25 10:51:56 AM UTC 24 |
45767779 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.620705095 |
|
|
Aug 25 10:51:53 AM UTC 24 |
Aug 25 10:51:56 AM UTC 24 |
20708601 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.3851876624 |
|
|
Aug 25 10:51:31 AM UTC 24 |
Aug 25 10:51:57 AM UTC 24 |
5943062551 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.881974681 |
|
|
Aug 25 10:51:42 AM UTC 24 |
Aug 25 10:51:58 AM UTC 24 |
758413332 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.1617667118 |
|
|
Aug 25 10:51:30 AM UTC 24 |
Aug 25 10:51:58 AM UTC 24 |
6716163977 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.2539511061 |
|
|
Aug 25 10:51:55 AM UTC 24 |
Aug 25 10:51:59 AM UTC 24 |
267200160 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.437829605 |
|
|
Aug 25 10:51:58 AM UTC 24 |
Aug 25 10:52:00 AM UTC 24 |
82222003 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.4006477448 |
|
|
Aug 25 10:51:58 AM UTC 24 |
Aug 25 10:52:00 AM UTC 24 |
208881795 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.3338940516 |
|
|
Aug 25 10:51:42 AM UTC 24 |
Aug 25 10:52:00 AM UTC 24 |
814080432 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.4128746316 |
|
|
Aug 25 10:50:13 AM UTC 24 |
Aug 25 10:52:02 AM UTC 24 |
13183598761 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.1498395988 |
|
|
Aug 25 10:51:45 AM UTC 24 |
Aug 25 10:52:03 AM UTC 24 |
1221539010 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.2098127503 |
|
|
Aug 25 10:51:59 AM UTC 24 |
Aug 25 10:52:03 AM UTC 24 |
41941718 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.3138531225 |
|
|
Aug 25 10:51:40 AM UTC 24 |
Aug 25 10:52:04 AM UTC 24 |
9713135687 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.2497236645 |
|
|
Aug 25 10:52:02 AM UTC 24 |
Aug 25 10:52:05 AM UTC 24 |
14797953 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.405477271 |
|
|
Aug 25 10:52:01 AM UTC 24 |
Aug 25 10:52:06 AM UTC 24 |
108931435 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.3712869711 |
|
|
Aug 25 10:52:07 AM UTC 24 |
Aug 25 10:52:09 AM UTC 24 |
17640206 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.1146840674 |
|
|
Aug 25 10:52:04 AM UTC 24 |
Aug 25 10:52:12 AM UTC 24 |
250301338 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.1141915181 |
|
|
Aug 25 10:52:10 AM UTC 24 |
Aug 25 10:52:12 AM UTC 24 |
26520995 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_all.1261784646 |
|
|
Aug 25 10:50:58 AM UTC 24 |
Aug 25 10:52:13 AM UTC 24 |
13101965701 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.373776068 |
|
|
Aug 25 10:49:36 AM UTC 24 |
Aug 25 10:52:14 AM UTC 24 |
6961907170 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.2108827210 |
|
|
Aug 25 10:50:15 AM UTC 24 |
Aug 25 10:52:15 AM UTC 24 |
9113389759 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3678091944 |
|
|
Aug 25 10:52:12 AM UTC 24 |
Aug 25 10:52:16 AM UTC 24 |
448104667 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.3253332374 |
|
|
Aug 25 10:51:55 AM UTC 24 |
Aug 25 10:52:16 AM UTC 24 |
2681862114 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.1053209069 |
|
|
Aug 25 10:52:14 AM UTC 24 |
Aug 25 10:52:16 AM UTC 24 |
32076748 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.4064576058 |
|
|
Aug 25 10:51:26 AM UTC 24 |
Aug 25 10:52:19 AM UTC 24 |
7532049434 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.760628155 |
|
|
Aug 25 10:52:15 AM UTC 24 |
Aug 25 10:52:20 AM UTC 24 |
163557241 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.2057789707 |
|
|
Aug 25 10:52:16 AM UTC 24 |
Aug 25 10:52:20 AM UTC 24 |
57948131 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2605771559 |
|
|
Aug 25 10:51:40 AM UTC 24 |
Aug 25 10:52:21 AM UTC 24 |
6335205286 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.2383913199 |
|
|
Aug 25 10:52:17 AM UTC 24 |
Aug 25 10:52:21 AM UTC 24 |
53220018 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.4238148703 |
|
|
Aug 25 10:47:57 AM UTC 24 |
Aug 25 10:52:21 AM UTC 24 |
126995565210 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.1099962346 |
|
|
Aug 25 10:52:17 AM UTC 24 |
Aug 25 10:52:21 AM UTC 24 |
103053861 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.875719286 |
|
|
Aug 25 10:52:13 AM UTC 24 |
Aug 25 10:52:24 AM UTC 24 |
4971343410 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.4076575486 |
|
|
Aug 25 10:49:39 AM UTC 24 |
Aug 25 10:52:24 AM UTC 24 |
96925939331 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.2231359153 |
|
|
Aug 25 10:52:20 AM UTC 24 |
Aug 25 10:52:25 AM UTC 24 |
727885925 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.2681003602 |
|
|
Aug 25 10:52:01 AM UTC 24 |
Aug 25 10:52:25 AM UTC 24 |
4501341255 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.2568000204 |
|
|
Aug 25 10:51:16 AM UTC 24 |
Aug 25 10:52:25 AM UTC 24 |
2034512755 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.2975291661 |
|
|
Aug 25 10:52:25 AM UTC 24 |
Aug 25 10:52:27 AM UTC 24 |
19468532 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.4120763608 |
|
|
Aug 25 10:52:01 AM UTC 24 |
Aug 25 10:52:28 AM UTC 24 |
1088420441 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_stress_all.1046171672 |
|
|
Aug 25 10:52:25 AM UTC 24 |
Aug 25 10:52:28 AM UTC 24 |
84183638 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.2448897430 |
|
|
Aug 25 10:52:26 AM UTC 24 |
Aug 25 10:52:29 AM UTC 24 |
13969761 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.1329767940 |
|
|
Aug 25 10:52:22 AM UTC 24 |
Aug 25 10:52:29 AM UTC 24 |
191078103 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_stress_all.322517876 |
|
|
Aug 25 10:49:21 AM UTC 24 |
Aug 25 10:52:29 AM UTC 24 |
53339811452 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.1145274189 |
|
|
Aug 25 10:52:22 AM UTC 24 |
Aug 25 10:52:31 AM UTC 24 |
2046063166 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.3228014112 |
|
|
Aug 25 10:52:29 AM UTC 24 |
Aug 25 10:52:31 AM UTC 24 |
35916878 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.3935385555 |
|
|
Aug 25 10:52:20 AM UTC 24 |
Aug 25 10:52:32 AM UTC 24 |
786549915 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.1378004100 |
|
|
Aug 25 10:52:17 AM UTC 24 |
Aug 25 10:52:32 AM UTC 24 |
1336497726 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.2929172666 |
|
|
Aug 25 10:52:29 AM UTC 24 |
Aug 25 10:52:32 AM UTC 24 |
136057107 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.2699602666 |
|
|
Aug 25 10:52:01 AM UTC 24 |
Aug 25 10:52:34 AM UTC 24 |
4310293980 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.469159405 |
|
|
Aug 25 10:52:26 AM UTC 24 |
Aug 25 10:52:34 AM UTC 24 |
2458783747 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.1173880886 |
|
|
Aug 25 10:45:46 AM UTC 24 |
Aug 25 10:52:37 AM UTC 24 |
31292410682 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.2966449921 |
|
|
Aug 25 10:52:33 AM UTC 24 |
Aug 25 10:52:37 AM UTC 24 |
30866752 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.1729358377 |
|
|
Aug 25 10:50:11 AM UTC 24 |
Aug 25 10:52:38 AM UTC 24 |
12283796057 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.3329552830 |
|
|
Aug 25 10:52:32 AM UTC 24 |
Aug 25 10:52:39 AM UTC 24 |
1383596579 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.3803048463 |
|
|
Aug 25 10:52:33 AM UTC 24 |
Aug 25 10:52:39 AM UTC 24 |
494936823 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.1876975606 |
|
|
Aug 25 10:52:01 AM UTC 24 |
Aug 25 10:52:39 AM UTC 24 |
9269448430 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.3135093926 |
|
|
Aug 25 10:46:21 AM UTC 24 |
Aug 25 10:52:40 AM UTC 24 |
73548159538 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.217953628 |
|
|
Aug 25 10:52:30 AM UTC 24 |
Aug 25 10:52:41 AM UTC 24 |
2716160445 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.4253482876 |
|
|
Aug 25 10:52:29 AM UTC 24 |
Aug 25 10:52:42 AM UTC 24 |
3820757934 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.438315828 |
|
|
Aug 25 10:52:40 AM UTC 24 |
Aug 25 10:52:42 AM UTC 24 |
26812804 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.3205277967 |
|
|
Aug 25 10:52:40 AM UTC 24 |
Aug 25 10:52:42 AM UTC 24 |
14948327 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.1167972741 |
|
|
Aug 25 10:52:41 AM UTC 24 |
Aug 25 10:52:44 AM UTC 24 |
24082072 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3939429280 |
|
|
Aug 25 10:52:42 AM UTC 24 |
Aug 25 10:52:44 AM UTC 24 |
88032754 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.630561288 |
|
|
Aug 25 10:52:40 AM UTC 24 |
Aug 25 10:52:44 AM UTC 24 |
200958711 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.1577873483 |
|
|
Aug 25 10:52:35 AM UTC 24 |
Aug 25 10:52:44 AM UTC 24 |
1063131847 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.295702681 |
|
|
Aug 25 10:52:43 AM UTC 24 |
Aug 25 10:52:45 AM UTC 24 |
11443364 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.825807362 |
|
|
Aug 25 10:50:41 AM UTC 24 |
Aug 25 10:52:46 AM UTC 24 |
28182121521 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.2668985991 |
|
|
Aug 25 10:52:32 AM UTC 24 |
Aug 25 10:52:47 AM UTC 24 |
809216233 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.1366674036 |
|
|
Aug 25 10:44:39 AM UTC 24 |
Aug 25 10:52:47 AM UTC 24 |
124350594693 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/47.spi_device_cfg_cmd.2463931819 |
|
|
Aug 25 10:55:40 AM UTC 24 |
Aug 25 10:55:45 AM UTC 24 |
92652046 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.4292691425 |
|
|
Aug 25 10:52:43 AM UTC 24 |
Aug 25 10:52:47 AM UTC 24 |
78877419 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.2874859220 |
|
|
Aug 25 10:51:40 AM UTC 24 |
Aug 25 10:52:48 AM UTC 24 |
8620650858 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.2492783676 |
|
|
Aug 25 10:52:30 AM UTC 24 |
Aug 25 10:52:50 AM UTC 24 |
1132235999 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.832656847 |
|
|
Aug 25 10:52:46 AM UTC 24 |
Aug 25 10:52:51 AM UTC 24 |
422642802 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.1357149782 |
|
|
Aug 25 10:52:44 AM UTC 24 |
Aug 25 10:52:51 AM UTC 24 |
815826504 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.491955159 |
|
|
Aug 25 10:51:01 AM UTC 24 |
Aug 25 10:52:52 AM UTC 24 |
3602750668 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_and_tpm.2889543980 |
|
|
Aug 25 10:52:23 AM UTC 24 |
Aug 25 10:52:54 AM UTC 24 |
1497052620 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.813958861 |
|
|
Aug 25 10:52:52 AM UTC 24 |
Aug 25 10:52:55 AM UTC 24 |
76379256 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.1866754017 |
|
|
Aug 25 10:52:30 AM UTC 24 |
Aug 25 10:52:55 AM UTC 24 |
9822736301 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.4040335402 |
|
|
Aug 25 10:52:52 AM UTC 24 |
Aug 25 10:52:55 AM UTC 24 |
47098646 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.1970659904 |
|
|
Aug 25 10:52:46 AM UTC 24 |
Aug 25 10:52:55 AM UTC 24 |
648504183 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.2880829760 |
|
|
Aug 25 10:50:27 AM UTC 24 |
Aug 25 10:52:56 AM UTC 24 |
19784206172 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.598120954 |
|
|
Aug 25 10:52:56 AM UTC 24 |
Aug 25 10:52:58 AM UTC 24 |
17693376 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.1333138830 |
|
|
Aug 25 10:52:56 AM UTC 24 |
Aug 25 10:52:58 AM UTC 24 |
63342062 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.938164516 |
|
|
Aug 25 10:51:59 AM UTC 24 |
Aug 25 10:53:00 AM UTC 24 |
129436533111 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.2591507970 |
|
|
Aug 25 10:52:57 AM UTC 24 |
Aug 25 10:53:01 AM UTC 24 |
80030150 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.3417304052 |
|
|
Aug 25 10:52:54 AM UTC 24 |
Aug 25 10:53:01 AM UTC 24 |
1057990158 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.3692660339 |
|
|
Aug 25 10:52:46 AM UTC 24 |
Aug 25 10:53:03 AM UTC 24 |
3652613929 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.4262602572 |
|
|
Aug 25 10:52:59 AM UTC 24 |
Aug 25 10:53:03 AM UTC 24 |
291813874 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.1039193385 |
|
|
Aug 25 10:52:48 AM UTC 24 |
Aug 25 10:53:05 AM UTC 24 |
1039996029 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.1354329134 |
|
|
Aug 25 10:53:01 AM UTC 24 |
Aug 25 10:53:06 AM UTC 24 |
113320608 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.1935776518 |
|
|
Aug 25 10:52:43 AM UTC 24 |
Aug 25 10:53:07 AM UTC 24 |
1885561389 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_mode.237561806 |
|
|
Aug 25 10:53:03 AM UTC 24 |
Aug 25 10:53:09 AM UTC 24 |
93585018 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.238064399 |
|
|
Aug 25 10:53:04 AM UTC 24 |
Aug 25 10:53:09 AM UTC 24 |
268264250 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.103506719 |
|
|
Aug 25 10:53:09 AM UTC 24 |
Aug 25 10:53:11 AM UTC 24 |
26026779 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.1219871051 |
|
|
Aug 25 10:48:19 AM UTC 24 |
Aug 25 10:53:12 AM UTC 24 |
22968149484 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.536154688 |
|
|
Aug 25 10:53:10 AM UTC 24 |
Aug 25 10:53:13 AM UTC 24 |
17020943 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.1612609131 |
|
|
Aug 25 10:49:00 AM UTC 24 |
Aug 25 10:53:14 AM UTC 24 |
47016386160 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.841790949 |
|
|
Aug 25 10:52:48 AM UTC 24 |
Aug 25 10:53:14 AM UTC 24 |
10647610139 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.3254870843 |
|
|
Aug 25 10:53:14 AM UTC 24 |
Aug 25 10:53:16 AM UTC 24 |
153110515 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.1810141951 |
|
|
Aug 25 10:52:56 AM UTC 24 |
Aug 25 10:53:16 AM UTC 24 |
3799617499 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_and_tpm.3817410789 |
|
|
Aug 25 10:52:05 AM UTC 24 |
Aug 25 10:53:18 AM UTC 24 |
6513106253 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.3462987814 |
|
|
Aug 25 10:51:16 AM UTC 24 |
Aug 25 10:53:18 AM UTC 24 |
11435159377 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.848538133 |
|
|
Aug 25 10:52:56 AM UTC 24 |
Aug 25 10:53:19 AM UTC 24 |
5732852329 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.3352330326 |
|
|
Aug 25 10:53:15 AM UTC 24 |
Aug 25 10:53:21 AM UTC 24 |
223046478 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_all.2562561694 |
|
|
Aug 25 10:53:14 AM UTC 24 |
Aug 25 10:53:22 AM UTC 24 |
1298717086 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.727659045 |
|
|
Aug 25 10:47:42 AM UTC 24 |
Aug 25 10:53:22 AM UTC 24 |
57463552655 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_stress_all.2194317424 |
|
|
Aug 25 10:52:50 AM UTC 24 |
Aug 25 10:53:23 AM UTC 24 |
2276699606 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_pass_addr_payload_swap.2217677902 |
|
|
Aug 25 10:53:15 AM UTC 24 |
Aug 25 10:53:23 AM UTC 24 |
981192216 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_cfg_cmd.3462051495 |
|
|
Aug 25 10:53:19 AM UTC 24 |
Aug 25 10:53:24 AM UTC 24 |
279740381 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.2635824829 |
|
|
Aug 25 10:51:34 AM UTC 24 |
Aug 25 10:53:24 AM UTC 24 |
11576827559 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_all.1854430225 |
|
|
Aug 25 10:43:39 AM UTC 24 |
Aug 25 10:53:25 AM UTC 24 |
271798990139 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_intercept.3023642754 |
|
|
Aug 25 10:53:17 AM UTC 24 |
Aug 25 10:53:25 AM UTC 24 |
481474851 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_stress_all.2523753655 |
|
|
Aug 25 10:43:22 AM UTC 24 |
Aug 25 10:53:27 AM UTC 24 |
159191299482 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_alert_test.2809072398 |
|
|
Aug 25 10:53:25 AM UTC 24 |
Aug 25 10:53:27 AM UTC 24 |
65706962 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/42.spi_device_csb_read.1283968713 |
|
|
Aug 25 10:53:25 AM UTC 24 |
Aug 25 10:53:28 AM UTC 24 |
64470333 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.2256040900 |
|
|
Aug 25 10:47:27 AM UTC 24 |
Aug 25 10:53:28 AM UTC 24 |
32559137152 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_stress_all.4094963876 |
|
|
Aug 25 10:53:25 AM UTC 24 |
Aug 25 10:53:28 AM UTC 24 |
242579107 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_upload.1629537055 |
|
|
Aug 25 10:53:18 AM UTC 24 |
Aug 25 10:53:30 AM UTC 24 |
1264077545 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_read_buffer_direct.3039668967 |
|
|
Aug 25 10:53:23 AM UTC 24 |
Aug 25 10:53:31 AM UTC 24 |
223067227 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/42.spi_device_tpm_sts_read.3297320368 |
|
|
Aug 25 10:53:29 AM UTC 24 |
Aug 25 10:53:31 AM UTC 24 |
39287378 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/42.spi_device_tpm_read_hw_reg.2792886428 |
|
|
Aug 25 10:53:26 AM UTC 24 |
Aug 25 10:53:32 AM UTC 24 |
2068894914 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_and_tpm.3299471597 |
|
|
Aug 25 10:53:06 AM UTC 24 |
Aug 25 10:53:34 AM UTC 24 |
1506493119 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/42.spi_device_tpm_rw.2949637288 |
|
|
Aug 25 10:53:29 AM UTC 24 |
Aug 25 10:53:34 AM UTC 24 |
1286964822 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_flash_mode.1640533350 |
|
|
Aug 25 10:53:19 AM UTC 24 |
Aug 25 10:53:35 AM UTC 24 |
1296541894 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_1r1w-sim-vcs/coverage/default/42.spi_device_intercept.1819284666 |
|
|
Aug 25 10:53:31 AM UTC 24 |
Aug 25 10:53:36 AM UTC 24 |
376086257 ps |