| T438 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.1687496679 |
|
|
Aug 27 06:15:59 PM UTC 24 |
Aug 27 06:16:09 PM UTC 24 |
552471210 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_mailbox.1365662667 |
|
|
Aug 27 06:16:06 PM UTC 24 |
Aug 27 06:16:10 PM UTC 24 |
215614904 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.2356280402 |
|
|
Aug 27 06:16:03 PM UTC 24 |
Aug 27 06:16:10 PM UTC 24 |
2706337011 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode.4045226230 |
|
|
Aug 27 06:16:09 PM UTC 24 |
Aug 27 06:16:13 PM UTC 24 |
31236569 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_cfg_cmd.89296270 |
|
|
Aug 27 06:16:09 PM UTC 24 |
Aug 27 06:16:14 PM UTC 24 |
464260374 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_upload.1903136894 |
|
|
Aug 27 06:16:07 PM UTC 24 |
Aug 27 06:16:15 PM UTC 24 |
476955522 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_alert_test.3341590028 |
|
|
Aug 27 06:16:17 PM UTC 24 |
Aug 27 06:16:19 PM UTC 24 |
47941319 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.3180669647 |
|
|
Aug 27 06:16:12 PM UTC 24 |
Aug 27 06:16:19 PM UTC 24 |
408444866 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.2902603803 |
|
|
Aug 27 06:14:13 PM UTC 24 |
Aug 27 06:16:22 PM UTC 24 |
60702669132 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.1071959016 |
|
|
Aug 27 06:17:05 PM UTC 24 |
Aug 27 06:17:32 PM UTC 24 |
1341088196 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_csb_read.3394744012 |
|
|
Aug 27 06:16:20 PM UTC 24 |
Aug 27 06:16:22 PM UTC 24 |
26129003 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_intercept.4136833840 |
|
|
Aug 27 06:16:05 PM UTC 24 |
Aug 27 06:16:23 PM UTC 24 |
1914038204 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.2563110787 |
|
|
Aug 27 06:16:24 PM UTC 24 |
Aug 27 06:16:26 PM UTC 24 |
77508316 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_rw.216264808 |
|
|
Aug 27 06:16:25 PM UTC 24 |
Aug 27 06:16:27 PM UTC 24 |
21122073 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_all.4083869067 |
|
|
Aug 27 06:16:02 PM UTC 24 |
Aug 27 06:16:33 PM UTC 24 |
1884827367 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.1159073881 |
|
|
Aug 27 06:16:24 PM UTC 24 |
Aug 27 06:16:35 PM UTC 24 |
5018454900 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.609934917 |
|
|
Aug 27 06:16:05 PM UTC 24 |
Aug 27 06:16:35 PM UTC 24 |
35248269752 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.638681379 |
|
|
Aug 27 06:15:30 PM UTC 24 |
Aug 27 06:16:36 PM UTC 24 |
32284022313 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.2643637433 |
|
|
Aug 27 06:14:12 PM UTC 24 |
Aug 27 06:16:37 PM UTC 24 |
6076810951 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.1307261538 |
|
|
Aug 27 06:16:28 PM UTC 24 |
Aug 27 06:16:38 PM UTC 24 |
2332283042 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_cfg_cmd.1965122035 |
|
|
Aug 27 06:16:36 PM UTC 24 |
Aug 27 06:16:41 PM UTC 24 |
168696752 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_flash_and_tpm_min_idle.4018753823 |
|
|
Aug 27 06:12:03 PM UTC 24 |
Aug 27 06:16:44 PM UTC 24 |
22356761512 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.1489070576 |
|
|
Aug 27 06:16:39 PM UTC 24 |
Aug 27 06:16:44 PM UTC 24 |
146946624 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.50986706 |
|
|
Aug 27 06:16:34 PM UTC 24 |
Aug 27 06:16:45 PM UTC 24 |
2497546028 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_upload.2597985149 |
|
|
Aug 27 06:16:36 PM UTC 24 |
Aug 27 06:16:46 PM UTC 24 |
1091320933 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode.3393376028 |
|
|
Aug 27 06:16:37 PM UTC 24 |
Aug 27 06:16:47 PM UTC 24 |
2984324050 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.2081147452 |
|
|
Aug 27 06:16:48 PM UTC 24 |
Aug 27 06:16:50 PM UTC 24 |
39263915 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.2143785693 |
|
|
Aug 27 06:16:48 PM UTC 24 |
Aug 27 06:16:50 PM UTC 24 |
61657766 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.2670952116 |
|
|
Aug 27 06:16:10 PM UTC 24 |
Aug 27 06:16:52 PM UTC 24 |
12316186297 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.3050519773 |
|
|
Aug 27 06:15:55 PM UTC 24 |
Aug 27 06:16:54 PM UTC 24 |
6025555316 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.2797495013 |
|
|
Aug 27 06:16:54 PM UTC 24 |
Aug 27 06:16:56 PM UTC 24 |
68749019 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.2982274786 |
|
|
Aug 27 06:16:54 PM UTC 24 |
Aug 27 06:16:57 PM UTC 24 |
329320575 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_stress_all.220950084 |
|
|
Aug 27 06:16:46 PM UTC 24 |
Aug 27 06:16:58 PM UTC 24 |
1141468254 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_intercept.3066521743 |
|
|
Aug 27 06:16:29 PM UTC 24 |
Aug 27 06:17:01 PM UTC 24 |
2612840484 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.2245257352 |
|
|
Aug 27 06:16:24 PM UTC 24 |
Aug 27 06:17:02 PM UTC 24 |
17139634685 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.426087326 |
|
|
Aug 27 06:15:25 PM UTC 24 |
Aug 27 06:17:03 PM UTC 24 |
57851501606 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.3146516651 |
|
|
Aug 27 06:16:55 PM UTC 24 |
Aug 27 06:17:04 PM UTC 24 |
3060871907 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.3749211201 |
|
|
Aug 27 06:16:59 PM UTC 24 |
Aug 27 06:17:04 PM UTC 24 |
687344614 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.2657690805 |
|
|
Aug 27 06:15:09 PM UTC 24 |
Aug 27 06:17:04 PM UTC 24 |
8046552513 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.1906967693 |
|
|
Aug 27 06:16:51 PM UTC 24 |
Aug 27 06:17:06 PM UTC 24 |
44351487327 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.3692331496 |
|
|
Aug 27 06:17:03 PM UTC 24 |
Aug 27 06:17:07 PM UTC 24 |
171576899 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.3034116399 |
|
|
Aug 27 06:16:52 PM UTC 24 |
Aug 27 06:17:08 PM UTC 24 |
9728322138 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.3033971402 |
|
|
Aug 27 06:16:57 PM UTC 24 |
Aug 27 06:17:10 PM UTC 24 |
488654086 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.797299684 |
|
|
Aug 27 06:17:10 PM UTC 24 |
Aug 27 06:17:12 PM UTC 24 |
47495442 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.1988425042 |
|
|
Aug 27 06:17:03 PM UTC 24 |
Aug 27 06:17:12 PM UTC 24 |
3287015819 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.3130499093 |
|
|
Aug 27 06:17:12 PM UTC 24 |
Aug 27 06:17:14 PM UTC 24 |
43797321 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.4054461977 |
|
|
Aug 27 06:17:19 PM UTC 24 |
Aug 27 06:17:43 PM UTC 24 |
13482929562 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.2830379939 |
|
|
Aug 27 06:17:13 PM UTC 24 |
Aug 27 06:17:15 PM UTC 24 |
15972602 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.1923641975 |
|
|
Aug 27 06:16:27 PM UTC 24 |
Aug 27 06:17:15 PM UTC 24 |
14139387396 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.544194520 |
|
|
Aug 27 06:16:37 PM UTC 24 |
Aug 27 06:17:16 PM UTC 24 |
15295587119 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_all.3687879911 |
|
|
Aug 27 06:17:16 PM UTC 24 |
Aug 27 06:17:18 PM UTC 24 |
18251424 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.3690224013 |
|
|
Aug 27 06:17:16 PM UTC 24 |
Aug 27 06:17:18 PM UTC 24 |
80100308 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.4256281988 |
|
|
Aug 27 06:17:16 PM UTC 24 |
Aug 27 06:17:22 PM UTC 24 |
224139306 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.2406917023 |
|
|
Aug 27 06:17:14 PM UTC 24 |
Aug 27 06:17:22 PM UTC 24 |
501211532 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.2840424231 |
|
|
Aug 27 06:17:05 PM UTC 24 |
Aug 27 06:17:23 PM UTC 24 |
2262514737 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.2856866563 |
|
|
Aug 27 06:17:23 PM UTC 24 |
Aug 27 06:17:28 PM UTC 24 |
442342045 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.3701202024 |
|
|
Aug 27 06:17:17 PM UTC 24 |
Aug 27 06:17:28 PM UTC 24 |
2697708811 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.2426589731 |
|
|
Aug 27 06:17:18 PM UTC 24 |
Aug 27 06:17:29 PM UTC 24 |
786255555 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.1047424432 |
|
|
Aug 27 06:17:23 PM UTC 24 |
Aug 27 06:17:32 PM UTC 24 |
1832226664 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.1958239430 |
|
|
Aug 27 06:17:29 PM UTC 24 |
Aug 27 06:17:40 PM UTC 24 |
628761895 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.192041341 |
|
|
Aug 27 06:17:43 PM UTC 24 |
Aug 27 06:17:46 PM UTC 24 |
14303793 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.640341347 |
|
|
Aug 27 06:15:56 PM UTC 24 |
Aug 27 06:17:47 PM UTC 24 |
18149428616 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.645803332 |
|
|
Aug 27 06:17:47 PM UTC 24 |
Aug 27 06:17:49 PM UTC 24 |
15461187 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.1831487232 |
|
|
Aug 27 06:16:45 PM UTC 24 |
Aug 27 06:17:49 PM UTC 24 |
2616491821 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_all.984631283 |
|
|
Aug 27 06:16:42 PM UTC 24 |
Aug 27 06:17:51 PM UTC 24 |
12786057783 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.1883045335 |
|
|
Aug 27 06:17:51 PM UTC 24 |
Aug 27 06:17:53 PM UTC 24 |
36454553 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.978320030 |
|
|
Aug 27 06:17:07 PM UTC 24 |
Aug 27 06:17:58 PM UTC 24 |
3851801689 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.864086061 |
|
|
Aug 27 06:17:00 PM UTC 24 |
Aug 27 06:17:59 PM UTC 24 |
4211612159 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.3431892424 |
|
|
Aug 27 06:17:52 PM UTC 24 |
Aug 27 06:17:59 PM UTC 24 |
102042893 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2506526388 |
|
|
Aug 27 06:17:50 PM UTC 24 |
Aug 27 06:18:00 PM UTC 24 |
1050106118 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.3158697802 |
|
|
Aug 27 06:17:50 PM UTC 24 |
Aug 27 06:18:01 PM UTC 24 |
2098508881 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.1216552011 |
|
|
Aug 27 06:15:10 PM UTC 24 |
Aug 27 06:18:06 PM UTC 24 |
213544879021 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.2101197278 |
|
|
Aug 27 06:17:54 PM UTC 24 |
Aug 27 06:18:06 PM UTC 24 |
828897597 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.310861023 |
|
|
Aug 27 06:18:02 PM UTC 24 |
Aug 27 06:18:07 PM UTC 24 |
1633802495 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.2202025998 |
|
|
Aug 27 06:18:01 PM UTC 24 |
Aug 27 06:18:07 PM UTC 24 |
801866766 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_upload.302712076 |
|
|
Aug 27 06:18:02 PM UTC 24 |
Aug 27 06:18:08 PM UTC 24 |
206993333 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.2693472198 |
|
|
Aug 27 06:18:07 PM UTC 24 |
Aug 27 06:18:17 PM UTC 24 |
165794610 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.723343667 |
|
|
Aug 27 06:17:59 PM UTC 24 |
Aug 27 06:18:18 PM UTC 24 |
1132979945 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.2541880014 |
|
|
Aug 27 06:18:01 PM UTC 24 |
Aug 27 06:18:21 PM UTC 24 |
841328417 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.2177751377 |
|
|
Aug 27 06:18:19 PM UTC 24 |
Aug 27 06:18:22 PM UTC 24 |
154334122 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.1481302755 |
|
|
Aug 27 06:18:09 PM UTC 24 |
Aug 27 06:18:22 PM UTC 24 |
3333527920 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.1816191239 |
|
|
Aug 27 06:18:22 PM UTC 24 |
Aug 27 06:18:24 PM UTC 24 |
22276337 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.4120204542 |
|
|
Aug 27 06:18:23 PM UTC 24 |
Aug 27 06:18:25 PM UTC 24 |
16407528 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.3218238801 |
|
|
Aug 27 06:18:27 PM UTC 24 |
Aug 27 06:18:29 PM UTC 24 |
91124517 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.1223740768 |
|
|
Aug 27 06:18:25 PM UTC 24 |
Aug 27 06:18:29 PM UTC 24 |
248616911 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.3157716118 |
|
|
Aug 27 06:17:25 PM UTC 24 |
Aug 27 06:18:32 PM UTC 24 |
3805581150 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.3726267835 |
|
|
Aug 27 06:18:30 PM UTC 24 |
Aug 27 06:18:33 PM UTC 24 |
42206851 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.119766456 |
|
|
Aug 27 06:18:33 PM UTC 24 |
Aug 27 06:18:38 PM UTC 24 |
286140395 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.3220172955 |
|
|
Aug 27 06:18:41 PM UTC 24 |
Aug 27 06:18:46 PM UTC 24 |
387639581 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.1925113414 |
|
|
Aug 27 06:17:33 PM UTC 24 |
Aug 27 06:18:48 PM UTC 24 |
3481464140 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.1482972334 |
|
|
Aug 27 06:18:30 PM UTC 24 |
Aug 27 06:18:49 PM UTC 24 |
3675832083 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.1826238629 |
|
|
Aug 27 06:18:09 PM UTC 24 |
Aug 27 06:18:51 PM UTC 24 |
5872199799 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.3783406512 |
|
|
Aug 27 06:18:25 PM UTC 24 |
Aug 27 06:18:52 PM UTC 24 |
1859818180 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.2106702461 |
|
|
Aug 27 06:18:47 PM UTC 24 |
Aug 27 06:18:58 PM UTC 24 |
992107931 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.1959127569 |
|
|
Aug 27 06:18:32 PM UTC 24 |
Aug 27 06:18:58 PM UTC 24 |
1859210011 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.3500265794 |
|
|
Aug 27 06:18:07 PM UTC 24 |
Aug 27 06:18:58 PM UTC 24 |
17715920579 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.528095203 |
|
|
Aug 27 06:18:47 PM UTC 24 |
Aug 27 06:18:59 PM UTC 24 |
5151048599 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.1864643339 |
|
|
Aug 27 06:18:59 PM UTC 24 |
Aug 27 06:19:01 PM UTC 24 |
16082930 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.2483448458 |
|
|
Aug 27 06:19:00 PM UTC 24 |
Aug 27 06:19:02 PM UTC 24 |
68716297 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.959829801 |
|
|
Aug 27 06:19:00 PM UTC 24 |
Aug 27 06:19:03 PM UTC 24 |
100395397 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.1484322532 |
|
|
Aug 27 06:17:05 PM UTC 24 |
Aug 27 06:19:03 PM UTC 24 |
17525859238 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.211041176 |
|
|
Aug 27 06:17:19 PM UTC 24 |
Aug 27 06:19:04 PM UTC 24 |
37947844063 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.1667974915 |
|
|
Aug 27 06:19:04 PM UTC 24 |
Aug 27 06:19:06 PM UTC 24 |
69439385 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.2291199931 |
|
|
Aug 27 06:18:50 PM UTC 24 |
Aug 27 06:19:07 PM UTC 24 |
1134658111 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.4234265556 |
|
|
Aug 27 06:19:04 PM UTC 24 |
Aug 27 06:19:11 PM UTC 24 |
1002698586 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.3085688598 |
|
|
Aug 27 06:19:05 PM UTC 24 |
Aug 27 06:19:16 PM UTC 24 |
729629942 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.2776143162 |
|
|
Aug 27 06:19:12 PM UTC 24 |
Aug 27 06:19:16 PM UTC 24 |
347833294 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.10724711 |
|
|
Aug 27 06:19:09 PM UTC 24 |
Aug 27 06:19:16 PM UTC 24 |
1043264261 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.1461770821 |
|
|
Aug 27 06:18:40 PM UTC 24 |
Aug 27 06:19:20 PM UTC 24 |
2606171582 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.362151514 |
|
|
Aug 27 06:14:45 PM UTC 24 |
Aug 27 06:19:21 PM UTC 24 |
116529377613 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.1699997455 |
|
|
Aug 27 06:19:22 PM UTC 24 |
Aug 27 06:19:24 PM UTC 24 |
59244341 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.1252886584 |
|
|
Aug 27 06:19:21 PM UTC 24 |
Aug 27 06:19:24 PM UTC 24 |
212580777 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.2160844067 |
|
|
Aug 27 06:19:16 PM UTC 24 |
Aug 27 06:19:25 PM UTC 24 |
1149870163 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.588863031 |
|
|
Aug 27 06:19:16 PM UTC 24 |
Aug 27 06:19:25 PM UTC 24 |
469129924 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.1418484535 |
|
|
Aug 27 06:19:26 PM UTC 24 |
Aug 27 06:19:28 PM UTC 24 |
19388109 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_stress_all.3509977188 |
|
|
Aug 27 06:19:26 PM UTC 24 |
Aug 27 06:19:28 PM UTC 24 |
87397799 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.634390678 |
|
|
Aug 27 06:19:05 PM UTC 24 |
Aug 27 06:19:29 PM UTC 24 |
5671827636 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.2362015686 |
|
|
Aug 27 06:19:27 PM UTC 24 |
Aug 27 06:19:30 PM UTC 24 |
20692161 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_stress_all.3090633435 |
|
|
Aug 27 06:12:09 PM UTC 24 |
Aug 27 06:19:30 PM UTC 24 |
569328160467 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.3434038091 |
|
|
Aug 27 06:16:13 PM UTC 24 |
Aug 27 06:19:33 PM UTC 24 |
87853586196 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.1852342421 |
|
|
Aug 27 06:19:31 PM UTC 24 |
Aug 27 06:19:33 PM UTC 24 |
33796113 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_stress_all.174400740 |
|
|
Aug 27 06:14:46 PM UTC 24 |
Aug 27 06:19:34 PM UTC 24 |
195686751137 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.818412847 |
|
|
Aug 27 06:19:31 PM UTC 24 |
Aug 27 06:19:35 PM UTC 24 |
104160194 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.3175862705 |
|
|
Aug 27 06:19:31 PM UTC 24 |
Aug 27 06:19:35 PM UTC 24 |
90520545 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_stress_all.3869667703 |
|
|
Aug 27 06:15:32 PM UTC 24 |
Aug 27 06:19:36 PM UTC 24 |
25220400503 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_all.2020466947 |
|
|
Aug 27 06:15:55 PM UTC 24 |
Aug 27 06:19:40 PM UTC 24 |
66271397028 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.3546881374 |
|
|
Aug 27 06:19:36 PM UTC 24 |
Aug 27 06:19:42 PM UTC 24 |
1153038784 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.1742320770 |
|
|
Aug 27 06:19:08 PM UTC 24 |
Aug 27 06:19:43 PM UTC 24 |
3876196977 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.3727438133 |
|
|
Aug 27 06:19:38 PM UTC 24 |
Aug 27 06:19:45 PM UTC 24 |
274240202 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.2015081383 |
|
|
Aug 27 06:18:54 PM UTC 24 |
Aug 27 06:19:45 PM UTC 24 |
5917122247 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.3727098989 |
|
|
Aug 27 06:19:36 PM UTC 24 |
Aug 27 06:19:47 PM UTC 24 |
2665974994 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.425607998 |
|
|
Aug 27 06:19:35 PM UTC 24 |
Aug 27 06:19:47 PM UTC 24 |
4005935231 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3104353377 |
|
|
Aug 27 06:19:34 PM UTC 24 |
Aug 27 06:19:49 PM UTC 24 |
7315645023 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.3069598578 |
|
|
Aug 27 06:19:43 PM UTC 24 |
Aug 27 06:19:49 PM UTC 24 |
373528124 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.445724848 |
|
|
Aug 27 06:19:49 PM UTC 24 |
Aug 27 06:19:51 PM UTC 24 |
29568174 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.3147206908 |
|
|
Aug 27 06:19:02 PM UTC 24 |
Aug 27 06:19:51 PM UTC 24 |
28277744221 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.2036924959 |
|
|
Aug 27 06:19:30 PM UTC 24 |
Aug 27 06:19:52 PM UTC 24 |
8208160732 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.2286293970 |
|
|
Aug 27 06:19:51 PM UTC 24 |
Aug 27 06:19:53 PM UTC 24 |
23021139 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.3744966600 |
|
|
Aug 27 06:19:52 PM UTC 24 |
Aug 27 06:19:54 PM UTC 24 |
50550499 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3798001755 |
|
|
Aug 27 06:19:52 PM UTC 24 |
Aug 27 06:19:54 PM UTC 24 |
119069258 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.2984877883 |
|
|
Aug 27 06:19:51 PM UTC 24 |
Aug 27 06:19:55 PM UTC 24 |
494364797 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_stress_all.1660632793 |
|
|
Aug 27 06:17:40 PM UTC 24 |
Aug 27 06:19:59 PM UTC 24 |
46098312747 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.3936767786 |
|
|
Aug 27 06:19:55 PM UTC 24 |
Aug 27 06:19:59 PM UTC 24 |
1294258684 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.3519579639 |
|
|
Aug 27 06:19:51 PM UTC 24 |
Aug 27 06:19:59 PM UTC 24 |
9865754764 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.3926015595 |
|
|
Aug 27 06:18:49 PM UTC 24 |
Aug 27 06:20:00 PM UTC 24 |
12170250632 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2032974697 |
|
|
Aug 27 06:19:30 PM UTC 24 |
Aug 27 06:20:03 PM UTC 24 |
27922670714 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.3915180429 |
|
|
Aug 27 06:19:35 PM UTC 24 |
Aug 27 06:20:05 PM UTC 24 |
17269272245 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_all.401102958 |
|
|
Aug 27 06:20:04 PM UTC 24 |
Aug 27 06:20:06 PM UTC 24 |
13607416 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.929648926 |
|
|
Aug 27 06:19:53 PM UTC 24 |
Aug 27 06:20:06 PM UTC 24 |
2999329373 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.712421204 |
|
|
Aug 27 06:17:30 PM UTC 24 |
Aug 27 06:20:07 PM UTC 24 |
35694833901 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.3894963731 |
|
|
Aug 27 06:20:01 PM UTC 24 |
Aug 27 06:20:08 PM UTC 24 |
501202965 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.2769825973 |
|
|
Aug 27 06:20:08 PM UTC 24 |
Aug 27 06:20:10 PM UTC 24 |
12912197 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.2857650838 |
|
|
Aug 27 06:18:10 PM UTC 24 |
Aug 27 06:20:10 PM UTC 24 |
20536318844 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.835936984 |
|
|
Aug 27 06:20:09 PM UTC 24 |
Aug 27 06:20:11 PM UTC 24 |
12795260 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.1816794471 |
|
|
Aug 27 06:19:48 PM UTC 24 |
Aug 27 06:20:12 PM UTC 24 |
5967901218 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.3398587970 |
|
|
Aug 27 06:20:01 PM UTC 24 |
Aug 27 06:20:13 PM UTC 24 |
3796915282 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1226757103 |
|
|
Aug 27 06:20:01 PM UTC 24 |
Aug 27 06:20:13 PM UTC 24 |
3024220987 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.3337582963 |
|
|
Aug 27 06:20:12 PM UTC 24 |
Aug 27 06:20:14 PM UTC 24 |
77442006 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.552267989 |
|
|
Aug 27 06:19:54 PM UTC 24 |
Aug 27 06:20:15 PM UTC 24 |
2809321824 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.2606159806 |
|
|
Aug 27 06:19:56 PM UTC 24 |
Aug 27 06:20:15 PM UTC 24 |
4931948054 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_stress_all.2802774131 |
|
|
Aug 27 06:15:56 PM UTC 24 |
Aug 27 06:20:16 PM UTC 24 |
241587761763 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.157055731 |
|
|
Aug 27 06:20:13 PM UTC 24 |
Aug 27 06:20:16 PM UTC 24 |
247958386 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.1821888315 |
|
|
Aug 27 06:19:56 PM UTC 24 |
Aug 27 06:20:17 PM UTC 24 |
6228535974 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.4265054750 |
|
|
Aug 27 06:19:41 PM UTC 24 |
Aug 27 06:20:18 PM UTC 24 |
16488477676 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.1529322498 |
|
|
Aug 27 06:20:14 PM UTC 24 |
Aug 27 06:20:19 PM UTC 24 |
2354425296 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.1096445298 |
|
|
Aug 27 06:17:06 PM UTC 24 |
Aug 27 06:20:21 PM UTC 24 |
70245160383 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.3383154993 |
|
|
Aug 27 06:20:16 PM UTC 24 |
Aug 27 06:20:24 PM UTC 24 |
774442979 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.1403230460 |
|
|
Aug 27 06:20:12 PM UTC 24 |
Aug 27 06:20:24 PM UTC 24 |
921270974 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.3400603487 |
|
|
Aug 27 06:20:16 PM UTC 24 |
Aug 27 06:20:24 PM UTC 24 |
542566819 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.675850750 |
|
|
Aug 27 06:20:17 PM UTC 24 |
Aug 27 06:20:25 PM UTC 24 |
155888209 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.474011676 |
|
|
Aug 27 06:20:17 PM UTC 24 |
Aug 27 06:20:25 PM UTC 24 |
268591360 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.90744075 |
|
|
Aug 27 06:20:26 PM UTC 24 |
Aug 27 06:20:28 PM UTC 24 |
13760844 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.658792167 |
|
|
Aug 27 06:20:12 PM UTC 24 |
Aug 27 06:20:29 PM UTC 24 |
3214391373 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.3228149508 |
|
|
Aug 27 06:20:27 PM UTC 24 |
Aug 27 06:20:29 PM UTC 24 |
52006858 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.3606454380 |
|
|
Aug 27 06:20:30 PM UTC 24 |
Aug 27 06:20:32 PM UTC 24 |
137197040 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.1093889043 |
|
|
Aug 27 06:20:14 PM UTC 24 |
Aug 27 06:20:32 PM UTC 24 |
1030727319 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.2491428459 |
|
|
Aug 27 06:20:01 PM UTC 24 |
Aug 27 06:20:33 PM UTC 24 |
1501101388 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.2261164845 |
|
|
Aug 27 06:20:30 PM UTC 24 |
Aug 27 06:20:33 PM UTC 24 |
63956511 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.1603548089 |
|
|
Aug 27 06:20:19 PM UTC 24 |
Aug 27 06:20:34 PM UTC 24 |
649644806 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.1691456369 |
|
|
Aug 27 06:20:27 PM UTC 24 |
Aug 27 06:20:37 PM UTC 24 |
1701696603 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.2844604689 |
|
|
Aug 27 06:20:33 PM UTC 24 |
Aug 27 06:20:37 PM UTC 24 |
1161795174 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.4199272032 |
|
|
Aug 27 06:20:17 PM UTC 24 |
Aug 27 06:20:39 PM UTC 24 |
7132451155 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.2978422386 |
|
|
Aug 27 06:20:35 PM UTC 24 |
Aug 27 06:20:39 PM UTC 24 |
289299350 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.1669490667 |
|
|
Aug 27 06:20:33 PM UTC 24 |
Aug 27 06:20:40 PM UTC 24 |
159915477 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.3739740356 |
|
|
Aug 27 06:20:38 PM UTC 24 |
Aug 27 06:20:43 PM UTC 24 |
436147312 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.2110241116 |
|
|
Aug 27 06:20:40 PM UTC 24 |
Aug 27 06:20:49 PM UTC 24 |
334444360 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.679967011 |
|
|
Aug 27 06:20:20 PM UTC 24 |
Aug 27 06:20:54 PM UTC 24 |
1176839278 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.1725001100 |
|
|
Aug 27 06:20:34 PM UTC 24 |
Aug 27 06:20:57 PM UTC 24 |
7387510050 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.1679551625 |
|
|
Aug 27 06:20:58 PM UTC 24 |
Aug 27 06:21:01 PM UTC 24 |
12960773 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.3268803559 |
|
|
Aug 27 06:19:47 PM UTC 24 |
Aug 27 06:21:03 PM UTC 24 |
3553656933 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.2064704111 |
|
|
Aug 27 06:20:39 PM UTC 24 |
Aug 27 06:21:04 PM UTC 24 |
1121750740 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.4146199893 |
|
|
Aug 27 06:21:02 PM UTC 24 |
Aug 27 06:21:04 PM UTC 24 |
20044699 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.1743349908 |
|
|
Aug 27 06:20:28 PM UTC 24 |
Aug 27 06:21:07 PM UTC 24 |
7009490268 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.2179731044 |
|
|
Aug 27 06:21:05 PM UTC 24 |
Aug 27 06:21:07 PM UTC 24 |
38678800 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.3247503768 |
|
|
Aug 27 06:21:05 PM UTC 24 |
Aug 27 06:21:07 PM UTC 24 |
144623081 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.2895752493 |
|
|
Aug 27 06:21:07 PM UTC 24 |
Aug 27 06:21:10 PM UTC 24 |
106804439 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_mode_ignore_cmds.3061644596 |
|
|
Aug 27 06:12:29 PM UTC 24 |
Aug 27 06:21:10 PM UTC 24 |
712392731632 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.1595622677 |
|
|
Aug 27 06:14:44 PM UTC 24 |
Aug 27 06:21:15 PM UTC 24 |
32455562088 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.1193241330 |
|
|
Aug 27 06:21:09 PM UTC 24 |
Aug 27 06:21:16 PM UTC 24 |
694711781 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.3982798815 |
|
|
Aug 27 06:20:19 PM UTC 24 |
Aug 27 06:21:18 PM UTC 24 |
3906090077 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.17614448 |
|
|
Aug 27 06:16:14 PM UTC 24 |
Aug 27 06:21:19 PM UTC 24 |
178386292394 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.3854909724 |
|
|
Aug 27 06:21:12 PM UTC 24 |
Aug 27 06:21:19 PM UTC 24 |
273987309 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.2992064976 |
|
|
Aug 27 06:21:15 PM UTC 24 |
Aug 27 06:21:20 PM UTC 24 |
162748032 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.2339760856 |
|
|
Aug 27 06:21:11 PM UTC 24 |
Aug 27 06:21:21 PM UTC 24 |
6173322367 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.2247835661 |
|
|
Aug 27 06:21:18 PM UTC 24 |
Aug 27 06:21:26 PM UTC 24 |
356021163 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.1544049174 |
|
|
Aug 27 06:21:19 PM UTC 24 |
Aug 27 06:21:28 PM UTC 24 |
289642386 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.135067222 |
|
|
Aug 27 06:21:09 PM UTC 24 |
Aug 27 06:21:28 PM UTC 24 |
1332611542 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.2497160167 |
|
|
Aug 27 06:21:04 PM UTC 24 |
Aug 27 06:21:30 PM UTC 24 |
5318192526 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.1233638768 |
|
|
Aug 27 06:21:30 PM UTC 24 |
Aug 27 06:21:32 PM UTC 24 |
51739872 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.334545559 |
|
|
Aug 27 06:19:26 PM UTC 24 |
Aug 27 06:21:33 PM UTC 24 |
8869871633 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.273525944 |
|
|
Aug 27 06:21:31 PM UTC 24 |
Aug 27 06:21:33 PM UTC 24 |
17879731 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.2195391776 |
|
|
Aug 27 06:21:20 PM UTC 24 |
Aug 27 06:21:36 PM UTC 24 |
4307005648 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.3047523473 |
|
|
Aug 27 06:21:35 PM UTC 24 |
Aug 27 06:21:37 PM UTC 24 |
16646324 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_rw.1353575245 |
|
|
Aug 27 06:21:37 PM UTC 24 |
Aug 27 06:21:40 PM UTC 24 |
42138753 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.3791410349 |
|
|
Aug 27 06:18:18 PM UTC 24 |
Aug 27 06:21:42 PM UTC 24 |
75026402504 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.3727451560 |
|
|
Aug 27 06:21:21 PM UTC 24 |
Aug 27 06:21:43 PM UTC 24 |
2076499567 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/3.spi_device_stress_all.349753733 |
|
|
Aug 27 06:11:31 PM UTC 24 |
Aug 27 06:21:45 PM UTC 24 |
249296581605 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_mailbox.172746406 |
|
|
Aug 27 06:21:45 PM UTC 24 |
Aug 27 06:21:49 PM UTC 24 |
103240499 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.159404155 |
|
|
Aug 27 06:18:59 PM UTC 24 |
Aug 27 06:21:51 PM UTC 24 |
9506999706 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.1326852654 |
|
|
Aug 27 06:21:38 PM UTC 24 |
Aug 27 06:21:52 PM UTC 24 |
16224091382 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.706465188 |
|
|
Aug 27 06:21:34 PM UTC 24 |
Aug 27 06:21:53 PM UTC 24 |
9655259421 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.740145588 |
|
|
Aug 27 06:20:34 PM UTC 24 |
Aug 27 06:21:54 PM UTC 24 |
10172659218 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.1775493082 |
|
|
Aug 27 06:21:46 PM UTC 24 |
Aug 27 06:21:55 PM UTC 24 |
1329134649 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.2502067535 |
|
|
Aug 27 06:21:50 PM UTC 24 |
Aug 27 06:21:55 PM UTC 24 |
291633820 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.4228108245 |
|
|
Aug 27 06:20:44 PM UTC 24 |
Aug 27 06:22:01 PM UTC 24 |
24888681122 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.2172088292 |
|
|
Aug 27 06:21:54 PM UTC 24 |
Aug 27 06:22:02 PM UTC 24 |
619989344 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.1893142105 |
|
|
Aug 27 06:22:03 PM UTC 24 |
Aug 27 06:22:05 PM UTC 24 |
11789851 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.3617263300 |
|
|
Aug 27 06:22:03 PM UTC 24 |
Aug 27 06:22:05 PM UTC 24 |
121506258 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.792708918 |
|
|
Aug 27 06:21:43 PM UTC 24 |
Aug 27 06:22:06 PM UTC 24 |
4094967122 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.1535267100 |
|
|
Aug 27 06:22:06 PM UTC 24 |
Aug 27 06:22:08 PM UTC 24 |
14918028 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.2046215512 |
|
|
Aug 27 06:21:34 PM UTC 24 |
Aug 27 06:22:09 PM UTC 24 |
6815977073 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.2485028272 |
|
|
Aug 27 06:22:08 PM UTC 24 |
Aug 27 06:22:10 PM UTC 24 |
46714427 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.3643844198 |
|
|
Aug 27 06:22:09 PM UTC 24 |
Aug 27 06:22:12 PM UTC 24 |
341548150 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.2074271190 |
|
|
Aug 27 06:22:06 PM UTC 24 |
Aug 27 06:22:13 PM UTC 24 |
3282942199 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.4137696705 |
|
|
Aug 27 06:20:06 PM UTC 24 |
Aug 27 06:22:13 PM UTC 24 |
132318338438 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.3999627032 |
|
|
Aug 27 06:22:13 PM UTC 24 |
Aug 27 06:22:17 PM UTC 24 |
58524375 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.3975114507 |
|
|
Aug 27 06:22:15 PM UTC 24 |
Aug 27 06:22:19 PM UTC 24 |
30515812 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.4096209865 |
|
|
Aug 27 06:21:20 PM UTC 24 |
Aug 27 06:22:19 PM UTC 24 |
4621315316 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode.2376767772 |
|
|
Aug 27 06:21:53 PM UTC 24 |
Aug 27 06:22:20 PM UTC 24 |
1153302060 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.3199940808 |
|
|
Aug 27 06:22:11 PM UTC 24 |
Aug 27 06:22:23 PM UTC 24 |
4686050837 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.2960149737 |
|
|
Aug 27 06:22:11 PM UTC 24 |
Aug 27 06:22:25 PM UTC 24 |
2438303618 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.1715692256 |
|
|
Aug 27 06:20:26 PM UTC 24 |
Aug 27 06:22:25 PM UTC 24 |
22835112461 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.1551222543 |
|
|
Aug 27 06:22:20 PM UTC 24 |
Aug 27 06:22:26 PM UTC 24 |
101382543 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.996822924 |
|
|
Aug 27 06:22:27 PM UTC 24 |
Aug 27 06:22:29 PM UTC 24 |
38152893 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.1350588130 |
|
|
Aug 27 06:16:12 PM UTC 24 |
Aug 27 06:22:31 PM UTC 24 |
43619835527 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.4102197928 |
|
|
Aug 27 06:22:18 PM UTC 24 |
Aug 27 06:22:31 PM UTC 24 |
1056296525 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.2800606101 |
|
|
Aug 27 06:22:12 PM UTC 24 |
Aug 27 06:22:31 PM UTC 24 |
16311846514 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.620121047 |
|
|
Aug 27 06:22:30 PM UTC 24 |
Aug 27 06:22:32 PM UTC 24 |
16562411 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.1278453381 |
|
|
Aug 27 06:21:40 PM UTC 24 |
Aug 27 06:22:34 PM UTC 24 |
94270997679 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.324530942 |
|
|
Aug 27 06:21:55 PM UTC 24 |
Aug 27 06:22:35 PM UTC 24 |
7186003709 ps |