| T611 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.1779365167 |
|
|
Aug 27 06:22:33 PM UTC 24 |
Aug 27 06:22:35 PM UTC 24 |
79276454 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.3447844655 |
|
|
Aug 27 06:19:45 PM UTC 24 |
Aug 27 06:22:35 PM UTC 24 |
42348265856 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.2535496093 |
|
|
Aug 27 06:22:33 PM UTC 24 |
Aug 27 06:22:35 PM UTC 24 |
30631332 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_stress_all.2845670018 |
|
|
Aug 27 06:22:01 PM UTC 24 |
Aug 27 06:22:37 PM UTC 24 |
5975556902 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.538340387 |
|
|
Aug 27 06:20:50 PM UTC 24 |
Aug 27 06:22:38 PM UTC 24 |
39250979582 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.20825349 |
|
|
Aug 27 06:22:35 PM UTC 24 |
Aug 27 06:22:39 PM UTC 24 |
248801289 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.3227052406 |
|
|
Aug 27 06:22:36 PM UTC 24 |
Aug 27 06:22:40 PM UTC 24 |
174509163 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.2310959933 |
|
|
Aug 27 06:22:36 PM UTC 24 |
Aug 27 06:22:40 PM UTC 24 |
140331467 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.1749077743 |
|
|
Aug 27 06:22:15 PM UTC 24 |
Aug 27 06:22:43 PM UTC 24 |
17929783787 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.606709376 |
|
|
Aug 27 06:19:18 PM UTC 24 |
Aug 27 06:22:44 PM UTC 24 |
23771366581 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.590929692 |
|
|
Aug 27 06:22:38 PM UTC 24 |
Aug 27 06:22:44 PM UTC 24 |
241033923 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.3641363356 |
|
|
Aug 27 06:22:33 PM UTC 24 |
Aug 27 06:22:45 PM UTC 24 |
2652797220 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.2270949149 |
|
|
Aug 27 06:22:36 PM UTC 24 |
Aug 27 06:22:46 PM UTC 24 |
1125615450 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.4108456153 |
|
|
Aug 27 06:21:20 PM UTC 24 |
Aug 27 06:22:47 PM UTC 24 |
45010104814 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.3673123379 |
|
|
Aug 27 06:22:42 PM UTC 24 |
Aug 27 06:22:47 PM UTC 24 |
209670833 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.241650751 |
|
|
Aug 27 06:22:46 PM UTC 24 |
Aug 27 06:22:49 PM UTC 24 |
17719511 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.4189847432 |
|
|
Aug 27 06:22:39 PM UTC 24 |
Aug 27 06:22:49 PM UTC 24 |
681849240 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.1056740634 |
|
|
Aug 27 06:22:46 PM UTC 24 |
Aug 27 06:22:49 PM UTC 24 |
34187401 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.1024738701 |
|
|
Aug 27 06:22:48 PM UTC 24 |
Aug 27 06:22:50 PM UTC 24 |
28307821 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.3083120119 |
|
|
Aug 27 06:15:53 PM UTC 24 |
Aug 27 06:22:50 PM UTC 24 |
55932299625 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.3961357453 |
|
|
Aug 27 06:22:51 PM UTC 24 |
Aug 27 06:22:53 PM UTC 24 |
28161384 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.2362450708 |
|
|
Aug 27 06:22:51 PM UTC 24 |
Aug 27 06:22:55 PM UTC 24 |
279482379 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.1510608779 |
|
|
Aug 27 06:22:51 PM UTC 24 |
Aug 27 06:22:56 PM UTC 24 |
626361954 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.3943086844 |
|
|
Aug 27 06:22:51 PM UTC 24 |
Aug 27 06:22:56 PM UTC 24 |
443898182 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.4245047406 |
|
|
Aug 27 06:22:39 PM UTC 24 |
Aug 27 06:22:57 PM UTC 24 |
1680519057 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.2613585487 |
|
|
Aug 27 06:20:40 PM UTC 24 |
Aug 27 06:22:59 PM UTC 24 |
13949073833 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.3716156482 |
|
|
Aug 27 06:22:52 PM UTC 24 |
Aug 27 06:23:04 PM UTC 24 |
1008600745 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.2562087464 |
|
|
Aug 27 06:22:45 PM UTC 24 |
Aug 27 06:23:06 PM UTC 24 |
636124432 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.3455764280 |
|
|
Aug 27 06:22:57 PM UTC 24 |
Aug 27 06:23:06 PM UTC 24 |
1841728293 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.2132712314 |
|
|
Aug 27 06:22:57 PM UTC 24 |
Aug 27 06:23:07 PM UTC 24 |
616405462 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.3246242389 |
|
|
Aug 27 06:19:26 PM UTC 24 |
Aug 27 06:23:09 PM UTC 24 |
109889583986 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2446928499 |
|
|
Aug 27 06:23:01 PM UTC 24 |
Aug 27 06:23:09 PM UTC 24 |
523433329 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.426919443 |
|
|
Aug 27 06:22:33 PM UTC 24 |
Aug 27 06:23:10 PM UTC 24 |
4728243720 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.159661827 |
|
|
Aug 27 06:23:10 PM UTC 24 |
Aug 27 06:23:12 PM UTC 24 |
36951822 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.2058185899 |
|
|
Aug 27 06:23:10 PM UTC 24 |
Aug 27 06:23:13 PM UTC 24 |
59729721 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.3712434882 |
|
|
Aug 27 06:23:14 PM UTC 24 |
Aug 27 06:23:16 PM UTC 24 |
25128612 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.1909852049 |
|
|
Aug 27 06:23:12 PM UTC 24 |
Aug 27 06:23:18 PM UTC 24 |
2623164966 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.1778025351 |
|
|
Aug 27 06:23:17 PM UTC 24 |
Aug 27 06:23:20 PM UTC 24 |
118428891 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.3332283994 |
|
|
Aug 27 06:23:14 PM UTC 24 |
Aug 27 06:23:23 PM UTC 24 |
688292244 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.937077113 |
|
|
Aug 27 06:22:42 PM UTC 24 |
Aug 27 06:23:23 PM UTC 24 |
2089821671 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.1514251604 |
|
|
Aug 27 06:22:49 PM UTC 24 |
Aug 27 06:23:23 PM UTC 24 |
18709800766 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.3399434847 |
|
|
Aug 27 06:23:21 PM UTC 24 |
Aug 27 06:23:25 PM UTC 24 |
136737516 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.926662198 |
|
|
Aug 27 06:16:45 PM UTC 24 |
Aug 27 06:23:26 PM UTC 24 |
104033761555 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.1347617435 |
|
|
Aug 27 06:23:23 PM UTC 24 |
Aug 27 06:23:28 PM UTC 24 |
333158666 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.739406091 |
|
|
Aug 27 06:22:54 PM UTC 24 |
Aug 27 06:23:30 PM UTC 24 |
14743428937 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.3617023331 |
|
|
Aug 27 06:13:47 PM UTC 24 |
Aug 27 06:23:31 PM UTC 24 |
241441364364 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.452699994 |
|
|
Aug 27 06:22:57 PM UTC 24 |
Aug 27 06:23:33 PM UTC 24 |
23317707869 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.2155560107 |
|
|
Aug 27 06:22:40 PM UTC 24 |
Aug 27 06:23:35 PM UTC 24 |
8384654349 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.1750106733 |
|
|
Aug 27 06:23:26 PM UTC 24 |
Aug 27 06:23:41 PM UTC 24 |
941054330 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.3845726941 |
|
|
Aug 27 06:23:28 PM UTC 24 |
Aug 27 06:23:43 PM UTC 24 |
798830255 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.3638028492 |
|
|
Aug 27 06:20:22 PM UTC 24 |
Aug 27 06:23:44 PM UTC 24 |
44642063705 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.3064793569 |
|
|
Aug 27 06:23:45 PM UTC 24 |
Aug 27 06:23:47 PM UTC 24 |
92489873 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.423068936 |
|
|
Aug 27 06:23:46 PM UTC 24 |
Aug 27 06:23:48 PM UTC 24 |
12780945 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.560572629 |
|
|
Aug 27 06:23:31 PM UTC 24 |
Aug 27 06:23:48 PM UTC 24 |
908730319 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.3340945519 |
|
|
Aug 27 06:20:26 PM UTC 24 |
Aug 27 06:23:48 PM UTC 24 |
78950856319 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.2156518418 |
|
|
Aug 27 06:23:05 PM UTC 24 |
Aug 27 06:23:48 PM UTC 24 |
2571580005 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.1635891379 |
|
|
Aug 27 06:23:25 PM UTC 24 |
Aug 27 06:23:50 PM UTC 24 |
3761911646 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.2004639300 |
|
|
Aug 27 06:23:19 PM UTC 24 |
Aug 27 06:23:51 PM UTC 24 |
7627413649 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.2554606431 |
|
|
Aug 27 06:23:50 PM UTC 24 |
Aug 27 06:23:52 PM UTC 24 |
16860064 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.4117010166 |
|
|
Aug 27 06:23:50 PM UTC 24 |
Aug 27 06:23:53 PM UTC 24 |
213836892 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.3408662352 |
|
|
Aug 27 06:23:32 PM UTC 24 |
Aug 27 06:23:54 PM UTC 24 |
9299277226 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.4094893379 |
|
|
Aug 27 06:23:50 PM UTC 24 |
Aug 27 06:23:55 PM UTC 24 |
255177936 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.2258737881 |
|
|
Aug 27 06:23:48 PM UTC 24 |
Aug 27 06:23:55 PM UTC 24 |
487059978 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.1816485827 |
|
|
Aug 27 06:22:21 PM UTC 24 |
Aug 27 06:24:01 PM UTC 24 |
12229276295 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.4146270296 |
|
|
Aug 27 06:18:52 PM UTC 24 |
Aug 27 06:24:02 PM UTC 24 |
113610710177 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.3085414119 |
|
|
Aug 27 06:23:53 PM UTC 24 |
Aug 27 06:24:07 PM UTC 24 |
5771318965 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3496943660 |
|
|
Aug 27 06:22:45 PM UTC 24 |
Aug 27 06:24:08 PM UTC 24 |
5451178783 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.2160655676 |
|
|
Aug 27 06:22:24 PM UTC 24 |
Aug 27 06:24:10 PM UTC 24 |
23165652965 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.131437316 |
|
|
Aug 27 06:23:54 PM UTC 24 |
Aug 27 06:24:10 PM UTC 24 |
22945368434 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.4199237291 |
|
|
Aug 27 06:23:56 PM UTC 24 |
Aug 27 06:24:12 PM UTC 24 |
2155623511 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.1682245024 |
|
|
Aug 27 06:23:51 PM UTC 24 |
Aug 27 06:24:13 PM UTC 24 |
73814400513 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.2087752164 |
|
|
Aug 27 06:24:11 PM UTC 24 |
Aug 27 06:24:13 PM UTC 24 |
46409824 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.763337690 |
|
|
Aug 27 06:24:11 PM UTC 24 |
Aug 27 06:24:13 PM UTC 24 |
96082941 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.2268560926 |
|
|
Aug 27 06:23:56 PM UTC 24 |
Aug 27 06:24:14 PM UTC 24 |
620679833 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_stress_all.2243648345 |
|
|
Aug 27 06:13:50 PM UTC 24 |
Aug 27 06:24:14 PM UTC 24 |
232663438963 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_stress_all.3655980874 |
|
|
Aug 27 06:23:09 PM UTC 24 |
Aug 27 06:24:15 PM UTC 24 |
2693332374 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_all.724943490 |
|
|
Aug 27 06:19:44 PM UTC 24 |
Aug 27 06:24:16 PM UTC 24 |
189114680493 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.2400859007 |
|
|
Aug 27 06:24:15 PM UTC 24 |
Aug 27 06:24:17 PM UTC 24 |
40783258 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.1384135071 |
|
|
Aug 27 06:24:02 PM UTC 24 |
Aug 27 06:24:18 PM UTC 24 |
1756853021 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.1604272088 |
|
|
Aug 27 06:24:13 PM UTC 24 |
Aug 27 06:24:19 PM UTC 24 |
933762256 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.2141196894 |
|
|
Aug 27 06:24:15 PM UTC 24 |
Aug 27 06:24:19 PM UTC 24 |
208119758 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.496332360 |
|
|
Aug 27 06:24:15 PM UTC 24 |
Aug 27 06:24:19 PM UTC 24 |
685175160 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.2029085424 |
|
|
Aug 27 06:24:17 PM UTC 24 |
Aug 27 06:24:21 PM UTC 24 |
32761458 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.3826186070 |
|
|
Aug 27 06:24:20 PM UTC 24 |
Aug 27 06:24:25 PM UTC 24 |
36889576 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.1653551455 |
|
|
Aug 27 06:24:21 PM UTC 24 |
Aug 27 06:24:27 PM UTC 24 |
438802149 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.2894156153 |
|
|
Aug 27 06:24:20 PM UTC 24 |
Aug 27 06:24:29 PM UTC 24 |
429273942 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.2079428101 |
|
|
Aug 27 06:23:50 PM UTC 24 |
Aug 27 06:24:35 PM UTC 24 |
31363812115 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.2086657424 |
|
|
Aug 27 06:23:57 PM UTC 24 |
Aug 27 06:24:37 PM UTC 24 |
15242120980 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.1737691539 |
|
|
Aug 27 06:24:18 PM UTC 24 |
Aug 27 06:24:38 PM UTC 24 |
20393277529 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.178949802 |
|
|
Aug 27 06:24:36 PM UTC 24 |
Aug 27 06:24:38 PM UTC 24 |
13019023 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.3566803713 |
|
|
Aug 27 06:24:38 PM UTC 24 |
Aug 27 06:24:41 PM UTC 24 |
14962704 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.754611657 |
|
|
Aug 27 06:24:42 PM UTC 24 |
Aug 27 06:24:45 PM UTC 24 |
168875493 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.1351814532 |
|
|
Aug 27 06:24:17 PM UTC 24 |
Aug 27 06:24:47 PM UTC 24 |
2115715267 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.3898419603 |
|
|
Aug 27 06:24:17 PM UTC 24 |
Aug 27 06:24:51 PM UTC 24 |
12679347744 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.2334984365 |
|
|
Aug 27 06:24:45 PM UTC 24 |
Aug 27 06:24:53 PM UTC 24 |
138717441 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.3265083968 |
|
|
Aug 27 06:22:20 PM UTC 24 |
Aug 27 06:24:57 PM UTC 24 |
80053720757 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.279698634 |
|
|
Aug 27 06:23:08 PM UTC 24 |
Aug 27 06:24:59 PM UTC 24 |
101670889280 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.1217866376 |
|
|
Aug 27 06:24:54 PM UTC 24 |
Aug 27 06:25:01 PM UTC 24 |
1718395317 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.1609459815 |
|
|
Aug 27 06:24:40 PM UTC 24 |
Aug 27 06:25:02 PM UTC 24 |
17212047445 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.1908373625 |
|
|
Aug 27 06:25:03 PM UTC 24 |
Aug 27 06:25:06 PM UTC 24 |
43686673 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.3247560096 |
|
|
Aug 27 06:24:40 PM UTC 24 |
Aug 27 06:25:08 PM UTC 24 |
2094395329 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.856740079 |
|
|
Aug 27 06:25:02 PM UTC 24 |
Aug 27 06:25:09 PM UTC 24 |
1522348212 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.2900884219 |
|
|
Aug 27 06:24:52 PM UTC 24 |
Aug 27 06:25:09 PM UTC 24 |
2767042313 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.1021474967 |
|
|
Aug 27 06:24:15 PM UTC 24 |
Aug 27 06:25:13 PM UTC 24 |
28363954297 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.3477833269 |
|
|
Aug 27 06:24:58 PM UTC 24 |
Aug 27 06:25:18 PM UTC 24 |
2674518614 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_all.2337641631 |
|
|
Aug 27 06:24:22 PM UTC 24 |
Aug 27 06:25:18 PM UTC 24 |
22798768215 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.3546155353 |
|
|
Aug 27 06:20:08 PM UTC 24 |
Aug 27 06:25:19 PM UTC 24 |
32941938364 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.3670447147 |
|
|
Aug 27 06:25:20 PM UTC 24 |
Aug 27 06:25:22 PM UTC 24 |
40644752 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.932753409 |
|
|
Aug 27 06:24:49 PM UTC 24 |
Aug 27 06:25:22 PM UTC 24 |
4367201188 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.4221466596 |
|
|
Aug 27 06:25:20 PM UTC 24 |
Aug 27 06:25:22 PM UTC 24 |
59693732 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.2700193254 |
|
|
Aug 27 06:22:27 PM UTC 24 |
Aug 27 06:25:23 PM UTC 24 |
70647623711 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.2223223596 |
|
|
Aug 27 06:25:00 PM UTC 24 |
Aug 27 06:25:24 PM UTC 24 |
1553378098 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.1539159825 |
|
|
Aug 27 06:25:07 PM UTC 24 |
Aug 27 06:25:24 PM UTC 24 |
2299982216 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.2571005522 |
|
|
Aug 27 06:25:23 PM UTC 24 |
Aug 27 06:25:26 PM UTC 24 |
37922610 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.1509779688 |
|
|
Aug 27 06:25:23 PM UTC 24 |
Aug 27 06:25:26 PM UTC 24 |
239380945 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_stress_all.2259458127 |
|
|
Aug 27 06:24:09 PM UTC 24 |
Aug 27 06:25:27 PM UTC 24 |
8237559079 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.1046980080 |
|
|
Aug 27 06:25:11 PM UTC 24 |
Aug 27 06:25:28 PM UTC 24 |
1872057678 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_stress_all.376748866 |
|
|
Aug 27 06:13:02 PM UTC 24 |
Aug 27 06:25:31 PM UTC 24 |
169623368578 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.1487119937 |
|
|
Aug 27 06:18:50 PM UTC 24 |
Aug 27 06:25:32 PM UTC 24 |
43026494358 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.2805921667 |
|
|
Aug 27 06:25:28 PM UTC 24 |
Aug 27 06:25:32 PM UTC 24 |
370519572 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.828507715 |
|
|
Aug 27 06:25:23 PM UTC 24 |
Aug 27 06:25:33 PM UTC 24 |
1168848343 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_stress_all.2740530038 |
|
|
Aug 27 06:20:55 PM UTC 24 |
Aug 27 06:25:33 PM UTC 24 |
43232013985 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.3752829759 |
|
|
Aug 27 06:25:11 PM UTC 24 |
Aug 27 06:25:34 PM UTC 24 |
2951275479 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.642080705 |
|
|
Aug 27 06:25:20 PM UTC 24 |
Aug 27 06:25:35 PM UTC 24 |
93373188126 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.642991845 |
|
|
Aug 27 06:17:29 PM UTC 24 |
Aug 27 06:25:36 PM UTC 24 |
59271723907 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.4079271084 |
|
|
Aug 27 06:25:25 PM UTC 24 |
Aug 27 06:25:38 PM UTC 24 |
5373535321 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.3770630133 |
|
|
Aug 27 06:25:36 PM UTC 24 |
Aug 27 06:25:38 PM UTC 24 |
21293439 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.1238844029 |
|
|
Aug 27 06:25:33 PM UTC 24 |
Aug 27 06:25:39 PM UTC 24 |
624411379 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.1030968404 |
|
|
Aug 27 06:25:38 PM UTC 24 |
Aug 27 06:25:40 PM UTC 24 |
22364007 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.3344731191 |
|
|
Aug 27 06:24:54 PM UTC 24 |
Aug 27 06:25:40 PM UTC 24 |
33315925782 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.1905332995 |
|
|
Aug 27 06:21:29 PM UTC 24 |
Aug 27 06:25:41 PM UTC 24 |
29631241456 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.1565889999 |
|
|
Aug 27 06:25:28 PM UTC 24 |
Aug 27 06:25:41 PM UTC 24 |
3531104643 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3414178138 |
|
|
Aug 27 06:25:40 PM UTC 24 |
Aug 27 06:25:42 PM UTC 24 |
285734959 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_all.2757236892 |
|
|
Aug 27 06:20:40 PM UTC 24 |
Aug 27 06:25:43 PM UTC 24 |
42668205493 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.1250077285 |
|
|
Aug 27 06:25:41 PM UTC 24 |
Aug 27 06:25:45 PM UTC 24 |
392990823 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.675089036 |
|
|
Aug 27 06:23:06 PM UTC 24 |
Aug 27 06:25:46 PM UTC 24 |
46012801814 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.1588536108 |
|
|
Aug 27 06:22:45 PM UTC 24 |
Aug 27 06:25:46 PM UTC 24 |
51313547737 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.3675708624 |
|
|
Aug 27 06:25:40 PM UTC 24 |
Aug 27 06:25:48 PM UTC 24 |
1647910050 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.2568190184 |
|
|
Aug 27 06:25:27 PM UTC 24 |
Aug 27 06:25:48 PM UTC 24 |
1769969532 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.1540954095 |
|
|
Aug 27 06:25:25 PM UTC 24 |
Aug 27 06:25:50 PM UTC 24 |
8968460974 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.709422949 |
|
|
Aug 27 06:25:46 PM UTC 24 |
Aug 27 06:25:52 PM UTC 24 |
1125720099 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.2305896807 |
|
|
Aug 27 06:25:43 PM UTC 24 |
Aug 27 06:25:53 PM UTC 24 |
705739470 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2994829366 |
|
|
Aug 27 06:25:43 PM UTC 24 |
Aug 27 06:25:54 PM UTC 24 |
1138081472 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.1427619794 |
|
|
Aug 27 06:25:50 PM UTC 24 |
Aug 27 06:25:57 PM UTC 24 |
264767574 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.214985601 |
|
|
Aug 27 06:25:55 PM UTC 24 |
Aug 27 06:25:57 PM UTC 24 |
18009455 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.1673379189 |
|
|
Aug 27 06:25:27 PM UTC 24 |
Aug 27 06:25:57 PM UTC 24 |
44193016628 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_stress_all.2461572424 |
|
|
Aug 27 06:25:55 PM UTC 24 |
Aug 27 06:25:57 PM UTC 24 |
59842991 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.4286711108 |
|
|
Aug 27 06:25:43 PM UTC 24 |
Aug 27 06:25:59 PM UTC 24 |
1936532373 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.3372789796 |
|
|
Aug 27 06:23:34 PM UTC 24 |
Aug 27 06:25:59 PM UTC 24 |
11643388427 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.908744277 |
|
|
Aug 27 06:25:25 PM UTC 24 |
Aug 27 06:26:00 PM UTC 24 |
45272659218 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.1055132777 |
|
|
Aug 27 06:23:53 PM UTC 24 |
Aug 27 06:26:00 PM UTC 24 |
66336339277 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.1772988339 |
|
|
Aug 27 06:25:59 PM UTC 24 |
Aug 27 06:26:01 PM UTC 24 |
128547377 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.4198746776 |
|
|
Aug 27 06:25:59 PM UTC 24 |
Aug 27 06:26:01 PM UTC 24 |
20521526 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.2122260694 |
|
|
Aug 27 06:26:27 PM UTC 24 |
Aug 27 06:26:29 PM UTC 24 |
115081817 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_stress_all.2743622243 |
|
|
Aug 27 06:25:14 PM UTC 24 |
Aug 27 06:26:03 PM UTC 24 |
5581908338 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.3532715683 |
|
|
Aug 27 06:25:44 PM UTC 24 |
Aug 27 06:26:03 PM UTC 24 |
3101077848 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.1407380474 |
|
|
Aug 27 06:25:59 PM UTC 24 |
Aug 27 06:26:03 PM UTC 24 |
649540835 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.1861691829 |
|
|
Aug 27 06:25:41 PM UTC 24 |
Aug 27 06:26:03 PM UTC 24 |
4135921699 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.2770603430 |
|
|
Aug 27 06:26:01 PM UTC 24 |
Aug 27 06:26:04 PM UTC 24 |
53875933 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.1007086917 |
|
|
Aug 27 06:25:40 PM UTC 24 |
Aug 27 06:26:05 PM UTC 24 |
3951688058 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.2976651631 |
|
|
Aug 27 06:26:01 PM UTC 24 |
Aug 27 06:26:06 PM UTC 24 |
2320400857 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.2054703537 |
|
|
Aug 27 06:24:25 PM UTC 24 |
Aug 27 06:26:07 PM UTC 24 |
3005439985 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.2919719218 |
|
|
Aug 27 06:22:27 PM UTC 24 |
Aug 27 06:26:07 PM UTC 24 |
123101493863 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.211935102 |
|
|
Aug 27 06:25:09 PM UTC 24 |
Aug 27 06:26:07 PM UTC 24 |
2541771958 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.976429349 |
|
|
Aug 27 06:26:01 PM UTC 24 |
Aug 27 06:26:07 PM UTC 24 |
1156600032 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.1946855006 |
|
|
Aug 27 06:26:05 PM UTC 24 |
Aug 27 06:26:08 PM UTC 24 |
309173196 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.1524087324 |
|
|
Aug 27 06:25:47 PM UTC 24 |
Aug 27 06:26:08 PM UTC 24 |
5529428991 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.4239114308 |
|
|
Aug 27 06:23:25 PM UTC 24 |
Aug 27 06:26:09 PM UTC 24 |
71511332477 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.1167796383 |
|
|
Aug 27 06:26:01 PM UTC 24 |
Aug 27 06:26:09 PM UTC 24 |
22944959357 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.1356463621 |
|
|
Aug 27 06:24:29 PM UTC 24 |
Aug 27 06:26:10 PM UTC 24 |
4190675283 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.3197045007 |
|
|
Aug 27 06:26:08 PM UTC 24 |
Aug 27 06:26:10 PM UTC 24 |
108936960 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.2319537859 |
|
|
Aug 27 06:17:08 PM UTC 24 |
Aug 27 06:26:12 PM UTC 24 |
59372135002 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.2719399069 |
|
|
Aug 27 06:25:59 PM UTC 24 |
Aug 27 06:26:13 PM UTC 24 |
2251066453 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.4183555803 |
|
|
Aug 27 06:26:11 PM UTC 24 |
Aug 27 06:26:28 PM UTC 24 |
10573853921 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.1280329835 |
|
|
Aug 27 06:26:11 PM UTC 24 |
Aug 27 06:26:13 PM UTC 24 |
19218932 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.2090812584 |
|
|
Aug 27 06:26:11 PM UTC 24 |
Aug 27 06:26:13 PM UTC 24 |
98472850 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.3364188789 |
|
|
Aug 27 06:26:05 PM UTC 24 |
Aug 27 06:26:14 PM UTC 24 |
1186162129 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.174918356 |
|
|
Aug 27 06:26:11 PM UTC 24 |
Aug 27 06:26:14 PM UTC 24 |
204886036 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.1396794402 |
|
|
Aug 27 06:26:02 PM UTC 24 |
Aug 27 06:26:15 PM UTC 24 |
2607032035 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.370800976 |
|
|
Aug 27 06:26:14 PM UTC 24 |
Aug 27 06:26:19 PM UTC 24 |
1004795794 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_stress_all.2522777300 |
|
|
Aug 27 06:24:30 PM UTC 24 |
Aug 27 06:26:19 PM UTC 24 |
68739404683 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.212815978 |
|
|
Aug 27 06:26:02 PM UTC 24 |
Aug 27 06:26:21 PM UTC 24 |
1535586944 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.1285799609 |
|
|
Aug 27 06:17:33 PM UTC 24 |
Aug 27 06:26:22 PM UTC 24 |
215488745928 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.392754717 |
|
|
Aug 27 06:26:15 PM UTC 24 |
Aug 27 06:26:22 PM UTC 24 |
244330499 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.1895676833 |
|
|
Aug 27 06:26:16 PM UTC 24 |
Aug 27 06:26:22 PM UTC 24 |
173120446 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_and_tpm_min_idle.2326141962 |
|
|
Aug 27 06:26:21 PM UTC 24 |
Aug 27 06:26:23 PM UTC 24 |
18980221 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.2030766585 |
|
|
Aug 27 06:26:11 PM UTC 24 |
Aug 27 06:26:24 PM UTC 24 |
33133579332 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.2960482146 |
|
|
Aug 27 06:26:24 PM UTC 24 |
Aug 27 06:26:26 PM UTC 24 |
13340371 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.380475650 |
|
|
Aug 27 06:26:24 PM UTC 24 |
Aug 27 06:26:26 PM UTC 24 |
34006293 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.2021934524 |
|
|
Aug 27 06:26:25 PM UTC 24 |
Aug 27 06:26:27 PM UTC 24 |
28129217 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_all.1581412900 |
|
|
Aug 27 06:25:50 PM UTC 24 |
Aug 27 06:26:29 PM UTC 24 |
3064466885 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.2282945151 |
|
|
Aug 27 06:26:05 PM UTC 24 |
Aug 27 06:26:29 PM UTC 24 |
4692524969 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.4132169100 |
|
|
Aug 27 06:26:11 PM UTC 24 |
Aug 27 06:26:30 PM UTC 24 |
3642952501 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.1096979050 |
|
|
Aug 27 06:26:27 PM UTC 24 |
Aug 27 06:26:30 PM UTC 24 |
36012416 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.578503535 |
|
|
Aug 27 06:21:27 PM UTC 24 |
Aug 27 06:26:32 PM UTC 24 |
71889980587 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.2067392226 |
|
|
Aug 27 06:26:24 PM UTC 24 |
Aug 27 06:26:33 PM UTC 24 |
13274325380 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_all.3461017528 |
|
|
Aug 27 06:25:33 PM UTC 24 |
Aug 27 06:26:33 PM UTC 24 |
5190729547 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.2048836276 |
|
|
Aug 27 06:26:12 PM UTC 24 |
Aug 27 06:26:34 PM UTC 24 |
4014762471 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.1089696751 |
|
|
Aug 27 06:26:31 PM UTC 24 |
Aug 27 06:26:36 PM UTC 24 |
152568610 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.291082358 |
|
|
Aug 27 06:26:30 PM UTC 24 |
Aug 27 06:26:37 PM UTC 24 |
1225147290 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.3196816610 |
|
|
Aug 27 06:25:35 PM UTC 24 |
Aug 27 06:26:39 PM UTC 24 |
9321726046 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.3510327483 |
|
|
Aug 27 06:26:14 PM UTC 24 |
Aug 27 06:26:39 PM UTC 24 |
8957748926 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.1948745126 |
|
|
Aug 27 06:26:14 PM UTC 24 |
Aug 27 06:26:40 PM UTC 24 |
33580168373 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.646856782 |
|
|
Aug 27 06:26:38 PM UTC 24 |
Aug 27 06:26:40 PM UTC 24 |
27639902 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.82791752 |
|
|
Aug 27 06:23:36 PM UTC 24 |
Aug 27 06:26:41 PM UTC 24 |
68865288594 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.2598479062 |
|
|
Aug 27 06:26:40 PM UTC 24 |
Aug 27 06:26:42 PM UTC 24 |
99111879 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.1866286939 |
|
|
Aug 27 06:26:41 PM UTC 24 |
Aug 27 06:26:44 PM UTC 24 |
100159733 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.506151073 |
|
|
Aug 27 06:26:43 PM UTC 24 |
Aug 27 06:26:45 PM UTC 24 |
73189731 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode_ignore_cmds.2629469220 |
|
|
Aug 27 06:26:15 PM UTC 24 |
Aug 27 06:26:45 PM UTC 24 |
1093903106 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.961753070 |
|
|
Aug 27 06:26:40 PM UTC 24 |
Aug 27 06:26:46 PM UTC 24 |
982675600 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.1519023820 |
|
|
Aug 27 06:26:33 PM UTC 24 |
Aug 27 06:26:48 PM UTC 24 |
1399505950 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.3682444302 |
|
|
Aug 27 06:25:48 PM UTC 24 |
Aug 27 06:26:48 PM UTC 24 |
16545581222 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_all.3848002717 |
|
|
Aug 27 06:26:05 PM UTC 24 |
Aug 27 06:26:50 PM UTC 24 |
3624126052 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.3376921448 |
|
|
Aug 27 06:24:03 PM UTC 24 |
Aug 27 06:26:50 PM UTC 24 |
87432648796 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.2961719720 |
|
|
Aug 27 06:26:11 PM UTC 24 |
Aug 27 06:26:51 PM UTC 24 |
5055816980 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_and_tpm.1286477387 |
|
|
Aug 27 06:26:19 PM UTC 24 |
Aug 27 06:26:52 PM UTC 24 |
18920581484 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.3230532018 |
|
|
Aug 27 06:26:43 PM UTC 24 |
Aug 27 06:26:52 PM UTC 24 |
317664922 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.1427377828 |
|
|
Aug 27 06:26:30 PM UTC 24 |
Aug 27 06:26:53 PM UTC 24 |
2274840262 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.1448688288 |
|
|
Aug 27 06:26:46 PM UTC 24 |
Aug 27 06:26:54 PM UTC 24 |
658382488 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.3988776605 |
|
|
Aug 27 06:26:49 PM UTC 24 |
Aug 27 06:26:54 PM UTC 24 |
103437447 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.3469188025 |
|
|
Aug 27 06:25:51 PM UTC 24 |
Aug 27 06:26:56 PM UTC 24 |
8666379125 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.422052964 |
|
|
Aug 27 06:26:55 PM UTC 24 |
Aug 27 06:26:57 PM UTC 24 |
82312554 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.717895044 |
|
|
Aug 27 06:26:55 PM UTC 24 |
Aug 27 06:26:57 PM UTC 24 |
16817441 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.3475471660 |
|
|
Aug 27 06:26:45 PM UTC 24 |
Aug 27 06:26:57 PM UTC 24 |
15790690126 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.1874076331 |
|
|
Aug 27 06:26:25 PM UTC 24 |
Aug 27 06:26:58 PM UTC 24 |
11649046837 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.220160955 |
|
|
Aug 27 06:16:15 PM UTC 24 |
Aug 27 06:26:59 PM UTC 24 |
336297421369 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.151889233 |
|
|
Aug 27 06:26:58 PM UTC 24 |
Aug 27 06:27:00 PM UTC 24 |
51212321 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.1026350819 |
|
|
Aug 27 06:26:31 PM UTC 24 |
Aug 27 06:27:00 PM UTC 24 |
7739383858 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.1471268764 |
|
|
Aug 27 06:26:52 PM UTC 24 |
Aug 27 06:27:00 PM UTC 24 |
2420745116 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.728491138 |
|
|
Aug 27 06:26:57 PM UTC 24 |
Aug 27 06:27:02 PM UTC 24 |
868197776 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.2882598809 |
|
|
Aug 27 06:26:48 PM UTC 24 |
Aug 27 06:27:02 PM UTC 24 |
10214239721 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_all.2254184910 |
|
|
Aug 27 06:26:58 PM UTC 24 |
Aug 27 06:27:02 PM UTC 24 |
465797975 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.847182788 |
|
|
Aug 27 06:27:00 PM UTC 24 |
Aug 27 06:27:03 PM UTC 24 |
157776597 ps |
| T38 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.2900460099 |
|
|
Aug 27 06:15:29 PM UTC 24 |
Aug 27 06:27:03 PM UTC 24 |
305138942511 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.2930490799 |
|
|
Aug 27 06:26:28 PM UTC 24 |
Aug 27 06:27:03 PM UTC 24 |
6906881860 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.380055987 |
|
|
Aug 27 06:26:49 PM UTC 24 |
Aug 27 06:27:04 PM UTC 24 |
990131017 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_stress_all.3840471002 |
|
|
Aug 27 06:23:42 PM UTC 24 |
Aug 27 06:27:04 PM UTC 24 |
9353830175 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.482245586 |
|
|
Aug 27 06:26:30 PM UTC 24 |
Aug 27 06:27:06 PM UTC 24 |
3169524811 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.1231105614 |
|
|
Aug 27 06:27:01 PM UTC 24 |
Aug 27 06:27:06 PM UTC 24 |
344163014 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_stress_all.482274693 |
|
|
Aug 27 06:27:06 PM UTC 24 |
Aug 27 06:27:08 PM UTC 24 |
49358833 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.1673286619 |
|
|
Aug 27 06:27:08 PM UTC 24 |
Aug 27 06:27:10 PM UTC 24 |
35626460 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.1963784409 |
|
|
Aug 27 06:27:08 PM UTC 24 |
Aug 27 06:27:10 PM UTC 24 |
50796849 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.394488804 |
|
|
Aug 27 06:27:00 PM UTC 24 |
Aug 27 06:27:10 PM UTC 24 |
6895146081 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.175082701 |
|
|
Aug 27 06:26:41 PM UTC 24 |
Aug 27 06:27:11 PM UTC 24 |
62071045100 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.2832483711 |
|
|
Aug 27 06:27:03 PM UTC 24 |
Aug 27 06:27:11 PM UTC 24 |
233737071 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.2872103367 |
|
|
Aug 27 06:27:08 PM UTC 24 |
Aug 27 06:27:12 PM UTC 24 |
414313719 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.2874330862 |
|
|
Aug 27 06:27:11 PM UTC 24 |
Aug 27 06:27:13 PM UTC 24 |
33551766 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.2065025443 |
|
|
Aug 27 06:27:11 PM UTC 24 |
Aug 27 06:27:13 PM UTC 24 |
22090235 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.2035770096 |
|
|
Aug 27 06:27:02 PM UTC 24 |
Aug 27 06:27:13 PM UTC 24 |
25873543441 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.16463717 |
|
|
Aug 27 06:25:53 PM UTC 24 |
Aug 27 06:27:14 PM UTC 24 |
4779683278 ps |