| T624 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.3722030679 |
|
|
Sep 01 02:58:40 PM UTC 24 |
Sep 01 02:58:44 PM UTC 24 |
77897499 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.236882381 |
|
|
Sep 01 02:58:38 PM UTC 24 |
Sep 01 02:58:44 PM UTC 24 |
440039427 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.2641661796 |
|
|
Sep 01 02:57:59 PM UTC 24 |
Sep 01 02:58:46 PM UTC 24 |
14286670438 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.1162955771 |
|
|
Sep 01 02:58:31 PM UTC 24 |
Sep 01 02:58:47 PM UTC 24 |
1467746462 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.3513697336 |
|
|
Sep 01 02:57:23 PM UTC 24 |
Sep 01 02:58:49 PM UTC 24 |
3914203005 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.3946045880 |
|
|
Sep 01 02:58:41 PM UTC 24 |
Sep 01 02:58:50 PM UTC 24 |
270163025 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.923300294 |
|
|
Sep 01 02:58:45 PM UTC 24 |
Sep 01 02:58:50 PM UTC 24 |
134186834 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.1154866342 |
|
|
Sep 01 02:53:41 PM UTC 24 |
Sep 01 02:58:54 PM UTC 24 |
120690002834 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.4288866574 |
|
|
Sep 01 02:58:51 PM UTC 24 |
Sep 01 02:58:54 PM UTC 24 |
111997430 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.1322243702 |
|
|
Sep 01 02:57:08 PM UTC 24 |
Sep 01 02:58:55 PM UTC 24 |
27937012620 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.1767980174 |
|
|
Sep 01 02:58:55 PM UTC 24 |
Sep 01 02:58:57 PM UTC 24 |
13677920 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.3255833547 |
|
|
Sep 01 02:58:55 PM UTC 24 |
Sep 01 02:58:57 PM UTC 24 |
75385565 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.935794865 |
|
|
Sep 01 02:58:26 PM UTC 24 |
Sep 01 02:59:00 PM UTC 24 |
4901493335 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.1227996385 |
|
|
Sep 01 02:58:38 PM UTC 24 |
Sep 01 02:59:00 PM UTC 24 |
26176453506 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.791471562 |
|
|
Sep 01 02:58:58 PM UTC 24 |
Sep 01 02:59:00 PM UTC 24 |
133092484 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.851925575 |
|
|
Sep 01 02:58:40 PM UTC 24 |
Sep 01 02:59:02 PM UTC 24 |
1369871334 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.1169507142 |
|
|
Sep 01 02:59:00 PM UTC 24 |
Sep 01 02:59:03 PM UTC 24 |
105499219 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.887873996 |
|
|
Sep 01 02:58:18 PM UTC 24 |
Sep 01 02:59:04 PM UTC 24 |
9466996224 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.2311624885 |
|
|
Sep 01 02:58:58 PM UTC 24 |
Sep 01 02:59:09 PM UTC 24 |
3712909905 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.1488048486 |
|
|
Sep 01 02:59:03 PM UTC 24 |
Sep 01 02:59:10 PM UTC 24 |
287357733 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.137797267 |
|
|
Sep 01 02:58:21 PM UTC 24 |
Sep 01 02:59:11 PM UTC 24 |
32374336755 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.55818520 |
|
|
Sep 01 02:58:57 PM UTC 24 |
Sep 01 02:59:12 PM UTC 24 |
5137545771 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.3915419896 |
|
|
Sep 01 02:55:32 PM UTC 24 |
Sep 01 02:59:14 PM UTC 24 |
69580898000 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.1491047300 |
|
|
Sep 01 02:58:48 PM UTC 24 |
Sep 01 02:59:14 PM UTC 24 |
8167879344 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.561612610 |
|
|
Sep 01 02:59:04 PM UTC 24 |
Sep 01 02:59:15 PM UTC 24 |
984881960 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.4166518968 |
|
|
Sep 01 02:59:05 PM UTC 24 |
Sep 01 02:59:17 PM UTC 24 |
2183485020 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.640995679 |
|
|
Sep 01 02:57:05 PM UTC 24 |
Sep 01 02:59:17 PM UTC 24 |
13480736181 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.2398732625 |
|
|
Sep 01 02:59:10 PM UTC 24 |
Sep 01 02:59:18 PM UTC 24 |
385714078 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.2243670298 |
|
|
Sep 01 02:59:02 PM UTC 24 |
Sep 01 02:59:18 PM UTC 24 |
1503670967 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.3439659948 |
|
|
Sep 01 02:57:16 PM UTC 24 |
Sep 01 02:59:19 PM UTC 24 |
10900387580 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.510853092 |
|
|
Sep 01 02:59:18 PM UTC 24 |
Sep 01 02:59:20 PM UTC 24 |
50345048 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.2267614389 |
|
|
Sep 01 02:59:18 PM UTC 24 |
Sep 01 02:59:20 PM UTC 24 |
41021282 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.2541756123 |
|
|
Sep 01 02:59:20 PM UTC 24 |
Sep 01 02:59:22 PM UTC 24 |
22072106 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.1366827247 |
|
|
Sep 01 02:59:20 PM UTC 24 |
Sep 01 02:59:24 PM UTC 24 |
178109421 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.2394189085 |
|
|
Sep 01 02:59:19 PM UTC 24 |
Sep 01 02:59:27 PM UTC 24 |
242562167 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.3564666604 |
|
|
Sep 01 02:58:08 PM UTC 24 |
Sep 01 02:59:28 PM UTC 24 |
10900445629 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.1594258227 |
|
|
Sep 01 02:59:04 PM UTC 24 |
Sep 01 02:59:29 PM UTC 24 |
30746777621 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.246436649 |
|
|
Sep 01 02:59:25 PM UTC 24 |
Sep 01 02:59:30 PM UTC 24 |
134505190 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.2344655334 |
|
|
Sep 01 02:59:59 PM UTC 24 |
Sep 01 03:01:05 PM UTC 24 |
3763061501 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.2787828966 |
|
|
Sep 01 02:59:24 PM UTC 24 |
Sep 01 02:59:31 PM UTC 24 |
1010608403 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.2355411352 |
|
|
Sep 01 02:59:28 PM UTC 24 |
Sep 01 02:59:32 PM UTC 24 |
30730331 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.3847023164 |
|
|
Sep 01 02:59:13 PM UTC 24 |
Sep 01 02:59:34 PM UTC 24 |
1437883949 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.819534926 |
|
|
Sep 01 02:59:33 PM UTC 24 |
Sep 01 02:59:35 PM UTC 24 |
25788605 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.4089285613 |
|
|
Sep 01 02:59:19 PM UTC 24 |
Sep 01 02:59:35 PM UTC 24 |
1283993233 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.208237381 |
|
|
Sep 01 02:55:07 PM UTC 24 |
Sep 01 02:59:36 PM UTC 24 |
263576651759 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.1299939102 |
|
|
Sep 01 02:58:33 PM UTC 24 |
Sep 01 02:59:36 PM UTC 24 |
12328043488 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.3657322193 |
|
|
Sep 01 02:59:30 PM UTC 24 |
Sep 01 02:59:39 PM UTC 24 |
307936545 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.2752889186 |
|
|
Sep 01 02:59:02 PM UTC 24 |
Sep 01 02:59:39 PM UTC 24 |
28592134876 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.2797216310 |
|
|
Sep 01 02:59:37 PM UTC 24 |
Sep 01 02:59:39 PM UTC 24 |
15714754 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.3093847684 |
|
|
Sep 01 02:59:40 PM UTC 24 |
Sep 01 02:59:42 PM UTC 24 |
35922810 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.1685754966 |
|
|
Sep 01 02:59:30 PM UTC 24 |
Sep 01 02:59:43 PM UTC 24 |
1583687305 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.149224266 |
|
|
Sep 01 02:59:29 PM UTC 24 |
Sep 01 02:59:45 PM UTC 24 |
6094173513 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.2210949369 |
|
|
Sep 01 02:59:43 PM UTC 24 |
Sep 01 02:59:46 PM UTC 24 |
145363627 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.1089969399 |
|
|
Sep 01 02:59:41 PM UTC 24 |
Sep 01 02:59:46 PM UTC 24 |
4247822707 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.1244761363 |
|
|
Sep 01 02:59:44 PM UTC 24 |
Sep 01 02:59:46 PM UTC 24 |
69037475 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.2335709865 |
|
|
Sep 01 02:59:33 PM UTC 24 |
Sep 01 02:59:47 PM UTC 24 |
933777794 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.52440156 |
|
|
Sep 01 02:58:18 PM UTC 24 |
Sep 01 02:59:48 PM UTC 24 |
34069742442 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.2113441849 |
|
|
Sep 01 02:59:47 PM UTC 24 |
Sep 01 02:59:51 PM UTC 24 |
438276915 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.3218311932 |
|
|
Sep 01 02:59:48 PM UTC 24 |
Sep 01 02:59:52 PM UTC 24 |
210967382 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.2264721543 |
|
|
Sep 01 02:59:53 PM UTC 24 |
Sep 01 02:59:56 PM UTC 24 |
104142800 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.1082066616 |
|
|
Sep 01 02:59:41 PM UTC 24 |
Sep 01 02:59:56 PM UTC 24 |
3456434817 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.1752584238 |
|
|
Sep 01 02:59:52 PM UTC 24 |
Sep 01 02:59:58 PM UTC 24 |
92758863 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.3740324144 |
|
|
Sep 01 02:58:06 PM UTC 24 |
Sep 01 02:59:58 PM UTC 24 |
97668780234 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.1460208169 |
|
|
Sep 01 02:57:47 PM UTC 24 |
Sep 01 02:59:59 PM UTC 24 |
4176537764 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.584582543 |
|
|
Sep 01 02:58:26 PM UTC 24 |
Sep 01 02:59:59 PM UTC 24 |
25234368516 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_stress_all.1055994020 |
|
|
Sep 01 02:48:26 PM UTC 24 |
Sep 01 03:00:00 PM UTC 24 |
237806064447 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.3654512050 |
|
|
Sep 01 02:59:57 PM UTC 24 |
Sep 01 03:00:02 PM UTC 24 |
157735187 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.953030173 |
|
|
Sep 01 03:00:00 PM UTC 24 |
Sep 01 03:00:03 PM UTC 24 |
11313041 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.3853071662 |
|
|
Sep 01 02:59:20 PM UTC 24 |
Sep 01 03:00:06 PM UTC 24 |
29406263494 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.3881916632 |
|
|
Sep 01 02:59:47 PM UTC 24 |
Sep 01 03:00:06 PM UTC 24 |
5723822070 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.2313229638 |
|
|
Sep 01 02:57:08 PM UTC 24 |
Sep 01 03:00:07 PM UTC 24 |
41713608774 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.2696315472 |
|
|
Sep 01 03:00:02 PM UTC 24 |
Sep 01 03:00:07 PM UTC 24 |
41575647 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.2042821987 |
|
|
Sep 01 03:00:08 PM UTC 24 |
Sep 01 03:00:10 PM UTC 24 |
109421948 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.2189396964 |
|
|
Sep 01 03:00:08 PM UTC 24 |
Sep 01 03:00:10 PM UTC 24 |
27311267 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.35517350 |
|
|
Sep 01 02:59:47 PM UTC 24 |
Sep 01 03:00:11 PM UTC 24 |
1827564114 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.704301807 |
|
|
Sep 01 03:00:56 PM UTC 24 |
Sep 01 03:01:04 PM UTC 24 |
173057243 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.4251720469 |
|
|
Sep 01 03:00:03 PM UTC 24 |
Sep 01 03:00:15 PM UTC 24 |
1349788756 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_mode_ignore_cmds.2385789804 |
|
|
Sep 01 02:50:28 PM UTC 24 |
Sep 01 03:00:15 PM UTC 24 |
61430635653 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.552463426 |
|
|
Sep 01 03:00:08 PM UTC 24 |
Sep 01 03:00:16 PM UTC 24 |
1572830094 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.2934391826 |
|
|
Sep 01 02:59:48 PM UTC 24 |
Sep 01 03:00:17 PM UTC 24 |
1973036138 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.998905563 |
|
|
Sep 01 02:54:06 PM UTC 24 |
Sep 01 03:00:18 PM UTC 24 |
90423346005 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.143055229 |
|
|
Sep 01 02:59:49 PM UTC 24 |
Sep 01 03:00:21 PM UTC 24 |
1803155146 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.4205774961 |
|
|
Sep 01 03:00:16 PM UTC 24 |
Sep 01 03:00:21 PM UTC 24 |
46904736 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.1550251274 |
|
|
Sep 01 03:00:09 PM UTC 24 |
Sep 01 03:00:21 PM UTC 24 |
2861974312 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.649176321 |
|
|
Sep 01 02:59:13 PM UTC 24 |
Sep 01 03:00:22 PM UTC 24 |
29351783726 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.3664930561 |
|
|
Sep 01 03:00:12 PM UTC 24 |
Sep 01 03:00:22 PM UTC 24 |
3223888101 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.3244520318 |
|
|
Sep 01 03:01:00 PM UTC 24 |
Sep 01 03:01:06 PM UTC 24 |
1204467209 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.1952907548 |
|
|
Sep 01 02:57:51 PM UTC 24 |
Sep 01 03:00:24 PM UTC 24 |
148149235276 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.1749051565 |
|
|
Sep 01 03:00:17 PM UTC 24 |
Sep 01 03:00:25 PM UTC 24 |
145986237 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.235636698 |
|
|
Sep 01 03:00:23 PM UTC 24 |
Sep 01 03:00:26 PM UTC 24 |
13371063 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.2317704833 |
|
|
Sep 01 03:00:11 PM UTC 24 |
Sep 01 03:00:26 PM UTC 24 |
3850675462 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.868512701 |
|
|
Sep 01 03:00:24 PM UTC 24 |
Sep 01 03:00:26 PM UTC 24 |
69325922 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.3489196284 |
|
|
Sep 01 03:00:18 PM UTC 24 |
Sep 01 03:00:28 PM UTC 24 |
232017785 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.1060422550 |
|
|
Sep 01 03:00:26 PM UTC 24 |
Sep 01 03:00:28 PM UTC 24 |
40084490 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.2142554322 |
|
|
Sep 01 03:00:26 PM UTC 24 |
Sep 01 03:00:30 PM UTC 24 |
274612972 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.1118273244 |
|
|
Sep 01 03:00:06 PM UTC 24 |
Sep 01 03:00:31 PM UTC 24 |
3654261723 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_stress_all.3790020083 |
|
|
Sep 01 02:58:08 PM UTC 24 |
Sep 01 03:00:33 PM UTC 24 |
20830643683 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.3345862505 |
|
|
Sep 01 02:58:45 PM UTC 24 |
Sep 01 03:00:36 PM UTC 24 |
36762966257 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.3617467082 |
|
|
Sep 01 03:00:29 PM UTC 24 |
Sep 01 03:00:36 PM UTC 24 |
118369326 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.278680768 |
|
|
Sep 01 03:00:32 PM UTC 24 |
Sep 01 03:00:37 PM UTC 24 |
75504082 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.1201274913 |
|
|
Sep 01 02:57:45 PM UTC 24 |
Sep 01 03:00:41 PM UTC 24 |
16538214348 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.3617723599 |
|
|
Sep 01 03:00:28 PM UTC 24 |
Sep 01 03:00:45 PM UTC 24 |
5849830409 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.2731942833 |
|
|
Sep 01 03:00:25 PM UTC 24 |
Sep 01 03:00:46 PM UTC 24 |
14174023317 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.2160944137 |
|
|
Sep 01 03:00:32 PM UTC 24 |
Sep 01 03:00:47 PM UTC 24 |
2267503838 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.2519546249 |
|
|
Sep 01 03:00:34 PM UTC 24 |
Sep 01 03:00:48 PM UTC 24 |
2116632696 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_stress_all.1596941703 |
|
|
Sep 01 03:00:47 PM UTC 24 |
Sep 01 03:00:49 PM UTC 24 |
173755929 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.2979324428 |
|
|
Sep 01 03:00:30 PM UTC 24 |
Sep 01 03:00:50 PM UTC 24 |
955887582 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.1226496823 |
|
|
Sep 01 03:00:48 PM UTC 24 |
Sep 01 03:00:50 PM UTC 24 |
23375101 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.1893825710 |
|
|
Sep 01 03:00:49 PM UTC 24 |
Sep 01 03:00:51 PM UTC 24 |
28210918 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.2776424420 |
|
|
Sep 01 03:00:51 PM UTC 24 |
Sep 01 03:00:53 PM UTC 24 |
106629363 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.3650384938 |
|
|
Sep 01 03:00:37 PM UTC 24 |
Sep 01 03:00:54 PM UTC 24 |
4273627953 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.2108812632 |
|
|
Sep 01 03:00:52 PM UTC 24 |
Sep 01 03:00:54 PM UTC 24 |
65090427 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.2484267616 |
|
|
Sep 01 03:00:29 PM UTC 24 |
Sep 01 03:00:56 PM UTC 24 |
9448658642 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.767048231 |
|
|
Sep 01 02:59:58 PM UTC 24 |
Sep 01 03:00:57 PM UTC 24 |
5438366615 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.1567482009 |
|
|
Sep 01 02:58:08 PM UTC 24 |
Sep 01 03:00:59 PM UTC 24 |
46935193966 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.2952541316 |
|
|
Sep 01 03:00:58 PM UTC 24 |
Sep 01 03:01:06 PM UTC 24 |
247157994 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.1584266559 |
|
|
Sep 01 02:52:30 PM UTC 24 |
Sep 01 03:01:07 PM UTC 24 |
770862948584 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.371026704 |
|
|
Sep 01 03:00:17 PM UTC 24 |
Sep 01 03:01:08 PM UTC 24 |
73216567405 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.4007653603 |
|
|
Sep 01 03:00:11 PM UTC 24 |
Sep 01 03:01:09 PM UTC 24 |
6978422009 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.228088360 |
|
|
Sep 01 03:00:26 PM UTC 24 |
Sep 01 03:01:09 PM UTC 24 |
28313955607 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.3987854911 |
|
|
Sep 01 03:00:56 PM UTC 24 |
Sep 01 03:01:10 PM UTC 24 |
961035280 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.2617479183 |
|
|
Sep 01 03:01:10 PM UTC 24 |
Sep 01 03:01:12 PM UTC 24 |
70246115 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.3833650260 |
|
|
Sep 01 03:01:10 PM UTC 24 |
Sep 01 03:01:12 PM UTC 24 |
27140022 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.2462306124 |
|
|
Sep 01 03:01:06 PM UTC 24 |
Sep 01 03:01:12 PM UTC 24 |
647117183 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.3561114371 |
|
|
Sep 01 02:59:10 PM UTC 24 |
Sep 01 03:01:12 PM UTC 24 |
10773576542 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.4256956950 |
|
|
Sep 01 02:56:46 PM UTC 24 |
Sep 01 03:01:12 PM UTC 24 |
96562050993 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.883877669 |
|
|
Sep 01 03:01:05 PM UTC 24 |
Sep 01 03:01:13 PM UTC 24 |
1241229265 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.2797925940 |
|
|
Sep 01 02:54:15 PM UTC 24 |
Sep 01 03:01:13 PM UTC 24 |
79543456246 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.3564269157 |
|
|
Sep 01 03:01:11 PM UTC 24 |
Sep 01 03:01:13 PM UTC 24 |
14576281 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.3945393845 |
|
|
Sep 01 03:01:05 PM UTC 24 |
Sep 01 03:01:15 PM UTC 24 |
1356242770 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.3937319516 |
|
|
Sep 01 03:00:51 PM UTC 24 |
Sep 01 03:01:16 PM UTC 24 |
4892994967 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.6799026 |
|
|
Sep 01 03:01:14 PM UTC 24 |
Sep 01 03:01:17 PM UTC 24 |
71824499 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.3677786257 |
|
|
Sep 01 03:01:15 PM UTC 24 |
Sep 01 03:01:19 PM UTC 24 |
73579501 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.3900805420 |
|
|
Sep 01 03:01:15 PM UTC 24 |
Sep 01 03:01:21 PM UTC 24 |
764550326 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.1603050001 |
|
|
Sep 01 03:00:54 PM UTC 24 |
Sep 01 03:01:22 PM UTC 24 |
5989594805 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.2156271274 |
|
|
Sep 01 03:01:15 PM UTC 24 |
Sep 01 03:01:22 PM UTC 24 |
816946753 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.1807056849 |
|
|
Sep 01 03:02:17 PM UTC 24 |
Sep 01 03:02:21 PM UTC 24 |
36366031 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.3384881710 |
|
|
Sep 01 03:00:57 PM UTC 24 |
Sep 01 03:01:24 PM UTC 24 |
7622612112 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2287414782 |
|
|
Sep 01 03:01:15 PM UTC 24 |
Sep 01 03:01:25 PM UTC 24 |
3947269830 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.1880639267 |
|
|
Sep 01 03:01:16 PM UTC 24 |
Sep 01 03:01:26 PM UTC 24 |
1091088976 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.3605523188 |
|
|
Sep 01 02:59:36 PM UTC 24 |
Sep 01 03:01:27 PM UTC 24 |
38233820902 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.4283214839 |
|
|
Sep 01 03:01:07 PM UTC 24 |
Sep 01 03:01:27 PM UTC 24 |
3312673848 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.2917294184 |
|
|
Sep 01 03:01:25 PM UTC 24 |
Sep 01 03:01:28 PM UTC 24 |
14674590 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.975695835 |
|
|
Sep 01 03:01:27 PM UTC 24 |
Sep 01 03:01:29 PM UTC 24 |
50738490 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.2155913206 |
|
|
Sep 01 03:01:17 PM UTC 24 |
Sep 01 03:01:30 PM UTC 24 |
4893476915 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.2807765798 |
|
|
Sep 01 02:58:25 PM UTC 24 |
Sep 01 03:01:31 PM UTC 24 |
89904264877 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.690639356 |
|
|
Sep 01 03:01:29 PM UTC 24 |
Sep 01 03:01:32 PM UTC 24 |
66610480 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.2323182836 |
|
|
Sep 01 03:01:15 PM UTC 24 |
Sep 01 03:01:32 PM UTC 24 |
2460929265 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.3624076364 |
|
|
Sep 01 03:01:14 PM UTC 24 |
Sep 01 03:01:34 PM UTC 24 |
1744260294 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.2754050986 |
|
|
Sep 01 03:01:29 PM UTC 24 |
Sep 01 03:01:36 PM UTC 24 |
117698300 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.3913351891 |
|
|
Sep 01 02:59:59 PM UTC 24 |
Sep 01 03:01:39 PM UTC 24 |
11989376987 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.4032337895 |
|
|
Sep 01 03:01:34 PM UTC 24 |
Sep 01 03:01:41 PM UTC 24 |
978358856 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.3739505258 |
|
|
Sep 01 03:01:37 PM UTC 24 |
Sep 01 03:01:42 PM UTC 24 |
354922305 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.3198856395 |
|
|
Sep 01 03:00:51 PM UTC 24 |
Sep 01 03:01:46 PM UTC 24 |
68481149017 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.2152463839 |
|
|
Sep 01 03:01:20 PM UTC 24 |
Sep 01 03:01:46 PM UTC 24 |
19459150222 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.4005214029 |
|
|
Sep 01 03:01:31 PM UTC 24 |
Sep 01 03:01:48 PM UTC 24 |
2362588920 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.3278175012 |
|
|
Sep 01 03:01:28 PM UTC 24 |
Sep 01 03:01:49 PM UTC 24 |
2799568163 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.1755534159 |
|
|
Sep 01 03:01:32 PM UTC 24 |
Sep 01 03:01:51 PM UTC 24 |
2362303556 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.3572502816 |
|
|
Sep 01 03:01:33 PM UTC 24 |
Sep 01 03:01:51 PM UTC 24 |
5465003538 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.3502210028 |
|
|
Sep 01 02:59:15 PM UTC 24 |
Sep 01 03:01:52 PM UTC 24 |
29124205286 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.2896324448 |
|
|
Sep 01 03:01:51 PM UTC 24 |
Sep 01 03:01:54 PM UTC 24 |
13633730 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.1761100171 |
|
|
Sep 01 03:01:53 PM UTC 24 |
Sep 01 03:01:55 PM UTC 24 |
18652159 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.1568263627 |
|
|
Sep 01 03:01:23 PM UTC 24 |
Sep 01 03:01:57 PM UTC 24 |
13546922238 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.1007666938 |
|
|
Sep 01 03:01:55 PM UTC 24 |
Sep 01 03:01:57 PM UTC 24 |
43195896 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.1969764929 |
|
|
Sep 01 03:01:56 PM UTC 24 |
Sep 01 03:01:58 PM UTC 24 |
50283004 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.4260930409 |
|
|
Sep 01 03:01:15 PM UTC 24 |
Sep 01 03:01:58 PM UTC 24 |
12025871769 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.1634563426 |
|
|
Sep 01 02:58:49 PM UTC 24 |
Sep 01 03:01:59 PM UTC 24 |
64506330613 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.777026767 |
|
|
Sep 01 03:01:58 PM UTC 24 |
Sep 01 03:02:01 PM UTC 24 |
114563666 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.1645328523 |
|
|
Sep 01 03:00:37 PM UTC 24 |
Sep 01 03:02:01 PM UTC 24 |
6413897782 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.2590460789 |
|
|
Sep 01 03:01:43 PM UTC 24 |
Sep 01 03:02:02 PM UTC 24 |
2728534866 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.1772628514 |
|
|
Sep 01 03:02:00 PM UTC 24 |
Sep 01 03:02:04 PM UTC 24 |
289352447 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.3941204541 |
|
|
Sep 01 03:01:17 PM UTC 24 |
Sep 01 03:02:05 PM UTC 24 |
5088029912 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.1999062426 |
|
|
Sep 01 03:01:28 PM UTC 24 |
Sep 01 03:02:05 PM UTC 24 |
1316340584 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.3808905131 |
|
|
Sep 01 03:02:03 PM UTC 24 |
Sep 01 03:02:08 PM UTC 24 |
75206810 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.965423392 |
|
|
Sep 01 03:01:58 PM UTC 24 |
Sep 01 03:02:08 PM UTC 24 |
289015734 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.377313233 |
|
|
Sep 01 02:58:48 PM UTC 24 |
Sep 01 03:02:09 PM UTC 24 |
29208443520 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.1024849375 |
|
|
Sep 01 03:02:03 PM UTC 24 |
Sep 01 03:02:11 PM UTC 24 |
145275367 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.2284941830 |
|
|
Sep 01 02:59:35 PM UTC 24 |
Sep 01 03:02:12 PM UTC 24 |
62841324957 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_stress_all.2602983391 |
|
|
Sep 01 03:02:10 PM UTC 24 |
Sep 01 03:02:12 PM UTC 24 |
164996190 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.2155649706 |
|
|
Sep 01 03:01:53 PM UTC 24 |
Sep 01 03:02:13 PM UTC 24 |
21745411696 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.872021063 |
|
|
Sep 01 03:02:12 PM UTC 24 |
Sep 01 03:02:14 PM UTC 24 |
184713304 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.1092762635 |
|
|
Sep 01 03:02:06 PM UTC 24 |
Sep 01 03:02:15 PM UTC 24 |
1135326940 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_stress_all.2537783353 |
|
|
Sep 01 02:50:38 PM UTC 24 |
Sep 01 03:02:15 PM UTC 24 |
306157238542 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.396336374 |
|
|
Sep 01 03:00:38 PM UTC 24 |
Sep 01 03:02:15 PM UTC 24 |
32118630378 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.2613439850 |
|
|
Sep 01 03:02:13 PM UTC 24 |
Sep 01 03:02:16 PM UTC 24 |
21378136 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.2986252673 |
|
|
Sep 01 03:02:03 PM UTC 24 |
Sep 01 03:02:16 PM UTC 24 |
299076312 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.1638666576 |
|
|
Sep 01 03:02:15 PM UTC 24 |
Sep 01 03:02:17 PM UTC 24 |
28563219 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_all.2085804847 |
|
|
Sep 01 03:02:06 PM UTC 24 |
Sep 01 03:02:18 PM UTC 24 |
1416432149 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.861833683 |
|
|
Sep 01 03:00:41 PM UTC 24 |
Sep 01 03:02:18 PM UTC 24 |
5474030640 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.501145886 |
|
|
Sep 01 03:02:17 PM UTC 24 |
Sep 01 03:02:19 PM UTC 24 |
24117464 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.1188711969 |
|
|
Sep 01 03:02:13 PM UTC 24 |
Sep 01 03:02:19 PM UTC 24 |
2561987933 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.373319044 |
|
|
Sep 01 03:01:23 PM UTC 24 |
Sep 01 03:02:24 PM UTC 24 |
20834421066 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.644247423 |
|
|
Sep 01 03:02:00 PM UTC 24 |
Sep 01 03:02:25 PM UTC 24 |
24221364060 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.445782478 |
|
|
Sep 01 03:02:20 PM UTC 24 |
Sep 01 03:02:28 PM UTC 24 |
769814703 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2055989260 |
|
|
Sep 01 03:02:17 PM UTC 24 |
Sep 01 03:02:30 PM UTC 24 |
2933190072 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.3805166976 |
|
|
Sep 01 03:02:17 PM UTC 24 |
Sep 01 03:02:30 PM UTC 24 |
1725875400 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.3152250958 |
|
|
Sep 01 03:02:30 PM UTC 24 |
Sep 01 03:02:32 PM UTC 24 |
11834908 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.3781686443 |
|
|
Sep 01 03:02:31 PM UTC 24 |
Sep 01 03:02:33 PM UTC 24 |
58198700 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.98440700 |
|
|
Sep 01 02:58:26 PM UTC 24 |
Sep 01 03:02:34 PM UTC 24 |
85381481561 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.2069855298 |
|
|
Sep 01 03:02:15 PM UTC 24 |
Sep 01 03:02:34 PM UTC 24 |
4307587357 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_all.3596472717 |
|
|
Sep 01 02:57:20 PM UTC 24 |
Sep 01 03:02:34 PM UTC 24 |
245142421705 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.3648345234 |
|
|
Sep 01 03:01:40 PM UTC 24 |
Sep 01 03:02:37 PM UTC 24 |
4853518189 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.1064726215 |
|
|
Sep 01 03:02:20 PM UTC 24 |
Sep 01 03:02:37 PM UTC 24 |
2042978100 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3919264630 |
|
|
Sep 01 03:02:35 PM UTC 24 |
Sep 01 03:02:38 PM UTC 24 |
43703260 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.4036710098 |
|
|
Sep 01 03:02:31 PM UTC 24 |
Sep 01 03:02:38 PM UTC 24 |
631812058 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.4215958984 |
|
|
Sep 01 03:02:35 PM UTC 24 |
Sep 01 03:02:38 PM UTC 24 |
32763979 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.1224889476 |
|
|
Sep 01 03:01:35 PM UTC 24 |
Sep 01 03:02:40 PM UTC 24 |
48081052196 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.2598224398 |
|
|
Sep 01 03:02:21 PM UTC 24 |
Sep 01 03:02:41 PM UTC 24 |
11341867251 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.1454357658 |
|
|
Sep 01 03:02:17 PM UTC 24 |
Sep 01 03:02:42 PM UTC 24 |
8075427889 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_and_tpm_min_idle.1392944920 |
|
|
Sep 01 03:01:49 PM UTC 24 |
Sep 01 03:02:42 PM UTC 24 |
13807504631 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.1312187165 |
|
|
Sep 01 03:02:39 PM UTC 24 |
Sep 01 03:02:43 PM UTC 24 |
43141502 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.2262988619 |
|
|
Sep 01 03:02:38 PM UTC 24 |
Sep 01 03:02:46 PM UTC 24 |
3977471841 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.3457781823 |
|
|
Sep 01 03:02:35 PM UTC 24 |
Sep 01 03:02:48 PM UTC 24 |
1161582224 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.942547912 |
|
|
Sep 01 03:02:18 PM UTC 24 |
Sep 01 03:02:49 PM UTC 24 |
4513169074 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.2117380559 |
|
|
Sep 01 03:02:38 PM UTC 24 |
Sep 01 03:02:49 PM UTC 24 |
1571058153 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.3733607707 |
|
|
Sep 01 03:02:00 PM UTC 24 |
Sep 01 03:02:49 PM UTC 24 |
49874487492 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.102242604 |
|
|
Sep 01 03:02:39 PM UTC 24 |
Sep 01 03:02:50 PM UTC 24 |
1385962676 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.4257833005 |
|
|
Sep 01 03:02:49 PM UTC 24 |
Sep 01 03:02:51 PM UTC 24 |
11709374 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.2364388257 |
|
|
Sep 01 03:02:50 PM UTC 24 |
Sep 01 03:02:53 PM UTC 24 |
71614627 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.51424650 |
|
|
Sep 01 03:02:51 PM UTC 24 |
Sep 01 03:02:53 PM UTC 24 |
73313180 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.841759082 |
|
|
Sep 01 03:02:52 PM UTC 24 |
Sep 01 03:02:55 PM UTC 24 |
46742725 ps |
| T42 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_stress_all.775537514 |
|
|
Sep 01 02:59:16 PM UTC 24 |
Sep 01 03:02:55 PM UTC 24 |
11515816409 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_all.1004261605 |
|
|
Sep 01 03:02:43 PM UTC 24 |
Sep 01 03:02:56 PM UTC 24 |
344814828 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.2354573598 |
|
|
Sep 01 03:02:42 PM UTC 24 |
Sep 01 03:02:58 PM UTC 24 |
5798468858 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.1091010286 |
|
|
Sep 01 03:02:54 PM UTC 24 |
Sep 01 03:02:58 PM UTC 24 |
98150948 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.2671725792 |
|
|
Sep 01 03:02:39 PM UTC 24 |
Sep 01 03:03:02 PM UTC 24 |
8465258989 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.2893701352 |
|
|
Sep 01 03:02:56 PM UTC 24 |
Sep 01 03:03:04 PM UTC 24 |
141071510 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.1807450836 |
|
|
Sep 01 03:02:58 PM UTC 24 |
Sep 01 03:03:05 PM UTC 24 |
323948944 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.1623413165 |
|
|
Sep 01 03:03:00 PM UTC 24 |
Sep 01 03:03:07 PM UTC 24 |
2085740796 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.3464124684 |
|
|
Sep 01 03:02:54 PM UTC 24 |
Sep 01 03:03:07 PM UTC 24 |
2235123777 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.685651661 |
|
|
Sep 01 03:02:33 PM UTC 24 |
Sep 01 03:03:07 PM UTC 24 |
1722564887 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.218195568 |
|
|
Sep 01 03:00:22 PM UTC 24 |
Sep 01 03:03:07 PM UTC 24 |
59568641662 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.2220432634 |
|
|
Sep 01 03:02:50 PM UTC 24 |
Sep 01 03:03:09 PM UTC 24 |
3256905490 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode_ignore_cmds.4203056639 |
|
|
Sep 01 03:02:05 PM UTC 24 |
Sep 01 03:03:10 PM UTC 24 |
4382928244 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.319887071 |
|
|
Sep 01 03:03:09 PM UTC 24 |
Sep 01 03:03:11 PM UTC 24 |
132926836 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.1464560225 |
|
|
Sep 01 03:03:09 PM UTC 24 |
Sep 01 03:03:11 PM UTC 24 |
33142896 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.2526856754 |
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|
Sep 01 03:03:10 PM UTC 24 |
Sep 01 03:03:12 PM UTC 24 |
10732871 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.3940924544 |
|
|
Sep 01 03:03:05 PM UTC 24 |
Sep 01 03:03:15 PM UTC 24 |
1441622681 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.1657304072 |
|
|
Sep 01 03:03:13 PM UTC 24 |
Sep 01 03:03:15 PM UTC 24 |
428634808 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_all.570980436 |
|
|
Sep 01 03:01:22 PM UTC 24 |
Sep 01 03:03:16 PM UTC 24 |
4228905044 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.3948157460 |
|
|
Sep 01 02:58:24 PM UTC 24 |
Sep 01 03:03:16 PM UTC 24 |
34903405655 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode_ignore_cmds.1723144444 |
|
|
Sep 01 03:02:20 PM UTC 24 |
Sep 01 03:03:16 PM UTC 24 |
11780465687 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.3467674762 |
|
|
Sep 01 02:55:09 PM UTC 24 |
Sep 01 03:03:18 PM UTC 24 |
605175975859 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/42.spi_device_intercept.41560234 |
|
|
Sep 01 03:03:29 PM UTC 24 |
Sep 01 03:03:36 PM UTC 24 |
513335306 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.1040686647 |
|
|
Sep 01 03:03:13 PM UTC 24 |
Sep 01 03:03:20 PM UTC 24 |
1481738206 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.3620308546 |
|
|
Sep 01 02:59:36 PM UTC 24 |
Sep 01 03:03:20 PM UTC 24 |
47033990899 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.1804844509 |
|
|
Sep 01 03:02:40 PM UTC 24 |
Sep 01 03:03:21 PM UTC 24 |
4845248032 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_flash_mode_ignore_cmds.2790226101 |
|
|
Sep 01 03:03:19 PM UTC 24 |
Sep 01 03:03:21 PM UTC 24 |
21972127 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.3135580027 |
|
|
Sep 01 03:01:07 PM UTC 24 |
Sep 01 03:03:22 PM UTC 24 |
16421573981 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_intercept.982304252 |
|
|
Sep 01 03:03:16 PM UTC 24 |
Sep 01 03:03:22 PM UTC 24 |
375902033 ps |