| T490 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.3540998468 |
|
|
Sep 09 11:31:29 AM UTC 24 |
Sep 09 11:31:31 AM UTC 24 |
11710497 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.2620620062 |
|
|
Sep 09 11:31:31 AM UTC 24 |
Sep 09 11:31:33 AM UTC 24 |
14933299 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_stress_all.207496028 |
|
|
Sep 09 11:30:10 AM UTC 24 |
Sep 09 11:31:33 AM UTC 24 |
9879645248 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.759144033 |
|
|
Sep 09 11:31:00 AM UTC 24 |
Sep 09 11:31:35 AM UTC 24 |
2844598542 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.2508269331 |
|
|
Sep 09 11:30:46 AM UTC 24 |
Sep 09 11:31:36 AM UTC 24 |
4218456894 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.3071688808 |
|
|
Sep 09 11:31:25 AM UTC 24 |
Sep 09 11:31:36 AM UTC 24 |
3161228359 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.1050031427 |
|
|
Sep 09 11:31:34 AM UTC 24 |
Sep 09 11:31:36 AM UTC 24 |
35800689 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/3.spi_device_flash_mode_ignore_cmds.4019912307 |
|
|
Sep 09 11:29:21 AM UTC 24 |
Sep 09 11:31:36 AM UTC 24 |
51614020008 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_and_tpm_min_idle.1778188655 |
|
|
Sep 09 11:29:46 AM UTC 24 |
Sep 09 11:31:36 AM UTC 24 |
4269244164 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.795878647 |
|
|
Sep 09 11:31:33 AM UTC 24 |
Sep 09 11:31:37 AM UTC 24 |
347285252 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.2148321033 |
|
|
Sep 09 11:31:34 AM UTC 24 |
Sep 09 11:31:40 AM UTC 24 |
470130826 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.1855015790 |
|
|
Sep 09 11:31:37 AM UTC 24 |
Sep 09 11:31:41 AM UTC 24 |
58227900 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.2201846701 |
|
|
Sep 09 11:31:37 AM UTC 24 |
Sep 09 11:31:42 AM UTC 24 |
158831772 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.1590622862 |
|
|
Sep 09 11:30:19 AM UTC 24 |
Sep 09 11:31:42 AM UTC 24 |
3876353063 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_stress_all.2010430419 |
|
|
Sep 09 11:29:54 AM UTC 24 |
Sep 09 11:31:42 AM UTC 24 |
22415412683 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.91978046 |
|
|
Sep 09 11:31:37 AM UTC 24 |
Sep 09 11:31:42 AM UTC 24 |
228291131 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_upload.2602432354 |
|
|
Sep 09 11:31:25 AM UTC 24 |
Sep 09 11:31:43 AM UTC 24 |
3657365278 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.2647403607 |
|
|
Sep 09 11:31:24 AM UTC 24 |
Sep 09 11:31:43 AM UTC 24 |
3582545557 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.4100732501 |
|
|
Sep 09 11:31:33 AM UTC 24 |
Sep 09 11:31:45 AM UTC 24 |
1733268453 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.2994996152 |
|
|
Sep 09 11:31:44 AM UTC 24 |
Sep 09 11:31:46 AM UTC 24 |
54681636 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.3805155494 |
|
|
Sep 09 11:31:44 AM UTC 24 |
Sep 09 11:31:46 AM UTC 24 |
29200939 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.971922333 |
|
|
Sep 09 11:31:17 AM UTC 24 |
Sep 09 11:31:47 AM UTC 24 |
2789320812 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.3048682986 |
|
|
Sep 09 11:30:02 AM UTC 24 |
Sep 09 11:31:48 AM UTC 24 |
6988027717 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_all.528430230 |
|
|
Sep 09 11:29:34 AM UTC 24 |
Sep 09 11:31:48 AM UTC 24 |
21415100587 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.2734596071 |
|
|
Sep 09 11:31:25 AM UTC 24 |
Sep 09 11:31:49 AM UTC 24 |
1072883163 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.3523960252 |
|
|
Sep 09 11:31:47 AM UTC 24 |
Sep 09 11:31:50 AM UTC 24 |
192499483 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.817644368 |
|
|
Sep 09 11:31:47 AM UTC 24 |
Sep 09 11:31:50 AM UTC 24 |
49590089 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.144394926 |
|
|
Sep 09 11:31:35 AM UTC 24 |
Sep 09 11:31:51 AM UTC 24 |
6399395837 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_stress_all.468016449 |
|
|
Sep 09 11:31:02 AM UTC 24 |
Sep 09 11:31:51 AM UTC 24 |
10965201795 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.1664772002 |
|
|
Sep 09 11:31:25 AM UTC 24 |
Sep 09 11:31:51 AM UTC 24 |
844860032 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.2886682230 |
|
|
Sep 09 11:31:41 AM UTC 24 |
Sep 09 11:31:53 AM UTC 24 |
2948088026 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/1.spi_device_stress_all.974982221 |
|
|
Sep 09 11:28:58 AM UTC 24 |
Sep 09 11:31:53 AM UTC 24 |
9743516240 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.2858947221 |
|
|
Sep 09 11:31:22 AM UTC 24 |
Sep 09 11:31:54 AM UTC 24 |
39946487716 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.3079113340 |
|
|
Sep 09 11:31:48 AM UTC 24 |
Sep 09 11:31:54 AM UTC 24 |
1036394594 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.826615319 |
|
|
Sep 09 11:31:50 AM UTC 24 |
Sep 09 11:31:55 AM UTC 24 |
142540243 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.3438774036 |
|
|
Sep 09 11:30:09 AM UTC 24 |
Sep 09 11:31:55 AM UTC 24 |
12405028788 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.574488869 |
|
|
Sep 09 11:31:50 AM UTC 24 |
Sep 09 11:31:56 AM UTC 24 |
152576329 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.375736132 |
|
|
Sep 09 11:31:51 AM UTC 24 |
Sep 09 11:31:57 AM UTC 24 |
100870199 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.2295627899 |
|
|
Sep 09 11:31:52 AM UTC 24 |
Sep 09 11:31:57 AM UTC 24 |
969867147 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.3025622630 |
|
|
Sep 09 11:31:51 AM UTC 24 |
Sep 09 11:31:57 AM UTC 24 |
493650585 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.600392230 |
|
|
Sep 09 11:31:48 AM UTC 24 |
Sep 09 11:31:57 AM UTC 24 |
280883979 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.462321713 |
|
|
Sep 09 11:31:36 AM UTC 24 |
Sep 09 11:31:58 AM UTC 24 |
10417383152 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.259469334 |
|
|
Sep 09 11:31:45 AM UTC 24 |
Sep 09 11:31:58 AM UTC 24 |
11025135416 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.3741653684 |
|
|
Sep 09 11:31:59 AM UTC 24 |
Sep 09 11:32:08 AM UTC 24 |
527892861 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.3314762572 |
|
|
Sep 09 11:31:56 AM UTC 24 |
Sep 09 11:31:59 AM UTC 24 |
14419312 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.2663260609 |
|
|
Sep 09 11:31:56 AM UTC 24 |
Sep 09 11:31:59 AM UTC 24 |
67877936 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.1327064552 |
|
|
Sep 09 11:30:18 AM UTC 24 |
Sep 09 11:31:59 AM UTC 24 |
7720438898 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.2336849391 |
|
|
Sep 09 11:31:58 AM UTC 24 |
Sep 09 11:32:00 AM UTC 24 |
30342265 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.720109981 |
|
|
Sep 09 11:31:58 AM UTC 24 |
Sep 09 11:32:00 AM UTC 24 |
142355499 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.1654697047 |
|
|
Sep 09 11:30:37 AM UTC 24 |
Sep 09 11:32:02 AM UTC 24 |
8299717042 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_mailbox.1288416638 |
|
|
Sep 09 11:30:44 AM UTC 24 |
Sep 09 11:32:03 AM UTC 24 |
18205283393 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.4224763703 |
|
|
Sep 09 11:31:59 AM UTC 24 |
Sep 09 11:32:03 AM UTC 24 |
176827220 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_all.1898786057 |
|
|
Sep 09 11:30:36 AM UTC 24 |
Sep 09 11:32:04 AM UTC 24 |
35459595259 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.53864818 |
|
|
Sep 09 11:31:21 AM UTC 24 |
Sep 09 11:32:05 AM UTC 24 |
11620442340 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_stress_all.2106079936 |
|
|
Sep 09 11:29:46 AM UTC 24 |
Sep 09 11:32:06 AM UTC 24 |
36665104316 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.2048916365 |
|
|
Sep 09 11:32:01 AM UTC 24 |
Sep 09 11:32:06 AM UTC 24 |
78664851 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_all.732968736 |
|
|
Sep 09 11:30:17 AM UTC 24 |
Sep 09 11:32:06 AM UTC 24 |
63762471157 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_and_tpm.1127028427 |
|
|
Sep 09 11:29:34 AM UTC 24 |
Sep 09 11:32:08 AM UTC 24 |
9542505698 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/1.spi_device_flash_mode_ignore_cmds.1517726089 |
|
|
Sep 09 11:28:56 AM UTC 24 |
Sep 09 11:32:08 AM UTC 24 |
47460104894 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.1401317364 |
|
|
Sep 09 11:32:07 AM UTC 24 |
Sep 09 11:32:09 AM UTC 24 |
62377269 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.992986073 |
|
|
Sep 09 11:32:07 AM UTC 24 |
Sep 09 11:32:09 AM UTC 24 |
17615829 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.1881546952 |
|
|
Sep 09 11:33:11 AM UTC 24 |
Sep 09 11:33:13 AM UTC 24 |
121236744 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.3497634193 |
|
|
Sep 09 11:31:58 AM UTC 24 |
Sep 09 11:32:09 AM UTC 24 |
7305719307 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_all.2374439688 |
|
|
Sep 09 11:31:47 AM UTC 24 |
Sep 09 11:32:10 AM UTC 24 |
1784972589 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.536315958 |
|
|
Sep 09 11:32:09 AM UTC 24 |
Sep 09 11:32:11 AM UTC 24 |
18143659 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.2780058966 |
|
|
Sep 09 11:32:00 AM UTC 24 |
Sep 09 11:32:11 AM UTC 24 |
4986307346 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.3372607194 |
|
|
Sep 09 11:32:02 AM UTC 24 |
Sep 09 11:32:12 AM UTC 24 |
6284452528 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.1125304133 |
|
|
Sep 09 11:32:09 AM UTC 24 |
Sep 09 11:32:12 AM UTC 24 |
160144796 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.2861950482 |
|
|
Sep 09 11:32:46 AM UTC 24 |
Sep 09 11:33:16 AM UTC 24 |
2960093251 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.379693821 |
|
|
Sep 09 11:31:37 AM UTC 24 |
Sep 09 11:32:12 AM UTC 24 |
3198086906 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.2139587397 |
|
|
Sep 09 11:31:58 AM UTC 24 |
Sep 09 11:32:14 AM UTC 24 |
3761064764 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.3998794853 |
|
|
Sep 09 11:32:10 AM UTC 24 |
Sep 09 11:32:14 AM UTC 24 |
72690397 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.1028784218 |
|
|
Sep 09 11:32:11 AM UTC 24 |
Sep 09 11:32:17 AM UTC 24 |
219605368 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.3665771503 |
|
|
Sep 09 11:32:10 AM UTC 24 |
Sep 09 11:32:19 AM UTC 24 |
943870702 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.1564204840 |
|
|
Sep 09 11:32:13 AM UTC 24 |
Sep 09 11:32:20 AM UTC 24 |
189971159 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.3471858167 |
|
|
Sep 09 11:32:19 AM UTC 24 |
Sep 09 11:32:21 AM UTC 24 |
15015601 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.1403235475 |
|
|
Sep 09 11:32:08 AM UTC 24 |
Sep 09 11:32:21 AM UTC 24 |
1108228588 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.3008443236 |
|
|
Sep 09 11:32:20 AM UTC 24 |
Sep 09 11:32:22 AM UTC 24 |
14108520 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.1006568112 |
|
|
Sep 09 11:32:13 AM UTC 24 |
Sep 09 11:32:23 AM UTC 24 |
444491541 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.3794440196 |
|
|
Sep 09 11:31:59 AM UTC 24 |
Sep 09 11:32:24 AM UTC 24 |
17610579895 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.2891598001 |
|
|
Sep 09 11:32:23 AM UTC 24 |
Sep 09 11:32:25 AM UTC 24 |
48987717 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.1299474620 |
|
|
Sep 09 11:31:37 AM UTC 24 |
Sep 09 11:32:25 AM UTC 24 |
18009481690 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.311480770 |
|
|
Sep 09 11:32:21 AM UTC 24 |
Sep 09 11:32:26 AM UTC 24 |
389326493 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.3228367022 |
|
|
Sep 09 11:32:11 AM UTC 24 |
Sep 09 11:32:29 AM UTC 24 |
3708344708 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_all.2426059317 |
|
|
Sep 09 11:30:46 AM UTC 24 |
Sep 09 11:32:30 AM UTC 24 |
26109555134 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.3694543882 |
|
|
Sep 09 11:31:42 AM UTC 24 |
Sep 09 11:32:31 AM UTC 24 |
20628537760 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.896726860 |
|
|
Sep 09 11:32:26 AM UTC 24 |
Sep 09 11:32:31 AM UTC 24 |
78131620 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.279588712 |
|
|
Sep 09 11:31:52 AM UTC 24 |
Sep 09 11:32:33 AM UTC 24 |
11760367662 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.819489407 |
|
|
Sep 09 11:32:23 AM UTC 24 |
Sep 09 11:32:34 AM UTC 24 |
356029706 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.2235836278 |
|
|
Sep 09 11:32:24 AM UTC 24 |
Sep 09 11:32:36 AM UTC 24 |
1486556821 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.1639093430 |
|
|
Sep 09 11:32:13 AM UTC 24 |
Sep 09 11:32:37 AM UTC 24 |
1290847612 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.4239452861 |
|
|
Sep 09 11:32:30 AM UTC 24 |
Sep 09 11:32:38 AM UTC 24 |
907511741 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.305109466 |
|
|
Sep 09 11:32:12 AM UTC 24 |
Sep 09 11:32:38 AM UTC 24 |
12036815545 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.4267039625 |
|
|
Sep 09 11:31:59 AM UTC 24 |
Sep 09 11:32:40 AM UTC 24 |
8608636826 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.3707486401 |
|
|
Sep 09 11:32:32 AM UTC 24 |
Sep 09 11:32:40 AM UTC 24 |
204853372 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.1958204026 |
|
|
Sep 09 11:32:26 AM UTC 24 |
Sep 09 11:32:41 AM UTC 24 |
1816080281 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.803547211 |
|
|
Sep 09 11:32:39 AM UTC 24 |
Sep 09 11:32:41 AM UTC 24 |
33521192 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.4237985801 |
|
|
Sep 09 11:32:39 AM UTC 24 |
Sep 09 11:32:41 AM UTC 24 |
14150253 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.3351522955 |
|
|
Sep 09 11:32:24 AM UTC 24 |
Sep 09 11:32:41 AM UTC 24 |
1223141456 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.2397821793 |
|
|
Sep 09 11:31:43 AM UTC 24 |
Sep 09 11:32:42 AM UTC 24 |
3956094664 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.3770605168 |
|
|
Sep 09 11:32:04 AM UTC 24 |
Sep 09 11:32:43 AM UTC 24 |
2433217396 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.2973336029 |
|
|
Sep 09 11:32:15 AM UTC 24 |
Sep 09 11:32:44 AM UTC 24 |
1346445334 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.988253059 |
|
|
Sep 09 11:32:41 AM UTC 24 |
Sep 09 11:32:44 AM UTC 24 |
127253527 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.2254435305 |
|
|
Sep 09 11:32:33 AM UTC 24 |
Sep 09 11:32:45 AM UTC 24 |
1670509199 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.2854914714 |
|
|
Sep 09 11:32:09 AM UTC 24 |
Sep 09 11:32:45 AM UTC 24 |
9344513217 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.2423431334 |
|
|
Sep 09 11:32:43 AM UTC 24 |
Sep 09 11:32:45 AM UTC 24 |
469535908 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.3128270017 |
|
|
Sep 09 11:32:43 AM UTC 24 |
Sep 09 11:32:47 AM UTC 24 |
316102065 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.1293352233 |
|
|
Sep 09 11:32:43 AM UTC 24 |
Sep 09 11:32:51 AM UTC 24 |
956345889 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.3253194148 |
|
|
Sep 09 11:32:27 AM UTC 24 |
Sep 09 11:32:51 AM UTC 24 |
10728507222 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.3149968312 |
|
|
Sep 09 11:32:22 AM UTC 24 |
Sep 09 11:32:52 AM UTC 24 |
7329426870 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.2301236991 |
|
|
Sep 09 11:30:02 AM UTC 24 |
Sep 09 11:32:54 AM UTC 24 |
74715257312 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3136911319 |
|
|
Sep 09 11:32:43 AM UTC 24 |
Sep 09 11:32:55 AM UTC 24 |
2819396620 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.3925850593 |
|
|
Sep 09 11:32:52 AM UTC 24 |
Sep 09 11:32:55 AM UTC 24 |
243676159 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/0.spi_device_flash_and_tpm_min_idle.3352649179 |
|
|
Sep 09 11:28:52 AM UTC 24 |
Sep 09 11:32:55 AM UTC 24 |
118375598892 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.3394217530 |
|
|
Sep 09 11:32:15 AM UTC 24 |
Sep 09 11:32:56 AM UTC 24 |
87283016763 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.249294702 |
|
|
Sep 09 11:32:55 AM UTC 24 |
Sep 09 11:32:57 AM UTC 24 |
32286579 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.2263471049 |
|
|
Sep 09 11:32:55 AM UTC 24 |
Sep 09 11:32:57 AM UTC 24 |
15949691 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.3976702403 |
|
|
Sep 09 11:32:46 AM UTC 24 |
Sep 09 11:32:57 AM UTC 24 |
934158579 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.2449795969 |
|
|
Sep 09 11:32:46 AM UTC 24 |
Sep 09 11:32:57 AM UTC 24 |
472758488 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.4099853338 |
|
|
Sep 09 11:32:46 AM UTC 24 |
Sep 09 11:32:58 AM UTC 24 |
659255890 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3755738825 |
|
|
Sep 09 11:32:57 AM UTC 24 |
Sep 09 11:32:59 AM UTC 24 |
66115698 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.4098684526 |
|
|
Sep 09 11:32:57 AM UTC 24 |
Sep 09 11:32:59 AM UTC 24 |
121679857 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.3074715974 |
|
|
Sep 09 11:32:43 AM UTC 24 |
Sep 09 11:33:02 AM UTC 24 |
5581169346 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/1.spi_device_flash_and_tpm_min_idle.2141174334 |
|
|
Sep 09 11:28:56 AM UTC 24 |
Sep 09 11:33:03 AM UTC 24 |
22112422715 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.243166540 |
|
|
Sep 09 11:32:59 AM UTC 24 |
Sep 09 11:33:03 AM UTC 24 |
641850752 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.1317087670 |
|
|
Sep 09 11:33:00 AM UTC 24 |
Sep 09 11:33:04 AM UTC 24 |
167726036 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.607067112 |
|
|
Sep 09 11:33:00 AM UTC 24 |
Sep 09 11:33:04 AM UTC 24 |
94119280 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.3759071434 |
|
|
Sep 09 11:32:59 AM UTC 24 |
Sep 09 11:33:05 AM UTC 24 |
552011508 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.2358831240 |
|
|
Sep 09 11:32:59 AM UTC 24 |
Sep 09 11:33:05 AM UTC 24 |
1855790875 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.3239079394 |
|
|
Sep 09 11:33:06 AM UTC 24 |
Sep 09 11:33:08 AM UTC 24 |
33703564 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.2965762193 |
|
|
Sep 09 11:33:06 AM UTC 24 |
Sep 09 11:33:09 AM UTC 24 |
25018411 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_stress_all.404095833 |
|
|
Sep 09 11:33:06 AM UTC 24 |
Sep 09 11:33:09 AM UTC 24 |
113182509 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.2351082467 |
|
|
Sep 09 11:32:46 AM UTC 24 |
Sep 09 11:33:10 AM UTC 24 |
11668101828 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.2928371722 |
|
|
Sep 09 11:32:06 AM UTC 24 |
Sep 09 11:33:11 AM UTC 24 |
4756528323 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.1641835098 |
|
|
Sep 09 11:33:09 AM UTC 24 |
Sep 09 11:33:11 AM UTC 24 |
20381262 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.800430575 |
|
|
Sep 09 11:31:52 AM UTC 24 |
Sep 09 11:33:13 AM UTC 24 |
4179836140 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode.794207449 |
|
|
Sep 09 11:33:51 AM UTC 24 |
Sep 09 11:34:00 AM UTC 24 |
200326401 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_flash_mode_ignore_cmds.339622387 |
|
|
Sep 09 11:29:52 AM UTC 24 |
Sep 09 11:33:13 AM UTC 24 |
35836179864 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.3408113596 |
|
|
Sep 09 11:33:11 AM UTC 24 |
Sep 09 11:33:13 AM UTC 24 |
13593174 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.745346208 |
|
|
Sep 09 11:33:02 AM UTC 24 |
Sep 09 11:33:16 AM UTC 24 |
812192158 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.723782852 |
|
|
Sep 09 11:33:13 AM UTC 24 |
Sep 09 11:33:18 AM UTC 24 |
115888315 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.1388287385 |
|
|
Sep 09 11:33:11 AM UTC 24 |
Sep 09 11:33:19 AM UTC 24 |
492693827 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.2686262974 |
|
|
Sep 09 11:33:14 AM UTC 24 |
Sep 09 11:33:20 AM UTC 24 |
448429566 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.2055401776 |
|
|
Sep 09 11:33:58 AM UTC 24 |
Sep 09 11:34:00 AM UTC 24 |
90249150 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.4086101528 |
|
|
Sep 09 11:32:57 AM UTC 24 |
Sep 09 11:33:20 AM UTC 24 |
2932253371 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.598122411 |
|
|
Sep 09 11:33:18 AM UTC 24 |
Sep 09 11:33:20 AM UTC 24 |
11932372 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.4076198718 |
|
|
Sep 09 11:33:13 AM UTC 24 |
Sep 09 11:33:21 AM UTC 24 |
5449099222 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.3601245957 |
|
|
Sep 09 11:33:04 AM UTC 24 |
Sep 09 11:33:21 AM UTC 24 |
19055535930 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.3213731879 |
|
|
Sep 09 11:33:13 AM UTC 24 |
Sep 09 11:33:22 AM UTC 24 |
3805556862 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.725466048 |
|
|
Sep 09 11:32:41 AM UTC 24 |
Sep 09 11:33:22 AM UTC 24 |
20175761126 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.4012650974 |
|
|
Sep 09 11:32:59 AM UTC 24 |
Sep 09 11:33:23 AM UTC 24 |
13259701707 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.1355416423 |
|
|
Sep 09 11:33:16 AM UTC 24 |
Sep 09 11:33:24 AM UTC 24 |
1890057189 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.1602568165 |
|
|
Sep 09 11:33:22 AM UTC 24 |
Sep 09 11:33:24 AM UTC 24 |
31058499 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.268267503 |
|
|
Sep 09 11:33:22 AM UTC 24 |
Sep 09 11:33:24 AM UTC 24 |
77107037 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.1542166672 |
|
|
Sep 09 11:33:18 AM UTC 24 |
Sep 09 11:33:25 AM UTC 24 |
282292220 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.87350348 |
|
|
Sep 09 11:33:11 AM UTC 24 |
Sep 09 11:33:25 AM UTC 24 |
4241320334 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.233914102 |
|
|
Sep 09 11:33:24 AM UTC 24 |
Sep 09 11:33:26 AM UTC 24 |
494987659 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.3865037913 |
|
|
Sep 09 11:33:16 AM UTC 24 |
Sep 09 11:33:26 AM UTC 24 |
5428669874 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.3218866081 |
|
|
Sep 09 11:33:24 AM UTC 24 |
Sep 09 11:33:27 AM UTC 24 |
557411246 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_stress_all.254191540 |
|
|
Sep 09 11:30:38 AM UTC 24 |
Sep 09 11:33:27 AM UTC 24 |
15318073984 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.3612965902 |
|
|
Sep 09 11:32:13 AM UTC 24 |
Sep 09 11:33:28 AM UTC 24 |
23848685381 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.130306245 |
|
|
Sep 09 11:33:22 AM UTC 24 |
Sep 09 11:33:33 AM UTC 24 |
13535698659 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.168689575 |
|
|
Sep 09 11:31:28 AM UTC 24 |
Sep 09 11:33:33 AM UTC 24 |
18075240786 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.1387651186 |
|
|
Sep 09 11:32:04 AM UTC 24 |
Sep 09 11:33:34 AM UTC 24 |
87664956065 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.3389961813 |
|
|
Sep 09 11:33:27 AM UTC 24 |
Sep 09 11:33:36 AM UTC 24 |
1452911170 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.519204277 |
|
|
Sep 09 11:33:24 AM UTC 24 |
Sep 09 11:33:36 AM UTC 24 |
21500762711 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.607123644 |
|
|
Sep 09 11:33:22 AM UTC 24 |
Sep 09 11:33:37 AM UTC 24 |
698133032 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.919144653 |
|
|
Sep 09 11:33:34 AM UTC 24 |
Sep 09 11:33:37 AM UTC 24 |
12135959 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.4189002055 |
|
|
Sep 09 11:33:27 AM UTC 24 |
Sep 09 11:33:37 AM UTC 24 |
415499583 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.2387068497 |
|
|
Sep 09 11:32:34 AM UTC 24 |
Sep 09 11:33:38 AM UTC 24 |
96255252501 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.2082229188 |
|
|
Sep 09 11:33:35 AM UTC 24 |
Sep 09 11:33:38 AM UTC 24 |
20893719 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.3911314207 |
|
|
Sep 09 11:33:27 AM UTC 24 |
Sep 09 11:33:38 AM UTC 24 |
975825904 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.3088322645 |
|
|
Sep 09 11:33:00 AM UTC 24 |
Sep 09 11:33:38 AM UTC 24 |
8110578385 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.2479120662 |
|
|
Sep 09 11:33:36 AM UTC 24 |
Sep 09 11:33:39 AM UTC 24 |
22505824 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.250128331 |
|
|
Sep 09 11:32:46 AM UTC 24 |
Sep 09 11:33:40 AM UTC 24 |
20219990044 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.2948759539 |
|
|
Sep 09 11:33:38 AM UTC 24 |
Sep 09 11:33:40 AM UTC 24 |
77628078 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.2754631787 |
|
|
Sep 09 11:33:38 AM UTC 24 |
Sep 09 11:33:40 AM UTC 24 |
64441735 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.2609267758 |
|
|
Sep 09 11:33:02 AM UTC 24 |
Sep 09 11:33:41 AM UTC 24 |
4747824710 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.753947783 |
|
|
Sep 09 11:33:24 AM UTC 24 |
Sep 09 11:33:41 AM UTC 24 |
5043629979 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.977275483 |
|
|
Sep 09 11:33:26 AM UTC 24 |
Sep 09 11:33:42 AM UTC 24 |
11035040867 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.3963609985 |
|
|
Sep 09 11:33:39 AM UTC 24 |
Sep 09 11:33:42 AM UTC 24 |
28488072 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.2731296075 |
|
|
Sep 09 11:33:39 AM UTC 24 |
Sep 09 11:33:43 AM UTC 24 |
32958525 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.3407111734 |
|
|
Sep 09 11:33:39 AM UTC 24 |
Sep 09 11:33:44 AM UTC 24 |
176782443 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.1911230513 |
|
|
Sep 09 11:33:39 AM UTC 24 |
Sep 09 11:33:44 AM UTC 24 |
488938238 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.482304368 |
|
|
Sep 09 11:33:26 AM UTC 24 |
Sep 09 11:33:45 AM UTC 24 |
2739959003 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.111291822 |
|
|
Sep 09 11:33:44 AM UTC 24 |
Sep 09 11:33:46 AM UTC 24 |
13789812 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.1696940871 |
|
|
Sep 09 11:33:44 AM UTC 24 |
Sep 09 11:33:47 AM UTC 24 |
52015565 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.181413288 |
|
|
Sep 09 11:33:45 AM UTC 24 |
Sep 09 11:33:47 AM UTC 24 |
60837323 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.892627507 |
|
|
Sep 09 11:33:40 AM UTC 24 |
Sep 09 11:33:47 AM UTC 24 |
1084914850 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_all.990911543 |
|
|
Sep 09 11:33:04 AM UTC 24 |
Sep 09 11:33:49 AM UTC 24 |
4038251781 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.2308696703 |
|
|
Sep 09 11:33:28 AM UTC 24 |
Sep 09 11:33:50 AM UTC 24 |
1893171240 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.2196312838 |
|
|
Sep 09 11:33:47 AM UTC 24 |
Sep 09 11:33:50 AM UTC 24 |
220419504 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.3627480313 |
|
|
Sep 09 11:33:39 AM UTC 24 |
Sep 09 11:33:50 AM UTC 24 |
2381899419 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_rw.2001953165 |
|
|
Sep 09 11:33:47 AM UTC 24 |
Sep 09 11:33:50 AM UTC 24 |
86195519 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.1707112360 |
|
|
Sep 09 11:33:41 AM UTC 24 |
Sep 09 11:33:50 AM UTC 24 |
4488508270 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.914258532 |
|
|
Sep 09 11:30:58 AM UTC 24 |
Sep 09 11:33:50 AM UTC 24 |
19381688893 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.447828681 |
|
|
Sep 09 11:33:46 AM UTC 24 |
Sep 09 11:33:51 AM UTC 24 |
147945206 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.1656894989 |
|
|
Sep 09 11:33:48 AM UTC 24 |
Sep 09 11:33:53 AM UTC 24 |
46969664 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.3538876375 |
|
|
Sep 09 11:33:48 AM UTC 24 |
Sep 09 11:33:53 AM UTC 24 |
337710956 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.1191872485 |
|
|
Sep 09 11:33:45 AM UTC 24 |
Sep 09 11:33:55 AM UTC 24 |
4104662008 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.3276599405 |
|
|
Sep 09 11:33:51 AM UTC 24 |
Sep 09 11:33:55 AM UTC 24 |
120546392 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.2635407442 |
|
|
Sep 09 11:32:11 AM UTC 24 |
Sep 09 11:33:56 AM UTC 24 |
138592264181 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.487330947 |
|
|
Sep 09 11:33:50 AM UTC 24 |
Sep 09 11:33:56 AM UTC 24 |
722960466 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.605673092 |
|
|
Sep 09 11:32:01 AM UTC 24 |
Sep 09 11:33:57 AM UTC 24 |
14060809233 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.3404145427 |
|
|
Sep 09 11:33:40 AM UTC 24 |
Sep 09 11:33:57 AM UTC 24 |
2750545824 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.983184668 |
|
|
Sep 09 11:33:51 AM UTC 24 |
Sep 09 11:33:58 AM UTC 24 |
5072639281 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.1108706170 |
|
|
Sep 09 11:33:57 AM UTC 24 |
Sep 09 11:33:59 AM UTC 24 |
10758810 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.2928318330 |
|
|
Sep 09 11:31:54 AM UTC 24 |
Sep 09 11:33:59 AM UTC 24 |
24527689992 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.638858383 |
|
|
Sep 09 11:33:58 AM UTC 24 |
Sep 09 11:34:00 AM UTC 24 |
26035513 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.3698660091 |
|
|
Sep 09 11:33:58 AM UTC 24 |
Sep 09 11:34:00 AM UTC 24 |
77471794 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.138833009 |
|
|
Sep 09 11:33:59 AM UTC 24 |
Sep 09 11:34:01 AM UTC 24 |
78185144 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.454167437 |
|
|
Sep 09 11:31:54 AM UTC 24 |
Sep 09 11:34:02 AM UTC 24 |
12565721092 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.4116396608 |
|
|
Sep 09 11:33:51 AM UTC 24 |
Sep 09 11:34:04 AM UTC 24 |
1173994762 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.1116813777 |
|
|
Sep 09 11:34:00 AM UTC 24 |
Sep 09 11:34:05 AM UTC 24 |
109040556 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.3622637493 |
|
|
Sep 09 11:34:01 AM UTC 24 |
Sep 09 11:34:05 AM UTC 24 |
184166156 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.2636844840 |
|
|
Sep 09 11:33:38 AM UTC 24 |
Sep 09 11:34:06 AM UTC 24 |
2159432037 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.2080109488 |
|
|
Sep 09 11:32:32 AM UTC 24 |
Sep 09 11:34:07 AM UTC 24 |
7130212114 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.3661198759 |
|
|
Sep 09 11:34:03 AM UTC 24 |
Sep 09 11:34:07 AM UTC 24 |
204593594 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.510983705 |
|
|
Sep 09 11:33:52 AM UTC 24 |
Sep 09 11:34:08 AM UTC 24 |
1785820012 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.3580013743 |
|
|
Sep 09 11:34:01 AM UTC 24 |
Sep 09 11:34:09 AM UTC 24 |
3315140215 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.3034519139 |
|
|
Sep 09 11:34:08 AM UTC 24 |
Sep 09 11:34:10 AM UTC 24 |
15311648 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.341729285 |
|
|
Sep 09 11:34:09 AM UTC 24 |
Sep 09 11:34:11 AM UTC 24 |
47001356 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.2927036739 |
|
|
Sep 09 11:34:01 AM UTC 24 |
Sep 09 11:34:12 AM UTC 24 |
1193852347 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.1237353276 |
|
|
Sep 09 11:33:58 AM UTC 24 |
Sep 09 11:34:12 AM UTC 24 |
16920827467 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.1954116806 |
|
|
Sep 09 11:34:00 AM UTC 24 |
Sep 09 11:34:13 AM UTC 24 |
1390636127 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.3883740401 |
|
|
Sep 09 11:34:01 AM UTC 24 |
Sep 09 11:34:14 AM UTC 24 |
1931742753 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.3326177541 |
|
|
Sep 09 11:33:29 AM UTC 24 |
Sep 09 11:34:15 AM UTC 24 |
4361244085 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.4152964317 |
|
|
Sep 09 11:34:13 AM UTC 24 |
Sep 09 11:34:15 AM UTC 24 |
42100368 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.4245885608 |
|
|
Sep 09 11:32:39 AM UTC 24 |
Sep 09 11:34:15 AM UTC 24 |
28377039544 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.1943307142 |
|
|
Sep 09 11:34:13 AM UTC 24 |
Sep 09 11:34:16 AM UTC 24 |
52591248 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.1161110993 |
|
|
Sep 09 11:31:44 AM UTC 24 |
Sep 09 11:34:18 AM UTC 24 |
74486097279 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.3146100787 |
|
|
Sep 09 11:34:18 AM UTC 24 |
Sep 09 11:34:20 AM UTC 24 |
152612719 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.2824016284 |
|
|
Sep 09 11:34:06 AM UTC 24 |
Sep 09 11:34:21 AM UTC 24 |
1342104921 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.2342704992 |
|
|
Sep 09 11:34:15 AM UTC 24 |
Sep 09 11:34:21 AM UTC 24 |
200088199 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.4292409796 |
|
|
Sep 09 11:34:11 AM UTC 24 |
Sep 09 11:34:22 AM UTC 24 |
7564555861 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.4114310331 |
|
|
Sep 09 11:34:16 AM UTC 24 |
Sep 09 11:34:23 AM UTC 24 |
690312513 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.2934715178 |
|
|
Sep 09 11:34:14 AM UTC 24 |
Sep 09 11:34:23 AM UTC 24 |
791912119 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.1209670491 |
|
|
Sep 09 11:34:24 AM UTC 24 |
Sep 09 11:34:26 AM UTC 24 |
22662253 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.3906190646 |
|
|
Sep 09 11:34:10 AM UTC 24 |
Sep 09 11:34:28 AM UTC 24 |
6240972488 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.2869212841 |
|
|
Sep 09 11:34:21 AM UTC 24 |
Sep 09 11:34:28 AM UTC 24 |
394455577 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.1237130307 |
|
|
Sep 09 11:33:43 AM UTC 24 |
Sep 09 11:34:28 AM UTC 24 |
1758546787 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.3899943347 |
|
|
Sep 09 11:34:27 AM UTC 24 |
Sep 09 11:34:29 AM UTC 24 |
24571358 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.3783262108 |
|
|
Sep 09 11:34:29 AM UTC 24 |
Sep 09 11:34:32 AM UTC 24 |
80813171 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_stress_all.1541637071 |
|
|
Sep 09 11:30:50 AM UTC 24 |
Sep 09 11:34:33 AM UTC 24 |
49754078987 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.3551643966 |
|
|
Sep 09 11:34:16 AM UTC 24 |
Sep 09 11:34:34 AM UTC 24 |
14995445456 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.3957526320 |
|
|
Sep 09 11:34:16 AM UTC 24 |
Sep 09 11:34:34 AM UTC 24 |
2642661070 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.1568990304 |
|
|
Sep 09 11:33:42 AM UTC 24 |
Sep 09 11:34:34 AM UTC 24 |
35954800992 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.2869050832 |
|
|
Sep 09 11:34:30 AM UTC 24 |
Sep 09 11:34:34 AM UTC 24 |
82780040 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.3729082898 |
|
|
Sep 09 11:34:29 AM UTC 24 |
Sep 09 11:34:34 AM UTC 24 |
141227742 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.944905527 |
|
|
Sep 09 11:31:13 AM UTC 24 |
Sep 09 11:34:36 AM UTC 24 |
408378219368 ps |