| T240 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.953642618 |
|
|
Sep 11 12:39:44 PM UTC 24 |
Sep 11 12:40:19 PM UTC 24 |
2563056030 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_all.3581819882 |
|
|
Sep 11 12:40:15 PM UTC 24 |
Sep 11 12:40:21 PM UTC 24 |
2782623765 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.781802501 |
|
|
Sep 11 12:40:20 PM UTC 24 |
Sep 11 12:40:22 PM UTC 24 |
28171712 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.2418555214 |
|
|
Sep 11 12:40:13 PM UTC 24 |
Sep 11 12:40:23 PM UTC 24 |
5574675983 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_rw.4110377662 |
|
|
Sep 11 12:40:22 PM UTC 24 |
Sep 11 12:40:26 PM UTC 24 |
214049503 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_stress_all.1167408917 |
|
|
Sep 11 12:38:27 PM UTC 24 |
Sep 11 12:40:27 PM UTC 24 |
24484431016 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_mailbox.4179761103 |
|
|
Sep 11 12:39:39 PM UTC 24 |
Sep 11 12:40:29 PM UTC 24 |
4093842876 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_cfg_cmd.1302385352 |
|
|
Sep 11 12:40:35 PM UTC 24 |
Sep 11 12:40:39 PM UTC 24 |
1410237228 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_upload.3038740973 |
|
|
Sep 11 12:40:30 PM UTC 24 |
Sep 11 12:40:39 PM UTC 24 |
680177447 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_intercept.281298566 |
|
|
Sep 11 12:40:27 PM UTC 24 |
Sep 11 12:40:40 PM UTC 24 |
1425725023 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.4044346311 |
|
|
Sep 11 12:40:23 PM UTC 24 |
Sep 11 12:40:40 PM UTC 24 |
3520502011 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.324990517 |
|
|
Sep 11 12:40:24 PM UTC 24 |
Sep 11 12:40:49 PM UTC 24 |
4610786556 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.810011711 |
|
|
Sep 11 12:40:41 PM UTC 24 |
Sep 11 12:40:51 PM UTC 24 |
1178992445 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.3470568534 |
|
|
Sep 11 12:40:52 PM UTC 24 |
Sep 11 12:40:55 PM UTC 24 |
684375275 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode.2788255125 |
|
|
Sep 11 12:40:40 PM UTC 24 |
Sep 11 12:40:55 PM UTC 24 |
2644679322 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_stress_all.195297096 |
|
|
Sep 11 12:39:01 PM UTC 24 |
Sep 11 12:40:58 PM UTC 24 |
14532679751 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_alert_test.1496671075 |
|
|
Sep 11 12:40:56 PM UTC 24 |
Sep 11 12:40:58 PM UTC 24 |
14219612 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_csb_read.933949424 |
|
|
Sep 11 12:40:56 PM UTC 24 |
Sep 11 12:40:58 PM UTC 24 |
56915622 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.2797247742 |
|
|
Sep 11 12:41:03 PM UTC 24 |
Sep 11 12:41:05 PM UTC 24 |
61622010 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_rw.2996595720 |
|
|
Sep 11 12:41:06 PM UTC 24 |
Sep 11 12:41:09 PM UTC 24 |
318571287 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.2719050300 |
|
|
Sep 11 12:40:59 PM UTC 24 |
Sep 11 12:41:11 PM UTC 24 |
6514184479 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.1606579717 |
|
|
Sep 11 12:41:10 PM UTC 24 |
Sep 11 12:41:17 PM UTC 24 |
1392659350 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.1884426743 |
|
|
Sep 11 12:40:40 PM UTC 24 |
Sep 11 12:41:20 PM UTC 24 |
19838722623 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_stress_all.2045419404 |
|
|
Sep 11 12:36:53 PM UTC 24 |
Sep 11 12:41:20 PM UTC 24 |
181992542655 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_all.4216355691 |
|
|
Sep 11 12:34:53 PM UTC 24 |
Sep 11 12:41:21 PM UTC 24 |
146949638935 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.2740097291 |
|
|
Sep 11 12:41:12 PM UTC 24 |
Sep 11 12:41:21 PM UTC 24 |
1911487483 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_upload.2145966737 |
|
|
Sep 11 12:41:21 PM UTC 24 |
Sep 11 12:41:27 PM UTC 24 |
2589361838 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.456819005 |
|
|
Sep 11 12:40:59 PM UTC 24 |
Sep 11 12:41:28 PM UTC 24 |
3635876863 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_cfg_cmd.2404257536 |
|
|
Sep 11 12:41:22 PM UTC 24 |
Sep 11 12:41:32 PM UTC 24 |
4140029734 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_mailbox.2164851129 |
|
|
Sep 11 12:40:27 PM UTC 24 |
Sep 11 12:41:32 PM UTC 24 |
27938451545 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.1112631134 |
|
|
Sep 11 12:41:21 PM UTC 24 |
Sep 11 12:41:32 PM UTC 24 |
767275404 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode.4232700290 |
|
|
Sep 11 12:41:22 PM UTC 24 |
Sep 11 12:41:34 PM UTC 24 |
641087786 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_intercept.3846037998 |
|
|
Sep 11 12:41:17 PM UTC 24 |
Sep 11 12:41:36 PM UTC 24 |
1819667840 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_stress_all.3675844898 |
|
|
Sep 11 12:41:34 PM UTC 24 |
Sep 11 12:41:37 PM UTC 24 |
99150305 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.2626890166 |
|
|
Sep 11 12:41:36 PM UTC 24 |
Sep 11 12:41:39 PM UTC 24 |
18636255 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.609855571 |
|
|
Sep 11 12:41:38 PM UTC 24 |
Sep 11 12:41:40 PM UTC 24 |
22201866 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.4176537929 |
|
|
Sep 11 12:41:29 PM UTC 24 |
Sep 11 12:41:51 PM UTC 24 |
6821061774 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.2201018185 |
|
|
Sep 11 12:41:52 PM UTC 24 |
Sep 11 12:41:54 PM UTC 24 |
28085306 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.305216997 |
|
|
Sep 11 12:40:41 PM UTC 24 |
Sep 11 12:41:56 PM UTC 24 |
7455967956 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.2274742969 |
|
|
Sep 11 12:41:55 PM UTC 24 |
Sep 11 12:41:59 PM UTC 24 |
217693695 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.1232941615 |
|
|
Sep 11 12:41:41 PM UTC 24 |
Sep 11 12:41:59 PM UTC 24 |
32104564383 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.1223439522 |
|
|
Sep 11 12:40:51 PM UTC 24 |
Sep 11 12:42:01 PM UTC 24 |
14354878066 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.1629373716 |
|
|
Sep 11 12:41:56 PM UTC 24 |
Sep 11 12:42:03 PM UTC 24 |
454813446 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.1789188695 |
|
|
Sep 11 12:41:43 PM UTC 24 |
Sep 11 12:42:05 PM UTC 24 |
2003864576 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.1796733175 |
|
|
Sep 11 12:42:01 PM UTC 24 |
Sep 11 12:42:08 PM UTC 24 |
103733027 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.352258150 |
|
|
Sep 11 12:42:00 PM UTC 24 |
Sep 11 12:42:09 PM UTC 24 |
15616916303 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.1055053777 |
|
|
Sep 11 12:41:28 PM UTC 24 |
Sep 11 12:42:14 PM UTC 24 |
9123851189 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.3985623397 |
|
|
Sep 11 12:42:06 PM UTC 24 |
Sep 11 12:42:17 PM UTC 24 |
2252138285 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.1895657862 |
|
|
Sep 11 12:38:23 PM UTC 24 |
Sep 11 12:42:19 PM UTC 24 |
50781878639 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.3790515329 |
|
|
Sep 11 12:42:03 PM UTC 24 |
Sep 11 12:42:20 PM UTC 24 |
5659593905 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.1226375724 |
|
|
Sep 11 12:42:04 PM UTC 24 |
Sep 11 12:42:24 PM UTC 24 |
1666684709 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.78591865 |
|
|
Sep 11 12:41:33 PM UTC 24 |
Sep 11 12:42:25 PM UTC 24 |
10105103918 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.3181526169 |
|
|
Sep 11 12:36:52 PM UTC 24 |
Sep 11 12:42:26 PM UTC 24 |
53276068422 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.1479324875 |
|
|
Sep 11 12:40:50 PM UTC 24 |
Sep 11 12:42:27 PM UTC 24 |
17251918187 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.1771313767 |
|
|
Sep 11 12:42:15 PM UTC 24 |
Sep 11 12:42:27 PM UTC 24 |
2408757592 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.356390996 |
|
|
Sep 11 12:42:26 PM UTC 24 |
Sep 11 12:42:29 PM UTC 24 |
14861165 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.1644543903 |
|
|
Sep 11 12:42:31 PM UTC 24 |
Sep 11 12:42:34 PM UTC 24 |
24367057 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.873786719 |
|
|
Sep 11 12:42:27 PM UTC 24 |
Sep 11 12:42:30 PM UTC 24 |
14193877 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.2668837229 |
|
|
Sep 11 12:36:15 PM UTC 24 |
Sep 11 12:42:31 PM UTC 24 |
135350572099 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.1817282224 |
|
|
Sep 11 12:42:31 PM UTC 24 |
Sep 11 12:42:34 PM UTC 24 |
96854109 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.738869623 |
|
|
Sep 11 12:42:27 PM UTC 24 |
Sep 11 12:42:39 PM UTC 24 |
3797150877 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.2156553044 |
|
|
Sep 11 12:42:32 PM UTC 24 |
Sep 11 12:42:43 PM UTC 24 |
5403246580 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.2831768037 |
|
|
Sep 11 12:42:35 PM UTC 24 |
Sep 11 12:42:45 PM UTC 24 |
1211970031 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.4048749355 |
|
|
Sep 11 12:42:09 PM UTC 24 |
Sep 11 12:42:47 PM UTC 24 |
1582564520 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.4278787201 |
|
|
Sep 11 12:42:35 PM UTC 24 |
Sep 11 12:42:47 PM UTC 24 |
5885297549 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.2082049147 |
|
|
Sep 11 12:37:26 PM UTC 24 |
Sep 11 12:42:53 PM UTC 24 |
30024603713 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.468539033 |
|
|
Sep 11 12:42:44 PM UTC 24 |
Sep 11 12:42:53 PM UTC 24 |
6225236128 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.4150476404 |
|
|
Sep 11 12:42:48 PM UTC 24 |
Sep 11 12:42:57 PM UTC 24 |
1209223362 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.640305057 |
|
|
Sep 11 12:42:54 PM UTC 24 |
Sep 11 12:43:02 PM UTC 24 |
234256971 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_all.4199372486 |
|
|
Sep 11 12:41:32 PM UTC 24 |
Sep 11 12:43:07 PM UTC 24 |
5630326451 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_all.324324863 |
|
|
Sep 11 12:42:29 PM UTC 24 |
Sep 11 12:43:07 PM UTC 24 |
2325305146 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.3805571992 |
|
|
Sep 11 12:43:08 PM UTC 24 |
Sep 11 12:43:11 PM UTC 24 |
18498101 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.332707080 |
|
|
Sep 11 12:42:46 PM UTC 24 |
Sep 11 12:43:11 PM UTC 24 |
4207028742 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.746002077 |
|
|
Sep 11 12:42:48 PM UTC 24 |
Sep 11 12:43:12 PM UTC 24 |
3442664724 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.4254012966 |
|
|
Sep 11 12:44:47 PM UTC 24 |
Sep 11 12:44:57 PM UTC 24 |
3918745153 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.2078018396 |
|
|
Sep 11 12:38:50 PM UTC 24 |
Sep 11 12:43:14 PM UTC 24 |
24923843647 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.1927140909 |
|
|
Sep 11 12:43:12 PM UTC 24 |
Sep 11 12:43:14 PM UTC 24 |
21342907 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.376669390 |
|
|
Sep 11 12:42:18 PM UTC 24 |
Sep 11 12:43:15 PM UTC 24 |
2942799722 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.969567389 |
|
|
Sep 11 12:43:14 PM UTC 24 |
Sep 11 12:43:17 PM UTC 24 |
99025416 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.4265023450 |
|
|
Sep 11 12:43:15 PM UTC 24 |
Sep 11 12:43:18 PM UTC 24 |
79453788 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2438819549 |
|
|
Sep 11 12:43:13 PM UTC 24 |
Sep 11 12:43:22 PM UTC 24 |
1616381135 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.442955169 |
|
|
Sep 11 12:43:14 PM UTC 24 |
Sep 11 12:43:26 PM UTC 24 |
1068355948 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.1890690241 |
|
|
Sep 11 12:42:40 PM UTC 24 |
Sep 11 12:43:26 PM UTC 24 |
79431097803 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.572201702 |
|
|
Sep 11 12:42:58 PM UTC 24 |
Sep 11 12:43:27 PM UTC 24 |
5865628519 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.53002533 |
|
|
Sep 11 12:43:19 PM UTC 24 |
Sep 11 12:43:30 PM UTC 24 |
1183803868 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.2540554231 |
|
|
Sep 11 12:43:18 PM UTC 24 |
Sep 11 12:43:30 PM UTC 24 |
2926211949 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.852721132 |
|
|
Sep 11 12:43:27 PM UTC 24 |
Sep 11 12:43:31 PM UTC 24 |
168651576 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.4235105234 |
|
|
Sep 11 12:43:31 PM UTC 24 |
Sep 11 12:43:35 PM UTC 24 |
73011375 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_stress_all.3008015449 |
|
|
Sep 11 12:37:38 PM UTC 24 |
Sep 11 12:43:40 PM UTC 24 |
64694259885 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_upload.4039207756 |
|
|
Sep 11 12:43:23 PM UTC 24 |
Sep 11 12:43:42 PM UTC 24 |
12091915934 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.590141512 |
|
|
Sep 11 12:43:41 PM UTC 24 |
Sep 11 12:43:43 PM UTC 24 |
65827535 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.81599852 |
|
|
Sep 11 12:43:15 PM UTC 24 |
Sep 11 12:43:44 PM UTC 24 |
27988448346 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.856230068 |
|
|
Sep 11 12:43:02 PM UTC 24 |
Sep 11 12:43:44 PM UTC 24 |
29978063335 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.992378803 |
|
|
Sep 11 12:43:42 PM UTC 24 |
Sep 11 12:43:44 PM UTC 24 |
28849833 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.1387169019 |
|
|
Sep 11 12:44:22 PM UTC 24 |
Sep 11 12:44:45 PM UTC 24 |
13501258188 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.261110086 |
|
|
Sep 11 12:43:27 PM UTC 24 |
Sep 11 12:43:47 PM UTC 24 |
4722740363 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.71817556 |
|
|
Sep 11 12:43:45 PM UTC 24 |
Sep 11 12:43:48 PM UTC 24 |
418555991 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.195205646 |
|
|
Sep 11 12:43:46 PM UTC 24 |
Sep 11 12:43:48 PM UTC 24 |
124938497 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.542345485 |
|
|
Sep 11 12:43:48 PM UTC 24 |
Sep 11 12:43:51 PM UTC 24 |
160584272 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.3772407897 |
|
|
Sep 11 12:43:28 PM UTC 24 |
Sep 11 12:43:52 PM UTC 24 |
4615376360 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.1163461430 |
|
|
Sep 11 12:43:16 PM UTC 24 |
Sep 11 12:43:54 PM UTC 24 |
21779303817 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_stress_all.98676996 |
|
|
Sep 11 12:35:49 PM UTC 24 |
Sep 11 12:43:54 PM UTC 24 |
40663887507 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.2154389925 |
|
|
Sep 11 12:43:54 PM UTC 24 |
Sep 11 12:43:57 PM UTC 24 |
34220699 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.4099075869 |
|
|
Sep 11 12:43:48 PM UTC 24 |
Sep 11 12:43:58 PM UTC 24 |
960803527 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.1232276917 |
|
|
Sep 11 12:42:10 PM UTC 24 |
Sep 11 12:43:59 PM UTC 24 |
12306821084 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.3045993113 |
|
|
Sep 11 12:44:36 PM UTC 24 |
Sep 11 12:44:39 PM UTC 24 |
166643994 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.1797270700 |
|
|
Sep 11 12:43:49 PM UTC 24 |
Sep 11 12:44:00 PM UTC 24 |
3883173113 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.3256910296 |
|
|
Sep 11 12:43:31 PM UTC 24 |
Sep 11 12:44:01 PM UTC 24 |
1803704426 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_stress_all.2650663500 |
|
|
Sep 11 12:33:21 PM UTC 24 |
Sep 11 12:44:01 PM UTC 24 |
47635379293 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.3113353544 |
|
|
Sep 11 12:44:19 PM UTC 24 |
Sep 11 12:44:56 PM UTC 24 |
24039167700 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.1845739146 |
|
|
Sep 11 12:43:52 PM UTC 24 |
Sep 11 12:44:04 PM UTC 24 |
1390379939 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.3890448779 |
|
|
Sep 11 12:44:02 PM UTC 24 |
Sep 11 12:44:04 PM UTC 24 |
97012496 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.2962566195 |
|
|
Sep 11 12:43:52 PM UTC 24 |
Sep 11 12:44:05 PM UTC 24 |
2192499195 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.2628743331 |
|
|
Sep 11 12:44:05 PM UTC 24 |
Sep 11 12:44:07 PM UTC 24 |
16066755 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.274340811 |
|
|
Sep 11 12:44:05 PM UTC 24 |
Sep 11 12:44:10 PM UTC 24 |
1093989087 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.1421529244 |
|
|
Sep 11 12:44:08 PM UTC 24 |
Sep 11 12:44:11 PM UTC 24 |
27727698 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.1810844446 |
|
|
Sep 11 12:43:58 PM UTC 24 |
Sep 11 12:44:13 PM UTC 24 |
1019386247 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.405972851 |
|
|
Sep 11 12:44:06 PM UTC 24 |
Sep 11 12:44:15 PM UTC 24 |
1010540427 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.3092075816 |
|
|
Sep 11 12:44:10 PM UTC 24 |
Sep 11 12:44:17 PM UTC 24 |
533928198 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.2140273621 |
|
|
Sep 11 12:44:12 PM UTC 24 |
Sep 11 12:44:18 PM UTC 24 |
3793417792 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.3221631588 |
|
|
Sep 11 12:44:14 PM UTC 24 |
Sep 11 12:44:19 PM UTC 24 |
410323839 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.3403036925 |
|
|
Sep 11 12:43:49 PM UTC 24 |
Sep 11 12:44:20 PM UTC 24 |
4234923045 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.3456982953 |
|
|
Sep 11 12:44:16 PM UTC 24 |
Sep 11 12:44:20 PM UTC 24 |
237217927 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.3684751765 |
|
|
Sep 11 12:43:45 PM UTC 24 |
Sep 11 12:44:20 PM UTC 24 |
13808256743 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.324878462 |
|
|
Sep 11 12:43:55 PM UTC 24 |
Sep 11 12:44:21 PM UTC 24 |
3851142175 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.3190359695 |
|
|
Sep 11 12:43:56 PM UTC 24 |
Sep 11 12:44:24 PM UTC 24 |
4636799310 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.4141077874 |
|
|
Sep 11 12:44:20 PM UTC 24 |
Sep 11 12:44:24 PM UTC 24 |
34755270 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.916641616 |
|
|
Sep 11 12:42:21 PM UTC 24 |
Sep 11 12:44:30 PM UTC 24 |
5108573088 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.2586292952 |
|
|
Sep 11 12:44:22 PM UTC 24 |
Sep 11 12:44:30 PM UTC 24 |
612061778 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.3548683845 |
|
|
Sep 11 12:36:21 PM UTC 24 |
Sep 11 12:44:32 PM UTC 24 |
163799789842 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.682392808 |
|
|
Sep 11 12:44:31 PM UTC 24 |
Sep 11 12:44:33 PM UTC 24 |
47916142 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_all.754281770 |
|
|
Sep 11 12:38:56 PM UTC 24 |
Sep 11 12:44:33 PM UTC 24 |
35843880954 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.2321497565 |
|
|
Sep 11 12:44:32 PM UTC 24 |
Sep 11 12:44:35 PM UTC 24 |
19995853 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_stress_all.2882593861 |
|
|
Sep 11 12:43:08 PM UTC 24 |
Sep 11 12:44:35 PM UTC 24 |
12081097621 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.367003741 |
|
|
Sep 11 12:44:36 PM UTC 24 |
Sep 11 12:44:38 PM UTC 24 |
202556323 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.4059142054 |
|
|
Sep 11 12:44:51 PM UTC 24 |
Sep 11 12:44:59 PM UTC 24 |
297898318 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.4196752038 |
|
|
Sep 11 12:44:35 PM UTC 24 |
Sep 11 12:44:40 PM UTC 24 |
1530046314 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.2160063992 |
|
|
Sep 11 12:44:39 PM UTC 24 |
Sep 11 12:44:45 PM UTC 24 |
124000564 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3465822158 |
|
|
Sep 11 12:44:40 PM UTC 24 |
Sep 11 12:44:50 PM UTC 24 |
683732924 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.951262528 |
|
|
Sep 11 12:34:08 PM UTC 24 |
Sep 11 12:45:05 PM UTC 24 |
933866971211 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.283993663 |
|
|
Sep 11 12:44:40 PM UTC 24 |
Sep 11 12:45:06 PM UTC 24 |
4793026269 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.2223154087 |
|
|
Sep 11 12:43:32 PM UTC 24 |
Sep 11 12:45:11 PM UTC 24 |
53773188392 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.2303567228 |
|
|
Sep 11 12:44:35 PM UTC 24 |
Sep 11 12:45:11 PM UTC 24 |
6332927173 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.1192145078 |
|
|
Sep 11 12:44:59 PM UTC 24 |
Sep 11 12:45:14 PM UTC 24 |
4445378134 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.1367272066 |
|
|
Sep 11 12:45:14 PM UTC 24 |
Sep 11 12:45:16 PM UTC 24 |
91140637 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_flash_and_tpm_min_idle.1406766546 |
|
|
Sep 11 12:35:47 PM UTC 24 |
Sep 11 12:45:17 PM UTC 24 |
200569444333 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.274606571 |
|
|
Sep 11 12:44:00 PM UTC 24 |
Sep 11 12:45:18 PM UTC 24 |
3024974517 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.3269047711 |
|
|
Sep 11 12:45:17 PM UTC 24 |
Sep 11 12:45:19 PM UTC 24 |
31802096 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.2704539794 |
|
|
Sep 11 12:43:39 PM UTC 24 |
Sep 11 12:47:15 PM UTC 24 |
31632682777 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.2035034350 |
|
|
Sep 11 12:45:19 PM UTC 24 |
Sep 11 12:45:22 PM UTC 24 |
315910805 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.240041694 |
|
|
Sep 11 12:45:20 PM UTC 24 |
Sep 11 12:45:22 PM UTC 24 |
124820312 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.679679288 |
|
|
Sep 11 12:44:46 PM UTC 24 |
Sep 11 12:45:24 PM UTC 24 |
3710309629 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.33029038 |
|
|
Sep 11 12:42:54 PM UTC 24 |
Sep 11 12:45:25 PM UTC 24 |
61855872688 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2130026230 |
|
|
Sep 11 12:43:36 PM UTC 24 |
Sep 11 12:45:27 PM UTC 24 |
5347089035 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.3756923189 |
|
|
Sep 11 12:45:23 PM UTC 24 |
Sep 11 12:45:27 PM UTC 24 |
130820743 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.3873256570 |
|
|
Sep 11 12:44:57 PM UTC 24 |
Sep 11 12:45:30 PM UTC 24 |
1615113155 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.2155490443 |
|
|
Sep 11 12:45:23 PM UTC 24 |
Sep 11 12:45:30 PM UTC 24 |
2727643915 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.1848990645 |
|
|
Sep 11 12:45:26 PM UTC 24 |
Sep 11 12:45:36 PM UTC 24 |
1799255669 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.3692451952 |
|
|
Sep 11 12:44:02 PM UTC 24 |
Sep 11 12:45:37 PM UTC 24 |
33227394081 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.1606208878 |
|
|
Sep 11 12:45:38 PM UTC 24 |
Sep 11 12:45:40 PM UTC 24 |
17700282 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.3819020886 |
|
|
Sep 11 12:45:24 PM UTC 24 |
Sep 11 12:45:40 PM UTC 24 |
3715746783 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.1869027047 |
|
|
Sep 11 12:45:31 PM UTC 24 |
Sep 11 12:45:44 PM UTC 24 |
801914495 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.2373905269 |
|
|
Sep 11 12:45:30 PM UTC 24 |
Sep 11 12:45:47 PM UTC 24 |
1237336318 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.513910024 |
|
|
Sep 11 12:45:19 PM UTC 24 |
Sep 11 12:45:48 PM UTC 24 |
33029792652 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.2793419240 |
|
|
Sep 11 12:45:49 PM UTC 24 |
Sep 11 12:45:52 PM UTC 24 |
40052623 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1944104769 |
|
|
Sep 11 12:45:38 PM UTC 24 |
Sep 11 12:45:53 PM UTC 24 |
6969904636 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.1630790185 |
|
|
Sep 11 12:45:53 PM UTC 24 |
Sep 11 12:45:55 PM UTC 24 |
14399822 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.4257636376 |
|
|
Sep 11 12:45:54 PM UTC 24 |
Sep 11 12:45:59 PM UTC 24 |
1396725082 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.663702903 |
|
|
Sep 11 12:46:00 PM UTC 24 |
Sep 11 12:46:03 PM UTC 24 |
36558755 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.434247032 |
|
|
Sep 11 12:41:33 PM UTC 24 |
Sep 11 12:46:04 PM UTC 24 |
96796600497 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.969934850 |
|
|
Sep 11 12:45:28 PM UTC 24 |
Sep 11 12:46:04 PM UTC 24 |
4656909815 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.511821310 |
|
|
Sep 11 12:44:58 PM UTC 24 |
Sep 11 12:46:05 PM UTC 24 |
83372611471 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.3793758559 |
|
|
Sep 11 12:45:28 PM UTC 24 |
Sep 11 12:46:05 PM UTC 24 |
2729840962 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.2447852749 |
|
|
Sep 11 12:43:59 PM UTC 24 |
Sep 11 12:46:05 PM UTC 24 |
33791258094 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.646526043 |
|
|
Sep 11 12:46:03 PM UTC 24 |
Sep 11 12:46:07 PM UTC 24 |
277438590 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.1029765957 |
|
|
Sep 11 12:45:45 PM UTC 24 |
Sep 11 12:46:08 PM UTC 24 |
4509448777 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.1134341676 |
|
|
Sep 11 12:46:07 PM UTC 24 |
Sep 11 12:46:11 PM UTC 24 |
133358983 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.3340307777 |
|
|
Sep 11 12:46:05 PM UTC 24 |
Sep 11 12:46:13 PM UTC 24 |
2531313299 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_all.2219649304 |
|
|
Sep 11 12:39:47 PM UTC 24 |
Sep 11 12:46:13 PM UTC 24 |
36693636720 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.1599957835 |
|
|
Sep 11 12:46:09 PM UTC 24 |
Sep 11 12:46:15 PM UTC 24 |
425858319 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.90410156 |
|
|
Sep 11 12:45:56 PM UTC 24 |
Sep 11 12:46:17 PM UTC 24 |
4257735380 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.4074446346 |
|
|
Sep 11 12:46:05 PM UTC 24 |
Sep 11 12:46:17 PM UTC 24 |
3264805514 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.251048985 |
|
|
Sep 11 12:46:14 PM UTC 24 |
Sep 11 12:46:25 PM UTC 24 |
916282539 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.2875132789 |
|
|
Sep 11 12:46:26 PM UTC 24 |
Sep 11 12:46:28 PM UTC 24 |
27621014 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.455130379 |
|
|
Sep 11 12:46:06 PM UTC 24 |
Sep 11 12:46:29 PM UTC 24 |
9740787836 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.3323744761 |
|
|
Sep 11 12:46:29 PM UTC 24 |
Sep 11 12:46:31 PM UTC 24 |
47795750 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_all.641530277 |
|
|
Sep 11 12:45:41 PM UTC 24 |
Sep 11 12:46:33 PM UTC 24 |
7992772531 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.3207242839 |
|
|
Sep 11 12:42:21 PM UTC 24 |
Sep 11 12:46:36 PM UTC 24 |
51830915503 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.10617737 |
|
|
Sep 11 12:46:34 PM UTC 24 |
Sep 11 12:46:36 PM UTC 24 |
53937058 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.2680455780 |
|
|
Sep 11 12:44:25 PM UTC 24 |
Sep 11 12:46:38 PM UTC 24 |
39131080187 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.3287021191 |
|
|
Sep 11 12:46:36 PM UTC 24 |
Sep 11 12:46:40 PM UTC 24 |
860777957 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.751705375 |
|
|
Sep 11 12:46:07 PM UTC 24 |
Sep 11 12:46:45 PM UTC 24 |
7024125923 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.557793444 |
|
|
Sep 11 12:44:18 PM UTC 24 |
Sep 11 12:46:45 PM UTC 24 |
66095066869 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.1162035039 |
|
|
Sep 11 12:46:38 PM UTC 24 |
Sep 11 12:46:49 PM UTC 24 |
9034603038 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.1761798534 |
|
|
Sep 11 12:46:32 PM UTC 24 |
Sep 11 12:46:50 PM UTC 24 |
1761408747 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.3127546015 |
|
|
Sep 11 12:46:41 PM UTC 24 |
Sep 11 12:46:52 PM UTC 24 |
1976730372 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.425464527 |
|
|
Sep 11 12:46:46 PM UTC 24 |
Sep 11 12:46:53 PM UTC 24 |
342840996 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.1591373749 |
|
|
Sep 11 12:46:45 PM UTC 24 |
Sep 11 12:46:53 PM UTC 24 |
714531103 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.2081343123 |
|
|
Sep 11 12:46:30 PM UTC 24 |
Sep 11 12:46:54 PM UTC 24 |
13483294267 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.1668062785 |
|
|
Sep 11 12:46:17 PM UTC 24 |
Sep 11 12:46:55 PM UTC 24 |
4884717655 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_all.2374037470 |
|
|
Sep 11 12:45:06 PM UTC 24 |
Sep 11 12:46:57 PM UTC 24 |
10747760421 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.1977461691 |
|
|
Sep 11 12:46:52 PM UTC 24 |
Sep 11 12:47:00 PM UTC 24 |
384381786 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.3313501848 |
|
|
Sep 11 12:44:25 PM UTC 24 |
Sep 11 12:47:02 PM UTC 24 |
72673563791 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.1213498091 |
|
|
Sep 11 12:45:12 PM UTC 24 |
Sep 11 12:47:02 PM UTC 24 |
14400781576 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.268821436 |
|
|
Sep 11 12:47:01 PM UTC 24 |
Sep 11 12:47:03 PM UTC 24 |
12668904 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.395860985 |
|
|
Sep 11 12:46:40 PM UTC 24 |
Sep 11 12:47:04 PM UTC 24 |
4224316777 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.1304416754 |
|
|
Sep 11 12:47:03 PM UTC 24 |
Sep 11 12:47:05 PM UTC 24 |
67968800 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.1116761260 |
|
|
Sep 11 12:47:04 PM UTC 24 |
Sep 11 12:47:07 PM UTC 24 |
62034552 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.838224225 |
|
|
Sep 11 12:47:06 PM UTC 24 |
Sep 11 12:47:09 PM UTC 24 |
77645060 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_all.477941275 |
|
|
Sep 11 12:46:54 PM UTC 24 |
Sep 11 12:47:12 PM UTC 24 |
650309734 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.2470076829 |
|
|
Sep 11 12:46:54 PM UTC 24 |
Sep 11 12:47:12 PM UTC 24 |
5712109869 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.2966144354 |
|
|
Sep 11 12:47:08 PM UTC 24 |
Sep 11 12:47:14 PM UTC 24 |
901475994 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.4078911953 |
|
|
Sep 11 12:46:06 PM UTC 24 |
Sep 11 12:47:17 PM UTC 24 |
29305796026 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.4125612135 |
|
|
Sep 11 12:47:16 PM UTC 24 |
Sep 11 12:47:21 PM UTC 24 |
508513778 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.1981454626 |
|
|
Sep 11 12:46:50 PM UTC 24 |
Sep 11 12:47:21 PM UTC 24 |
2811076251 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.1642818798 |
|
|
Sep 11 12:47:18 PM UTC 24 |
Sep 11 12:47:22 PM UTC 24 |
119677148 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.3001544303 |
|
|
Sep 11 12:47:10 PM UTC 24 |
Sep 11 12:47:24 PM UTC 24 |
3219062215 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.3423243414 |
|
|
Sep 11 12:47:13 PM UTC 24 |
Sep 11 12:47:24 PM UTC 24 |
2189624087 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.4278141743 |
|
|
Sep 11 12:47:16 PM UTC 24 |
Sep 11 12:47:24 PM UTC 24 |
1126702928 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.3402742767 |
|
|
Sep 11 12:47:25 PM UTC 24 |
Sep 11 12:47:27 PM UTC 24 |
181277016 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_stress_all.1387501607 |
|
|
Sep 11 12:46:58 PM UTC 24 |
Sep 11 12:47:28 PM UTC 24 |
3215348421 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.928563106 |
|
|
Sep 11 12:47:21 PM UTC 24 |
Sep 11 12:47:29 PM UTC 24 |
918336453 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.2492510510 |
|
|
Sep 11 12:47:28 PM UTC 24 |
Sep 11 12:47:31 PM UTC 24 |
16419764 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.454977697 |
|
|
Sep 11 12:47:13 PM UTC 24 |
Sep 11 12:47:32 PM UTC 24 |
629997826 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.160945447 |
|
|
Sep 11 12:47:03 PM UTC 24 |
Sep 11 12:47:33 PM UTC 24 |
4815982956 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.3854416652 |
|
|
Sep 11 12:47:32 PM UTC 24 |
Sep 11 12:47:34 PM UTC 24 |
109931511 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.3073575255 |
|
|
Sep 11 12:45:08 PM UTC 24 |
Sep 11 12:47:35 PM UTC 24 |
12981351061 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_rw.2204869970 |
|
|
Sep 11 12:47:33 PM UTC 24 |
Sep 11 12:47:35 PM UTC 24 |
20464612 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.2606565976 |
|
|
Sep 11 12:47:04 PM UTC 24 |
Sep 11 12:47:36 PM UTC 24 |
13153841783 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.1719490703 |
|
|
Sep 11 12:43:59 PM UTC 24 |
Sep 11 12:47:39 PM UTC 24 |
237094329399 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.4103061758 |
|
|
Sep 11 12:47:35 PM UTC 24 |
Sep 11 12:47:40 PM UTC 24 |
89043454 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.2800059788 |
|
|
Sep 11 12:47:29 PM UTC 24 |
Sep 11 12:47:46 PM UTC 24 |
1547655421 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.1089782426 |
|
|
Sep 11 12:47:40 PM UTC 24 |
Sep 11 12:47:49 PM UTC 24 |
1753590258 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.965421890 |
|
|
Sep 11 12:47:37 PM UTC 24 |
Sep 11 12:47:53 PM UTC 24 |
2355340316 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.3999475494 |
|
|
Sep 11 12:46:15 PM UTC 24 |
Sep 11 12:47:57 PM UTC 24 |
6038902189 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.2168501078 |
|
|
Sep 11 12:47:50 PM UTC 24 |
Sep 11 12:47:59 PM UTC 24 |
1310385058 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.2665084326 |
|
|
Sep 11 12:47:37 PM UTC 24 |
Sep 11 12:48:00 PM UTC 24 |
33720996086 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.2639070950 |
|
|
Sep 11 12:47:34 PM UTC 24 |
Sep 11 12:48:02 PM UTC 24 |
6650115610 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.1154650657 |
|
|
Sep 11 12:48:03 PM UTC 24 |
Sep 11 12:48:05 PM UTC 24 |
12172648 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.3611710146 |
|
|
Sep 11 12:47:31 PM UTC 24 |
Sep 11 12:48:06 PM UTC 24 |
8060862655 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.1113039571 |
|
|
Sep 11 12:48:06 PM UTC 24 |
Sep 11 12:48:09 PM UTC 24 |
249285097 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.224168168 |
|
|
Sep 11 12:39:54 PM UTC 24 |
Sep 11 12:48:11 PM UTC 24 |
40529861565 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.3878000099 |
|
|
Sep 11 12:47:24 PM UTC 24 |
Sep 11 12:48:11 PM UTC 24 |
13198511366 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.1175238255 |
|
|
Sep 11 12:48:08 PM UTC 24 |
Sep 11 12:48:13 PM UTC 24 |
2023650091 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.2976091972 |
|
|
Sep 11 12:46:55 PM UTC 24 |
Sep 11 12:48:14 PM UTC 24 |
30152943884 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.2806260139 |
|
|
Sep 11 12:48:12 PM UTC 24 |
Sep 11 12:48:14 PM UTC 24 |
25504290 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.1157304197 |
|
|
Sep 11 12:48:12 PM UTC 24 |
Sep 11 12:48:16 PM UTC 24 |
324163246 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.2673142657 |
|
|
Sep 11 12:47:59 PM UTC 24 |
Sep 11 12:48:16 PM UTC 24 |
544015123 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.2660079643 |
|
|
Sep 11 12:48:16 PM UTC 24 |
Sep 11 12:48:20 PM UTC 24 |
1531593258 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.2655305739 |
|
|
Sep 11 12:48:14 PM UTC 24 |
Sep 11 12:48:23 PM UTC 24 |
604133346 ps |