| T605 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.2623851408 |
|
|
Sep 11 12:48:10 PM UTC 24 |
Sep 11 12:48:24 PM UTC 24 |
3153468287 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode.1612502703 |
|
|
Sep 11 12:47:41 PM UTC 24 |
Sep 11 12:48:24 PM UTC 24 |
23547311150 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.2706948768 |
|
|
Sep 11 12:47:20 PM UTC 24 |
Sep 11 12:48:25 PM UTC 24 |
8715141645 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.2070518252 |
|
|
Sep 11 12:48:21 PM UTC 24 |
Sep 11 12:48:27 PM UTC 24 |
180832600 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.2848305616 |
|
|
Sep 11 12:48:17 PM UTC 24 |
Sep 11 12:48:28 PM UTC 24 |
466207951 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.3319186080 |
|
|
Sep 11 12:48:23 PM UTC 24 |
Sep 11 12:48:30 PM UTC 24 |
328061268 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.2801983489 |
|
|
Sep 11 12:48:17 PM UTC 24 |
Sep 11 12:48:30 PM UTC 24 |
1650394709 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.613670801 |
|
|
Sep 11 12:47:25 PM UTC 24 |
Sep 11 12:48:31 PM UTC 24 |
2863417955 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.4150176337 |
|
|
Sep 11 12:48:16 PM UTC 24 |
Sep 11 12:48:32 PM UTC 24 |
872238347 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.3455005436 |
|
|
Sep 11 12:48:30 PM UTC 24 |
Sep 11 12:48:33 PM UTC 24 |
92355019 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.3398159409 |
|
|
Sep 11 12:48:25 PM UTC 24 |
Sep 11 12:48:33 PM UTC 24 |
899214720 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.545503807 |
|
|
Sep 11 12:48:32 PM UTC 24 |
Sep 11 12:48:34 PM UTC 24 |
22453511 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.1273160313 |
|
|
Sep 11 12:48:32 PM UTC 24 |
Sep 11 12:48:34 PM UTC 24 |
23792593 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.112988476 |
|
|
Sep 11 12:48:34 PM UTC 24 |
Sep 11 12:48:36 PM UTC 24 |
220956686 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.2914228497 |
|
|
Sep 11 12:48:33 PM UTC 24 |
Sep 11 12:48:37 PM UTC 24 |
414448586 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.927584050 |
|
|
Sep 11 12:48:35 PM UTC 24 |
Sep 11 12:48:38 PM UTC 24 |
104062215 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.3796892536 |
|
|
Sep 11 12:46:17 PM UTC 24 |
Sep 11 12:48:45 PM UTC 24 |
11332209097 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.280172896 |
|
|
Sep 11 12:48:38 PM UTC 24 |
Sep 11 12:48:49 PM UTC 24 |
883006470 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.2712187766 |
|
|
Sep 11 12:48:00 PM UTC 24 |
Sep 11 12:48:50 PM UTC 24 |
1772269799 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.2253583127 |
|
|
Sep 11 12:48:39 PM UTC 24 |
Sep 11 12:48:50 PM UTC 24 |
901493171 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.426702522 |
|
|
Sep 11 12:48:49 PM UTC 24 |
Sep 11 12:48:54 PM UTC 24 |
166974065 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.3996098389 |
|
|
Sep 11 12:48:45 PM UTC 24 |
Sep 11 12:48:56 PM UTC 24 |
4120786047 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.148046722 |
|
|
Sep 11 12:47:22 PM UTC 24 |
Sep 11 12:48:56 PM UTC 24 |
49776875997 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.3757371101 |
|
|
Sep 11 12:48:51 PM UTC 24 |
Sep 11 12:48:57 PM UTC 24 |
115237541 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.1963995404 |
|
|
Sep 11 12:48:39 PM UTC 24 |
Sep 11 12:48:57 PM UTC 24 |
5814988668 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_mailbox.3220167235 |
|
|
Sep 11 12:47:37 PM UTC 24 |
Sep 11 12:48:58 PM UTC 24 |
10294032592 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.3354040767 |
|
|
Sep 11 12:45:12 PM UTC 24 |
Sep 11 12:48:59 PM UTC 24 |
39979810665 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.154126413 |
|
|
Sep 11 12:48:35 PM UTC 24 |
Sep 11 12:48:59 PM UTC 24 |
3792163343 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.1309816884 |
|
|
Sep 11 12:49:00 PM UTC 24 |
Sep 11 12:49:02 PM UTC 24 |
13919594 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.1870729526 |
|
|
Sep 11 12:49:00 PM UTC 24 |
Sep 11 12:49:02 PM UTC 24 |
39294980 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.2235528197 |
|
|
Sep 11 12:48:55 PM UTC 24 |
Sep 11 12:49:03 PM UTC 24 |
174313164 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.1694615730 |
|
|
Sep 11 12:46:13 PM UTC 24 |
Sep 11 12:49:05 PM UTC 24 |
39792369982 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.2857940538 |
|
|
Sep 11 12:49:03 PM UTC 24 |
Sep 11 12:49:06 PM UTC 24 |
55012685 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.3309811597 |
|
|
Sep 11 12:49:01 PM UTC 24 |
Sep 11 12:49:06 PM UTC 24 |
637103030 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.4269129612 |
|
|
Sep 11 12:49:03 PM UTC 24 |
Sep 11 12:49:07 PM UTC 24 |
520201398 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.3688113210 |
|
|
Sep 11 12:49:07 PM UTC 24 |
Sep 11 12:49:15 PM UTC 24 |
309500134 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.3193489683 |
|
|
Sep 11 12:49:07 PM UTC 24 |
Sep 11 12:49:19 PM UTC 24 |
890001964 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.4052717283 |
|
|
Sep 11 12:48:34 PM UTC 24 |
Sep 11 12:49:19 PM UTC 24 |
2680028574 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.3195275794 |
|
|
Sep 11 12:49:20 PM UTC 24 |
Sep 11 12:49:24 PM UTC 24 |
182456904 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.2986425058 |
|
|
Sep 11 12:44:22 PM UTC 24 |
Sep 11 12:49:24 PM UTC 24 |
233338575359 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.1120549486 |
|
|
Sep 11 12:49:07 PM UTC 24 |
Sep 11 12:49:27 PM UTC 24 |
6831582802 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.565343038 |
|
|
Sep 11 12:49:15 PM UTC 24 |
Sep 11 12:49:28 PM UTC 24 |
2211548856 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.1444115237 |
|
|
Sep 11 12:38:25 PM UTC 24 |
Sep 11 12:49:35 PM UTC 24 |
265673888550 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.453675600 |
|
|
Sep 11 12:49:25 PM UTC 24 |
Sep 11 12:49:38 PM UTC 24 |
2652969942 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.1227632456 |
|
|
Sep 11 12:49:28 PM UTC 24 |
Sep 11 12:49:39 PM UTC 24 |
1981731778 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.3239608342 |
|
|
Sep 11 12:48:59 PM UTC 24 |
Sep 11 12:49:40 PM UTC 24 |
10398629106 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.1912302509 |
|
|
Sep 11 12:46:56 PM UTC 24 |
Sep 11 12:49:42 PM UTC 24 |
41759028350 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.2426009666 |
|
|
Sep 11 12:49:41 PM UTC 24 |
Sep 11 12:49:43 PM UTC 24 |
13693945 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.840968897 |
|
|
Sep 11 12:49:42 PM UTC 24 |
Sep 11 12:49:44 PM UTC 24 |
20306629 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.839155932 |
|
|
Sep 11 12:49:46 PM UTC 24 |
Sep 11 12:49:48 PM UTC 24 |
254244607 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.2859874448 |
|
|
Sep 11 12:39:52 PM UTC 24 |
Sep 11 12:49:49 PM UTC 24 |
54329329844 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.3029161194 |
|
|
Sep 11 12:49:43 PM UTC 24 |
Sep 11 12:49:50 PM UTC 24 |
398977831 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.724916225 |
|
|
Sep 11 12:49:20 PM UTC 24 |
Sep 11 12:49:50 PM UTC 24 |
1280263882 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.3469716179 |
|
|
Sep 11 12:49:49 PM UTC 24 |
Sep 11 12:49:52 PM UTC 24 |
191130810 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.3277756325 |
|
|
Sep 11 12:49:51 PM UTC 24 |
Sep 11 12:49:56 PM UTC 24 |
222858750 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.555462836 |
|
|
Sep 11 12:49:50 PM UTC 24 |
Sep 11 12:49:56 PM UTC 24 |
269167027 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.1582101536 |
|
|
Sep 11 12:48:25 PM UTC 24 |
Sep 11 12:49:58 PM UTC 24 |
22959841039 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.2849719464 |
|
|
Sep 11 12:49:50 PM UTC 24 |
Sep 11 12:50:00 PM UTC 24 |
1766825818 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.1094293872 |
|
|
Sep 11 12:49:03 PM UTC 24 |
Sep 11 12:50:01 PM UTC 24 |
6240036041 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_stress_all.3070323836 |
|
|
Sep 11 12:36:21 PM UTC 24 |
Sep 11 12:50:07 PM UTC 24 |
322488249800 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.786499730 |
|
|
Sep 11 12:46:15 PM UTC 24 |
Sep 11 12:50:09 PM UTC 24 |
97680365297 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.729171870 |
|
|
Sep 11 12:47:47 PM UTC 24 |
Sep 11 12:50:10 PM UTC 24 |
56620303786 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.839272417 |
|
|
Sep 11 12:48:29 PM UTC 24 |
Sep 11 12:50:11 PM UTC 24 |
40615843104 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.3231310998 |
|
|
Sep 11 12:49:58 PM UTC 24 |
Sep 11 12:50:12 PM UTC 24 |
819519789 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.2584381574 |
|
|
Sep 11 12:48:57 PM UTC 24 |
Sep 11 12:50:14 PM UTC 24 |
12075390118 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.2189248150 |
|
|
Sep 11 12:50:13 PM UTC 24 |
Sep 11 12:50:15 PM UTC 24 |
10971043 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.1437224763 |
|
|
Sep 11 12:50:13 PM UTC 24 |
Sep 11 12:50:15 PM UTC 24 |
12722346 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.2510335247 |
|
|
Sep 11 12:49:25 PM UTC 24 |
Sep 11 12:50:18 PM UTC 24 |
5071089476 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.3451933909 |
|
|
Sep 11 12:50:16 PM UTC 24 |
Sep 11 12:50:18 PM UTC 24 |
66152146 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.3169232987 |
|
|
Sep 11 12:49:59 PM UTC 24 |
Sep 11 12:50:21 PM UTC 24 |
4006846401 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.603850339 |
|
|
Sep 11 12:50:15 PM UTC 24 |
Sep 11 12:50:21 PM UTC 24 |
420646903 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.532809995 |
|
|
Sep 11 12:50:20 PM UTC 24 |
Sep 11 12:50:22 PM UTC 24 |
36772407 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.95176683 |
|
|
Sep 11 12:50:01 PM UTC 24 |
Sep 11 12:50:23 PM UTC 24 |
5657182231 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.93184221 |
|
|
Sep 11 12:50:20 PM UTC 24 |
Sep 11 12:50:25 PM UTC 24 |
408465129 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.857463 |
|
|
Sep 11 12:49:58 PM UTC 24 |
Sep 11 12:50:26 PM UTC 24 |
2883121570 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.805960393 |
|
|
Sep 11 12:49:44 PM UTC 24 |
Sep 11 12:50:27 PM UTC 24 |
20712724085 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.1775480648 |
|
|
Sep 11 12:50:24 PM UTC 24 |
Sep 11 12:50:29 PM UTC 24 |
536349866 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.1792550182 |
|
|
Sep 11 12:50:22 PM UTC 24 |
Sep 11 12:50:29 PM UTC 24 |
206107912 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.3184189080 |
|
|
Sep 11 12:49:08 PM UTC 24 |
Sep 11 12:50:31 PM UTC 24 |
8688398166 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.1977533141 |
|
|
Sep 11 12:49:52 PM UTC 24 |
Sep 11 12:50:35 PM UTC 24 |
16628286738 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.2983438136 |
|
|
Sep 11 12:50:27 PM UTC 24 |
Sep 11 12:50:36 PM UTC 24 |
200537007 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.1605023110 |
|
|
Sep 11 12:50:30 PM UTC 24 |
Sep 11 12:50:38 PM UTC 24 |
528602510 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.4077010527 |
|
|
Sep 11 12:50:26 PM UTC 24 |
Sep 11 12:50:38 PM UTC 24 |
648740059 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.747483755 |
|
|
Sep 11 12:50:22 PM UTC 24 |
Sep 11 12:50:38 PM UTC 24 |
5991781589 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.2772906775 |
|
|
Sep 11 12:50:38 PM UTC 24 |
Sep 11 12:50:40 PM UTC 24 |
15176584 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.344994833 |
|
|
Sep 11 12:50:38 PM UTC 24 |
Sep 11 12:50:40 PM UTC 24 |
19857017 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.1390012560 |
|
|
Sep 11 12:42:25 PM UTC 24 |
Sep 11 12:50:44 PM UTC 24 |
140896365481 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.2337070256 |
|
|
Sep 11 12:50:42 PM UTC 24 |
Sep 11 12:50:44 PM UTC 24 |
68367344 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.1607830571 |
|
|
Sep 11 12:50:46 PM UTC 24 |
Sep 11 12:50:48 PM UTC 24 |
10895653 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.3448542301 |
|
|
Sep 11 12:50:40 PM UTC 24 |
Sep 11 12:50:49 PM UTC 24 |
654698605 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.2614474906 |
|
|
Sep 11 12:50:16 PM UTC 24 |
Sep 11 12:50:52 PM UTC 24 |
12330777377 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.2248737171 |
|
|
Sep 11 12:50:46 PM UTC 24 |
Sep 11 12:50:54 PM UTC 24 |
3659475553 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.2519368422 |
|
|
Sep 11 12:50:50 PM UTC 24 |
Sep 11 12:50:55 PM UTC 24 |
438157691 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.531867377 |
|
|
Sep 11 12:50:24 PM UTC 24 |
Sep 11 12:50:56 PM UTC 24 |
20340106510 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.1585779992 |
|
|
Sep 11 12:50:55 PM UTC 24 |
Sep 11 12:51:00 PM UTC 24 |
136222459 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.2340896255 |
|
|
Sep 11 12:50:53 PM UTC 24 |
Sep 11 12:51:00 PM UTC 24 |
597906861 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.2220506669 |
|
|
Sep 11 12:50:42 PM UTC 24 |
Sep 11 12:51:01 PM UTC 24 |
3053463753 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.3259169150 |
|
|
Sep 11 12:50:00 PM UTC 24 |
Sep 11 12:51:03 PM UTC 24 |
2332838374 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.2051077176 |
|
|
Sep 11 12:50:52 PM UTC 24 |
Sep 11 12:51:05 PM UTC 24 |
1163651751 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.3846817888 |
|
|
Sep 11 12:50:55 PM UTC 24 |
Sep 11 12:51:06 PM UTC 24 |
3573456954 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.1585581165 |
|
|
Sep 11 12:51:07 PM UTC 24 |
Sep 11 12:51:09 PM UTC 24 |
36622646 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.2134654941 |
|
|
Sep 11 12:51:07 PM UTC 24 |
Sep 11 12:51:09 PM UTC 24 |
186427238 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.1356797252 |
|
|
Sep 11 12:50:49 PM UTC 24 |
Sep 11 12:51:10 PM UTC 24 |
8497692733 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.2589056365 |
|
|
Sep 11 12:49:36 PM UTC 24 |
Sep 11 12:51:11 PM UTC 24 |
3343509630 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.2765199492 |
|
|
Sep 11 12:51:12 PM UTC 24 |
Sep 11 12:51:14 PM UTC 24 |
252420427 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.2560866680 |
|
|
Sep 11 12:51:13 PM UTC 24 |
Sep 11 12:51:17 PM UTC 24 |
104445559 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.2735615245 |
|
|
Sep 11 12:51:12 PM UTC 24 |
Sep 11 12:51:18 PM UTC 24 |
2989719250 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.1383646881 |
|
|
Sep 11 12:50:29 PM UTC 24 |
Sep 11 12:51:20 PM UTC 24 |
2736135806 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.1588133559 |
|
|
Sep 11 12:48:27 PM UTC 24 |
Sep 11 12:51:20 PM UTC 24 |
20118951265 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.155624353 |
|
|
Sep 11 12:51:01 PM UTC 24 |
Sep 11 12:51:21 PM UTC 24 |
3786989259 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.946327587 |
|
|
Sep 11 12:51:10 PM UTC 24 |
Sep 11 12:51:22 PM UTC 24 |
1512538652 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.235372446 |
|
|
Sep 11 12:51:15 PM UTC 24 |
Sep 11 12:51:23 PM UTC 24 |
326035302 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.3410651513 |
|
|
Sep 11 12:51:19 PM UTC 24 |
Sep 11 12:51:24 PM UTC 24 |
591063648 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.664031367 |
|
|
Sep 11 12:51:19 PM UTC 24 |
Sep 11 12:51:26 PM UTC 24 |
787150316 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.475741130 |
|
|
Sep 11 12:51:22 PM UTC 24 |
Sep 11 12:51:30 PM UTC 24 |
228123384 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.1070963014 |
|
|
Sep 11 12:51:22 PM UTC 24 |
Sep 11 12:51:32 PM UTC 24 |
318001566 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.289997157 |
|
|
Sep 11 12:50:08 PM UTC 24 |
Sep 11 12:51:33 PM UTC 24 |
12580718412 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.3414194697 |
|
|
Sep 11 12:44:22 PM UTC 24 |
Sep 11 12:51:34 PM UTC 24 |
120282012555 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.1857807808 |
|
|
Sep 11 12:51:33 PM UTC 24 |
Sep 11 12:51:35 PM UTC 24 |
13440235 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.2993809002 |
|
|
Sep 11 12:51:34 PM UTC 24 |
Sep 11 12:51:36 PM UTC 24 |
126389186 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.3212622710 |
|
|
Sep 11 12:51:36 PM UTC 24 |
Sep 11 12:51:39 PM UTC 24 |
281446239 ps |
| T43 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.3797015307 |
|
|
Sep 11 12:50:32 PM UTC 24 |
Sep 11 12:51:39 PM UTC 24 |
20360126218 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.1042871887 |
|
|
Sep 11 12:51:37 PM UTC 24 |
Sep 11 12:51:39 PM UTC 24 |
49424455 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.2769245572 |
|
|
Sep 11 12:51:22 PM UTC 24 |
Sep 11 12:51:41 PM UTC 24 |
5284156441 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.2976888973 |
|
|
Sep 11 12:50:30 PM UTC 24 |
Sep 11 12:51:43 PM UTC 24 |
3791006709 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.29275124 |
|
|
Sep 11 12:51:41 PM UTC 24 |
Sep 11 12:51:43 PM UTC 24 |
430379406 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.372659146 |
|
|
Sep 11 12:51:10 PM UTC 24 |
Sep 11 12:51:45 PM UTC 24 |
2000238745 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.993835626 |
|
|
Sep 11 12:51:25 PM UTC 24 |
Sep 11 12:51:46 PM UTC 24 |
1707659478 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.1875667546 |
|
|
Sep 11 12:51:45 PM UTC 24 |
Sep 11 12:51:49 PM UTC 24 |
44930862 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.2651044079 |
|
|
Sep 11 12:51:42 PM UTC 24 |
Sep 11 12:51:51 PM UTC 24 |
1197451150 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.3852253628 |
|
|
Sep 11 12:51:46 PM UTC 24 |
Sep 11 12:51:52 PM UTC 24 |
157898279 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.3328829892 |
|
|
Sep 11 12:51:45 PM UTC 24 |
Sep 11 12:51:54 PM UTC 24 |
444263264 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.4273469491 |
|
|
Sep 11 12:51:43 PM UTC 24 |
Sep 11 12:51:57 PM UTC 24 |
4186746249 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.2268320307 |
|
|
Sep 11 12:51:36 PM UTC 24 |
Sep 11 12:51:58 PM UTC 24 |
11910515030 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.3080278467 |
|
|
Sep 11 12:48:52 PM UTC 24 |
Sep 11 12:52:00 PM UTC 24 |
19376728767 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.1667341885 |
|
|
Sep 11 12:51:58 PM UTC 24 |
Sep 11 12:52:01 PM UTC 24 |
14384644 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.2491783102 |
|
|
Sep 11 12:51:51 PM UTC 24 |
Sep 11 12:52:01 PM UTC 24 |
864488595 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.82370012 |
|
|
Sep 11 12:51:59 PM UTC 24 |
Sep 11 12:52:02 PM UTC 24 |
14183494 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.1739295398 |
|
|
Sep 11 12:50:02 PM UTC 24 |
Sep 11 12:52:02 PM UTC 24 |
7109351170 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.296267851 |
|
|
Sep 11 12:52:01 PM UTC 24 |
Sep 11 12:52:03 PM UTC 24 |
36956391 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.3085305499 |
|
|
Sep 11 12:51:41 PM UTC 24 |
Sep 11 12:52:04 PM UTC 24 |
3355659055 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.700614861 |
|
|
Sep 11 12:52:02 PM UTC 24 |
Sep 11 12:52:05 PM UTC 24 |
22882532 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.2576969513 |
|
|
Sep 11 12:52:02 PM UTC 24 |
Sep 11 12:52:06 PM UTC 24 |
873354253 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.1325254322 |
|
|
Sep 11 12:52:06 PM UTC 24 |
Sep 11 12:52:10 PM UTC 24 |
322871838 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.416592710 |
|
|
Sep 11 12:50:10 PM UTC 24 |
Sep 11 12:52:10 PM UTC 24 |
12329071856 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.1498875496 |
|
|
Sep 11 12:48:28 PM UTC 24 |
Sep 11 12:52:13 PM UTC 24 |
129699168736 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.2661180039 |
|
|
Sep 11 12:52:04 PM UTC 24 |
Sep 11 12:52:13 PM UTC 24 |
2430256998 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.649848748 |
|
|
Sep 11 12:52:07 PM UTC 24 |
Sep 11 12:52:15 PM UTC 24 |
2193525748 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.1086407702 |
|
|
Sep 11 12:51:41 PM UTC 24 |
Sep 11 12:52:18 PM UTC 24 |
104071891349 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_all.1077979057 |
|
|
Sep 11 12:51:01 PM UTC 24 |
Sep 11 12:52:18 PM UTC 24 |
37220251566 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_stress_all.2412487346 |
|
|
Sep 11 12:52:19 PM UTC 24 |
Sep 11 12:52:22 PM UTC 24 |
78912006 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.1339170128 |
|
|
Sep 11 12:52:06 PM UTC 24 |
Sep 11 12:52:23 PM UTC 24 |
420621615 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.2506290336 |
|
|
Sep 11 12:52:22 PM UTC 24 |
Sep 11 12:52:24 PM UTC 24 |
11733456 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.1466044739 |
|
|
Sep 11 12:50:58 PM UTC 24 |
Sep 11 12:52:25 PM UTC 24 |
7373604509 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.2014900588 |
|
|
Sep 11 12:52:25 PM UTC 24 |
Sep 11 12:52:27 PM UTC 24 |
39281699 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.4289579201 |
|
|
Sep 11 12:52:14 PM UTC 24 |
Sep 11 12:52:29 PM UTC 24 |
1538425441 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.1017018127 |
|
|
Sep 11 12:52:29 PM UTC 24 |
Sep 11 12:52:31 PM UTC 24 |
63552240 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.2799533214 |
|
|
Sep 11 12:52:29 PM UTC 24 |
Sep 11 12:52:31 PM UTC 24 |
24257482 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.256247217 |
|
|
Sep 11 12:52:04 PM UTC 24 |
Sep 11 12:52:33 PM UTC 24 |
27185846918 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.557857715 |
|
|
Sep 11 12:52:26 PM UTC 24 |
Sep 11 12:52:34 PM UTC 24 |
4447754148 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.590076542 |
|
|
Sep 11 12:51:03 PM UTC 24 |
Sep 11 12:52:35 PM UTC 24 |
42223176859 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.1916025661 |
|
|
Sep 11 12:52:02 PM UTC 24 |
Sep 11 12:52:37 PM UTC 24 |
23083425596 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.324451276 |
|
|
Sep 11 12:52:25 PM UTC 24 |
Sep 11 12:52:37 PM UTC 24 |
3313120486 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.2352295732 |
|
|
Sep 11 12:52:31 PM UTC 24 |
Sep 11 12:52:39 PM UTC 24 |
1722021437 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.3426785575 |
|
|
Sep 11 12:52:32 PM UTC 24 |
Sep 11 12:52:39 PM UTC 24 |
688771357 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.3489538417 |
|
|
Sep 11 12:52:35 PM UTC 24 |
Sep 11 12:52:40 PM UTC 24 |
121179481 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.372659078 |
|
|
Sep 11 12:52:38 PM UTC 24 |
Sep 11 12:52:40 PM UTC 24 |
25576026 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.4083945585 |
|
|
Sep 11 12:51:25 PM UTC 24 |
Sep 11 12:52:43 PM UTC 24 |
9074361571 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.867708175 |
|
|
Sep 11 12:52:34 PM UTC 24 |
Sep 11 12:52:43 PM UTC 24 |
1624976485 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.668873542 |
|
|
Sep 11 12:52:38 PM UTC 24 |
Sep 11 12:52:45 PM UTC 24 |
544729158 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2017531253 |
|
|
Sep 11 12:52:04 PM UTC 24 |
Sep 11 12:52:46 PM UTC 24 |
54072142869 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.3182695347 |
|
|
Sep 11 12:52:34 PM UTC 24 |
Sep 11 12:52:47 PM UTC 24 |
1375706701 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.4115052679 |
|
|
Sep 11 12:52:45 PM UTC 24 |
Sep 11 12:52:47 PM UTC 24 |
21571428 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.2100758021 |
|
|
Sep 11 12:52:45 PM UTC 24 |
Sep 11 12:52:47 PM UTC 24 |
166119203 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.4253799669 |
|
|
Sep 11 12:52:48 PM UTC 24 |
Sep 11 12:52:51 PM UTC 24 |
158556396 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.2282777498 |
|
|
Sep 11 12:52:49 PM UTC 24 |
Sep 11 12:52:51 PM UTC 24 |
456630264 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3381070556 |
|
|
Sep 11 12:52:46 PM UTC 24 |
Sep 11 12:52:56 PM UTC 24 |
5639787139 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.309812843 |
|
|
Sep 11 12:52:49 PM UTC 24 |
Sep 11 12:52:59 PM UTC 24 |
1182076832 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.1095275821 |
|
|
Sep 11 12:52:11 PM UTC 24 |
Sep 11 12:53:00 PM UTC 24 |
15560855058 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.1327422135 |
|
|
Sep 11 12:52:32 PM UTC 24 |
Sep 11 12:53:01 PM UTC 24 |
2336793632 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.3057950581 |
|
|
Sep 11 12:52:52 PM UTC 24 |
Sep 11 12:53:01 PM UTC 24 |
298803180 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.1933354703 |
|
|
Sep 11 12:51:53 PM UTC 24 |
Sep 11 12:53:01 PM UTC 24 |
26806670776 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.3307121987 |
|
|
Sep 11 12:52:58 PM UTC 24 |
Sep 11 12:53:02 PM UTC 24 |
77033957 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.1339588503 |
|
|
Sep 11 12:52:52 PM UTC 24 |
Sep 11 12:53:02 PM UTC 24 |
281592906 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.2223678701 |
|
|
Sep 11 12:52:49 PM UTC 24 |
Sep 11 12:53:02 PM UTC 24 |
2142063809 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.1865586656 |
|
|
Sep 11 12:51:27 PM UTC 24 |
Sep 11 12:53:03 PM UTC 24 |
5008148210 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.1824819590 |
|
|
Sep 11 12:52:36 PM UTC 24 |
Sep 11 12:53:04 PM UTC 24 |
3520274832 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.18639214 |
|
|
Sep 11 12:53:00 PM UTC 24 |
Sep 11 12:53:05 PM UTC 24 |
152397437 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.2697773188 |
|
|
Sep 11 12:53:04 PM UTC 24 |
Sep 11 12:53:06 PM UTC 24 |
14344064 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.2665226751 |
|
|
Sep 11 12:53:04 PM UTC 24 |
Sep 11 12:53:06 PM UTC 24 |
23615693 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.2058728384 |
|
|
Sep 11 12:53:02 PM UTC 24 |
Sep 11 12:53:07 PM UTC 24 |
111154285 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.4268025794 |
|
|
Sep 11 12:53:06 PM UTC 24 |
Sep 11 12:53:08 PM UTC 24 |
38188377 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.4142378999 |
|
|
Sep 11 12:53:07 PM UTC 24 |
Sep 11 12:53:12 PM UTC 24 |
472527726 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.1300975466 |
|
|
Sep 11 12:53:04 PM UTC 24 |
Sep 11 12:53:15 PM UTC 24 |
1194224244 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.737000860 |
|
|
Sep 11 12:53:08 PM UTC 24 |
Sep 11 12:53:16 PM UTC 24 |
1448355046 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.1713876675 |
|
|
Sep 11 12:53:13 PM UTC 24 |
Sep 11 12:53:19 PM UTC 24 |
1093408662 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.4189808108 |
|
|
Sep 11 12:52:46 PM UTC 24 |
Sep 11 12:53:20 PM UTC 24 |
10297040390 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.1075711740 |
|
|
Sep 11 12:53:16 PM UTC 24 |
Sep 11 12:53:20 PM UTC 24 |
143607714 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_stress_all.3078410186 |
|
|
Sep 11 12:44:31 PM UTC 24 |
Sep 11 12:53:24 PM UTC 24 |
48688887112 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.867715670 |
|
|
Sep 11 12:52:49 PM UTC 24 |
Sep 11 12:53:27 PM UTC 24 |
153418286745 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.2016551524 |
|
|
Sep 11 12:53:09 PM UTC 24 |
Sep 11 12:53:29 PM UTC 24 |
11272800676 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.3128353944 |
|
|
Sep 11 12:53:08 PM UTC 24 |
Sep 11 12:53:30 PM UTC 24 |
4426776679 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.2249398851 |
|
|
Sep 11 12:53:29 PM UTC 24 |
Sep 11 12:53:31 PM UTC 24 |
15957474 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.724434370 |
|
|
Sep 11 12:53:30 PM UTC 24 |
Sep 11 12:53:32 PM UTC 24 |
50472512 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.3690849324 |
|
|
Sep 11 12:52:19 PM UTC 24 |
Sep 11 12:53:32 PM UTC 24 |
32959016981 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.1499494208 |
|
|
Sep 11 12:48:57 PM UTC 24 |
Sep 11 12:53:33 PM UTC 24 |
56770133387 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_all.1396580798 |
|
|
Sep 11 12:52:41 PM UTC 24 |
Sep 11 12:53:35 PM UTC 24 |
6942096604 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.2177821280 |
|
|
Sep 11 12:53:21 PM UTC 24 |
Sep 11 12:53:36 PM UTC 24 |
3614415516 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3173554666 |
|
|
Sep 11 12:53:33 PM UTC 24 |
Sep 11 12:53:36 PM UTC 24 |
967322841 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.504323774 |
|
|
Sep 11 12:53:08 PM UTC 24 |
Sep 11 12:53:38 PM UTC 24 |
6753385067 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.1685544349 |
|
|
Sep 11 12:53:33 PM UTC 24 |
Sep 11 12:53:38 PM UTC 24 |
189473659 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.3296696218 |
|
|
Sep 11 12:51:03 PM UTC 24 |
Sep 11 12:53:39 PM UTC 24 |
21329263916 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.1465226368 |
|
|
Sep 11 12:53:32 PM UTC 24 |
Sep 11 12:53:39 PM UTC 24 |
702445645 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.830997528 |
|
|
Sep 11 12:53:36 PM UTC 24 |
Sep 11 12:53:40 PM UTC 24 |
28864973 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.3443307507 |
|
|
Sep 11 12:51:29 PM UTC 24 |
Sep 11 12:53:42 PM UTC 24 |
16305403776 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.2841966066 |
|
|
Sep 11 12:53:35 PM UTC 24 |
Sep 11 12:53:42 PM UTC 24 |
1255735727 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.842863954 |
|
|
Sep 11 12:53:09 PM UTC 24 |
Sep 11 12:53:43 PM UTC 24 |
11828087084 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.1419910926 |
|
|
Sep 11 12:46:53 PM UTC 24 |
Sep 11 12:53:44 PM UTC 24 |
71920775918 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.227616119 |
|
|
Sep 11 12:53:39 PM UTC 24 |
Sep 11 12:53:45 PM UTC 24 |
151102159 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.3865671097 |
|
|
Sep 11 12:53:41 PM UTC 24 |
Sep 11 12:53:45 PM UTC 24 |
42915100 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.1913703132 |
|
|
Sep 11 12:52:11 PM UTC 24 |
Sep 11 12:53:46 PM UTC 24 |
12041504677 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.1103756232 |
|
|
Sep 11 12:53:38 PM UTC 24 |
Sep 11 12:53:46 PM UTC 24 |
181020455 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.1267735983 |
|
|
Sep 11 12:51:46 PM UTC 24 |
Sep 11 12:53:47 PM UTC 24 |
6903079110 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.5736041 |
|
|
Sep 11 12:53:46 PM UTC 24 |
Sep 11 12:53:48 PM UTC 24 |
70031931 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_stress_all.1734958408 |
|
|
Sep 11 12:53:46 PM UTC 24 |
Sep 11 12:53:49 PM UTC 24 |
314923317 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.902490790 |
|
|
Sep 11 12:53:41 PM UTC 24 |
Sep 11 12:53:49 PM UTC 24 |
1103778876 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.1972467938 |
|
|
Sep 11 12:53:47 PM UTC 24 |
Sep 11 12:53:50 PM UTC 24 |
36040212 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.1307767181 |
|
|
Sep 11 12:53:49 PM UTC 24 |
Sep 11 12:53:52 PM UTC 24 |
32093053 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.92776156 |
|
|
Sep 11 12:53:49 PM UTC 24 |
Sep 11 12:53:52 PM UTC 24 |
36338718 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.1833288713 |
|
|
Sep 11 12:53:48 PM UTC 24 |
Sep 11 12:53:55 PM UTC 24 |
1358971157 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.2905934307 |
|
|
Sep 11 12:53:49 PM UTC 24 |
Sep 11 12:53:56 PM UTC 24 |
2466009996 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.727027863 |
|
|
Sep 11 12:53:04 PM UTC 24 |
Sep 11 12:53:57 PM UTC 24 |
9387418138 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.4223432765 |
|
|
Sep 11 12:53:54 PM UTC 24 |
Sep 11 12:53:57 PM UTC 24 |
796373863 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.731668376 |
|
|
Sep 11 12:53:56 PM UTC 24 |
Sep 11 12:54:01 PM UTC 24 |
137273980 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_and_tpm.508764282 |
|
|
Sep 11 12:53:02 PM UTC 24 |
Sep 11 12:54:04 PM UTC 24 |
6291178938 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.1960012084 |
|
|
Sep 11 12:47:25 PM UTC 24 |
Sep 11 12:54:05 PM UTC 24 |
39362813788 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.3807171096 |
|
|
Sep 11 12:53:38 PM UTC 24 |
Sep 11 12:54:05 PM UTC 24 |
15191202250 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.3510684782 |
|
|
Sep 11 12:53:59 PM UTC 24 |
Sep 11 12:54:05 PM UTC 24 |
735979109 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.4255079994 |
|
|
Sep 11 12:53:39 PM UTC 24 |
Sep 11 12:54:09 PM UTC 24 |
55721747508 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.2008733684 |
|
|
Sep 11 12:54:07 PM UTC 24 |
Sep 11 12:54:09 PM UTC 24 |
13895692 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.1901637054 |
|
|
Sep 11 12:54:07 PM UTC 24 |
Sep 11 12:54:09 PM UTC 24 |
14770921 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_stress_all.133184727 |
|
|
Sep 11 12:54:07 PM UTC 24 |
Sep 11 12:54:09 PM UTC 24 |
39481266 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_stress_all.156486740 |
|
|
Sep 11 12:51:31 PM UTC 24 |
Sep 11 12:54:10 PM UTC 24 |
7276356406 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.654748830 |
|
|
Sep 11 12:53:51 PM UTC 24 |
Sep 11 12:54:10 PM UTC 24 |
3855917219 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.2475820866 |
|
|
Sep 11 12:53:51 PM UTC 24 |
Sep 11 12:54:11 PM UTC 24 |
1802381361 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_all.2870619901 |
|
|
Sep 11 12:54:11 PM UTC 24 |
Sep 11 12:54:13 PM UTC 24 |
50991456 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.238344544 |
|
|
Sep 11 12:54:11 PM UTC 24 |
Sep 11 12:54:13 PM UTC 24 |
336205195 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_all.1884469311 |
|
|
Sep 11 12:53:21 PM UTC 24 |
Sep 11 12:54:13 PM UTC 24 |
4564579553 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_mailbox.3206213253 |
|
|
Sep 11 12:53:52 PM UTC 24 |
Sep 11 12:54:13 PM UTC 24 |
3272591274 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_10/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.3814258584 |
|
|
Sep 11 12:54:11 PM UTC 24 |
Sep 11 12:54:14 PM UTC 24 |
125698638 ps |