| T296 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_upload.439732145 |
|
|
Sep 18 02:33:00 PM UTC 24 |
Sep 18 02:33:06 PM UTC 24 |
447168323 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_mailbox.3765886055 |
|
|
Sep 18 02:32:34 PM UTC 24 |
Sep 18 02:33:08 PM UTC 24 |
4070150290 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode.3037454811 |
|
|
Sep 18 02:33:03 PM UTC 24 |
Sep 18 02:33:10 PM UTC 24 |
325868892 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_cfg_cmd.3302866621 |
|
|
Sep 18 02:33:02 PM UTC 24 |
Sep 18 02:33:10 PM UTC 24 |
1725208807 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.964830165 |
|
|
Sep 18 02:33:08 PM UTC 24 |
Sep 18 02:33:10 PM UTC 24 |
39359085 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_mailbox.756742825 |
|
|
Sep 18 02:32:56 PM UTC 24 |
Sep 18 02:33:12 PM UTC 24 |
894887108 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.3990950349 |
|
|
Sep 18 02:32:55 PM UTC 24 |
Sep 18 02:33:12 PM UTC 24 |
2545453771 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_all.3718717975 |
|
|
Sep 18 02:32:10 PM UTC 24 |
Sep 18 02:33:13 PM UTC 24 |
3076026917 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_alert_test.2116542528 |
|
|
Sep 18 02:33:12 PM UTC 24 |
Sep 18 02:33:14 PM UTC 24 |
14619491 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_csb_read.1660488056 |
|
|
Sep 18 02:33:12 PM UTC 24 |
Sep 18 02:33:14 PM UTC 24 |
27772165 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.3468129194 |
|
|
Sep 18 02:33:14 PM UTC 24 |
Sep 18 02:33:16 PM UTC 24 |
366413926 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.3366048152 |
|
|
Sep 18 02:31:26 PM UTC 24 |
Sep 18 02:33:17 PM UTC 24 |
5432053169 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_mode.1597916733 |
|
|
Sep 18 02:31:23 PM UTC 24 |
Sep 18 02:33:18 PM UTC 24 |
114718879491 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_rw.1533288829 |
|
|
Sep 18 02:33:15 PM UTC 24 |
Sep 18 02:33:18 PM UTC 24 |
255213086 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode.3928306850 |
|
|
Sep 18 02:32:40 PM UTC 24 |
Sep 18 02:33:19 PM UTC 24 |
3166475308 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_intercept.620625206 |
|
|
Sep 18 02:33:18 PM UTC 24 |
Sep 18 02:33:23 PM UTC 24 |
178391301 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_all.1198841290 |
|
|
Sep 18 02:30:55 PM UTC 24 |
Sep 18 02:33:25 PM UTC 24 |
20612210483 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_intercept.3642982658 |
|
|
Sep 18 02:32:56 PM UTC 24 |
Sep 18 02:33:27 PM UTC 24 |
10559179301 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_all.2356654472 |
|
|
Sep 18 02:32:53 PM UTC 24 |
Sep 18 02:33:27 PM UTC 24 |
14139026091 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_cfg_cmd.1030216746 |
|
|
Sep 18 02:33:20 PM UTC 24 |
Sep 18 02:33:27 PM UTC 24 |
1109528324 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.478554834 |
|
|
Sep 18 02:33:07 PM UTC 24 |
Sep 18 02:33:28 PM UTC 24 |
3880862248 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.3632132418 |
|
|
Sep 18 02:33:13 PM UTC 24 |
Sep 18 02:33:32 PM UTC 24 |
23343056670 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.839183411 |
|
|
Sep 18 02:33:28 PM UTC 24 |
Sep 18 02:33:39 PM UTC 24 |
635724953 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.4185987254 |
|
|
Sep 18 02:32:44 PM UTC 24 |
Sep 18 02:33:40 PM UTC 24 |
4236825330 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.2475216225 |
|
|
Sep 18 02:33:17 PM UTC 24 |
Sep 18 02:33:41 PM UTC 24 |
6951411742 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.1446492213 |
|
|
Sep 18 02:33:14 PM UTC 24 |
Sep 18 02:33:41 PM UTC 24 |
17703154866 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.1456553302 |
|
|
Sep 18 02:33:40 PM UTC 24 |
Sep 18 02:33:42 PM UTC 24 |
87899684 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.3267783502 |
|
|
Sep 18 02:33:40 PM UTC 24 |
Sep 18 02:33:42 PM UTC 24 |
16996373 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.3491283897 |
|
|
Sep 18 02:33:43 PM UTC 24 |
Sep 18 02:33:45 PM UTC 24 |
131552438 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_flash_and_tpm.2310210770 |
|
|
Sep 18 02:28:38 PM UTC 24 |
Sep 18 02:33:48 PM UTC 24 |
38228734842 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_upload.2385760484 |
|
|
Sep 18 02:33:19 PM UTC 24 |
Sep 18 02:33:48 PM UTC 24 |
22294403679 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.2391629723 |
|
|
Sep 18 02:33:43 PM UTC 24 |
Sep 18 02:33:48 PM UTC 24 |
3636251157 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.3377603627 |
|
|
Sep 18 02:33:44 PM UTC 24 |
Sep 18 02:33:49 PM UTC 24 |
621771245 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.946675739 |
|
|
Sep 18 02:33:42 PM UTC 24 |
Sep 18 02:33:50 PM UTC 24 |
1789612876 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_all.2137110781 |
|
|
Sep 18 02:31:26 PM UTC 24 |
Sep 18 02:33:52 PM UTC 24 |
18108714490 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.1175723459 |
|
|
Sep 18 02:33:16 PM UTC 24 |
Sep 18 02:33:55 PM UTC 24 |
9544402408 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.803765805 |
|
|
Sep 18 02:33:46 PM UTC 24 |
Sep 18 02:33:55 PM UTC 24 |
3425648981 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.3391059632 |
|
|
Sep 18 02:33:51 PM UTC 24 |
Sep 18 02:33:57 PM UTC 24 |
2477062192 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.3266762298 |
|
|
Sep 18 02:33:51 PM UTC 24 |
Sep 18 02:33:58 PM UTC 24 |
566142263 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.3109173612 |
|
|
Sep 18 02:33:56 PM UTC 24 |
Sep 18 02:33:58 PM UTC 24 |
29691539 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.267520709 |
|
|
Sep 18 02:33:55 PM UTC 24 |
Sep 18 02:34:01 PM UTC 24 |
85887533 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.3626073202 |
|
|
Sep 18 02:33:48 PM UTC 24 |
Sep 18 02:34:02 PM UTC 24 |
4502971442 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.4024086100 |
|
|
Sep 18 02:33:49 PM UTC 24 |
Sep 18 02:34:02 PM UTC 24 |
861570105 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.1274772362 |
|
|
Sep 18 02:33:28 PM UTC 24 |
Sep 18 02:34:03 PM UTC 24 |
14176156746 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.363112331 |
|
|
Sep 18 02:33:19 PM UTC 24 |
Sep 18 02:34:04 PM UTC 24 |
3022157662 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.287047399 |
|
|
Sep 18 02:34:02 PM UTC 24 |
Sep 18 02:34:04 PM UTC 24 |
88218688 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.103998750 |
|
|
Sep 18 02:34:02 PM UTC 24 |
Sep 18 02:34:04 PM UTC 24 |
29134036 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.597356325 |
|
|
Sep 18 02:33:42 PM UTC 24 |
Sep 18 02:34:04 PM UTC 24 |
5559942169 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.2950984756 |
|
|
Sep 18 02:33:05 PM UTC 24 |
Sep 18 02:34:06 PM UTC 24 |
14595490537 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.1003869095 |
|
|
Sep 18 02:33:48 PM UTC 24 |
Sep 18 02:34:07 PM UTC 24 |
8775973991 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.773443514 |
|
|
Sep 18 02:34:05 PM UTC 24 |
Sep 18 02:34:07 PM UTC 24 |
77145543 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.2635682037 |
|
|
Sep 18 02:34:05 PM UTC 24 |
Sep 18 02:34:08 PM UTC 24 |
119143887 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.690276732 |
|
|
Sep 18 02:34:07 PM UTC 24 |
Sep 18 02:34:12 PM UTC 24 |
105024263 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.3817545932 |
|
|
Sep 18 02:34:05 PM UTC 24 |
Sep 18 02:34:12 PM UTC 24 |
2388345066 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_stress_all.4149928300 |
|
|
Sep 18 02:30:02 PM UTC 24 |
Sep 18 02:34:13 PM UTC 24 |
73760662925 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.1139987482 |
|
|
Sep 18 02:34:06 PM UTC 24 |
Sep 18 02:34:13 PM UTC 24 |
773899423 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.911550850 |
|
|
Sep 18 02:34:06 PM UTC 24 |
Sep 18 02:34:15 PM UTC 24 |
362226310 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.3876313197 |
|
|
Sep 18 02:34:06 PM UTC 24 |
Sep 18 02:34:18 PM UTC 24 |
839215243 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.1705856512 |
|
|
Sep 18 02:34:07 PM UTC 24 |
Sep 18 02:34:19 PM UTC 24 |
1184575914 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.4210588925 |
|
|
Sep 18 02:34:14 PM UTC 24 |
Sep 18 02:34:22 PM UTC 24 |
3103507233 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.1633742999 |
|
|
Sep 18 02:34:23 PM UTC 24 |
Sep 18 02:34:25 PM UTC 24 |
28941915 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.2821826381 |
|
|
Sep 18 02:34:23 PM UTC 24 |
Sep 18 02:34:26 PM UTC 24 |
29567471 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.2158972672 |
|
|
Sep 18 02:34:13 PM UTC 24 |
Sep 18 02:34:26 PM UTC 24 |
151782151 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.3072282146 |
|
|
Sep 18 02:34:08 PM UTC 24 |
Sep 18 02:34:31 PM UTC 24 |
16280734562 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.4271685806 |
|
|
Sep 18 02:34:30 PM UTC 24 |
Sep 18 02:34:32 PM UTC 24 |
20641894 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.2739822981 |
|
|
Sep 18 02:34:32 PM UTC 24 |
Sep 18 02:34:35 PM UTC 24 |
80413639 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/2.spi_device_stress_all.324072821 |
|
|
Sep 18 02:25:08 PM UTC 24 |
Sep 18 02:34:38 PM UTC 24 |
42340451037 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.3639671113 |
|
|
Sep 18 02:34:27 PM UTC 24 |
Sep 18 02:34:39 PM UTC 24 |
8142764348 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode.2400999769 |
|
|
Sep 18 02:33:24 PM UTC 24 |
Sep 18 02:34:40 PM UTC 24 |
4213363975 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.2532619909 |
|
|
Sep 18 02:34:33 PM UTC 24 |
Sep 18 02:34:40 PM UTC 24 |
260293963 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.242619236 |
|
|
Sep 18 02:34:36 PM UTC 24 |
Sep 18 02:34:42 PM UTC 24 |
1689940527 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.330733698 |
|
|
Sep 18 02:34:39 PM UTC 24 |
Sep 18 02:34:46 PM UTC 24 |
756393119 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.2555246928 |
|
|
Sep 18 02:34:42 PM UTC 24 |
Sep 18 02:34:48 PM UTC 24 |
92352563 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_upload.1454613899 |
|
|
Sep 18 02:34:41 PM UTC 24 |
Sep 18 02:34:48 PM UTC 24 |
1261433288 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.630757629 |
|
|
Sep 18 02:34:40 PM UTC 24 |
Sep 18 02:34:58 PM UTC 24 |
1762527160 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_all.2220874948 |
|
|
Sep 18 02:33:28 PM UTC 24 |
Sep 18 02:34:58 PM UTC 24 |
21133675121 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.1093567244 |
|
|
Sep 18 02:34:59 PM UTC 24 |
Sep 18 02:35:01 PM UTC 24 |
85991576 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.1243773029 |
|
|
Sep 18 02:34:27 PM UTC 24 |
Sep 18 02:35:03 PM UTC 24 |
12524764408 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.20519308 |
|
|
Sep 18 02:35:02 PM UTC 24 |
Sep 18 02:35:04 PM UTC 24 |
55138195 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.956192874 |
|
|
Sep 18 02:36:18 PM UTC 24 |
Sep 18 02:37:03 PM UTC 24 |
3834724021 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.1931023318 |
|
|
Sep 18 02:33:58 PM UTC 24 |
Sep 18 02:35:06 PM UTC 24 |
2568725218 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_all.4028604371 |
|
|
Sep 18 02:34:05 PM UTC 24 |
Sep 18 02:35:07 PM UTC 24 |
8654777493 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.3016751990 |
|
|
Sep 18 02:34:49 PM UTC 24 |
Sep 18 02:35:07 PM UTC 24 |
9085176394 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.3634059441 |
|
|
Sep 18 02:35:08 PM UTC 24 |
Sep 18 02:35:10 PM UTC 24 |
139159343 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.2389607325 |
|
|
Sep 18 02:35:07 PM UTC 24 |
Sep 18 02:35:11 PM UTC 24 |
190297401 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.2185240061 |
|
|
Sep 18 02:35:06 PM UTC 24 |
Sep 18 02:35:12 PM UTC 24 |
691106460 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/1.spi_device_flash_and_tpm_min_idle.800139112 |
|
|
Sep 18 02:24:11 PM UTC 24 |
Sep 18 02:35:12 PM UTC 24 |
109536654495 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.3299142149 |
|
|
Sep 18 02:35:08 PM UTC 24 |
Sep 18 02:35:15 PM UTC 24 |
577953769 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.701037506 |
|
|
Sep 18 02:34:41 PM UTC 24 |
Sep 18 02:35:15 PM UTC 24 |
11670557901 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.3886198272 |
|
|
Sep 18 02:35:08 PM UTC 24 |
Sep 18 02:35:16 PM UTC 24 |
2677445300 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.329847954 |
|
|
Sep 18 02:33:09 PM UTC 24 |
Sep 18 02:35:16 PM UTC 24 |
10632735371 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.1723688741 |
|
|
Sep 18 02:35:12 PM UTC 24 |
Sep 18 02:35:17 PM UTC 24 |
121957710 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.2701735233 |
|
|
Sep 18 02:35:11 PM UTC 24 |
Sep 18 02:35:20 PM UTC 24 |
1446997304 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.1015906456 |
|
|
Sep 18 02:35:18 PM UTC 24 |
Sep 18 02:35:24 PM UTC 24 |
342075650 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.747755199 |
|
|
Sep 18 02:35:11 PM UTC 24 |
Sep 18 02:35:27 PM UTC 24 |
835909868 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.2384761432 |
|
|
Sep 18 02:35:13 PM UTC 24 |
Sep 18 02:35:27 PM UTC 24 |
832372404 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.1222229271 |
|
|
Sep 18 02:35:28 PM UTC 24 |
Sep 18 02:35:31 PM UTC 24 |
15227164 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.4076399786 |
|
|
Sep 18 02:35:32 PM UTC 24 |
Sep 18 02:35:34 PM UTC 24 |
57017620 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.2643622553 |
|
|
Sep 18 02:35:15 PM UTC 24 |
Sep 18 02:35:40 PM UTC 24 |
17223746424 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/3.spi_device_stress_all.203279120 |
|
|
Sep 18 02:25:44 PM UTC 24 |
Sep 18 02:35:43 PM UTC 24 |
64172817137 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.1682086308 |
|
|
Sep 18 02:35:35 PM UTC 24 |
Sep 18 02:35:44 PM UTC 24 |
3817895165 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.301183860 |
|
|
Sep 18 02:35:17 PM UTC 24 |
Sep 18 02:35:45 PM UTC 24 |
5009066484 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.1838305227 |
|
|
Sep 18 02:35:44 PM UTC 24 |
Sep 18 02:35:46 PM UTC 24 |
19437619 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.2346829996 |
|
|
Sep 18 02:35:41 PM UTC 24 |
Sep 18 02:35:48 PM UTC 24 |
1157155119 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.34118792 |
|
|
Sep 18 02:31:24 PM UTC 24 |
Sep 18 02:35:50 PM UTC 24 |
22960314677 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.4190106285 |
|
|
Sep 18 02:35:45 PM UTC 24 |
Sep 18 02:35:50 PM UTC 24 |
1351407208 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.168386939 |
|
|
Sep 18 02:35:46 PM UTC 24 |
Sep 18 02:35:51 PM UTC 24 |
85886513 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.2213804786 |
|
|
Sep 18 02:35:48 PM UTC 24 |
Sep 18 02:35:54 PM UTC 24 |
181494264 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.2979974204 |
|
|
Sep 18 02:35:48 PM UTC 24 |
Sep 18 02:35:55 PM UTC 24 |
1064787755 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.2028824677 |
|
|
Sep 18 02:35:51 PM UTC 24 |
Sep 18 02:35:56 PM UTC 24 |
66882081 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_all.109470868 |
|
|
Sep 18 02:32:44 PM UTC 24 |
Sep 18 02:35:57 PM UTC 24 |
74709134885 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.154209042 |
|
|
Sep 18 02:35:51 PM UTC 24 |
Sep 18 02:35:58 PM UTC 24 |
175020350 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.3810737326 |
|
|
Sep 18 02:35:56 PM UTC 24 |
Sep 18 02:36:02 PM UTC 24 |
877984378 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2956443598 |
|
|
Sep 18 02:34:59 PM UTC 24 |
Sep 18 02:36:06 PM UTC 24 |
2744125137 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.1658734185 |
|
|
Sep 18 02:36:06 PM UTC 24 |
Sep 18 02:36:09 PM UTC 24 |
53580988 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.626500637 |
|
|
Sep 18 02:36:09 PM UTC 24 |
Sep 18 02:36:12 PM UTC 24 |
19693557 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.2841807649 |
|
|
Sep 18 02:35:51 PM UTC 24 |
Sep 18 02:36:17 PM UTC 24 |
877755678 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_all.56135359 |
|
|
Sep 18 02:29:57 PM UTC 24 |
Sep 18 02:36:22 PM UTC 24 |
144077107286 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.265968958 |
|
|
Sep 18 02:36:23 PM UTC 24 |
Sep 18 02:36:25 PM UTC 24 |
144492435 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.4071152462 |
|
|
Sep 18 02:36:24 PM UTC 24 |
Sep 18 02:36:26 PM UTC 24 |
10991955 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.3302745022 |
|
|
Sep 18 02:35:21 PM UTC 24 |
Sep 18 02:36:28 PM UTC 24 |
2612623096 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2761881931 |
|
|
Sep 18 02:36:13 PM UTC 24 |
Sep 18 02:36:32 PM UTC 24 |
3617849647 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.234012953 |
|
|
Sep 18 02:35:27 PM UTC 24 |
Sep 18 02:36:32 PM UTC 24 |
24844585089 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.576929101 |
|
|
Sep 18 02:36:26 PM UTC 24 |
Sep 18 02:36:36 PM UTC 24 |
469516631 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.3220969133 |
|
|
Sep 18 02:36:33 PM UTC 24 |
Sep 18 02:36:39 PM UTC 24 |
299911509 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.2229817248 |
|
|
Sep 18 02:34:16 PM UTC 24 |
Sep 18 02:36:42 PM UTC 24 |
64751288563 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.3671757611 |
|
|
Sep 18 02:33:26 PM UTC 24 |
Sep 18 02:36:42 PM UTC 24 |
22882543295 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.314562207 |
|
|
Sep 18 02:36:27 PM UTC 24 |
Sep 18 02:36:46 PM UTC 24 |
1388338319 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.2930868629 |
|
|
Sep 18 02:36:37 PM UTC 24 |
Sep 18 02:36:46 PM UTC 24 |
1347844624 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_stress_all.1516955713 |
|
|
Sep 18 02:36:03 PM UTC 24 |
Sep 18 02:36:47 PM UTC 24 |
2960590393 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.2961707667 |
|
|
Sep 18 02:34:48 PM UTC 24 |
Sep 18 02:36:52 PM UTC 24 |
52112406368 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.2377112361 |
|
|
Sep 18 02:36:39 PM UTC 24 |
Sep 18 02:36:55 PM UTC 24 |
855221386 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.2576774289 |
|
|
Sep 18 02:36:43 PM UTC 24 |
Sep 18 02:36:57 PM UTC 24 |
2633320861 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.1316286841 |
|
|
Sep 18 02:36:56 PM UTC 24 |
Sep 18 02:36:58 PM UTC 24 |
12616571 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.4007707320 |
|
|
Sep 18 02:36:58 PM UTC 24 |
Sep 18 02:37:01 PM UTC 24 |
45503767 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.3928897363 |
|
|
Sep 18 02:36:29 PM UTC 24 |
Sep 18 02:37:01 PM UTC 24 |
7091785002 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.754359093 |
|
|
Sep 18 02:37:00 PM UTC 24 |
Sep 18 02:37:02 PM UTC 24 |
26610343 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3170675862 |
|
|
Sep 18 02:37:02 PM UTC 24 |
Sep 18 02:37:04 PM UTC 24 |
51517494 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.1641061068 |
|
|
Sep 18 02:34:49 PM UTC 24 |
Sep 18 02:37:07 PM UTC 24 |
15152569083 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.730984634 |
|
|
Sep 18 02:37:03 PM UTC 24 |
Sep 18 02:37:07 PM UTC 24 |
177574970 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.4181274076 |
|
|
Sep 18 02:34:14 PM UTC 24 |
Sep 18 02:37:08 PM UTC 24 |
79282145100 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.1246562464 |
|
|
Sep 18 02:37:04 PM UTC 24 |
Sep 18 02:37:08 PM UTC 24 |
53007188 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.1537246553 |
|
|
Sep 18 02:35:49 PM UTC 24 |
Sep 18 02:37:10 PM UTC 24 |
42254683849 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.1955097254 |
|
|
Sep 18 02:37:05 PM UTC 24 |
Sep 18 02:37:14 PM UTC 24 |
910222748 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.3433605267 |
|
|
Sep 18 02:37:09 PM UTC 24 |
Sep 18 02:37:15 PM UTC 24 |
874424210 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.820562497 |
|
|
Sep 18 02:34:14 PM UTC 24 |
Sep 18 02:37:15 PM UTC 24 |
54489024421 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.1538580953 |
|
|
Sep 18 02:37:14 PM UTC 24 |
Sep 18 02:37:16 PM UTC 24 |
37960519 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.4091188187 |
|
|
Sep 18 02:37:11 PM UTC 24 |
Sep 18 02:37:17 PM UTC 24 |
770372060 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_stress_all.1186986627 |
|
|
Sep 18 02:27:10 PM UTC 24 |
Sep 18 02:37:19 PM UTC 24 |
118551094575 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.2217111511 |
|
|
Sep 18 02:37:15 PM UTC 24 |
Sep 18 02:37:22 PM UTC 24 |
1706766414 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_stress_all.213790777 |
|
|
Sep 18 02:37:20 PM UTC 24 |
Sep 18 02:37:23 PM UTC 24 |
72158039 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.4239121156 |
|
|
Sep 18 02:37:21 PM UTC 24 |
Sep 18 02:37:23 PM UTC 24 |
12037613 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_all.127301337 |
|
|
Sep 18 02:36:47 PM UTC 24 |
Sep 18 02:37:23 PM UTC 24 |
14394470682 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.4138660117 |
|
|
Sep 18 02:37:22 PM UTC 24 |
Sep 18 02:37:24 PM UTC 24 |
114891935 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.3416560420 |
|
|
Sep 18 02:37:25 PM UTC 24 |
Sep 18 02:37:27 PM UTC 24 |
27513805 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.1101734432 |
|
|
Sep 18 02:36:33 PM UTC 24 |
Sep 18 02:37:27 PM UTC 24 |
2749915163 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.322043480 |
|
|
Sep 18 02:37:09 PM UTC 24 |
Sep 18 02:37:28 PM UTC 24 |
5556819542 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.214993405 |
|
|
Sep 18 02:37:09 PM UTC 24 |
Sep 18 02:37:28 PM UTC 24 |
1466914476 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.1173248696 |
|
|
Sep 18 02:37:26 PM UTC 24 |
Sep 18 02:37:29 PM UTC 24 |
44883149 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.2766382223 |
|
|
Sep 18 02:37:28 PM UTC 24 |
Sep 18 02:37:33 PM UTC 24 |
249927293 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.2394985806 |
|
|
Sep 18 02:33:09 PM UTC 24 |
Sep 18 02:37:34 PM UTC 24 |
42768855995 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.2471146752 |
|
|
Sep 18 02:37:30 PM UTC 24 |
Sep 18 02:37:34 PM UTC 24 |
69856406 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.1460791245 |
|
|
Sep 18 02:37:28 PM UTC 24 |
Sep 18 02:37:35 PM UTC 24 |
134814727 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.1870361565 |
|
|
Sep 18 02:37:28 PM UTC 24 |
Sep 18 02:37:36 PM UTC 24 |
266033798 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.4076587446 |
|
|
Sep 18 02:37:25 PM UTC 24 |
Sep 18 02:37:38 PM UTC 24 |
5225980899 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.2715886835 |
|
|
Sep 18 02:37:34 PM UTC 24 |
Sep 18 02:37:40 PM UTC 24 |
709982797 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.1242054362 |
|
|
Sep 18 02:37:09 PM UTC 24 |
Sep 18 02:37:40 PM UTC 24 |
4411440985 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2651298646 |
|
|
Sep 18 02:37:36 PM UTC 24 |
Sep 18 02:37:42 PM UTC 24 |
90873593 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.2443242903 |
|
|
Sep 18 02:37:43 PM UTC 24 |
Sep 18 02:37:45 PM UTC 24 |
25865050 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.1511322328 |
|
|
Sep 18 02:37:02 PM UTC 24 |
Sep 18 02:37:45 PM UTC 24 |
21014593412 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.368166577 |
|
|
Sep 18 02:34:19 PM UTC 24 |
Sep 18 02:37:47 PM UTC 24 |
28043133660 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.3557211345 |
|
|
Sep 18 02:37:46 PM UTC 24 |
Sep 18 02:37:48 PM UTC 24 |
37740057 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.1816511162 |
|
|
Sep 18 02:34:59 PM UTC 24 |
Sep 18 02:37:49 PM UTC 24 |
39013530161 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.570030464 |
|
|
Sep 18 02:37:47 PM UTC 24 |
Sep 18 02:37:49 PM UTC 24 |
38738671 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.1165287325 |
|
|
Sep 18 02:36:48 PM UTC 24 |
Sep 18 02:37:50 PM UTC 24 |
14855424661 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.1832063207 |
|
|
Sep 18 02:37:50 PM UTC 24 |
Sep 18 02:37:52 PM UTC 24 |
365362910 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.1667400085 |
|
|
Sep 18 02:34:59 PM UTC 24 |
Sep 18 02:37:52 PM UTC 24 |
10745738132 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.3984155455 |
|
|
Sep 18 02:37:51 PM UTC 24 |
Sep 18 02:37:55 PM UTC 24 |
203751477 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.1733807962 |
|
|
Sep 18 02:37:46 PM UTC 24 |
Sep 18 02:37:57 PM UTC 24 |
3139846336 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.796523826 |
|
|
Sep 18 02:37:50 PM UTC 24 |
Sep 18 02:37:58 PM UTC 24 |
204650430 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.3925169779 |
|
|
Sep 18 02:37:53 PM UTC 24 |
Sep 18 02:37:58 PM UTC 24 |
327367287 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.4034687781 |
|
|
Sep 18 02:37:52 PM UTC 24 |
Sep 18 02:37:59 PM UTC 24 |
1335047848 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.3112331089 |
|
|
Sep 18 02:37:57 PM UTC 24 |
Sep 18 02:38:05 PM UTC 24 |
541566208 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.422822260 |
|
|
Sep 18 02:37:56 PM UTC 24 |
Sep 18 02:38:08 PM UTC 24 |
4415100627 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.1988322695 |
|
|
Sep 18 02:37:59 PM UTC 24 |
Sep 18 02:38:08 PM UTC 24 |
754464120 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.1170938976 |
|
|
Sep 18 02:37:30 PM UTC 24 |
Sep 18 02:38:10 PM UTC 24 |
7917758901 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_stress_all.1501644932 |
|
|
Sep 18 02:31:32 PM UTC 24 |
Sep 18 02:38:11 PM UTC 24 |
129961978395 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.1425701084 |
|
|
Sep 18 02:38:12 PM UTC 24 |
Sep 18 02:38:14 PM UTC 24 |
11761001 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.63619531 |
|
|
Sep 18 02:35:18 PM UTC 24 |
Sep 18 02:38:14 PM UTC 24 |
15012589628 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.3490111885 |
|
|
Sep 18 02:32:13 PM UTC 24 |
Sep 18 02:38:16 PM UTC 24 |
209729043366 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.282974391 |
|
|
Sep 18 02:38:15 PM UTC 24 |
Sep 18 02:38:17 PM UTC 24 |
22059456 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.1791771029 |
|
|
Sep 18 02:32:45 PM UTC 24 |
Sep 18 02:38:19 PM UTC 24 |
27254395473 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.1088865377 |
|
|
Sep 18 02:38:18 PM UTC 24 |
Sep 18 02:38:21 PM UTC 24 |
210528264 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.40915161 |
|
|
Sep 18 02:38:00 PM UTC 24 |
Sep 18 02:38:21 PM UTC 24 |
5045583160 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.593333494 |
|
|
Sep 18 02:38:19 PM UTC 24 |
Sep 18 02:38:23 PM UTC 24 |
161495204 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.1075384732 |
|
|
Sep 18 02:38:15 PM UTC 24 |
Sep 18 02:38:23 PM UTC 24 |
881685256 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.1043272401 |
|
|
Sep 18 02:35:17 PM UTC 24 |
Sep 18 02:38:25 PM UTC 24 |
30909617229 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.3035950473 |
|
|
Sep 18 02:38:22 PM UTC 24 |
Sep 18 02:38:26 PM UTC 24 |
98209805 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.3389260908 |
|
|
Sep 18 02:38:24 PM UTC 24 |
Sep 18 02:38:30 PM UTC 24 |
261264675 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.996664830 |
|
|
Sep 18 02:38:42 PM UTC 24 |
Sep 18 02:38:45 PM UTC 24 |
333944330 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.834616350 |
|
|
Sep 18 02:38:27 PM UTC 24 |
Sep 18 02:38:31 PM UTC 24 |
129497481 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_stress_all.2696055774 |
|
|
Sep 18 02:31:02 PM UTC 24 |
Sep 18 02:38:35 PM UTC 24 |
179122261520 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.2437653025 |
|
|
Sep 18 02:37:18 PM UTC 24 |
Sep 18 02:38:35 PM UTC 24 |
6986200697 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.1514160887 |
|
|
Sep 18 02:37:53 PM UTC 24 |
Sep 18 02:38:36 PM UTC 24 |
22015163464 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.3092497104 |
|
|
Sep 18 02:37:25 PM UTC 24 |
Sep 18 02:38:36 PM UTC 24 |
7982902168 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.3588175533 |
|
|
Sep 18 02:37:18 PM UTC 24 |
Sep 18 02:38:38 PM UTC 24 |
9868931751 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.2558084349 |
|
|
Sep 18 02:38:24 PM UTC 24 |
Sep 18 02:38:38 PM UTC 24 |
7805941408 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.1859115626 |
|
|
Sep 18 02:38:38 PM UTC 24 |
Sep 18 02:38:40 PM UTC 24 |
25486197 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.570132124 |
|
|
Sep 18 02:38:40 PM UTC 24 |
Sep 18 02:38:42 PM UTC 24 |
76570376 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_all.803381414 |
|
|
Sep 18 02:37:15 PM UTC 24 |
Sep 18 02:38:43 PM UTC 24 |
26897313408 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.4049494318 |
|
|
Sep 18 02:38:30 PM UTC 24 |
Sep 18 02:38:43 PM UTC 24 |
470111625 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.1756426901 |
|
|
Sep 18 02:38:25 PM UTC 24 |
Sep 18 02:38:44 PM UTC 24 |
6462111972 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_rw.766493175 |
|
|
Sep 18 02:38:44 PM UTC 24 |
Sep 18 02:38:47 PM UTC 24 |
57730740 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.2583902367 |
|
|
Sep 18 02:38:44 PM UTC 24 |
Sep 18 02:38:46 PM UTC 24 |
32042229 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.2066081126 |
|
|
Sep 18 02:38:32 PM UTC 24 |
Sep 18 02:38:51 PM UTC 24 |
2252164771 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.4140280763 |
|
|
Sep 18 02:38:44 PM UTC 24 |
Sep 18 02:38:52 PM UTC 24 |
1521244154 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.983564676 |
|
|
Sep 18 02:37:35 PM UTC 24 |
Sep 18 02:38:52 PM UTC 24 |
17177055782 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_all.709928192 |
|
|
Sep 18 02:26:56 PM UTC 24 |
Sep 18 02:38:53 PM UTC 24 |
69694683322 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.2478525207 |
|
|
Sep 18 02:38:22 PM UTC 24 |
Sep 18 02:38:53 PM UTC 24 |
5244782139 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.398421677 |
|
|
Sep 18 02:36:53 PM UTC 24 |
Sep 18 02:38:55 PM UTC 24 |
21522823676 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.2043722070 |
|
|
Sep 18 02:38:47 PM UTC 24 |
Sep 18 02:38:56 PM UTC 24 |
2651145894 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.891176243 |
|
|
Sep 18 02:38:53 PM UTC 24 |
Sep 18 02:38:58 PM UTC 24 |
1148296857 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.4189943999 |
|
|
Sep 18 02:33:54 PM UTC 24 |
Sep 18 02:38:59 PM UTC 24 |
290136534368 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.2876105464 |
|
|
Sep 18 02:38:52 PM UTC 24 |
Sep 18 02:39:00 PM UTC 24 |
1672372036 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.2933255149 |
|
|
Sep 18 02:38:46 PM UTC 24 |
Sep 18 02:39:01 PM UTC 24 |
6143935212 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.2746906133 |
|
|
Sep 18 02:38:54 PM UTC 24 |
Sep 18 02:39:01 PM UTC 24 |
220764850 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.3535924010 |
|
|
Sep 18 02:39:00 PM UTC 24 |
Sep 18 02:39:02 PM UTC 24 |
77636161 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.422085291 |
|
|
Sep 18 02:39:01 PM UTC 24 |
Sep 18 02:39:04 PM UTC 24 |
65110812 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.4109744051 |
|
|
Sep 18 02:39:03 PM UTC 24 |
Sep 18 02:39:05 PM UTC 24 |
22322822 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.3705517550 |
|
|
Sep 18 02:38:17 PM UTC 24 |
Sep 18 02:39:05 PM UTC 24 |
3419245766 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.1225104 |
|
|
Sep 18 02:39:05 PM UTC 24 |
Sep 18 02:39:11 PM UTC 24 |
893186202 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_mailbox.335959536 |
|
|
Sep 18 02:38:49 PM UTC 24 |
Sep 18 02:39:14 PM UTC 24 |
3105452586 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.1883067446 |
|
|
Sep 18 02:39:02 PM UTC 24 |
Sep 18 02:39:16 PM UTC 24 |
6179612517 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.76936048 |
|
|
Sep 18 02:38:57 PM UTC 24 |
Sep 18 02:39:19 PM UTC 24 |
3569313558 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.1112427580 |
|
|
Sep 18 02:39:12 PM UTC 24 |
Sep 18 02:39:19 PM UTC 24 |
164014026 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.1108856201 |
|
|
Sep 18 02:38:53 PM UTC 24 |
Sep 18 02:39:20 PM UTC 24 |
2344245651 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode.3362821005 |
|
|
Sep 18 02:38:53 PM UTC 24 |
Sep 18 02:39:22 PM UTC 24 |
4194638678 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.646226659 |
|
|
Sep 18 02:39:01 PM UTC 24 |
Sep 18 02:39:23 PM UTC 24 |
7083490142 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.3856758955 |
|
|
Sep 18 02:39:21 PM UTC 24 |
Sep 18 02:39:23 PM UTC 24 |
16116570 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.2642646023 |
|
|
Sep 18 02:39:20 PM UTC 24 |
Sep 18 02:39:24 PM UTC 24 |
83831671 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.1907048123 |
|
|
Sep 18 02:38:43 PM UTC 24 |
Sep 18 02:39:24 PM UTC 24 |
1967271770 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_stress_all.306902347 |
|
|
Sep 18 02:38:12 PM UTC 24 |
Sep 18 02:39:24 PM UTC 24 |
14630478370 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.90141525 |
|
|
Sep 18 02:39:06 PM UTC 24 |
Sep 18 02:39:27 PM UTC 24 |
56793742365 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.3432402831 |
|
|
Sep 18 02:39:26 PM UTC 24 |
Sep 18 02:39:28 PM UTC 24 |
15484363 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.2611548001 |
|
|
Sep 18 02:39:20 PM UTC 24 |
Sep 18 02:39:29 PM UTC 24 |
158078784 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.2721108196 |
|
|
Sep 18 02:39:28 PM UTC 24 |
Sep 18 02:39:31 PM UTC 24 |
12034504 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.2830895022 |
|
|
Sep 18 02:39:23 PM UTC 24 |
Sep 18 02:39:33 PM UTC 24 |
288722866 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.1038374536 |
|
|
Sep 18 02:39:31 PM UTC 24 |
Sep 18 02:39:34 PM UTC 24 |
319062573 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.3881783197 |
|
|
Sep 18 02:38:08 PM UTC 24 |
Sep 18 02:39:35 PM UTC 24 |
4926680097 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.4278348875 |
|
|
Sep 18 02:39:33 PM UTC 24 |
Sep 18 02:39:37 PM UTC 24 |
205592117 ps |