| T604 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.4041076311 |
|
|
Sep 18 02:39:17 PM UTC 24 |
Sep 18 02:39:38 PM UTC 24 |
2548707559 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.1408368977 |
|
|
Sep 18 02:39:06 PM UTC 24 |
Sep 18 02:39:40 PM UTC 24 |
22788285377 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.1916371532 |
|
|
Sep 18 02:39:29 PM UTC 24 |
Sep 18 02:39:40 PM UTC 24 |
4945111129 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.4110278270 |
|
|
Sep 18 02:39:38 PM UTC 24 |
Sep 18 02:39:42 PM UTC 24 |
115304138 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.3088912699 |
|
|
Sep 18 02:39:14 PM UTC 24 |
Sep 18 02:39:42 PM UTC 24 |
5350112328 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.1172154389 |
|
|
Sep 18 02:39:40 PM UTC 24 |
Sep 18 02:39:44 PM UTC 24 |
33794068 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.1512109146 |
|
|
Sep 18 02:39:41 PM UTC 24 |
Sep 18 02:39:46 PM UTC 24 |
61726882 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.3584247396 |
|
|
Sep 18 02:39:36 PM UTC 24 |
Sep 18 02:39:46 PM UTC 24 |
1759738783 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.1318700536 |
|
|
Sep 18 02:39:35 PM UTC 24 |
Sep 18 02:39:46 PM UTC 24 |
996022983 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.3660304565 |
|
|
Sep 18 02:39:39 PM UTC 24 |
Sep 18 02:39:46 PM UTC 24 |
101830446 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.3052611719 |
|
|
Sep 18 02:39:48 PM UTC 24 |
Sep 18 02:39:50 PM UTC 24 |
124952068 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.845740673 |
|
|
Sep 18 02:39:51 PM UTC 24 |
Sep 18 02:39:53 PM UTC 24 |
13824935 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.3819734427 |
|
|
Sep 18 02:39:23 PM UTC 24 |
Sep 18 02:39:54 PM UTC 24 |
4273591076 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.3693606407 |
|
|
Sep 18 02:38:37 PM UTC 24 |
Sep 18 02:39:55 PM UTC 24 |
8085159844 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.344543307 |
|
|
Sep 18 02:39:54 PM UTC 24 |
Sep 18 02:39:56 PM UTC 24 |
18643575 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.2520037449 |
|
|
Sep 18 02:39:57 PM UTC 24 |
Sep 18 02:40:00 PM UTC 24 |
70829317 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.2682868643 |
|
|
Sep 18 02:32:42 PM UTC 24 |
Sep 18 02:40:04 PM UTC 24 |
62143330440 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.1967425440 |
|
|
Sep 18 02:39:45 PM UTC 24 |
Sep 18 02:40:04 PM UTC 24 |
19977375196 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.3632173942 |
|
|
Sep 18 02:40:00 PM UTC 24 |
Sep 18 02:40:05 PM UTC 24 |
809291640 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.2803137881 |
|
|
Sep 18 02:39:30 PM UTC 24 |
Sep 18 02:40:05 PM UTC 24 |
5750204758 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.1093508015 |
|
|
Sep 18 02:39:55 PM UTC 24 |
Sep 18 02:40:09 PM UTC 24 |
9569746810 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.3104816785 |
|
|
Sep 18 02:39:43 PM UTC 24 |
Sep 18 02:40:10 PM UTC 24 |
2737588856 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.798129157 |
|
|
Sep 18 02:40:05 PM UTC 24 |
Sep 18 02:40:11 PM UTC 24 |
429757376 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.691948283 |
|
|
Sep 18 02:35:57 PM UTC 24 |
Sep 18 02:40:11 PM UTC 24 |
33772839517 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.3171676842 |
|
|
Sep 18 02:40:10 PM UTC 24 |
Sep 18 02:40:15 PM UTC 24 |
93005218 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.4232450108 |
|
|
Sep 18 02:38:56 PM UTC 24 |
Sep 18 02:40:15 PM UTC 24 |
3364574219 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.3427640969 |
|
|
Sep 18 02:40:16 PM UTC 24 |
Sep 18 02:40:18 PM UTC 24 |
119624850 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.3754235077 |
|
|
Sep 18 02:40:12 PM UTC 24 |
Sep 18 02:40:20 PM UTC 24 |
178103521 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.2718618445 |
|
|
Sep 18 02:38:36 PM UTC 24 |
Sep 18 02:40:23 PM UTC 24 |
10515142866 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.3078743965 |
|
|
Sep 18 02:40:16 PM UTC 24 |
Sep 18 02:40:24 PM UTC 24 |
288831310 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.3943239672 |
|
|
Sep 18 02:40:12 PM UTC 24 |
Sep 18 02:40:25 PM UTC 24 |
11940962223 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.575516642 |
|
|
Sep 18 02:40:25 PM UTC 24 |
Sep 18 02:40:27 PM UTC 24 |
35534218 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.2285069859 |
|
|
Sep 18 02:40:26 PM UTC 24 |
Sep 18 02:40:28 PM UTC 24 |
39801923 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.2812052681 |
|
|
Sep 18 02:36:43 PM UTC 24 |
Sep 18 02:40:30 PM UTC 24 |
23602121922 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.951986261 |
|
|
Sep 18 02:40:30 PM UTC 24 |
Sep 18 02:40:32 PM UTC 24 |
39569197 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.3177248469 |
|
|
Sep 18 02:36:47 PM UTC 24 |
Sep 18 02:40:33 PM UTC 24 |
76364432547 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_all.154666415 |
|
|
Sep 18 02:38:06 PM UTC 24 |
Sep 18 02:40:36 PM UTC 24 |
94801574611 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.1003056558 |
|
|
Sep 18 02:40:33 PM UTC 24 |
Sep 18 02:40:36 PM UTC 24 |
76443689 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.577298075 |
|
|
Sep 18 02:40:06 PM UTC 24 |
Sep 18 02:40:37 PM UTC 24 |
6803873796 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.1616964912 |
|
|
Sep 18 02:33:29 PM UTC 24 |
Sep 18 02:40:37 PM UTC 24 |
129237423221 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.3695639292 |
|
|
Sep 18 02:40:33 PM UTC 24 |
Sep 18 02:40:39 PM UTC 24 |
248834376 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.2915139407 |
|
|
Sep 18 02:40:29 PM UTC 24 |
Sep 18 02:40:40 PM UTC 24 |
1240037030 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.2726578098 |
|
|
Sep 18 02:40:06 PM UTC 24 |
Sep 18 02:40:42 PM UTC 24 |
8375532180 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.2136570741 |
|
|
Sep 18 02:40:05 PM UTC 24 |
Sep 18 02:40:44 PM UTC 24 |
13192722550 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.3477922834 |
|
|
Sep 18 02:35:54 PM UTC 24 |
Sep 18 02:40:45 PM UTC 24 |
29418053375 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.4271245298 |
|
|
Sep 18 02:40:40 PM UTC 24 |
Sep 18 02:40:45 PM UTC 24 |
102159984 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.2062872200 |
|
|
Sep 18 02:39:47 PM UTC 24 |
Sep 18 02:40:46 PM UTC 24 |
29983740805 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.1741812557 |
|
|
Sep 18 02:40:38 PM UTC 24 |
Sep 18 02:40:47 PM UTC 24 |
1556522786 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.2954054542 |
|
|
Sep 18 02:35:59 PM UTC 24 |
Sep 18 02:40:47 PM UTC 24 |
150776189125 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.3957042177 |
|
|
Sep 18 02:40:37 PM UTC 24 |
Sep 18 02:40:48 PM UTC 24 |
1660367830 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.321921891 |
|
|
Sep 18 02:39:47 PM UTC 24 |
Sep 18 02:40:49 PM UTC 24 |
4698224213 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.453885625 |
|
|
Sep 18 02:40:49 PM UTC 24 |
Sep 18 02:40:51 PM UTC 24 |
11301542 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.1304131157 |
|
|
Sep 18 02:40:49 PM UTC 24 |
Sep 18 02:40:51 PM UTC 24 |
47206622 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.1368135874 |
|
|
Sep 18 02:31:28 PM UTC 24 |
Sep 18 02:40:51 PM UTC 24 |
54085979043 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.4196128447 |
|
|
Sep 18 02:42:04 PM UTC 24 |
Sep 18 02:42:08 PM UTC 24 |
113196899 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.148405808 |
|
|
Sep 18 02:41:35 PM UTC 24 |
Sep 18 02:42:09 PM UTC 24 |
22936794926 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3700765472 |
|
|
Sep 18 02:39:47 PM UTC 24 |
Sep 18 02:40:53 PM UTC 24 |
16005068063 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.804759880 |
|
|
Sep 18 02:40:51 PM UTC 24 |
Sep 18 02:40:53 PM UTC 24 |
34677600 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.377991520 |
|
|
Sep 18 02:40:21 PM UTC 24 |
Sep 18 02:40:53 PM UTC 24 |
4816594076 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_stress_all.698017683 |
|
|
Sep 18 02:38:59 PM UTC 24 |
Sep 18 02:40:54 PM UTC 24 |
46900193437 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.4037866713 |
|
|
Sep 18 02:40:51 PM UTC 24 |
Sep 18 02:40:55 PM UTC 24 |
650753030 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.1946197579 |
|
|
Sep 18 02:40:51 PM UTC 24 |
Sep 18 02:40:56 PM UTC 24 |
207710916 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.851941928 |
|
|
Sep 18 02:40:55 PM UTC 24 |
Sep 18 02:40:59 PM UTC 24 |
207695158 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.3440903266 |
|
|
Sep 18 02:40:45 PM UTC 24 |
Sep 18 02:41:00 PM UTC 24 |
7816164263 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.727552371 |
|
|
Sep 18 02:40:37 PM UTC 24 |
Sep 18 02:41:00 PM UTC 24 |
3241760858 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.270799474 |
|
|
Sep 18 02:40:56 PM UTC 24 |
Sep 18 02:41:04 PM UTC 24 |
132461927 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.604233118 |
|
|
Sep 18 02:40:53 PM UTC 24 |
Sep 18 02:41:04 PM UTC 24 |
4360264822 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_stress_all.189990873 |
|
|
Sep 18 02:40:47 PM UTC 24 |
Sep 18 02:41:04 PM UTC 24 |
949012038 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.1031212628 |
|
|
Sep 18 02:40:45 PM UTC 24 |
Sep 18 02:41:04 PM UTC 24 |
11017619074 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.3227558727 |
|
|
Sep 18 02:40:38 PM UTC 24 |
Sep 18 02:41:05 PM UTC 24 |
11781040546 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.2548233233 |
|
|
Sep 18 02:40:51 PM UTC 24 |
Sep 18 02:41:07 PM UTC 24 |
1122546440 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.1311541249 |
|
|
Sep 18 02:41:05 PM UTC 24 |
Sep 18 02:41:08 PM UTC 24 |
44018694 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.1428837922 |
|
|
Sep 18 02:41:06 PM UTC 24 |
Sep 18 02:41:09 PM UTC 24 |
36189230 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.3861602648 |
|
|
Sep 18 02:40:55 PM UTC 24 |
Sep 18 02:41:10 PM UTC 24 |
7672570155 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.1876643724 |
|
|
Sep 18 02:41:01 PM UTC 24 |
Sep 18 02:41:11 PM UTC 24 |
923760024 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.3838282961 |
|
|
Sep 18 02:41:10 PM UTC 24 |
Sep 18 02:41:12 PM UTC 24 |
37440376 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.697218821 |
|
|
Sep 18 02:41:11 PM UTC 24 |
Sep 18 02:41:14 PM UTC 24 |
70231409 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.4177853369 |
|
|
Sep 18 02:40:50 PM UTC 24 |
Sep 18 02:41:14 PM UTC 24 |
13655645186 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.3471021250 |
|
|
Sep 18 02:41:08 PM UTC 24 |
Sep 18 02:41:15 PM UTC 24 |
7695385596 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.3083464518 |
|
|
Sep 18 02:40:28 PM UTC 24 |
Sep 18 02:41:17 PM UTC 24 |
19166186904 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.3868434584 |
|
|
Sep 18 02:41:14 PM UTC 24 |
Sep 18 02:41:19 PM UTC 24 |
1216652775 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.2213784138 |
|
|
Sep 18 02:41:13 PM UTC 24 |
Sep 18 02:41:19 PM UTC 24 |
614619286 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.2805586862 |
|
|
Sep 18 02:41:12 PM UTC 24 |
Sep 18 02:41:19 PM UTC 24 |
1309721987 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.356957200 |
|
|
Sep 18 02:39:56 PM UTC 24 |
Sep 18 02:41:21 PM UTC 24 |
41634463114 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.3297882423 |
|
|
Sep 18 02:41:09 PM UTC 24 |
Sep 18 02:41:21 PM UTC 24 |
5418923900 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.3270396391 |
|
|
Sep 18 02:40:43 PM UTC 24 |
Sep 18 02:41:25 PM UTC 24 |
1904071864 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.2902390771 |
|
|
Sep 18 02:38:32 PM UTC 24 |
Sep 18 02:41:26 PM UTC 24 |
106134553851 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.4000973918 |
|
|
Sep 18 02:41:18 PM UTC 24 |
Sep 18 02:41:27 PM UTC 24 |
1307883520 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.1298093666 |
|
|
Sep 18 02:41:20 PM UTC 24 |
Sep 18 02:41:28 PM UTC 24 |
188908270 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.4242294547 |
|
|
Sep 18 02:40:57 PM UTC 24 |
Sep 18 02:41:29 PM UTC 24 |
1469699571 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.463031914 |
|
|
Sep 18 02:41:16 PM UTC 24 |
Sep 18 02:41:29 PM UTC 24 |
505235995 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.3025314998 |
|
|
Sep 18 02:41:27 PM UTC 24 |
Sep 18 02:41:29 PM UTC 24 |
11765494 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.583194496 |
|
|
Sep 18 02:41:28 PM UTC 24 |
Sep 18 02:41:30 PM UTC 24 |
14935570 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.3634065714 |
|
|
Sep 18 02:41:30 PM UTC 24 |
Sep 18 02:41:32 PM UTC 24 |
32567482 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.4030074938 |
|
|
Sep 18 02:41:30 PM UTC 24 |
Sep 18 02:41:32 PM UTC 24 |
237916353 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.2098447843 |
|
|
Sep 18 02:38:55 PM UTC 24 |
Sep 18 02:41:33 PM UTC 24 |
22917007396 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.3906550669 |
|
|
Sep 18 02:41:20 PM UTC 24 |
Sep 18 02:41:33 PM UTC 24 |
1617909193 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.2681646694 |
|
|
Sep 18 02:41:02 PM UTC 24 |
Sep 18 02:41:34 PM UTC 24 |
5494533003 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.3682276816 |
|
|
Sep 18 02:41:35 PM UTC 24 |
Sep 18 02:41:39 PM UTC 24 |
125792493 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.3253722177 |
|
|
Sep 18 02:41:30 PM UTC 24 |
Sep 18 02:41:39 PM UTC 24 |
13254029703 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.2759612634 |
|
|
Sep 18 02:26:59 PM UTC 24 |
Sep 18 02:41:40 PM UTC 24 |
64089644155 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.3547005652 |
|
|
Sep 18 02:41:31 PM UTC 24 |
Sep 18 02:41:40 PM UTC 24 |
1620149815 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.4245416942 |
|
|
Sep 18 02:41:36 PM UTC 24 |
Sep 18 02:41:43 PM UTC 24 |
210386267 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.3074619547 |
|
|
Sep 18 02:41:33 PM UTC 24 |
Sep 18 02:41:44 PM UTC 24 |
30370513857 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.595191269 |
|
|
Sep 18 02:41:40 PM UTC 24 |
Sep 18 02:41:49 PM UTC 24 |
1031358407 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.37448143 |
|
|
Sep 18 02:41:33 PM UTC 24 |
Sep 18 02:41:50 PM UTC 24 |
2796105682 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.2670332324 |
|
|
Sep 18 02:41:50 PM UTC 24 |
Sep 18 02:41:52 PM UTC 24 |
17019613 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.3001261097 |
|
|
Sep 18 02:41:51 PM UTC 24 |
Sep 18 02:41:53 PM UTC 24 |
43921509 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.4093788327 |
|
|
Sep 18 02:39:24 PM UTC 24 |
Sep 18 02:41:55 PM UTC 24 |
5934964577 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.535013163 |
|
|
Sep 18 02:41:34 PM UTC 24 |
Sep 18 02:41:57 PM UTC 24 |
5971993020 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.3159782675 |
|
|
Sep 18 02:41:57 PM UTC 24 |
Sep 18 02:42:00 PM UTC 24 |
38907422 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.4053332418 |
|
|
Sep 18 02:41:58 PM UTC 24 |
Sep 18 02:42:02 PM UTC 24 |
222455869 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.4084997756 |
|
|
Sep 18 02:41:53 PM UTC 24 |
Sep 18 02:42:04 PM UTC 24 |
6123592617 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.2631340174 |
|
|
Sep 18 02:37:41 PM UTC 24 |
Sep 18 02:42:04 PM UTC 24 |
61128810743 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_stress_all.1335470967 |
|
|
Sep 18 02:41:27 PM UTC 24 |
Sep 18 02:42:06 PM UTC 24 |
3225350189 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.1230480337 |
|
|
Sep 18 02:41:55 PM UTC 24 |
Sep 18 02:42:08 PM UTC 24 |
5705467754 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.3673647544 |
|
|
Sep 18 02:42:04 PM UTC 24 |
Sep 18 02:42:13 PM UTC 24 |
1576768104 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.4209683710 |
|
|
Sep 18 02:42:09 PM UTC 24 |
Sep 18 02:42:13 PM UTC 24 |
332786265 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.2177175970 |
|
|
Sep 18 02:40:41 PM UTC 24 |
Sep 18 02:42:14 PM UTC 24 |
46899374638 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.4078151342 |
|
|
Sep 18 02:42:00 PM UTC 24 |
Sep 18 02:42:17 PM UTC 24 |
1905849041 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.352930291 |
|
|
Sep 18 02:40:55 PM UTC 24 |
Sep 18 02:42:19 PM UTC 24 |
9521913804 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.2936013055 |
|
|
Sep 18 02:41:30 PM UTC 24 |
Sep 18 02:42:19 PM UTC 24 |
11027016901 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.1908973545 |
|
|
Sep 18 02:42:07 PM UTC 24 |
Sep 18 02:42:19 PM UTC 24 |
986868404 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.151091221 |
|
|
Sep 18 02:42:10 PM UTC 24 |
Sep 18 02:42:22 PM UTC 24 |
208688961 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.2075317024 |
|
|
Sep 18 02:42:20 PM UTC 24 |
Sep 18 02:42:22 PM UTC 24 |
28202306 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.4087921471 |
|
|
Sep 18 02:42:20 PM UTC 24 |
Sep 18 02:42:22 PM UTC 24 |
54546143 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_stress_all.1422778482 |
|
|
Sep 18 02:42:20 PM UTC 24 |
Sep 18 02:42:23 PM UTC 24 |
97790198 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.497793342 |
|
|
Sep 18 02:42:24 PM UTC 24 |
Sep 18 02:42:26 PM UTC 24 |
17403366 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.3984197886 |
|
|
Sep 18 02:41:16 PM UTC 24 |
Sep 18 02:42:26 PM UTC 24 |
60212849105 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3399629147 |
|
|
Sep 18 02:42:24 PM UTC 24 |
Sep 18 02:42:26 PM UTC 24 |
27387912 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.549607413 |
|
|
Sep 18 02:42:13 PM UTC 24 |
Sep 18 02:42:27 PM UTC 24 |
3851990902 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.1435662122 |
|
|
Sep 18 02:42:24 PM UTC 24 |
Sep 18 02:42:27 PM UTC 24 |
29308568 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.196649093 |
|
|
Sep 18 02:42:03 PM UTC 24 |
Sep 18 02:42:30 PM UTC 24 |
11256990697 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.565752802 |
|
|
Sep 18 02:42:27 PM UTC 24 |
Sep 18 02:42:34 PM UTC 24 |
1359922241 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.3594902699 |
|
|
Sep 18 02:42:27 PM UTC 24 |
Sep 18 02:42:36 PM UTC 24 |
4791953239 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.2479192660 |
|
|
Sep 18 02:40:46 PM UTC 24 |
Sep 18 02:42:36 PM UTC 24 |
41984004219 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.1065484671 |
|
|
Sep 18 02:42:32 PM UTC 24 |
Sep 18 02:42:36 PM UTC 24 |
63593483 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.619323560 |
|
|
Sep 18 02:39:26 PM UTC 24 |
Sep 18 02:42:36 PM UTC 24 |
95719337301 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.3318206605 |
|
|
Sep 18 02:42:27 PM UTC 24 |
Sep 18 02:42:36 PM UTC 24 |
4317562210 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.1627643745 |
|
|
Sep 18 02:41:05 PM UTC 24 |
Sep 18 02:42:41 PM UTC 24 |
4334401565 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.810910564 |
|
|
Sep 18 02:35:25 PM UTC 24 |
Sep 18 02:42:42 PM UTC 24 |
55693911078 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.2779547305 |
|
|
Sep 18 02:42:28 PM UTC 24 |
Sep 18 02:42:43 PM UTC 24 |
8726595196 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.1683056280 |
|
|
Sep 18 02:42:37 PM UTC 24 |
Sep 18 02:42:44 PM UTC 24 |
399204339 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.1023173978 |
|
|
Sep 18 02:42:44 PM UTC 24 |
Sep 18 02:42:46 PM UTC 24 |
39382438 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.1325675794 |
|
|
Sep 18 02:42:44 PM UTC 24 |
Sep 18 02:42:46 PM UTC 24 |
20486260 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.2299784256 |
|
|
Sep 18 02:42:45 PM UTC 24 |
Sep 18 02:42:47 PM UTC 24 |
36782799 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.1622110888 |
|
|
Sep 18 02:40:59 PM UTC 24 |
Sep 18 02:42:49 PM UTC 24 |
19860676287 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.2739922209 |
|
|
Sep 18 02:42:47 PM UTC 24 |
Sep 18 02:42:50 PM UTC 24 |
61431924 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.1234161865 |
|
|
Sep 18 02:42:35 PM UTC 24 |
Sep 18 02:42:51 PM UTC 24 |
2982739738 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.1431729543 |
|
|
Sep 18 02:42:28 PM UTC 24 |
Sep 18 02:42:51 PM UTC 24 |
2030756358 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.1971131693 |
|
|
Sep 18 02:42:49 PM UTC 24 |
Sep 18 02:42:53 PM UTC 24 |
41289977 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.2004342829 |
|
|
Sep 18 02:42:52 PM UTC 24 |
Sep 18 02:42:56 PM UTC 24 |
30246080 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.2375642781 |
|
|
Sep 18 02:35:59 PM UTC 24 |
Sep 18 02:42:57 PM UTC 24 |
36846069661 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.1072631437 |
|
|
Sep 18 02:42:24 PM UTC 24 |
Sep 18 02:43:00 PM UTC 24 |
5209875309 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.1725724815 |
|
|
Sep 18 02:42:53 PM UTC 24 |
Sep 18 02:43:01 PM UTC 24 |
216931577 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.335740647 |
|
|
Sep 18 02:37:37 PM UTC 24 |
Sep 18 02:43:05 PM UTC 24 |
101151270132 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.3984386187 |
|
|
Sep 18 02:42:37 PM UTC 24 |
Sep 18 02:43:05 PM UTC 24 |
5887291027 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.639713704 |
|
|
Sep 18 02:42:58 PM UTC 24 |
Sep 18 02:43:05 PM UTC 24 |
969826710 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.3489986218 |
|
|
Sep 18 02:38:36 PM UTC 24 |
Sep 18 02:43:08 PM UTC 24 |
217147147609 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.3021219069 |
|
|
Sep 18 02:33:11 PM UTC 24 |
Sep 18 02:43:08 PM UTC 24 |
117212175909 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.1694888362 |
|
|
Sep 18 02:42:58 PM UTC 24 |
Sep 18 02:43:09 PM UTC 24 |
419809256 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_stress_all.4180875785 |
|
|
Sep 18 02:43:09 PM UTC 24 |
Sep 18 02:43:11 PM UTC 24 |
43542345 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.3637763521 |
|
|
Sep 18 02:43:10 PM UTC 24 |
Sep 18 02:43:12 PM UTC 24 |
13981661 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.3286735560 |
|
|
Sep 18 02:43:10 PM UTC 24 |
Sep 18 02:43:12 PM UTC 24 |
37955526 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.1698460267 |
|
|
Sep 18 02:42:47 PM UTC 24 |
Sep 18 02:43:13 PM UTC 24 |
14063895010 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.4202256501 |
|
|
Sep 18 02:42:51 PM UTC 24 |
Sep 18 02:43:14 PM UTC 24 |
779031158 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.4042185358 |
|
|
Sep 18 02:43:13 PM UTC 24 |
Sep 18 02:43:16 PM UTC 24 |
135766487 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.3548780639 |
|
|
Sep 18 02:41:40 PM UTC 24 |
Sep 18 02:43:16 PM UTC 24 |
10246784104 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.2766411264 |
|
|
Sep 18 02:43:14 PM UTC 24 |
Sep 18 02:43:18 PM UTC 24 |
259501805 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3790716258 |
|
|
Sep 18 02:43:12 PM UTC 24 |
Sep 18 02:43:19 PM UTC 24 |
1498131920 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.3317156720 |
|
|
Sep 18 02:43:02 PM UTC 24 |
Sep 18 02:43:19 PM UTC 24 |
10828325384 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.3777284755 |
|
|
Sep 18 02:42:50 PM UTC 24 |
Sep 18 02:43:20 PM UTC 24 |
7259040848 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.549490740 |
|
|
Sep 18 02:43:17 PM UTC 24 |
Sep 18 02:43:22 PM UTC 24 |
105700291 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.2446675584 |
|
|
Sep 18 02:38:37 PM UTC 24 |
Sep 18 02:43:24 PM UTC 24 |
119611985256 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.1752154853 |
|
|
Sep 18 02:43:20 PM UTC 24 |
Sep 18 02:43:25 PM UTC 24 |
677375338 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.90997445 |
|
|
Sep 18 02:43:17 PM UTC 24 |
Sep 18 02:43:26 PM UTC 24 |
508624368 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.3093283857 |
|
|
Sep 18 02:41:44 PM UTC 24 |
Sep 18 02:43:27 PM UTC 24 |
48076278172 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.3271014828 |
|
|
Sep 18 02:43:16 PM UTC 24 |
Sep 18 02:43:28 PM UTC 24 |
5296343756 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.2968019641 |
|
|
Sep 18 02:43:20 PM UTC 24 |
Sep 18 02:43:28 PM UTC 24 |
1431155691 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.315634253 |
|
|
Sep 18 02:37:59 PM UTC 24 |
Sep 18 02:43:28 PM UTC 24 |
137019144446 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.3330017654 |
|
|
Sep 18 02:42:52 PM UTC 24 |
Sep 18 02:43:30 PM UTC 24 |
2357825339 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.2173992770 |
|
|
Sep 18 02:43:29 PM UTC 24 |
Sep 18 02:43:31 PM UTC 24 |
78708376 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.1490247663 |
|
|
Sep 18 02:43:30 PM UTC 24 |
Sep 18 02:43:32 PM UTC 24 |
15921773 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.1146716611 |
|
|
Sep 18 02:43:19 PM UTC 24 |
Sep 18 02:43:32 PM UTC 24 |
8476457074 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.1814224254 |
|
|
Sep 18 02:43:25 PM UTC 24 |
Sep 18 02:43:33 PM UTC 24 |
1057949843 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.2052513108 |
|
|
Sep 18 02:41:05 PM UTC 24 |
Sep 18 02:43:34 PM UTC 24 |
16989414205 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.2788617883 |
|
|
Sep 18 02:43:33 PM UTC 24 |
Sep 18 02:43:36 PM UTC 24 |
53342726 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.855937163 |
|
|
Sep 18 02:41:22 PM UTC 24 |
Sep 18 02:43:36 PM UTC 24 |
49223072065 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.1103610996 |
|
|
Sep 18 02:43:33 PM UTC 24 |
Sep 18 02:43:36 PM UTC 24 |
246947971 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.595330760 |
|
|
Sep 18 02:43:22 PM UTC 24 |
Sep 18 02:43:40 PM UTC 24 |
865089896 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.4198689008 |
|
|
Sep 18 02:43:31 PM UTC 24 |
Sep 18 02:43:41 PM UTC 24 |
2244867941 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.4058359900 |
|
|
Sep 18 02:43:35 PM UTC 24 |
Sep 18 02:43:42 PM UTC 24 |
530129082 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.846430993 |
|
|
Sep 18 02:43:37 PM UTC 24 |
Sep 18 02:43:42 PM UTC 24 |
132874791 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.3939315360 |
|
|
Sep 18 02:43:37 PM UTC 24 |
Sep 18 02:43:43 PM UTC 24 |
840983581 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.164241657 |
|
|
Sep 18 02:43:37 PM UTC 24 |
Sep 18 02:43:44 PM UTC 24 |
188830648 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.616383989 |
|
|
Sep 18 02:43:13 PM UTC 24 |
Sep 18 02:43:45 PM UTC 24 |
19152587373 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.2887680039 |
|
|
Sep 18 02:43:36 PM UTC 24 |
Sep 18 02:43:46 PM UTC 24 |
2614566101 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.1247681478 |
|
|
Sep 18 02:43:32 PM UTC 24 |
Sep 18 02:43:47 PM UTC 24 |
1007658742 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode_ignore_cmds.3618204157 |
|
|
Sep 18 02:43:23 PM UTC 24 |
Sep 18 02:43:48 PM UTC 24 |
6941814724 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.1931701216 |
|
|
Sep 18 02:43:49 PM UTC 24 |
Sep 18 02:43:51 PM UTC 24 |
26596140 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.705943498 |
|
|
Sep 18 02:43:50 PM UTC 24 |
Sep 18 02:43:52 PM UTC 24 |
19573659 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.1249114335 |
|
|
Sep 18 02:41:41 PM UTC 24 |
Sep 18 02:43:54 PM UTC 24 |
8958265130 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.1824337355 |
|
|
Sep 18 02:42:37 PM UTC 24 |
Sep 18 02:43:54 PM UTC 24 |
5010152266 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3741214886 |
|
|
Sep 18 02:43:54 PM UTC 24 |
Sep 18 02:43:57 PM UTC 24 |
44604772 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.4095391326 |
|
|
Sep 18 02:43:43 PM UTC 24 |
Sep 18 02:43:57 PM UTC 24 |
4788790324 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.396570017 |
|
|
Sep 18 02:43:41 PM UTC 24 |
Sep 18 02:43:57 PM UTC 24 |
2943676663 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.194639054 |
|
|
Sep 18 02:42:14 PM UTC 24 |
Sep 18 02:43:58 PM UTC 24 |
4418883664 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.2706775680 |
|
|
Sep 18 02:43:52 PM UTC 24 |
Sep 18 02:43:58 PM UTC 24 |
2330938022 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_stress_all.635099757 |
|
|
Sep 18 02:41:45 PM UTC 24 |
Sep 18 02:43:58 PM UTC 24 |
7657193371 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.1340912328 |
|
|
Sep 18 02:43:55 PM UTC 24 |
Sep 18 02:44:01 PM UTC 24 |
219790078 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.3227156529 |
|
|
Sep 18 02:43:59 PM UTC 24 |
Sep 18 02:44:04 PM UTC 24 |
56336783 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.316109248 |
|
|
Sep 18 02:43:59 PM UTC 24 |
Sep 18 02:44:04 PM UTC 24 |
91236842 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.2777539846 |
|
|
Sep 18 02:43:59 PM UTC 24 |
Sep 18 02:44:05 PM UTC 24 |
623693757 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.3149828186 |
|
|
Sep 18 02:42:37 PM UTC 24 |
Sep 18 02:44:09 PM UTC 24 |
38026995588 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.2505993436 |
|
|
Sep 18 02:44:05 PM UTC 24 |
Sep 18 02:44:10 PM UTC 24 |
169944580 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.974274903 |
|
|
Sep 18 02:43:59 PM UTC 24 |
Sep 18 02:44:12 PM UTC 24 |
824895701 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.2531488989 |
|
|
Sep 18 02:43:58 PM UTC 24 |
Sep 18 02:44:14 PM UTC 24 |
1207569406 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.1752079625 |
|
|
Sep 18 02:44:01 PM UTC 24 |
Sep 18 02:44:16 PM UTC 24 |
10182088435 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.4038004841 |
|
|
Sep 18 02:44:15 PM UTC 24 |
Sep 18 02:44:17 PM UTC 24 |
70575984 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.1298242532 |
|
|
Sep 18 02:43:58 PM UTC 24 |
Sep 18 02:44:17 PM UTC 24 |
19603884651 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.919204596 |
|
|
Sep 18 02:44:17 PM UTC 24 |
Sep 18 02:44:19 PM UTC 24 |
60945142 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.328300341 |
|
|
Sep 18 02:43:53 PM UTC 24 |
Sep 18 02:44:21 PM UTC 24 |
1553883122 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.2272227031 |
|
|
Sep 18 02:44:20 PM UTC 24 |
Sep 18 02:44:22 PM UTC 24 |
42092897 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_all.2113376963 |
|
|
Sep 18 02:42:37 PM UTC 24 |
Sep 18 02:44:23 PM UTC 24 |
68962998253 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.3590486083 |
|
|
Sep 18 02:44:21 PM UTC 24 |
Sep 18 02:44:24 PM UTC 24 |
270785328 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.1238405310 |
|
|
Sep 18 02:44:18 PM UTC 24 |
Sep 18 02:44:25 PM UTC 24 |
1761194115 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_all.2812720850 |
|
|
Sep 18 02:44:18 PM UTC 24 |
Sep 18 02:44:27 PM UTC 24 |
961251217 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.4121421647 |
|
|
Sep 18 02:44:05 PM UTC 24 |
Sep 18 02:44:28 PM UTC 24 |
2477689525 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.1838605746 |
|
|
Sep 18 02:44:24 PM UTC 24 |
Sep 18 02:44:30 PM UTC 24 |
178132296 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_and_tpm.1222168008 |
|
|
Sep 18 02:43:45 PM UTC 24 |
Sep 18 02:44:34 PM UTC 24 |
12492182496 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.1224535499 |
|
|
Sep 18 02:43:01 PM UTC 24 |
Sep 18 02:44:37 PM UTC 24 |
13517832170 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.1781492369 |
|
|
Sep 18 02:44:27 PM UTC 24 |
Sep 18 02:44:38 PM UTC 24 |
321969729 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.4093717957 |
|
|
Sep 18 02:44:35 PM UTC 24 |
Sep 18 02:44:40 PM UTC 24 |
265455474 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.4112673056 |
|
|
Sep 18 02:44:26 PM UTC 24 |
Sep 18 02:44:41 PM UTC 24 |
3926861102 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.3105416035 |
|
|
Sep 18 02:43:43 PM UTC 24 |
Sep 18 02:44:42 PM UTC 24 |
4380225491 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.972347334 |
|
|
Sep 18 02:44:24 PM UTC 24 |
Sep 18 02:44:43 PM UTC 24 |
14929197324 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.4136877950 |
|
|
Sep 18 02:41:41 PM UTC 24 |
Sep 18 02:44:43 PM UTC 24 |
64869821931 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.3918628570 |
|
|
Sep 18 02:44:42 PM UTC 24 |
Sep 18 02:44:44 PM UTC 24 |
28924122 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_all.547314579 |
|
|
Sep 18 02:44:38 PM UTC 24 |
Sep 18 02:44:45 PM UTC 24 |
447588743 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.2928728914 |
|
|
Sep 18 02:44:43 PM UTC 24 |
Sep 18 02:44:45 PM UTC 24 |
106339948 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.2540844551 |
|
|
Sep 18 02:33:59 PM UTC 24 |
Sep 18 02:44:45 PM UTC 24 |
258586830936 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.3420476442 |
|
|
Sep 18 02:44:44 PM UTC 24 |
Sep 18 02:44:46 PM UTC 24 |
178551665 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.1562115823 |
|
|
Sep 18 02:44:24 PM UTC 24 |
Sep 18 02:44:47 PM UTC 24 |
4907700025 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_mode.1260926555 |
|
|
Sep 18 02:44:29 PM UTC 24 |
Sep 18 02:44:48 PM UTC 24 |
2636782718 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_mode_ignore_cmds.3060441440 |
|
|
Sep 18 02:44:31 PM UTC 24 |
Sep 18 02:44:49 PM UTC 24 |
5600683563 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_mailbox.3118472597 |
|
|
Sep 18 02:44:25 PM UTC 24 |
Sep 18 02:44:49 PM UTC 24 |
2206474520 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_pass_addr_payload_swap.867371933 |
|
|
Sep 18 02:44:46 PM UTC 24 |
Sep 18 02:44:50 PM UTC 24 |
81557105 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.1384186530 |
|
|
Sep 18 02:40:12 PM UTC 24 |
Sep 18 02:44:52 PM UTC 24 |
226934023870 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_stress_all.137318533 |
|
|
Sep 18 02:32:47 PM UTC 24 |
Sep 18 02:44:54 PM UTC 24 |
299832064652 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_17/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_cfg_cmd.3576297613 |
|
|
Sep 18 02:44:50 PM UTC 24 |
Sep 18 02:44:54 PM UTC 24 |
192617700 ps |