| T439 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.1790765794 |
|
|
Sep 24 02:41:09 PM UTC 24 |
Sep 24 02:41:12 PM UTC 24 |
151362472 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_stress_all.1838277188 |
|
|
Sep 24 02:39:53 PM UTC 24 |
Sep 24 02:40:26 PM UTC 24 |
1318628670 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.916067985 |
|
|
Sep 24 02:39:59 PM UTC 24 |
Sep 24 02:40:28 PM UTC 24 |
29565325985 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.2568992998 |
|
|
Sep 24 02:40:27 PM UTC 24 |
Sep 24 02:40:29 PM UTC 24 |
71598199 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_rw.1075921676 |
|
|
Sep 24 02:40:27 PM UTC 24 |
Sep 24 02:40:30 PM UTC 24 |
79899825 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_all.896714483 |
|
|
Sep 24 02:38:43 PM UTC 24 |
Sep 24 02:40:32 PM UTC 24 |
35759291037 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_upload.255118839 |
|
|
Sep 24 02:40:04 PM UTC 24 |
Sep 24 02:40:32 PM UTC 24 |
18230667263 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.3510470410 |
|
|
Sep 24 02:40:27 PM UTC 24 |
Sep 24 02:40:33 PM UTC 24 |
871636944 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_stress_all.2326625705 |
|
|
Sep 24 02:37:40 PM UTC 24 |
Sep 24 02:40:33 PM UTC 24 |
77407405070 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.158272991 |
|
|
Sep 24 02:40:31 PM UTC 24 |
Sep 24 02:40:35 PM UTC 24 |
59478966 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_mailbox.1888529184 |
|
|
Sep 24 02:39:30 PM UTC 24 |
Sep 24 02:40:35 PM UTC 24 |
7049323337 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.2104664802 |
|
|
Sep 24 02:40:27 PM UTC 24 |
Sep 24 02:40:35 PM UTC 24 |
642135873 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_all.4169672408 |
|
|
Sep 24 02:39:57 PM UTC 24 |
Sep 24 02:40:36 PM UTC 24 |
21899393544 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_intercept.1585961169 |
|
|
Sep 24 02:40:29 PM UTC 24 |
Sep 24 02:40:37 PM UTC 24 |
86407909 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.1409554153 |
|
|
Sep 24 02:40:48 PM UTC 24 |
Sep 24 02:41:11 PM UTC 24 |
6867732902 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.2113852262 |
|
|
Sep 24 02:40:37 PM UTC 24 |
Sep 24 02:40:39 PM UTC 24 |
49146208 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.2133155254 |
|
|
Sep 24 02:40:38 PM UTC 24 |
Sep 24 02:40:40 PM UTC 24 |
18348329 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode.2749204663 |
|
|
Sep 24 02:40:33 PM UTC 24 |
Sep 24 02:40:41 PM UTC 24 |
159286715 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.3710255472 |
|
|
Sep 24 02:40:34 PM UTC 24 |
Sep 24 02:40:41 PM UTC 24 |
194642752 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_mailbox.3399515861 |
|
|
Sep 24 02:38:56 PM UTC 24 |
Sep 24 02:40:42 PM UTC 24 |
10731156545 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.3569360761 |
|
|
Sep 24 02:40:42 PM UTC 24 |
Sep 24 02:40:44 PM UTC 24 |
47273167 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_pass_cmd_filtering.3254972870 |
|
|
Sep 24 02:39:44 PM UTC 24 |
Sep 24 02:40:45 PM UTC 24 |
47785954840 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.542930903 |
|
|
Sep 24 02:40:42 PM UTC 24 |
Sep 24 02:40:46 PM UTC 24 |
233921288 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.3950223032 |
|
|
Sep 24 02:39:53 PM UTC 24 |
Sep 24 02:40:46 PM UTC 24 |
11964368099 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.564179563 |
|
|
Sep 24 02:40:25 PM UTC 24 |
Sep 24 02:40:47 PM UTC 24 |
5773833987 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.2295661425 |
|
|
Sep 24 02:40:43 PM UTC 24 |
Sep 24 02:40:48 PM UTC 24 |
60804985 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_all.3596869566 |
|
|
Sep 24 02:40:34 PM UTC 24 |
Sep 24 02:40:49 PM UTC 24 |
630364910 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.3456981199 |
|
|
Sep 24 02:40:41 PM UTC 24 |
Sep 24 02:40:49 PM UTC 24 |
292686623 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.1878917005 |
|
|
Sep 24 02:40:41 PM UTC 24 |
Sep 24 02:40:50 PM UTC 24 |
1396142126 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_upload.3137288348 |
|
|
Sep 24 02:40:31 PM UTC 24 |
Sep 24 02:40:50 PM UTC 24 |
26570563768 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode.472328425 |
|
|
Sep 24 02:40:08 PM UTC 24 |
Sep 24 02:40:53 PM UTC 24 |
2770536639 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.1867511928 |
|
|
Sep 24 02:40:46 PM UTC 24 |
Sep 24 02:40:53 PM UTC 24 |
1477404769 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.2845527380 |
|
|
Sep 24 02:39:02 PM UTC 24 |
Sep 24 02:40:53 PM UTC 24 |
6593863436 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.2849121135 |
|
|
Sep 24 02:40:48 PM UTC 24 |
Sep 24 02:40:53 PM UTC 24 |
527016220 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.1746484665 |
|
|
Sep 24 02:40:46 PM UTC 24 |
Sep 24 02:40:54 PM UTC 24 |
838863497 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.3023426350 |
|
|
Sep 24 02:39:46 PM UTC 24 |
Sep 24 02:40:54 PM UTC 24 |
9791056133 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.318049927 |
|
|
Sep 24 02:39:23 PM UTC 24 |
Sep 24 02:40:54 PM UTC 24 |
2958399523 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.2714130840 |
|
|
Sep 24 02:40:54 PM UTC 24 |
Sep 24 02:40:56 PM UTC 24 |
16739896 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.304856675 |
|
|
Sep 24 02:40:54 PM UTC 24 |
Sep 24 02:40:56 PM UTC 24 |
24019149 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.2921221494 |
|
|
Sep 24 02:40:54 PM UTC 24 |
Sep 24 02:40:56 PM UTC 24 |
37991927 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.812063061 |
|
|
Sep 24 02:40:09 PM UTC 24 |
Sep 24 02:40:56 PM UTC 24 |
17477648274 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.2184503722 |
|
|
Sep 24 02:40:55 PM UTC 24 |
Sep 24 02:40:57 PM UTC 24 |
32159390 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_cfg_cmd.4286758252 |
|
|
Sep 24 02:40:33 PM UTC 24 |
Sep 24 02:41:15 PM UTC 24 |
12252263222 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.3323379062 |
|
|
Sep 24 02:40:15 PM UTC 24 |
Sep 24 02:40:57 PM UTC 24 |
8150937956 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.3337096282 |
|
|
Sep 24 02:40:26 PM UTC 24 |
Sep 24 02:40:58 PM UTC 24 |
10080260577 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.3845762962 |
|
|
Sep 24 02:40:57 PM UTC 24 |
Sep 24 02:41:00 PM UTC 24 |
62756296 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.2254817674 |
|
|
Sep 24 02:40:57 PM UTC 24 |
Sep 24 02:41:00 PM UTC 24 |
150797848 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_tpm_all.3926476498 |
|
|
Sep 24 02:39:42 PM UTC 24 |
Sep 24 02:41:01 PM UTC 24 |
176295647100 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_mailbox.976578090 |
|
|
Sep 24 02:39:44 PM UTC 24 |
Sep 24 02:41:01 PM UTC 24 |
10181664743 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.685287303 |
|
|
Sep 24 02:40:59 PM UTC 24 |
Sep 24 02:41:03 PM UTC 24 |
134065126 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.4044588624 |
|
|
Sep 24 02:39:37 PM UTC 24 |
Sep 24 02:41:03 PM UTC 24 |
4979252091 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_all.1659291520 |
|
|
Sep 24 02:39:19 PM UTC 24 |
Sep 24 02:41:05 PM UTC 24 |
15683185034 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.622448635 |
|
|
Sep 24 02:40:59 PM UTC 24 |
Sep 24 02:41:05 PM UTC 24 |
140340959 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_all.2849771179 |
|
|
Sep 24 02:39:37 PM UTC 24 |
Sep 24 02:41:07 PM UTC 24 |
14452150128 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.1867514509 |
|
|
Sep 24 02:40:57 PM UTC 24 |
Sep 24 02:41:08 PM UTC 24 |
1446686308 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.538733720 |
|
|
Sep 24 02:41:06 PM UTC 24 |
Sep 24 02:41:08 PM UTC 24 |
13146053 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.1009779615 |
|
|
Sep 24 02:41:06 PM UTC 24 |
Sep 24 02:41:08 PM UTC 24 |
14990945 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.3732383703 |
|
|
Sep 24 02:40:50 PM UTC 24 |
Sep 24 02:41:09 PM UTC 24 |
919270967 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.1919033265 |
|
|
Sep 24 02:39:51 PM UTC 24 |
Sep 24 02:41:09 PM UTC 24 |
27975882740 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_and_tpm.738678810 |
|
|
Sep 24 02:37:56 PM UTC 24 |
Sep 24 02:41:10 PM UTC 24 |
87825311099 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.3702018598 |
|
|
Sep 24 02:40:13 PM UTC 24 |
Sep 24 02:41:13 PM UTC 24 |
2300581932 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.3920737353 |
|
|
Sep 24 02:41:09 PM UTC 24 |
Sep 24 02:41:12 PM UTC 24 |
126189970 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.164176522 |
|
|
Sep 24 02:41:12 PM UTC 24 |
Sep 24 02:41:17 PM UTC 24 |
106208949 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.3081982287 |
|
|
Sep 24 02:41:11 PM UTC 24 |
Sep 24 02:41:17 PM UTC 24 |
349825249 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.590906641 |
|
|
Sep 24 02:41:14 PM UTC 24 |
Sep 24 02:41:19 PM UTC 24 |
88753483 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2260286126 |
|
|
Sep 24 02:41:08 PM UTC 24 |
Sep 24 02:41:19 PM UTC 24 |
1365967115 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.1409627231 |
|
|
Sep 24 02:40:57 PM UTC 24 |
Sep 24 02:41:22 PM UTC 24 |
4632451580 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.4023783703 |
|
|
Sep 24 02:40:59 PM UTC 24 |
Sep 24 02:41:23 PM UTC 24 |
1499336469 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.680339069 |
|
|
Sep 24 02:41:09 PM UTC 24 |
Sep 24 02:41:24 PM UTC 24 |
1610817096 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.1628888437 |
|
|
Sep 24 02:40:49 PM UTC 24 |
Sep 24 02:41:24 PM UTC 24 |
12085255004 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.3571488864 |
|
|
Sep 24 02:41:02 PM UTC 24 |
Sep 24 02:41:25 PM UTC 24 |
5066889017 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.2786849281 |
|
|
Sep 24 02:41:24 PM UTC 24 |
Sep 24 02:41:26 PM UTC 24 |
34319634 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.2999682338 |
|
|
Sep 24 02:41:24 PM UTC 24 |
Sep 24 02:41:26 PM UTC 24 |
20936296 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.3232092612 |
|
|
Sep 24 02:41:49 PM UTC 24 |
Sep 24 02:42:12 PM UTC 24 |
1372945789 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.2482604138 |
|
|
Sep 24 02:41:11 PM UTC 24 |
Sep 24 02:41:28 PM UTC 24 |
18577275190 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_flash_and_tpm.975652674 |
|
|
Sep 24 02:37:28 PM UTC 24 |
Sep 24 02:41:28 PM UTC 24 |
24284576808 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.2594114521 |
|
|
Sep 24 02:41:26 PM UTC 24 |
Sep 24 02:41:29 PM UTC 24 |
337219639 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.3149729162 |
|
|
Sep 24 02:40:59 PM UTC 24 |
Sep 24 02:41:29 PM UTC 24 |
17862317151 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.1478716662 |
|
|
Sep 24 02:41:25 PM UTC 24 |
Sep 24 02:41:30 PM UTC 24 |
2890173965 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.3093652706 |
|
|
Sep 24 02:41:13 PM UTC 24 |
Sep 24 02:41:31 PM UTC 24 |
5171331748 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.2045600797 |
|
|
Sep 24 02:40:35 PM UTC 24 |
Sep 24 02:41:32 PM UTC 24 |
14486793035 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.2686475927 |
|
|
Sep 24 02:41:27 PM UTC 24 |
Sep 24 02:41:32 PM UTC 24 |
98707845 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.3977489021 |
|
|
Sep 24 02:39:36 PM UTC 24 |
Sep 24 02:41:33 PM UTC 24 |
30484300479 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.849032876 |
|
|
Sep 24 02:41:27 PM UTC 24 |
Sep 24 02:41:33 PM UTC 24 |
488215547 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.3070334397 |
|
|
Sep 24 02:41:16 PM UTC 24 |
Sep 24 02:41:35 PM UTC 24 |
944875049 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_stress_all.3703254963 |
|
|
Sep 24 02:40:37 PM UTC 24 |
Sep 24 02:41:35 PM UTC 24 |
59466073983 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.951811418 |
|
|
Sep 24 02:41:11 PM UTC 24 |
Sep 24 02:41:36 PM UTC 24 |
3535290557 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.2605182325 |
|
|
Sep 24 02:41:28 PM UTC 24 |
Sep 24 02:41:36 PM UTC 24 |
143832275 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.582518504 |
|
|
Sep 24 02:41:28 PM UTC 24 |
Sep 24 02:41:38 PM UTC 24 |
1665765805 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.1453140778 |
|
|
Sep 24 02:41:36 PM UTC 24 |
Sep 24 02:41:38 PM UTC 24 |
43833199 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.2139568561 |
|
|
Sep 24 02:41:37 PM UTC 24 |
Sep 24 02:41:39 PM UTC 24 |
33570744 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.2096389248 |
|
|
Sep 24 02:41:37 PM UTC 24 |
Sep 24 02:41:39 PM UTC 24 |
43996973 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.3910744064 |
|
|
Sep 24 02:41:30 PM UTC 24 |
Sep 24 02:41:41 PM UTC 24 |
1159628408 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_mode_ignore_cmds.2856024230 |
|
|
Sep 24 02:37:53 PM UTC 24 |
Sep 24 02:41:41 PM UTC 24 |
25890177653 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.3017639448 |
|
|
Sep 24 02:41:17 PM UTC 24 |
Sep 24 02:41:41 PM UTC 24 |
4927795282 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.4286929843 |
|
|
Sep 24 02:41:40 PM UTC 24 |
Sep 24 02:41:42 PM UTC 24 |
32065918 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.3322723350 |
|
|
Sep 24 02:41:40 PM UTC 24 |
Sep 24 02:41:43 PM UTC 24 |
135277020 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_all.2465081275 |
|
|
Sep 24 02:40:55 PM UTC 24 |
Sep 24 02:41:44 PM UTC 24 |
115052436187 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_flash_mode_ignore_cmds.1871852164 |
|
|
Sep 24 02:37:26 PM UTC 24 |
Sep 24 02:41:45 PM UTC 24 |
420069409076 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.758489590 |
|
|
Sep 24 02:41:31 PM UTC 24 |
Sep 24 02:41:46 PM UTC 24 |
374431514 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.1849235094 |
|
|
Sep 24 02:41:25 PM UTC 24 |
Sep 24 02:41:48 PM UTC 24 |
2477107669 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.3688518024 |
|
|
Sep 24 02:41:45 PM UTC 24 |
Sep 24 02:41:48 PM UTC 24 |
12323381 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.1160081921 |
|
|
Sep 24 02:41:38 PM UTC 24 |
Sep 24 02:41:48 PM UTC 24 |
1459571047 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.562370556 |
|
|
Sep 24 02:41:43 PM UTC 24 |
Sep 24 02:41:49 PM UTC 24 |
139072078 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.3855662741 |
|
|
Sep 24 02:41:40 PM UTC 24 |
Sep 24 02:41:49 PM UTC 24 |
2064980668 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.2863149222 |
|
|
Sep 24 02:41:37 PM UTC 24 |
Sep 24 02:41:50 PM UTC 24 |
6753426140 ps |
| T38 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.2152961939 |
|
|
Sep 24 02:40:15 PM UTC 24 |
Sep 24 02:41:50 PM UTC 24 |
6078689524 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.1382739492 |
|
|
Sep 24 02:41:30 PM UTC 24 |
Sep 24 02:41:51 PM UTC 24 |
5437359639 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.915860725 |
|
|
Sep 24 02:41:50 PM UTC 24 |
Sep 24 02:41:52 PM UTC 24 |
42204663 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.1116019986 |
|
|
Sep 24 02:41:42 PM UTC 24 |
Sep 24 02:41:52 PM UTC 24 |
3804977466 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.1498539057 |
|
|
Sep 24 02:41:30 PM UTC 24 |
Sep 24 02:41:52 PM UTC 24 |
8152438162 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.495716307 |
|
|
Sep 24 02:41:32 PM UTC 24 |
Sep 24 02:41:52 PM UTC 24 |
3046342910 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.854248495 |
|
|
Sep 24 02:41:52 PM UTC 24 |
Sep 24 02:41:54 PM UTC 24 |
69440850 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.2715816488 |
|
|
Sep 24 02:41:54 PM UTC 24 |
Sep 24 02:41:57 PM UTC 24 |
759460709 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.245046180 |
|
|
Sep 24 02:41:40 PM UTC 24 |
Sep 24 02:41:57 PM UTC 24 |
4522608829 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.2031008754 |
|
|
Sep 24 02:41:54 PM UTC 24 |
Sep 24 02:41:57 PM UTC 24 |
58391958 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.2487452803 |
|
|
Sep 24 02:41:33 PM UTC 24 |
Sep 24 02:41:58 PM UTC 24 |
5365515340 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.806879276 |
|
|
Sep 24 02:40:54 PM UTC 24 |
Sep 24 02:41:59 PM UTC 24 |
3031680899 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.1705180315 |
|
|
Sep 24 02:41:52 PM UTC 24 |
Sep 24 02:42:01 PM UTC 24 |
9958196089 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.1670574323 |
|
|
Sep 24 02:41:45 PM UTC 24 |
Sep 24 02:42:02 PM UTC 24 |
5408651470 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.2678069633 |
|
|
Sep 24 02:38:24 PM UTC 24 |
Sep 24 02:42:02 PM UTC 24 |
139238587341 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_upload.3233367622 |
|
|
Sep 24 02:41:13 PM UTC 24 |
Sep 24 02:42:03 PM UTC 24 |
17745036975 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.4240134407 |
|
|
Sep 24 02:41:54 PM UTC 24 |
Sep 24 02:42:04 PM UTC 24 |
1123824741 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.150471262 |
|
|
Sep 24 02:41:42 PM UTC 24 |
Sep 24 02:42:05 PM UTC 24 |
8920302597 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.863644698 |
|
|
Sep 24 02:41:54 PM UTC 24 |
Sep 24 02:42:06 PM UTC 24 |
5283599935 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.3854812964 |
|
|
Sep 24 02:41:02 PM UTC 24 |
Sep 24 02:42:06 PM UTC 24 |
21534855626 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.1555695256 |
|
|
Sep 24 02:41:59 PM UTC 24 |
Sep 24 02:42:06 PM UTC 24 |
731955128 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.4151396681 |
|
|
Sep 24 02:41:54 PM UTC 24 |
Sep 24 02:42:07 PM UTC 24 |
23051056970 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.1220438269 |
|
|
Sep 24 02:42:05 PM UTC 24 |
Sep 24 02:42:08 PM UTC 24 |
13741502 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.2367374544 |
|
|
Sep 24 02:42:05 PM UTC 24 |
Sep 24 02:42:08 PM UTC 24 |
14974871 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.876568939 |
|
|
Sep 24 02:41:42 PM UTC 24 |
Sep 24 02:42:08 PM UTC 24 |
3864263913 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.1666842264 |
|
|
Sep 24 02:41:59 PM UTC 24 |
Sep 24 02:42:09 PM UTC 24 |
4740511034 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.2879505106 |
|
|
Sep 24 02:41:52 PM UTC 24 |
Sep 24 02:42:09 PM UTC 24 |
2704619746 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.2937592132 |
|
|
Sep 24 02:41:59 PM UTC 24 |
Sep 24 02:42:10 PM UTC 24 |
1276221221 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.1415680653 |
|
|
Sep 24 02:42:09 PM UTC 24 |
Sep 24 02:42:11 PM UTC 24 |
27862805 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.3043624925 |
|
|
Sep 24 02:42:01 PM UTC 24 |
Sep 24 02:42:11 PM UTC 24 |
2351155061 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.739949546 |
|
|
Sep 24 02:42:09 PM UTC 24 |
Sep 24 02:42:12 PM UTC 24 |
164204206 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.1106672662 |
|
|
Sep 24 02:41:18 PM UTC 24 |
Sep 24 02:42:13 PM UTC 24 |
63432271607 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.4222704481 |
|
|
Sep 24 02:42:09 PM UTC 24 |
Sep 24 02:42:13 PM UTC 24 |
135639595 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.2027568513 |
|
|
Sep 24 02:42:11 PM UTC 24 |
Sep 24 02:42:16 PM UTC 24 |
189762277 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.1481333092 |
|
|
Sep 24 02:41:43 PM UTC 24 |
Sep 24 02:42:18 PM UTC 24 |
10341036130 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.2477756795 |
|
|
Sep 24 02:42:17 PM UTC 24 |
Sep 24 02:42:19 PM UTC 24 |
15051462 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1409680112 |
|
|
Sep 24 02:42:13 PM UTC 24 |
Sep 24 02:42:21 PM UTC 24 |
956166480 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.4123459260 |
|
|
Sep 24 02:42:19 PM UTC 24 |
Sep 24 02:42:21 PM UTC 24 |
52582955 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.1324628790 |
|
|
Sep 24 02:42:08 PM UTC 24 |
Sep 24 02:42:22 PM UTC 24 |
3157586894 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.121814550 |
|
|
Sep 24 02:41:49 PM UTC 24 |
Sep 24 02:42:22 PM UTC 24 |
3143478849 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.3649673430 |
|
|
Sep 24 02:42:11 PM UTC 24 |
Sep 24 02:42:22 PM UTC 24 |
1522606529 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.3248025486 |
|
|
Sep 24 02:42:12 PM UTC 24 |
Sep 24 02:42:24 PM UTC 24 |
450819862 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.1663686533 |
|
|
Sep 24 02:42:09 PM UTC 24 |
Sep 24 02:42:24 PM UTC 24 |
934358153 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.3877200004 |
|
|
Sep 24 02:42:22 PM UTC 24 |
Sep 24 02:42:25 PM UTC 24 |
21058128 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.3127086473 |
|
|
Sep 24 02:41:01 PM UTC 24 |
Sep 24 02:42:26 PM UTC 24 |
5713437448 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.629143059 |
|
|
Sep 24 02:42:09 PM UTC 24 |
Sep 24 02:42:27 PM UTC 24 |
8998015200 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.3215067822 |
|
|
Sep 24 02:42:22 PM UTC 24 |
Sep 24 02:42:28 PM UTC 24 |
152038473 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.1774612692 |
|
|
Sep 24 02:40:35 PM UTC 24 |
Sep 24 02:42:30 PM UTC 24 |
11298729876 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.2185360767 |
|
|
Sep 24 02:42:21 PM UTC 24 |
Sep 24 02:42:32 PM UTC 24 |
580228867 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.2158080524 |
|
|
Sep 24 02:42:28 PM UTC 24 |
Sep 24 02:42:33 PM UTC 24 |
125729058 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.74027576 |
|
|
Sep 24 02:42:20 PM UTC 24 |
Sep 24 02:42:33 PM UTC 24 |
9457918043 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_and_tpm.2656920895 |
|
|
Sep 24 02:37:40 PM UTC 24 |
Sep 24 02:42:33 PM UTC 24 |
48581536793 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.1017743339 |
|
|
Sep 24 02:42:09 PM UTC 24 |
Sep 24 02:42:36 PM UTC 24 |
2830590096 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.802094605 |
|
|
Sep 24 02:42:34 PM UTC 24 |
Sep 24 02:42:36 PM UTC 24 |
211514837 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_all.896235918 |
|
|
Sep 24 02:42:13 PM UTC 24 |
Sep 24 02:42:37 PM UTC 24 |
931931675 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.2065552629 |
|
|
Sep 24 02:41:33 PM UTC 24 |
Sep 24 02:42:38 PM UTC 24 |
30949671189 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.928605456 |
|
|
Sep 24 02:42:11 PM UTC 24 |
Sep 24 02:42:39 PM UTC 24 |
1832849741 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.282538243 |
|
|
Sep 24 02:42:37 PM UTC 24 |
Sep 24 02:42:39 PM UTC 24 |
87603823 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.3424071607 |
|
|
Sep 24 02:42:30 PM UTC 24 |
Sep 24 02:42:39 PM UTC 24 |
394373166 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.1555907286 |
|
|
Sep 24 02:42:37 PM UTC 24 |
Sep 24 02:42:39 PM UTC 24 |
13104597 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.2696867690 |
|
|
Sep 24 02:42:39 PM UTC 24 |
Sep 24 02:42:41 PM UTC 24 |
10935437 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.2432646693 |
|
|
Sep 24 02:42:39 PM UTC 24 |
Sep 24 02:42:41 PM UTC 24 |
81513314 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.1783106775 |
|
|
Sep 24 02:42:27 PM UTC 24 |
Sep 24 02:42:41 PM UTC 24 |
1904599189 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.4230929184 |
|
|
Sep 24 02:42:40 PM UTC 24 |
Sep 24 02:42:43 PM UTC 24 |
241589052 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.2906607023 |
|
|
Sep 24 02:42:25 PM UTC 24 |
Sep 24 02:42:44 PM UTC 24 |
2898315971 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.496161014 |
|
|
Sep 24 02:42:26 PM UTC 24 |
Sep 24 02:42:44 PM UTC 24 |
5864713342 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.1088575486 |
|
|
Sep 24 02:41:05 PM UTC 24 |
Sep 24 02:42:44 PM UTC 24 |
22241125680 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.3146979126 |
|
|
Sep 24 02:41:59 PM UTC 24 |
Sep 24 02:42:46 PM UTC 24 |
5937816472 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.2114152929 |
|
|
Sep 24 02:41:56 PM UTC 24 |
Sep 24 02:42:49 PM UTC 24 |
11589437523 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.754043738 |
|
|
Sep 24 02:42:44 PM UTC 24 |
Sep 24 02:42:50 PM UTC 24 |
3426373701 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.276329882 |
|
|
Sep 24 02:42:12 PM UTC 24 |
Sep 24 02:42:52 PM UTC 24 |
1976022001 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.2609854139 |
|
|
Sep 24 02:42:40 PM UTC 24 |
Sep 24 02:42:55 PM UTC 24 |
9148374748 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_stress_all.909912378 |
|
|
Sep 24 02:42:15 PM UTC 24 |
Sep 24 02:42:56 PM UTC 24 |
1942312818 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.2342847773 |
|
|
Sep 24 02:42:40 PM UTC 24 |
Sep 24 02:42:58 PM UTC 24 |
16961888927 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.1737879731 |
|
|
Sep 24 02:42:43 PM UTC 24 |
Sep 24 02:42:58 PM UTC 24 |
4664367070 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.3974331288 |
|
|
Sep 24 02:42:56 PM UTC 24 |
Sep 24 02:42:58 PM UTC 24 |
12615782 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.153230462 |
|
|
Sep 24 02:42:24 PM UTC 24 |
Sep 24 02:42:59 PM UTC 24 |
35923919555 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.3323158830 |
|
|
Sep 24 02:42:57 PM UTC 24 |
Sep 24 02:42:59 PM UTC 24 |
23295028 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.227079048 |
|
|
Sep 24 02:42:24 PM UTC 24 |
Sep 24 02:43:00 PM UTC 24 |
4985277177 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.3477069475 |
|
|
Sep 24 02:42:59 PM UTC 24 |
Sep 24 02:43:02 PM UTC 24 |
38692422 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.3732037390 |
|
|
Sep 24 02:40:34 PM UTC 24 |
Sep 24 02:43:02 PM UTC 24 |
32113263140 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.3717917192 |
|
|
Sep 24 02:42:42 PM UTC 24 |
Sep 24 02:43:02 PM UTC 24 |
1467209720 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.2049270130 |
|
|
Sep 24 02:42:59 PM UTC 24 |
Sep 24 02:43:02 PM UTC 24 |
238334120 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.3443460804 |
|
|
Sep 24 02:42:45 PM UTC 24 |
Sep 24 02:43:03 PM UTC 24 |
2258578487 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.678079982 |
|
|
Sep 24 02:43:00 PM UTC 24 |
Sep 24 02:43:04 PM UTC 24 |
81821181 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.56419834 |
|
|
Sep 24 02:42:43 PM UTC 24 |
Sep 24 02:43:04 PM UTC 24 |
6719309783 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.3853448084 |
|
|
Sep 24 02:43:17 PM UTC 24 |
Sep 24 02:43:21 PM UTC 24 |
767881582 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.3438002130 |
|
|
Sep 24 02:39:02 PM UTC 24 |
Sep 24 02:43:06 PM UTC 24 |
85997836860 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.2388968101 |
|
|
Sep 24 02:43:00 PM UTC 24 |
Sep 24 02:43:07 PM UTC 24 |
196086364 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.2843842888 |
|
|
Sep 24 02:39:20 PM UTC 24 |
Sep 24 02:43:07 PM UTC 24 |
25174305787 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.3569742832 |
|
|
Sep 24 02:43:04 PM UTC 24 |
Sep 24 02:43:09 PM UTC 24 |
286665559 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.3286085001 |
|
|
Sep 24 02:43:06 PM UTC 24 |
Sep 24 02:43:09 PM UTC 24 |
33699095 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.1388645184 |
|
|
Sep 24 02:42:38 PM UTC 24 |
Sep 24 02:43:10 PM UTC 24 |
7148941208 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.973569020 |
|
|
Sep 24 02:42:51 PM UTC 24 |
Sep 24 02:43:11 PM UTC 24 |
562777847 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.2976666626 |
|
|
Sep 24 02:43:03 PM UTC 24 |
Sep 24 02:43:11 PM UTC 24 |
205261551 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.411399215 |
|
|
Sep 24 02:43:10 PM UTC 24 |
Sep 24 02:43:12 PM UTC 24 |
57144342 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.4047537523 |
|
|
Sep 24 02:42:32 PM UTC 24 |
Sep 24 02:43:12 PM UTC 24 |
1820140212 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.1337961372 |
|
|
Sep 24 02:43:10 PM UTC 24 |
Sep 24 02:43:13 PM UTC 24 |
229194379 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.1182512304 |
|
|
Sep 24 02:42:59 PM UTC 24 |
Sep 24 02:43:13 PM UTC 24 |
5486458726 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.1504625606 |
|
|
Sep 24 02:42:45 PM UTC 24 |
Sep 24 02:43:13 PM UTC 24 |
5303354220 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.2160273262 |
|
|
Sep 24 02:43:11 PM UTC 24 |
Sep 24 02:43:13 PM UTC 24 |
15088842 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_all.3309603999 |
|
|
Sep 24 02:39:00 PM UTC 24 |
Sep 24 02:43:14 PM UTC 24 |
45742932363 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.1700206211 |
|
|
Sep 24 02:43:13 PM UTC 24 |
Sep 24 02:43:16 PM UTC 24 |
31782854 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.1107347287 |
|
|
Sep 24 02:43:05 PM UTC 24 |
Sep 24 02:43:16 PM UTC 24 |
1847272274 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.3281919030 |
|
|
Sep 24 02:43:14 PM UTC 24 |
Sep 24 02:43:19 PM UTC 24 |
736688659 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.1123921254 |
|
|
Sep 24 02:43:05 PM UTC 24 |
Sep 24 02:43:20 PM UTC 24 |
4658882043 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.2756052512 |
|
|
Sep 24 02:43:07 PM UTC 24 |
Sep 24 02:43:21 PM UTC 24 |
570997847 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_mailbox.3782644418 |
|
|
Sep 24 02:43:14 PM UTC 24 |
Sep 24 02:43:21 PM UTC 24 |
412997568 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.794050126 |
|
|
Sep 24 02:41:01 PM UTC 24 |
Sep 24 02:43:21 PM UTC 24 |
9633673483 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.3908754252 |
|
|
Sep 24 02:43:14 PM UTC 24 |
Sep 24 02:43:21 PM UTC 24 |
353303245 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.148733000 |
|
|
Sep 24 02:42:05 PM UTC 24 |
Sep 24 02:43:22 PM UTC 24 |
5611972704 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.3272546996 |
|
|
Sep 24 02:43:22 PM UTC 24 |
Sep 24 02:43:24 PM UTC 24 |
19509273 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.721752095 |
|
|
Sep 24 02:43:22 PM UTC 24 |
Sep 24 02:43:25 PM UTC 24 |
73122161 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.4218383865 |
|
|
Sep 24 02:40:51 PM UTC 24 |
Sep 24 02:43:26 PM UTC 24 |
11824006469 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.583330490 |
|
|
Sep 24 02:39:18 PM UTC 24 |
Sep 24 02:43:26 PM UTC 24 |
120107901119 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.85777064 |
|
|
Sep 24 02:43:03 PM UTC 24 |
Sep 24 02:43:26 PM UTC 24 |
2171246466 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.3912812453 |
|
|
Sep 24 02:41:33 PM UTC 24 |
Sep 24 02:43:28 PM UTC 24 |
5687821465 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.3834779102 |
|
|
Sep 24 02:43:12 PM UTC 24 |
Sep 24 02:43:29 PM UTC 24 |
2631369280 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.4254423669 |
|
|
Sep 24 02:43:26 PM UTC 24 |
Sep 24 02:43:29 PM UTC 24 |
53185149 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.1776317449 |
|
|
Sep 24 02:43:13 PM UTC 24 |
Sep 24 02:43:29 PM UTC 24 |
10321513507 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.1746593111 |
|
|
Sep 24 02:43:26 PM UTC 24 |
Sep 24 02:43:29 PM UTC 24 |
281331165 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.3879405205 |
|
|
Sep 24 02:43:20 PM UTC 24 |
Sep 24 02:43:30 PM UTC 24 |
2710541885 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.3110901216 |
|
|
Sep 24 02:43:27 PM UTC 24 |
Sep 24 02:43:31 PM UTC 24 |
271869541 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.965578330 |
|
|
Sep 24 02:43:26 PM UTC 24 |
Sep 24 02:43:32 PM UTC 24 |
1917042859 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.209472666 |
|
|
Sep 24 02:43:27 PM UTC 24 |
Sep 24 02:43:32 PM UTC 24 |
723130631 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.4122099338 |
|
|
Sep 24 02:43:26 PM UTC 24 |
Sep 24 02:43:33 PM UTC 24 |
816523795 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.1713208947 |
|
|
Sep 24 02:43:15 PM UTC 24 |
Sep 24 02:43:35 PM UTC 24 |
544109698 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.3721421719 |
|
|
Sep 24 02:43:30 PM UTC 24 |
Sep 24 02:43:35 PM UTC 24 |
255808639 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.1647109945 |
|
|
Sep 24 02:43:33 PM UTC 24 |
Sep 24 02:43:36 PM UTC 24 |
48835349 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_stress_all.2986058248 |
|
|
Sep 24 02:38:09 PM UTC 24 |
Sep 24 02:43:36 PM UTC 24 |
132759472856 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.951342646 |
|
|
Sep 24 02:43:03 PM UTC 24 |
Sep 24 02:43:36 PM UTC 24 |
15386955534 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.853299157 |
|
|
Sep 24 02:43:33 PM UTC 24 |
Sep 24 02:43:36 PM UTC 24 |
166263436 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.2069433363 |
|
|
Sep 24 02:43:23 PM UTC 24 |
Sep 24 02:43:36 PM UTC 24 |
10410142768 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.1520756966 |
|
|
Sep 24 02:40:47 PM UTC 24 |
Sep 24 02:43:36 PM UTC 24 |
72341905552 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_stress_all.3582818303 |
|
|
Sep 24 02:41:05 PM UTC 24 |
Sep 24 02:43:37 PM UTC 24 |
40109678441 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.85090749 |
|
|
Sep 24 02:43:28 PM UTC 24 |
Sep 24 02:43:37 PM UTC 24 |
576747976 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.1969959094 |
|
|
Sep 24 02:43:36 PM UTC 24 |
Sep 24 02:43:38 PM UTC 24 |
18363895 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.2488340115 |
|
|
Sep 24 02:40:50 PM UTC 24 |
Sep 24 02:43:38 PM UTC 24 |
184679253440 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode.912381409 |
|
|
Sep 24 02:43:17 PM UTC 24 |
Sep 24 02:43:38 PM UTC 24 |
1005752105 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.692603271 |
|
|
Sep 24 02:43:37 PM UTC 24 |
Sep 24 02:43:39 PM UTC 24 |
232387604 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.3397738557 |
|
|
Sep 24 02:43:37 PM UTC 24 |
Sep 24 02:43:40 PM UTC 24 |
77107249 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_all.2183853292 |
|
|
Sep 24 02:44:52 PM UTC 24 |
Sep 24 02:44:55 PM UTC 24 |
18392769 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.1196951604 |
|
|
Sep 24 02:43:30 PM UTC 24 |
Sep 24 02:43:40 PM UTC 24 |
619982808 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.689889022 |
|
|
Sep 24 02:43:12 PM UTC 24 |
Sep 24 02:43:42 PM UTC 24 |
10104190555 ps |