| T133 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.2668486255 |
|
|
Sep 24 02:43:38 PM UTC 24 |
Sep 24 02:43:42 PM UTC 24 |
33338253 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.1566565220 |
|
|
Sep 24 02:43:08 PM UTC 24 |
Sep 24 02:43:42 PM UTC 24 |
7099105638 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.725980092 |
|
|
Sep 24 02:43:41 PM UTC 24 |
Sep 24 02:43:43 PM UTC 24 |
24332298 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.1128946461 |
|
|
Sep 24 02:43:37 PM UTC 24 |
Sep 24 02:43:43 PM UTC 24 |
2597101058 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.598662000 |
|
|
Sep 24 02:43:38 PM UTC 24 |
Sep 24 02:43:44 PM UTC 24 |
145230786 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.143309512 |
|
|
Sep 24 02:43:43 PM UTC 24 |
Sep 24 02:43:45 PM UTC 24 |
33041529 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.2250943712 |
|
|
Sep 24 02:43:01 PM UTC 24 |
Sep 24 02:43:46 PM UTC 24 |
17616696478 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.1023715264 |
|
|
Sep 24 02:41:21 PM UTC 24 |
Sep 24 02:43:46 PM UTC 24 |
27827099818 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.2073804221 |
|
|
Sep 24 02:42:14 PM UTC 24 |
Sep 24 02:43:46 PM UTC 24 |
13536733555 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.1607646782 |
|
|
Sep 24 02:43:44 PM UTC 24 |
Sep 24 02:43:46 PM UTC 24 |
43639449 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.1050048311 |
|
|
Sep 24 02:43:41 PM UTC 24 |
Sep 24 02:43:47 PM UTC 24 |
139518412 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.1629139236 |
|
|
Sep 24 02:43:37 PM UTC 24 |
Sep 24 02:43:48 PM UTC 24 |
455354702 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.1346932978 |
|
|
Sep 24 02:44:49 PM UTC 24 |
Sep 24 02:44:54 PM UTC 24 |
317937694 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.3767076964 |
|
|
Sep 24 02:43:44 PM UTC 24 |
Sep 24 02:43:48 PM UTC 24 |
231029924 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.3080892524 |
|
|
Sep 24 02:43:05 PM UTC 24 |
Sep 24 02:43:49 PM UTC 24 |
11756403492 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.649376048 |
|
|
Sep 24 02:43:47 PM UTC 24 |
Sep 24 02:43:49 PM UTC 24 |
83649482 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.3525122314 |
|
|
Sep 24 02:43:37 PM UTC 24 |
Sep 24 02:43:50 PM UTC 24 |
6513088485 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.3423525998 |
|
|
Sep 24 02:43:27 PM UTC 24 |
Sep 24 02:43:50 PM UTC 24 |
7817040178 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/1.spi_device_flash_and_tpm_min_idle.1532269479 |
|
|
Sep 24 02:36:49 PM UTC 24 |
Sep 24 02:43:50 PM UTC 24 |
154349002133 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.2279827698 |
|
|
Sep 24 02:43:47 PM UTC 24 |
Sep 24 02:43:50 PM UTC 24 |
36878831 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.47256757 |
|
|
Sep 24 02:43:47 PM UTC 24 |
Sep 24 02:43:51 PM UTC 24 |
44766669 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.3691936097 |
|
|
Sep 24 02:40:49 PM UTC 24 |
Sep 24 02:43:51 PM UTC 24 |
20011143343 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.2952455306 |
|
|
Sep 24 02:43:30 PM UTC 24 |
Sep 24 02:43:52 PM UTC 24 |
5285128493 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.2505961599 |
|
|
Sep 24 02:43:49 PM UTC 24 |
Sep 24 02:43:53 PM UTC 24 |
162666890 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.2484282426 |
|
|
Sep 24 02:43:52 PM UTC 24 |
Sep 24 02:43:54 PM UTC 24 |
20958357 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.1187806552 |
|
|
Sep 24 02:43:50 PM UTC 24 |
Sep 24 02:43:55 PM UTC 24 |
203651193 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.2727799780 |
|
|
Sep 24 02:44:48 PM UTC 24 |
Sep 24 02:44:56 PM UTC 24 |
351200804 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.2500720751 |
|
|
Sep 24 02:43:47 PM UTC 24 |
Sep 24 02:43:56 PM UTC 24 |
36676233558 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.753349068 |
|
|
Sep 24 02:43:54 PM UTC 24 |
Sep 24 02:43:56 PM UTC 24 |
92960489 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.1173118129 |
|
|
Sep 24 02:42:34 PM UTC 24 |
Sep 24 02:43:56 PM UTC 24 |
19323361653 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.3016101506 |
|
|
Sep 24 02:43:32 PM UTC 24 |
Sep 24 02:43:58 PM UTC 24 |
11845734292 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.1833267011 |
|
|
Sep 24 02:43:56 PM UTC 24 |
Sep 24 02:43:58 PM UTC 24 |
20009837 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.1736833749 |
|
|
Sep 24 02:43:51 PM UTC 24 |
Sep 24 02:43:59 PM UTC 24 |
1007092816 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.4095272692 |
|
|
Sep 24 02:43:50 PM UTC 24 |
Sep 24 02:44:00 PM UTC 24 |
362676257 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.1304334002 |
|
|
Sep 24 02:43:56 PM UTC 24 |
Sep 24 02:44:00 PM UTC 24 |
90873902 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.2011126139 |
|
|
Sep 24 02:43:57 PM UTC 24 |
Sep 24 02:44:02 PM UTC 24 |
499556135 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.1429285387 |
|
|
Sep 24 02:43:38 PM UTC 24 |
Sep 24 02:44:02 PM UTC 24 |
1891226221 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.2380857324 |
|
|
Sep 24 02:43:40 PM UTC 24 |
Sep 24 02:44:03 PM UTC 24 |
7098059796 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.2729770037 |
|
|
Sep 24 02:43:38 PM UTC 24 |
Sep 24 02:44:05 PM UTC 24 |
35920793375 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.3112762994 |
|
|
Sep 24 02:44:01 PM UTC 24 |
Sep 24 02:44:07 PM UTC 24 |
356044054 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.1290561759 |
|
|
Sep 24 02:43:41 PM UTC 24 |
Sep 24 02:44:07 PM UTC 24 |
1287797288 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.2815851498 |
|
|
Sep 24 02:43:48 PM UTC 24 |
Sep 24 02:44:09 PM UTC 24 |
2636083990 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.363661642 |
|
|
Sep 24 02:43:22 PM UTC 24 |
Sep 24 02:44:09 PM UTC 24 |
17141233420 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.3491948634 |
|
|
Sep 24 02:44:00 PM UTC 24 |
Sep 24 02:44:09 PM UTC 24 |
489927432 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.1583447234 |
|
|
Sep 24 02:43:48 PM UTC 24 |
Sep 24 02:44:10 PM UTC 24 |
1495954462 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.3364254906 |
|
|
Sep 24 02:43:39 PM UTC 24 |
Sep 24 02:44:10 PM UTC 24 |
5188895593 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.3641756836 |
|
|
Sep 24 02:42:29 PM UTC 24 |
Sep 24 02:44:11 PM UTC 24 |
10257378138 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.1826415505 |
|
|
Sep 24 02:44:00 PM UTC 24 |
Sep 24 02:44:11 PM UTC 24 |
2436203783 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.3993152290 |
|
|
Sep 24 02:42:14 PM UTC 24 |
Sep 24 02:44:12 PM UTC 24 |
17455897817 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.3448062864 |
|
|
Sep 24 02:44:10 PM UTC 24 |
Sep 24 02:44:12 PM UTC 24 |
15045907 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.2252995913 |
|
|
Sep 24 02:44:10 PM UTC 24 |
Sep 24 02:44:12 PM UTC 24 |
28053000 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.749815028 |
|
|
Sep 24 02:44:03 PM UTC 24 |
Sep 24 02:44:12 PM UTC 24 |
302882265 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.590879965 |
|
|
Sep 24 02:44:11 PM UTC 24 |
Sep 24 02:44:13 PM UTC 24 |
40991448 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.3438887734 |
|
|
Sep 24 02:44:11 PM UTC 24 |
Sep 24 02:44:13 PM UTC 24 |
16231906 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.300383915 |
|
|
Sep 24 02:42:45 PM UTC 24 |
Sep 24 02:44:14 PM UTC 24 |
5103165744 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_all.3949422604 |
|
|
Sep 24 02:42:47 PM UTC 24 |
Sep 24 02:44:15 PM UTC 24 |
17789153317 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.1057732453 |
|
|
Sep 24 02:44:01 PM UTC 24 |
Sep 24 02:44:16 PM UTC 24 |
1000077764 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.3002855327 |
|
|
Sep 24 02:42:26 PM UTC 24 |
Sep 24 02:44:16 PM UTC 24 |
38213308556 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.3377733856 |
|
|
Sep 24 02:44:13 PM UTC 24 |
Sep 24 02:44:16 PM UTC 24 |
49971549 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.149604962 |
|
|
Sep 24 02:44:13 PM UTC 24 |
Sep 24 02:44:16 PM UTC 24 |
106865577 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.2779802965 |
|
|
Sep 24 02:43:54 PM UTC 24 |
Sep 24 02:44:17 PM UTC 24 |
40416438507 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.662679798 |
|
|
Sep 24 02:43:49 PM UTC 24 |
Sep 24 02:44:19 PM UTC 24 |
14468035907 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.1970473557 |
|
|
Sep 24 02:44:13 PM UTC 24 |
Sep 24 02:44:20 PM UTC 24 |
2812318689 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_stress_all.1977841969 |
|
|
Sep 24 02:44:18 PM UTC 24 |
Sep 24 02:44:20 PM UTC 24 |
35021414 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.3857372750 |
|
|
Sep 24 02:44:19 PM UTC 24 |
Sep 24 02:44:21 PM UTC 24 |
31186600 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.717111464 |
|
|
Sep 24 02:43:44 PM UTC 24 |
Sep 24 02:44:21 PM UTC 24 |
27661507765 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.1694523689 |
|
|
Sep 24 02:44:14 PM UTC 24 |
Sep 24 02:44:21 PM UTC 24 |
468617010 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.4117542120 |
|
|
Sep 24 02:44:14 PM UTC 24 |
Sep 24 02:44:22 PM UTC 24 |
1814861946 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_stress_all.2773798296 |
|
|
Sep 24 02:41:49 PM UTC 24 |
Sep 24 02:44:22 PM UTC 24 |
153847435385 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.4025096465 |
|
|
Sep 24 02:44:20 PM UTC 24 |
Sep 24 02:44:22 PM UTC 24 |
14835495 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.1149119261 |
|
|
Sep 24 02:44:16 PM UTC 24 |
Sep 24 02:44:22 PM UTC 24 |
203091644 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.3963794932 |
|
|
Sep 24 02:44:13 PM UTC 24 |
Sep 24 02:44:23 PM UTC 24 |
194713546 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.2862406278 |
|
|
Sep 24 02:44:22 PM UTC 24 |
Sep 24 02:44:25 PM UTC 24 |
85460680 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.3760101561 |
|
|
Sep 24 02:43:58 PM UTC 24 |
Sep 24 02:44:25 PM UTC 24 |
12914697183 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.2425011170 |
|
|
Sep 24 02:40:19 PM UTC 24 |
Sep 24 02:44:25 PM UTC 24 |
30100564573 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/3.spi_device_flash_and_tpm_min_idle.1441645903 |
|
|
Sep 24 02:37:12 PM UTC 24 |
Sep 24 02:44:25 PM UTC 24 |
253650086380 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.87282448 |
|
|
Sep 24 02:44:21 PM UTC 24 |
Sep 24 02:44:25 PM UTC 24 |
1461681232 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.2248554515 |
|
|
Sep 24 02:44:22 PM UTC 24 |
Sep 24 02:44:25 PM UTC 24 |
294620012 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.1487477075 |
|
|
Sep 24 02:44:21 PM UTC 24 |
Sep 24 02:44:25 PM UTC 24 |
158040672 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.2133303888 |
|
|
Sep 24 02:44:22 PM UTC 24 |
Sep 24 02:44:26 PM UTC 24 |
116483245 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.3281697129 |
|
|
Sep 24 02:44:24 PM UTC 24 |
Sep 24 02:44:27 PM UTC 24 |
71081942 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.2772813533 |
|
|
Sep 24 02:44:13 PM UTC 24 |
Sep 24 02:44:27 PM UTC 24 |
5467675162 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.2783186789 |
|
|
Sep 24 02:43:30 PM UTC 24 |
Sep 24 02:44:28 PM UTC 24 |
7565564941 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.329286619 |
|
|
Sep 24 02:42:03 PM UTC 24 |
Sep 24 02:44:52 PM UTC 24 |
21086809125 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.2749831207 |
|
|
Sep 24 02:43:51 PM UTC 24 |
Sep 24 02:44:28 PM UTC 24 |
3171615803 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.1938524837 |
|
|
Sep 24 02:44:24 PM UTC 24 |
Sep 24 02:44:29 PM UTC 24 |
259730082 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.3371247617 |
|
|
Sep 24 02:44:22 PM UTC 24 |
Sep 24 02:44:30 PM UTC 24 |
907800835 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.27546687 |
|
|
Sep 24 02:44:28 PM UTC 24 |
Sep 24 02:44:30 PM UTC 24 |
97528315 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.4260600330 |
|
|
Sep 24 02:44:28 PM UTC 24 |
Sep 24 02:44:30 PM UTC 24 |
43278034 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.73334436 |
|
|
Sep 24 02:44:44 PM UTC 24 |
Sep 24 02:44:53 PM UTC 24 |
1205269522 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.3667553980 |
|
|
Sep 24 02:44:10 PM UTC 24 |
Sep 24 02:44:31 PM UTC 24 |
15011729805 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.3475419663 |
|
|
Sep 24 02:44:14 PM UTC 24 |
Sep 24 02:44:31 PM UTC 24 |
4156431098 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.1935504263 |
|
|
Sep 24 02:44:29 PM UTC 24 |
Sep 24 02:44:32 PM UTC 24 |
90512279 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.1470665047 |
|
|
Sep 24 02:44:24 PM UTC 24 |
Sep 24 02:44:32 PM UTC 24 |
1802695680 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.418747350 |
|
|
Sep 24 02:44:29 PM UTC 24 |
Sep 24 02:44:32 PM UTC 24 |
66316023 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.4255788098 |
|
|
Sep 24 02:44:25 PM UTC 24 |
Sep 24 02:44:34 PM UTC 24 |
453499372 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.2912778567 |
|
|
Sep 24 02:44:24 PM UTC 24 |
Sep 24 02:44:34 PM UTC 24 |
2259128250 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.1782314915 |
|
|
Sep 24 02:44:30 PM UTC 24 |
Sep 24 02:44:35 PM UTC 24 |
960813649 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.1830956063 |
|
|
Sep 24 02:44:33 PM UTC 24 |
Sep 24 02:44:37 PM UTC 24 |
121329370 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.3646931070 |
|
|
Sep 24 02:44:26 PM UTC 24 |
Sep 24 02:44:37 PM UTC 24 |
837993253 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.3431326232 |
|
|
Sep 24 02:44:38 PM UTC 24 |
Sep 24 02:44:40 PM UTC 24 |
11478832 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.1671440843 |
|
|
Sep 24 02:44:33 PM UTC 24 |
Sep 24 02:44:40 PM UTC 24 |
319966617 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.3744966840 |
|
|
Sep 24 02:44:29 PM UTC 24 |
Sep 24 02:44:40 PM UTC 24 |
2641705647 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.1655487162 |
|
|
Sep 24 02:44:33 PM UTC 24 |
Sep 24 02:44:43 PM UTC 24 |
1400373185 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.2697993743 |
|
|
Sep 24 02:44:28 PM UTC 24 |
Sep 24 02:44:43 PM UTC 24 |
3544463157 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.105700700 |
|
|
Sep 24 02:44:41 PM UTC 24 |
Sep 24 02:44:43 PM UTC 24 |
32716360 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.3043279036 |
|
|
Sep 24 02:43:55 PM UTC 24 |
Sep 24 02:44:45 PM UTC 24 |
34976857783 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.3231579184 |
|
|
Sep 24 02:43:37 PM UTC 24 |
Sep 24 02:44:45 PM UTC 24 |
29581724010 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.2181510700 |
|
|
Sep 24 02:44:28 PM UTC 24 |
Sep 24 02:44:46 PM UTC 24 |
9069338276 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.3834776281 |
|
|
Sep 24 02:44:44 PM UTC 24 |
Sep 24 02:44:47 PM UTC 24 |
48675617 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.3525869956 |
|
|
Sep 24 02:44:44 PM UTC 24 |
Sep 24 02:44:47 PM UTC 24 |
138655013 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.2869169852 |
|
|
Sep 24 02:44:41 PM UTC 24 |
Sep 24 02:44:49 PM UTC 24 |
504374230 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.3651106763 |
|
|
Sep 24 02:42:34 PM UTC 24 |
Sep 24 02:44:50 PM UTC 24 |
27315617980 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.66865207 |
|
|
Sep 24 02:44:41 PM UTC 24 |
Sep 24 02:44:50 PM UTC 24 |
480597361 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.830047401 |
|
|
Sep 24 02:44:33 PM UTC 24 |
Sep 24 02:44:51 PM UTC 24 |
6920843203 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.2595215515 |
|
|
Sep 24 02:44:45 PM UTC 24 |
Sep 24 02:44:52 PM UTC 24 |
846068987 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.1805594562 |
|
|
Sep 24 02:44:48 PM UTC 24 |
Sep 24 02:44:56 PM UTC 24 |
241771649 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.1164244566 |
|
|
Sep 24 02:44:48 PM UTC 24 |
Sep 24 02:44:56 PM UTC 24 |
1036010936 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.121087656 |
|
|
Sep 24 02:44:51 PM UTC 24 |
Sep 24 02:44:57 PM UTC 24 |
314768790 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.2605184759 |
|
|
Sep 24 02:44:56 PM UTC 24 |
Sep 24 02:44:58 PM UTC 24 |
21370962 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.2536472350 |
|
|
Sep 24 02:44:56 PM UTC 24 |
Sep 24 02:44:58 PM UTC 24 |
18239022 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.2804798511 |
|
|
Sep 24 02:44:57 PM UTC 24 |
Sep 24 02:44:59 PM UTC 24 |
37009608 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.1550588880 |
|
|
Sep 24 02:44:57 PM UTC 24 |
Sep 24 02:45:00 PM UTC 24 |
95186721 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.3937115452 |
|
|
Sep 24 02:44:57 PM UTC 24 |
Sep 24 02:45:00 PM UTC 24 |
467162010 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_stress_all.871470569 |
|
|
Sep 24 02:44:38 PM UTC 24 |
Sep 24 02:45:02 PM UTC 24 |
1389236560 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.3137389283 |
|
|
Sep 24 02:44:57 PM UTC 24 |
Sep 24 02:45:02 PM UTC 24 |
387435112 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.4184530833 |
|
|
Sep 24 02:44:02 PM UTC 24 |
Sep 24 02:45:04 PM UTC 24 |
20097382545 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.2736523677 |
|
|
Sep 24 02:44:51 PM UTC 24 |
Sep 24 02:45:05 PM UTC 24 |
1049680835 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.367268979 |
|
|
Sep 24 02:44:32 PM UTC 24 |
Sep 24 02:45:05 PM UTC 24 |
9407999803 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.2191329370 |
|
|
Sep 24 02:44:16 PM UTC 24 |
Sep 24 02:45:06 PM UTC 24 |
4489212729 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.589745667 |
|
|
Sep 24 02:44:32 PM UTC 24 |
Sep 24 02:45:06 PM UTC 24 |
2801559625 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.2360148365 |
|
|
Sep 24 02:44:47 PM UTC 24 |
Sep 24 02:45:07 PM UTC 24 |
1369139456 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.4185230021 |
|
|
Sep 24 02:44:08 PM UTC 24 |
Sep 24 02:45:08 PM UTC 24 |
10847360080 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2303749425 |
|
|
Sep 24 02:44:59 PM UTC 24 |
Sep 24 02:45:09 PM UTC 24 |
924350180 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.3024538515 |
|
|
Sep 24 02:45:01 PM UTC 24 |
Sep 24 02:45:10 PM UTC 24 |
554437358 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_stress_all.3724553119 |
|
|
Sep 24 02:44:08 PM UTC 24 |
Sep 24 02:45:11 PM UTC 24 |
13398648942 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.2481348991 |
|
|
Sep 24 02:45:05 PM UTC 24 |
Sep 24 02:45:11 PM UTC 24 |
363235001 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.2085843434 |
|
|
Sep 24 02:45:03 PM UTC 24 |
Sep 24 02:45:11 PM UTC 24 |
384613372 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.4059050305 |
|
|
Sep 24 02:45:10 PM UTC 24 |
Sep 24 02:45:12 PM UTC 24 |
14488942 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.3656601571 |
|
|
Sep 24 02:45:10 PM UTC 24 |
Sep 24 02:45:12 PM UTC 24 |
16607969 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.1118300589 |
|
|
Sep 24 02:43:22 PM UTC 24 |
Sep 24 02:45:12 PM UTC 24 |
51047469422 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.102528247 |
|
|
Sep 24 02:45:01 PM UTC 24 |
Sep 24 02:45:14 PM UTC 24 |
633332046 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.2242498041 |
|
|
Sep 24 02:41:24 PM UTC 24 |
Sep 24 02:45:15 PM UTC 24 |
15348797148 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.1182313581 |
|
|
Sep 24 02:45:12 PM UTC 24 |
Sep 24 02:45:15 PM UTC 24 |
103676365 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.1111337667 |
|
|
Sep 24 02:45:12 PM UTC 24 |
Sep 24 02:45:16 PM UTC 24 |
121586713 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.2011240046 |
|
|
Sep 24 02:45:03 PM UTC 24 |
Sep 24 02:45:17 PM UTC 24 |
1910104714 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.2698699823 |
|
|
Sep 24 02:45:11 PM UTC 24 |
Sep 24 02:45:17 PM UTC 24 |
2274688188 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2174900492 |
|
|
Sep 24 02:44:59 PM UTC 24 |
Sep 24 02:45:17 PM UTC 24 |
12934643189 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.2157700725 |
|
|
Sep 24 02:39:39 PM UTC 24 |
Sep 24 02:45:20 PM UTC 24 |
36250870066 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.1165853931 |
|
|
Sep 24 02:43:31 PM UTC 24 |
Sep 24 02:45:20 PM UTC 24 |
11197863361 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.3056836902 |
|
|
Sep 24 02:44:35 PM UTC 24 |
Sep 24 02:45:20 PM UTC 24 |
4332354427 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.2371614299 |
|
|
Sep 24 02:45:14 PM UTC 24 |
Sep 24 02:45:21 PM UTC 24 |
132831575 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.766760952 |
|
|
Sep 24 02:45:12 PM UTC 24 |
Sep 24 02:45:21 PM UTC 24 |
1913309150 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.556318645 |
|
|
Sep 24 02:45:16 PM UTC 24 |
Sep 24 02:45:21 PM UTC 24 |
699829943 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.158458097 |
|
|
Sep 24 02:45:16 PM UTC 24 |
Sep 24 02:45:23 PM UTC 24 |
2147619759 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.3455464345 |
|
|
Sep 24 02:45:14 PM UTC 24 |
Sep 24 02:45:23 PM UTC 24 |
243795357 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.1908613647 |
|
|
Sep 24 02:45:17 PM UTC 24 |
Sep 24 02:45:23 PM UTC 24 |
2973793366 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.10824272 |
|
|
Sep 24 02:45:22 PM UTC 24 |
Sep 24 02:45:24 PM UTC 24 |
41944547 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.3290972120 |
|
|
Sep 24 02:45:22 PM UTC 24 |
Sep 24 02:45:24 PM UTC 24 |
13814144 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.4091916349 |
|
|
Sep 24 02:45:01 PM UTC 24 |
Sep 24 02:45:24 PM UTC 24 |
1103908990 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.4049623449 |
|
|
Sep 24 02:45:23 PM UTC 24 |
Sep 24 02:45:25 PM UTC 24 |
15316603 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.3792394899 |
|
|
Sep 24 02:45:14 PM UTC 24 |
Sep 24 02:45:26 PM UTC 24 |
706350480 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3473576100 |
|
|
Sep 24 02:45:22 PM UTC 24 |
Sep 24 02:45:26 PM UTC 24 |
652632436 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.3798406180 |
|
|
Sep 24 02:45:24 PM UTC 24 |
Sep 24 02:45:27 PM UTC 24 |
151811016 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.799136770 |
|
|
Sep 24 02:45:24 PM UTC 24 |
Sep 24 02:45:27 PM UTC 24 |
66741273 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.2568118984 |
|
|
Sep 24 02:45:17 PM UTC 24 |
Sep 24 02:45:27 PM UTC 24 |
3612006740 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.166924056 |
|
|
Sep 24 02:45:26 PM UTC 24 |
Sep 24 02:45:30 PM UTC 24 |
274763183 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.1064229740 |
|
|
Sep 24 02:45:27 PM UTC 24 |
Sep 24 02:45:32 PM UTC 24 |
74936459 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.561699383 |
|
|
Sep 24 02:43:52 PM UTC 24 |
Sep 24 02:45:32 PM UTC 24 |
52805431391 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.1162237946 |
|
|
Sep 24 02:45:28 PM UTC 24 |
Sep 24 02:45:34 PM UTC 24 |
423045761 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.1817238330 |
|
|
Sep 24 02:45:15 PM UTC 24 |
Sep 24 02:45:36 PM UTC 24 |
27761957019 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.1745699482 |
|
|
Sep 24 02:45:34 PM UTC 24 |
Sep 24 02:45:36 PM UTC 24 |
21614229 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.4291303549 |
|
|
Sep 24 02:45:26 PM UTC 24 |
Sep 24 02:45:37 PM UTC 24 |
423579029 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.1608583128 |
|
|
Sep 24 02:45:36 PM UTC 24 |
Sep 24 02:45:39 PM UTC 24 |
13951952 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.4105917988 |
|
|
Sep 24 02:45:37 PM UTC 24 |
Sep 24 02:45:40 PM UTC 24 |
11992053 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.2200858916 |
|
|
Sep 24 02:45:26 PM UTC 24 |
Sep 24 02:45:40 PM UTC 24 |
550937354 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.2024339864 |
|
|
Sep 24 02:44:00 PM UTC 24 |
Sep 24 02:45:40 PM UTC 24 |
32972296830 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.1468598139 |
|
|
Sep 24 02:44:35 PM UTC 24 |
Sep 24 02:45:41 PM UTC 24 |
4218952368 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.2589306139 |
|
|
Sep 24 02:42:51 PM UTC 24 |
Sep 24 02:45:41 PM UTC 24 |
11940708021 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.4160928253 |
|
|
Sep 24 02:45:39 PM UTC 24 |
Sep 24 02:45:42 PM UTC 24 |
711365901 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.928853119 |
|
|
Sep 24 02:45:37 PM UTC 24 |
Sep 24 02:45:42 PM UTC 24 |
460480893 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.3582009258 |
|
|
Sep 24 02:45:41 PM UTC 24 |
Sep 24 02:45:44 PM UTC 24 |
104072467 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.1223036653 |
|
|
Sep 24 02:44:53 PM UTC 24 |
Sep 24 02:45:44 PM UTC 24 |
4277667370 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_stress_all.410382526 |
|
|
Sep 24 02:44:27 PM UTC 24 |
Sep 24 02:45:44 PM UTC 24 |
27409360943 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.3840329298 |
|
|
Sep 24 02:45:41 PM UTC 24 |
Sep 24 02:45:45 PM UTC 24 |
65224547 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.3265415252 |
|
|
Sep 24 02:45:27 PM UTC 24 |
Sep 24 02:45:45 PM UTC 24 |
708715856 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.3933529740 |
|
|
Sep 24 02:45:43 PM UTC 24 |
Sep 24 02:45:47 PM UTC 24 |
82329675 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.3973911854 |
|
|
Sep 24 02:45:42 PM UTC 24 |
Sep 24 02:45:48 PM UTC 24 |
405894378 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.913894071 |
|
|
Sep 24 02:45:44 PM UTC 24 |
Sep 24 02:45:49 PM UTC 24 |
121661030 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.1523090950 |
|
|
Sep 24 02:45:27 PM UTC 24 |
Sep 24 02:45:49 PM UTC 24 |
1913908509 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.771591350 |
|
|
Sep 24 02:45:26 PM UTC 24 |
Sep 24 02:45:50 PM UTC 24 |
18516896769 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.1228143040 |
|
|
Sep 24 02:45:50 PM UTC 24 |
Sep 24 02:45:52 PM UTC 24 |
12522579 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.2948086596 |
|
|
Sep 24 02:45:50 PM UTC 24 |
Sep 24 02:45:53 PM UTC 24 |
114309299 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.4137752757 |
|
|
Sep 24 02:44:06 PM UTC 24 |
Sep 24 02:45:53 PM UTC 24 |
17183099945 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.2310871878 |
|
|
Sep 24 02:45:46 PM UTC 24 |
Sep 24 02:45:53 PM UTC 24 |
167697071 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.4164916094 |
|
|
Sep 24 02:44:27 PM UTC 24 |
Sep 24 02:45:54 PM UTC 24 |
11460123745 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.2322363839 |
|
|
Sep 24 02:45:54 PM UTC 24 |
Sep 24 02:45:56 PM UTC 24 |
43271806 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3224295660 |
|
|
Sep 24 02:45:54 PM UTC 24 |
Sep 24 02:45:56 PM UTC 24 |
15446413 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.2028231255 |
|
|
Sep 24 02:45:54 PM UTC 24 |
Sep 24 02:45:57 PM UTC 24 |
74240155 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.1328208079 |
|
|
Sep 24 02:44:18 PM UTC 24 |
Sep 24 02:45:58 PM UTC 24 |
3432336876 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.1538023395 |
|
|
Sep 24 02:44:54 PM UTC 24 |
Sep 24 02:45:58 PM UTC 24 |
4937933621 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.149978501 |
|
|
Sep 24 02:45:55 PM UTC 24 |
Sep 24 02:46:00 PM UTC 24 |
114803425 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.1618969085 |
|
|
Sep 24 02:44:26 PM UTC 24 |
Sep 24 02:46:00 PM UTC 24 |
3693133902 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.1536726410 |
|
|
Sep 24 02:45:50 PM UTC 24 |
Sep 24 02:46:03 PM UTC 24 |
6260510086 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.2945937215 |
|
|
Sep 24 02:45:42 PM UTC 24 |
Sep 24 02:46:04 PM UTC 24 |
3578036738 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.125715494 |
|
|
Sep 24 02:45:17 PM UTC 24 |
Sep 24 02:46:04 PM UTC 24 |
7026551788 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.656178059 |
|
|
Sep 24 02:45:57 PM UTC 24 |
Sep 24 02:46:05 PM UTC 24 |
183370320 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.2988048587 |
|
|
Sep 24 02:45:43 PM UTC 24 |
Sep 24 02:46:07 PM UTC 24 |
12993368454 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.3771606531 |
|
|
Sep 24 02:46:01 PM UTC 24 |
Sep 24 02:46:09 PM UTC 24 |
1285886086 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.4199393539 |
|
|
Sep 24 02:45:55 PM UTC 24 |
Sep 24 02:46:09 PM UTC 24 |
1236024692 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.2596816487 |
|
|
Sep 24 02:46:08 PM UTC 24 |
Sep 24 02:46:10 PM UTC 24 |
43793909 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.3510672354 |
|
|
Sep 24 02:46:09 PM UTC 24 |
Sep 24 02:46:12 PM UTC 24 |
45042913 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.666449608 |
|
|
Sep 24 02:46:10 PM UTC 24 |
Sep 24 02:46:13 PM UTC 24 |
19480535 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_all.1444957064 |
|
|
Sep 24 02:46:04 PM UTC 24 |
Sep 24 02:46:14 PM UTC 24 |
316594770 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode_ignore_cmds.711414560 |
|
|
Sep 24 02:45:46 PM UTC 24 |
Sep 24 02:46:15 PM UTC 24 |
4676168101 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_stress_all.567755319 |
|
|
Sep 24 02:45:33 PM UTC 24 |
Sep 24 02:46:15 PM UTC 24 |
14885250566 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.3931669229 |
|
|
Sep 24 02:45:59 PM UTC 24 |
Sep 24 02:46:15 PM UTC 24 |
596372316 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.4121549588 |
|
|
Sep 24 02:46:13 PM UTC 24 |
Sep 24 02:46:15 PM UTC 24 |
108045478 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.3545092488 |
|
|
Sep 24 02:46:14 PM UTC 24 |
Sep 24 02:46:17 PM UTC 24 |
181560831 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.2737690683 |
|
|
Sep 24 02:45:57 PM UTC 24 |
Sep 24 02:46:17 PM UTC 24 |
8093196700 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.2282368504 |
|
|
Sep 24 02:41:49 PM UTC 24 |
Sep 24 02:46:18 PM UTC 24 |
101056694786 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.1040449253 |
|
|
Sep 24 02:46:16 PM UTC 24 |
Sep 24 02:46:22 PM UTC 24 |
1498535588 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.562659938 |
|
|
Sep 24 02:46:17 PM UTC 24 |
Sep 24 02:46:22 PM UTC 24 |
76992708 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.2307974091 |
|
|
Sep 24 02:45:59 PM UTC 24 |
Sep 24 02:46:23 PM UTC 24 |
3007421376 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_all.670152094 |
|
|
Sep 24 02:46:23 PM UTC 24 |
Sep 24 02:48:22 PM UTC 24 |
56650324650 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode_ignore_cmds.1628996083 |
|
|
Sep 24 02:45:28 PM UTC 24 |
Sep 24 02:46:25 PM UTC 24 |
3138373603 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_mode.606810000 |
|
|
Sep 24 02:46:19 PM UTC 24 |
Sep 24 02:46:26 PM UTC 24 |
105283428 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_mailbox.3775019996 |
|
|
Sep 24 02:46:16 PM UTC 24 |
Sep 24 02:46:26 PM UTC 24 |
277843509 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.2655516293 |
|
|
Sep 24 02:46:16 PM UTC 24 |
Sep 24 02:46:26 PM UTC 24 |
2847281246 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.3662021579 |
|
|
Sep 24 02:46:16 PM UTC 24 |
Sep 24 02:46:27 PM UTC 24 |
601467130 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_all.130736871 |
|
|
Sep 24 02:46:11 PM UTC 24 |
Sep 24 02:46:29 PM UTC 24 |
2767367129 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.888241981 |
|
|
Sep 24 02:46:27 PM UTC 24 |
Sep 24 02:46:30 PM UTC 24 |
23251799 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.348459757 |
|
|
Sep 24 02:46:28 PM UTC 24 |
Sep 24 02:46:30 PM UTC 24 |
70008769 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.664601675 |
|
|
Sep 24 02:44:33 PM UTC 24 |
Sep 24 02:46:30 PM UTC 24 |
11443247556 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.4225923279 |
|
|
Sep 24 02:46:15 PM UTC 24 |
Sep 24 02:46:31 PM UTC 24 |
944736792 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/3.spi_device_stress_all.1173557257 |
|
|
Sep 24 02:37:14 PM UTC 24 |
Sep 24 02:46:32 PM UTC 24 |
45950090062 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.3120228170 |
|
|
Sep 24 02:46:31 PM UTC 24 |
Sep 24 02:46:33 PM UTC 24 |
293626670 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.3218892387 |
|
|
Sep 24 02:46:31 PM UTC 24 |
Sep 24 02:46:36 PM UTC 24 |
96937465 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_stress_all.3924837338 |
|
|
Sep 24 02:46:05 PM UTC 24 |
Sep 24 02:46:37 PM UTC 24 |
12741320407 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.741135710 |
|
|
Sep 24 02:46:23 PM UTC 24 |
Sep 24 02:46:38 PM UTC 24 |
1801934489 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_pass_cmd_filtering.1639466643 |
|
|
Sep 24 02:46:31 PM UTC 24 |
Sep 24 02:46:39 PM UTC 24 |
4178716449 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1776278661 |
|
|
Sep 24 02:42:03 PM UTC 24 |
Sep 24 02:46:41 PM UTC 24 |
29634271924 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.1000535170 |
|
|
Sep 24 02:46:28 PM UTC 24 |
Sep 24 02:46:41 PM UTC 24 |
2233871502 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_cfg_cmd.3625529040 |
|
|
Sep 24 02:46:38 PM UTC 24 |
Sep 24 02:46:42 PM UTC 24 |
71167451 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.3457124124 |
|
|
Sep 24 02:44:16 PM UTC 24 |
Sep 24 02:46:44 PM UTC 24 |
11339675304 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.650683637 |
|
|
Sep 24 02:45:06 PM UTC 24 |
Sep 24 02:46:45 PM UTC 24 |
71120440065 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.2019516834 |
|
|
Sep 24 02:44:04 PM UTC 24 |
Sep 24 02:46:46 PM UTC 24 |
44991062529 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_intercept.2473057572 |
|
|
Sep 24 02:46:33 PM UTC 24 |
Sep 24 02:46:46 PM UTC 24 |
4241492419 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_flash_mode.2267708993 |
|
|
Sep 24 02:46:39 PM UTC 24 |
Sep 24 02:46:46 PM UTC 24 |
960059502 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_23/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_read_buffer_direct.734080916 |
|
|
Sep 24 02:46:42 PM UTC 24 |
Sep 24 02:46:47 PM UTC 24 |
158161040 ps |