| T343 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.2693711617 |
|
|
Oct 03 04:07:30 AM UTC 24 |
Oct 03 04:08:34 AM UTC 24 |
8751009102 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode.3441071553 |
|
|
Oct 03 04:08:12 AM UTC 24 |
Oct 03 04:08:35 AM UTC 24 |
4389645879 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.655717255 |
|
|
Oct 03 04:09:53 AM UTC 24 |
Oct 03 04:10:03 AM UTC 24 |
2385729198 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_csb_read.3443010983 |
|
|
Oct 03 04:08:35 AM UTC 24 |
Oct 03 04:08:37 AM UTC 24 |
38286833 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_tpm_all.414526428 |
|
|
Oct 03 04:07:58 AM UTC 24 |
Oct 03 04:08:38 AM UTC 24 |
24541086103 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.1175684968 |
|
|
Oct 03 04:05:18 AM UTC 24 |
Oct 03 04:08:39 AM UTC 24 |
14027546587 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode.3130719089 |
|
|
Oct 03 04:07:46 AM UTC 24 |
Oct 03 04:08:39 AM UTC 24 |
28664597909 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.2674447711 |
|
|
Oct 03 04:08:38 AM UTC 24 |
Oct 03 04:08:40 AM UTC 24 |
69966261 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.2783881438 |
|
|
Oct 03 04:08:40 AM UTC 24 |
Oct 03 04:08:44 AM UTC 24 |
262053268 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_pass_cmd_filtering.380928512 |
|
|
Oct 03 04:08:00 AM UTC 24 |
Oct 03 04:08:44 AM UTC 24 |
35445616695 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.2151180980 |
|
|
Oct 03 04:07:32 AM UTC 24 |
Oct 03 04:08:45 AM UTC 24 |
3378127554 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.3928698521 |
|
|
Oct 03 04:08:39 AM UTC 24 |
Oct 03 04:08:46 AM UTC 24 |
285773838 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.3281959466 |
|
|
Oct 03 04:07:53 AM UTC 24 |
Oct 03 04:08:48 AM UTC 24 |
2777704386 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_rw.2737392582 |
|
|
Oct 03 04:08:38 AM UTC 24 |
Oct 03 04:08:49 AM UTC 24 |
313671380 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_upload.1374235667 |
|
|
Oct 03 04:08:44 AM UTC 24 |
Oct 03 04:08:49 AM UTC 24 |
1361284897 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_intercept.3637874396 |
|
|
Oct 03 04:08:40 AM UTC 24 |
Oct 03 04:08:49 AM UTC 24 |
615307449 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_cfg_cmd.3770156421 |
|
|
Oct 03 04:08:45 AM UTC 24 |
Oct 03 04:08:49 AM UTC 24 |
180621963 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.2732688765 |
|
|
Oct 03 04:08:36 AM UTC 24 |
Oct 03 04:08:51 AM UTC 24 |
2245435902 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_alert_test.414174943 |
|
|
Oct 03 04:08:50 AM UTC 24 |
Oct 03 04:08:52 AM UTC 24 |
20795511 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_csb_read.167398423 |
|
|
Oct 03 04:08:52 AM UTC 24 |
Oct 03 04:08:54 AM UTC 24 |
44228416 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.2421477966 |
|
|
Oct 03 04:09:48 AM UTC 24 |
Oct 03 04:09:53 AM UTC 24 |
276287799 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_mailbox.1568504934 |
|
|
Oct 03 04:08:41 AM UTC 24 |
Oct 03 04:08:55 AM UTC 24 |
758796780 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.2336791311 |
|
|
Oct 03 04:08:54 AM UTC 24 |
Oct 03 04:08:56 AM UTC 24 |
28209713 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.2136907553 |
|
|
Oct 03 04:08:56 AM UTC 24 |
Oct 03 04:08:58 AM UTC 24 |
108945751 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_rw.178013209 |
|
|
Oct 03 04:08:56 AM UTC 24 |
Oct 03 04:08:58 AM UTC 24 |
14878324 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/6.spi_device_flash_all.1986804772 |
|
|
Oct 03 04:02:53 AM UTC 24 |
Oct 03 04:09:02 AM UTC 24 |
155875889642 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.1837520918 |
|
|
Oct 03 04:08:49 AM UTC 24 |
Oct 03 04:09:04 AM UTC 24 |
5500234480 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_all.2479643287 |
|
|
Oct 03 04:01:59 AM UTC 24 |
Oct 03 04:09:07 AM UTC 24 |
585353701227 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_upload.1648794014 |
|
|
Oct 03 04:09:03 AM UTC 24 |
Oct 03 04:09:07 AM UTC 24 |
51970531 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_cfg_cmd.2693301611 |
|
|
Oct 03 04:09:05 AM UTC 24 |
Oct 03 04:09:10 AM UTC 24 |
281994945 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.1890633419 |
|
|
Oct 03 04:08:23 AM UTC 24 |
Oct 03 04:09:11 AM UTC 24 |
6732750172 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.3679218793 |
|
|
Oct 03 04:08:57 AM UTC 24 |
Oct 03 04:09:12 AM UTC 24 |
2111607880 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.3919208814 |
|
|
Oct 03 04:08:59 AM UTC 24 |
Oct 03 04:09:12 AM UTC 24 |
3105112595 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode.293298582 |
|
|
Oct 03 04:09:08 AM UTC 24 |
Oct 03 04:09:14 AM UTC 24 |
917592947 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_all.2293391128 |
|
|
Oct 03 04:08:36 AM UTC 24 |
Oct 03 04:09:16 AM UTC 24 |
1978306501 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.57801125 |
|
|
Oct 03 04:09:11 AM UTC 24 |
Oct 03 04:09:17 AM UTC 24 |
157538286 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_intercept.661508725 |
|
|
Oct 03 04:08:59 AM UTC 24 |
Oct 03 04:09:18 AM UTC 24 |
4802909200 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.3758551400 |
|
|
Oct 03 04:08:56 AM UTC 24 |
Oct 03 04:09:18 AM UTC 24 |
4295223295 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.577773411 |
|
|
Oct 03 04:09:16 AM UTC 24 |
Oct 03 04:09:19 AM UTC 24 |
83783923 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.945257841 |
|
|
Oct 03 04:09:53 AM UTC 24 |
Oct 03 04:10:01 AM UTC 24 |
902638602 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.4212629223 |
|
|
Oct 03 04:09:19 AM UTC 24 |
Oct 03 04:09:21 AM UTC 24 |
20512337 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode.604904991 |
|
|
Oct 03 04:08:47 AM UTC 24 |
Oct 03 04:09:22 AM UTC 24 |
4646434098 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.3934403901 |
|
|
Oct 03 04:09:21 AM UTC 24 |
Oct 03 04:09:23 AM UTC 24 |
34832480 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_all.2863674386 |
|
|
Oct 03 04:08:20 AM UTC 24 |
Oct 03 04:09:24 AM UTC 24 |
10744631427 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.74722430 |
|
|
Oct 03 04:09:22 AM UTC 24 |
Oct 03 04:09:24 AM UTC 24 |
21332755 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.4012076257 |
|
|
Oct 03 04:09:23 AM UTC 24 |
Oct 03 04:09:31 AM UTC 24 |
1234387592 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.4022041930 |
|
|
Oct 03 04:08:55 AM UTC 24 |
Oct 03 04:09:32 AM UTC 24 |
5193301895 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.2777560760 |
|
|
Oct 03 04:09:26 AM UTC 24 |
Oct 03 04:09:32 AM UTC 24 |
818052791 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.1297717025 |
|
|
Oct 03 04:09:26 AM UTC 24 |
Oct 03 04:09:32 AM UTC 24 |
4208163656 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.1080632990 |
|
|
Oct 03 04:09:22 AM UTC 24 |
Oct 03 04:09:33 AM UTC 24 |
1014606181 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.2516878527 |
|
|
Oct 03 04:09:20 AM UTC 24 |
Oct 03 04:09:33 AM UTC 24 |
3065085085 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.3521717774 |
|
|
Oct 03 04:09:20 AM UTC 24 |
Oct 03 04:09:33 AM UTC 24 |
600936848 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.324192210 |
|
|
Oct 03 04:09:24 AM UTC 24 |
Oct 03 04:09:34 AM UTC 24 |
1352716830 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.2476201860 |
|
|
Oct 03 04:09:34 AM UTC 24 |
Oct 03 04:09:37 AM UTC 24 |
11445949 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.3453086984 |
|
|
Oct 03 04:09:34 AM UTC 24 |
Oct 03 04:09:37 AM UTC 24 |
13310747 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.978610287 |
|
|
Oct 03 04:09:34 AM UTC 24 |
Oct 03 04:09:37 AM UTC 24 |
59325099 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.1663995190 |
|
|
Oct 03 04:09:41 AM UTC 24 |
Oct 03 04:09:43 AM UTC 24 |
27992443 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.3196525743 |
|
|
Oct 03 04:09:38 AM UTC 24 |
Oct 03 04:09:46 AM UTC 24 |
4981821529 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.2244133035 |
|
|
Oct 03 04:09:44 AM UTC 24 |
Oct 03 04:09:47 AM UTC 24 |
97826834 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.3914789646 |
|
|
Oct 03 04:08:14 AM UTC 24 |
Oct 03 04:09:48 AM UTC 24 |
38482744666 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.113925825 |
|
|
Oct 03 04:09:33 AM UTC 24 |
Oct 03 04:09:49 AM UTC 24 |
2919170323 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.458213898 |
|
|
Oct 03 04:09:47 AM UTC 24 |
Oct 03 04:09:51 AM UTC 24 |
693154780 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.3724362245 |
|
|
Oct 03 04:09:48 AM UTC 24 |
Oct 03 04:09:52 AM UTC 24 |
32897859 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.2596132557 |
|
|
Oct 03 04:09:33 AM UTC 24 |
Oct 03 04:09:54 AM UTC 24 |
5224500943 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_mode_ignore_cmds.606379258 |
|
|
Oct 03 04:05:14 AM UTC 24 |
Oct 03 04:09:55 AM UTC 24 |
46448359709 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.3230536764 |
|
|
Oct 03 04:09:54 AM UTC 24 |
Oct 03 04:10:00 AM UTC 24 |
957894497 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.2360597474 |
|
|
Oct 03 04:10:02 AM UTC 24 |
Oct 03 04:10:04 AM UTC 24 |
11627258 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.3029496603 |
|
|
Oct 03 04:09:49 AM UTC 24 |
Oct 03 04:10:04 AM UTC 24 |
12903289326 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.2009818354 |
|
|
Oct 03 04:10:04 AM UTC 24 |
Oct 03 04:10:06 AM UTC 24 |
41504742 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.1519591036 |
|
|
Oct 03 04:11:15 AM UTC 24 |
Oct 03 04:11:18 AM UTC 24 |
33524984 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.1783974456 |
|
|
Oct 03 04:09:24 AM UTC 24 |
Oct 03 04:10:08 AM UTC 24 |
12746203496 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.3828801208 |
|
|
Oct 03 04:08:47 AM UTC 24 |
Oct 03 04:10:08 AM UTC 24 |
23367212404 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.2754186089 |
|
|
Oct 03 04:10:06 AM UTC 24 |
Oct 03 04:10:08 AM UTC 24 |
32240222 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.3628028975 |
|
|
Oct 03 04:10:07 AM UTC 24 |
Oct 03 04:10:09 AM UTC 24 |
95145006 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.819054257 |
|
|
Oct 03 04:10:08 AM UTC 24 |
Oct 03 04:10:10 AM UTC 24 |
32641489 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.1435578219 |
|
|
Oct 03 04:07:51 AM UTC 24 |
Oct 03 04:10:12 AM UTC 24 |
69831137288 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.2080800593 |
|
|
Oct 03 04:10:10 AM UTC 24 |
Oct 03 04:10:15 AM UTC 24 |
214310938 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.3021352320 |
|
|
Oct 03 04:10:08 AM UTC 24 |
Oct 03 04:10:16 AM UTC 24 |
505427056 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.3102180821 |
|
|
Oct 03 04:10:12 AM UTC 24 |
Oct 03 04:10:16 AM UTC 24 |
90160502 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.485549653 |
|
|
Oct 03 04:10:08 AM UTC 24 |
Oct 03 04:10:17 AM UTC 24 |
4696822138 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.4254587707 |
|
|
Oct 03 04:08:49 AM UTC 24 |
Oct 03 04:10:19 AM UTC 24 |
17564203805 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.3193159219 |
|
|
Oct 03 04:09:08 AM UTC 24 |
Oct 03 04:10:19 AM UTC 24 |
12338952232 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_all.2697873744 |
|
|
Oct 03 04:09:38 AM UTC 24 |
Oct 03 04:10:20 AM UTC 24 |
5314815482 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.2707144499 |
|
|
Oct 03 04:10:20 AM UTC 24 |
Oct 03 04:10:22 AM UTC 24 |
24094290 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.1295749928 |
|
|
Oct 03 04:10:20 AM UTC 24 |
Oct 03 04:10:22 AM UTC 24 |
34229357 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.2675886268 |
|
|
Oct 03 04:10:21 AM UTC 24 |
Oct 03 04:10:23 AM UTC 24 |
44349329 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_upload.3282847935 |
|
|
Oct 03 04:10:11 AM UTC 24 |
Oct 03 04:10:24 AM UTC 24 |
816321663 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.23791631 |
|
|
Oct 03 04:10:16 AM UTC 24 |
Oct 03 04:10:25 AM UTC 24 |
3811382887 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.576181644 |
|
|
Oct 03 04:10:24 AM UTC 24 |
Oct 03 04:10:26 AM UTC 24 |
60380459 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.203291098 |
|
|
Oct 03 04:10:23 AM UTC 24 |
Oct 03 04:10:27 AM UTC 24 |
254665146 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_all.3894723228 |
|
|
Oct 03 04:05:52 AM UTC 24 |
Oct 03 04:10:27 AM UTC 24 |
82380167211 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.352210215 |
|
|
Oct 03 04:10:25 AM UTC 24 |
Oct 03 04:10:28 AM UTC 24 |
96494197 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.3510174021 |
|
|
Oct 03 04:09:33 AM UTC 24 |
Oct 03 04:10:28 AM UTC 24 |
16701436065 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.4201989324 |
|
|
Oct 03 04:08:50 AM UTC 24 |
Oct 03 04:10:29 AM UTC 24 |
5319671144 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.2492050662 |
|
|
Oct 03 04:10:25 AM UTC 24 |
Oct 03 04:10:29 AM UTC 24 |
116795364 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2882747266 |
|
|
Oct 03 04:10:05 AM UTC 24 |
Oct 03 04:10:29 AM UTC 24 |
3852653269 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.65233154 |
|
|
Oct 03 04:10:10 AM UTC 24 |
Oct 03 04:10:29 AM UTC 24 |
642793871 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.4037542860 |
|
|
Oct 03 04:09:32 AM UTC 24 |
Oct 03 04:10:31 AM UTC 24 |
3143646745 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.1192998764 |
|
|
Oct 03 04:11:06 AM UTC 24 |
Oct 03 04:11:14 AM UTC 24 |
1006318175 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.746835638 |
|
|
Oct 03 04:10:27 AM UTC 24 |
Oct 03 04:10:32 AM UTC 24 |
301254832 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.3811057991 |
|
|
Oct 03 04:10:30 AM UTC 24 |
Oct 03 04:10:35 AM UTC 24 |
138979314 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.863001224 |
|
|
Oct 03 04:09:13 AM UTC 24 |
Oct 03 04:10:36 AM UTC 24 |
31315510519 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.2290720484 |
|
|
Oct 03 04:10:30 AM UTC 24 |
Oct 03 04:10:37 AM UTC 24 |
437429687 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.1101530259 |
|
|
Oct 03 04:09:49 AM UTC 24 |
Oct 03 04:10:38 AM UTC 24 |
15685315775 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.47617150 |
|
|
Oct 03 04:10:37 AM UTC 24 |
Oct 03 04:10:39 AM UTC 24 |
37518699 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.2882160620 |
|
|
Oct 03 04:10:37 AM UTC 24 |
Oct 03 04:10:39 AM UTC 24 |
33580704 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.502205860 |
|
|
Oct 03 04:10:29 AM UTC 24 |
Oct 03 04:10:41 AM UTC 24 |
512283410 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.1792207883 |
|
|
Oct 03 04:10:38 AM UTC 24 |
Oct 03 04:10:42 AM UTC 24 |
642054353 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.1105173384 |
|
|
Oct 03 04:10:30 AM UTC 24 |
Oct 03 04:10:42 AM UTC 24 |
733575882 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.1823774391 |
|
|
Oct 03 04:10:40 AM UTC 24 |
Oct 03 04:10:42 AM UTC 24 |
140265093 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.471902091 |
|
|
Oct 03 04:10:26 AM UTC 24 |
Oct 03 04:10:43 AM UTC 24 |
5788877027 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.3238681584 |
|
|
Oct 03 04:10:40 AM UTC 24 |
Oct 03 04:10:43 AM UTC 24 |
65527612 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.1252855083 |
|
|
Oct 03 04:10:16 AM UTC 24 |
Oct 03 04:10:44 AM UTC 24 |
9121250930 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.2933396774 |
|
|
Oct 03 04:10:42 AM UTC 24 |
Oct 03 04:10:47 AM UTC 24 |
155545110 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.3428961669 |
|
|
Oct 03 04:10:27 AM UTC 24 |
Oct 03 04:10:47 AM UTC 24 |
11402702675 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.2104334642 |
|
|
Oct 03 04:10:43 AM UTC 24 |
Oct 03 04:10:48 AM UTC 24 |
734450142 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.3102764524 |
|
|
Oct 03 04:10:44 AM UTC 24 |
Oct 03 04:10:50 AM UTC 24 |
252612857 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.439924372 |
|
|
Oct 03 04:10:13 AM UTC 24 |
Oct 03 04:10:50 AM UTC 24 |
4728305949 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.3145736385 |
|
|
Oct 03 04:10:43 AM UTC 24 |
Oct 03 04:10:51 AM UTC 24 |
842394387 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.2995276069 |
|
|
Oct 03 04:10:51 AM UTC 24 |
Oct 03 04:10:53 AM UTC 24 |
53967844 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_stress_all.648892361 |
|
|
Oct 03 04:10:51 AM UTC 24 |
Oct 03 04:10:54 AM UTC 24 |
95318506 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.3112511532 |
|
|
Oct 03 04:10:44 AM UTC 24 |
Oct 03 04:10:56 AM UTC 24 |
2319720877 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.2547208965 |
|
|
Oct 03 04:10:54 AM UTC 24 |
Oct 03 04:10:57 AM UTC 24 |
37148114 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.3634350926 |
|
|
Oct 03 04:10:43 AM UTC 24 |
Oct 03 04:10:59 AM UTC 24 |
2750878068 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.332215563 |
|
|
Oct 03 04:10:57 AM UTC 24 |
Oct 03 04:11:00 AM UTC 24 |
60958929 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.1171287664 |
|
|
Oct 03 04:10:58 AM UTC 24 |
Oct 03 04:11:01 AM UTC 24 |
78802810 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.361829130 |
|
|
Oct 03 04:10:39 AM UTC 24 |
Oct 03 04:11:05 AM UTC 24 |
18915331451 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3689608134 |
|
|
Oct 03 04:11:01 AM UTC 24 |
Oct 03 04:11:05 AM UTC 24 |
164217664 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.1855878550 |
|
|
Oct 03 04:11:01 AM UTC 24 |
Oct 03 04:11:06 AM UTC 24 |
53105753 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.4122645657 |
|
|
Oct 03 04:10:49 AM UTC 24 |
Oct 03 04:11:08 AM UTC 24 |
5952488450 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.1444047149 |
|
|
Oct 03 04:11:06 AM UTC 24 |
Oct 03 04:11:10 AM UTC 24 |
124174938 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.2567244415 |
|
|
Oct 03 04:08:21 AM UTC 24 |
Oct 03 04:11:12 AM UTC 24 |
12221065714 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/0.spi_device_stress_all.2667278595 |
|
|
Oct 03 03:55:58 AM UTC 24 |
Oct 03 04:11:13 AM UTC 24 |
85145954840 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.3724718468 |
|
|
Oct 03 04:11:07 AM UTC 24 |
Oct 03 04:11:14 AM UTC 24 |
670450476 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2664243940 |
|
|
Oct 03 04:10:54 AM UTC 24 |
Oct 03 04:11:14 AM UTC 24 |
3086913297 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.1852810104 |
|
|
Oct 03 04:10:29 AM UTC 24 |
Oct 03 04:11:16 AM UTC 24 |
9343502813 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2507895276 |
|
|
Oct 03 04:10:19 AM UTC 24 |
Oct 03 04:11:16 AM UTC 24 |
3492356607 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.3482664489 |
|
|
Oct 03 04:11:15 AM UTC 24 |
Oct 03 04:11:18 AM UTC 24 |
17007831 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3546043437 |
|
|
Oct 03 04:11:17 AM UTC 24 |
Oct 03 04:11:20 AM UTC 24 |
26114000 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.1159782637 |
|
|
Oct 03 04:11:17 AM UTC 24 |
Oct 03 04:11:20 AM UTC 24 |
17358580 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.3285954495 |
|
|
Oct 03 04:11:15 AM UTC 24 |
Oct 03 04:11:20 AM UTC 24 |
205533730 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.3776310170 |
|
|
Oct 03 04:09:56 AM UTC 24 |
Oct 03 04:11:21 AM UTC 24 |
4161780911 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.1727212624 |
|
|
Oct 03 04:11:01 AM UTC 24 |
Oct 03 04:11:21 AM UTC 24 |
2718693612 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.1636395998 |
|
|
Oct 03 04:11:18 AM UTC 24 |
Oct 03 04:11:21 AM UTC 24 |
33419149 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.4200714002 |
|
|
Oct 03 04:11:09 AM UTC 24 |
Oct 03 04:11:22 AM UTC 24 |
3573191049 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.737827834 |
|
|
Oct 03 04:11:03 AM UTC 24 |
Oct 03 04:11:25 AM UTC 24 |
868321795 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.584561006 |
|
|
Oct 03 04:11:21 AM UTC 24 |
Oct 03 04:11:26 AM UTC 24 |
137528938 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.3103188905 |
|
|
Oct 03 04:10:56 AM UTC 24 |
Oct 03 04:11:27 AM UTC 24 |
8444582070 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.2620517179 |
|
|
Oct 03 04:11:22 AM UTC 24 |
Oct 03 04:11:29 AM UTC 24 |
1284983193 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.2074589017 |
|
|
Oct 03 04:11:21 AM UTC 24 |
Oct 03 04:11:30 AM UTC 24 |
1422384926 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1456477532 |
|
|
Oct 03 04:11:23 AM UTC 24 |
Oct 03 04:11:31 AM UTC 24 |
189397005 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.2805245068 |
|
|
Oct 03 04:11:22 AM UTC 24 |
Oct 03 04:11:32 AM UTC 24 |
252804308 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.1059621392 |
|
|
Oct 03 04:11:30 AM UTC 24 |
Oct 03 04:11:32 AM UTC 24 |
81570000 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.3582825742 |
|
|
Oct 03 04:11:19 AM UTC 24 |
Oct 03 04:11:33 AM UTC 24 |
805441143 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.2631694621 |
|
|
Oct 03 04:11:31 AM UTC 24 |
Oct 03 04:11:33 AM UTC 24 |
43844311 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.1364642718 |
|
|
Oct 03 04:11:33 AM UTC 24 |
Oct 03 04:11:35 AM UTC 24 |
135255980 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.2274026687 |
|
|
Oct 03 04:11:22 AM UTC 24 |
Oct 03 04:11:35 AM UTC 24 |
4861581104 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.135518392 |
|
|
Oct 03 04:11:33 AM UTC 24 |
Oct 03 04:11:36 AM UTC 24 |
51169061 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.2239669072 |
|
|
Oct 03 04:08:50 AM UTC 24 |
Oct 03 04:11:37 AM UTC 24 |
45008351521 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_all.1004632506 |
|
|
Oct 03 04:09:12 AM UTC 24 |
Oct 03 04:11:37 AM UTC 24 |
21581309519 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1619367186 |
|
|
Oct 03 04:11:13 AM UTC 24 |
Oct 03 04:11:38 AM UTC 24 |
1251448978 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.1510512218 |
|
|
Oct 03 04:11:37 AM UTC 24 |
Oct 03 04:11:41 AM UTC 24 |
86565981 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.1448767305 |
|
|
Oct 03 04:11:37 AM UTC 24 |
Oct 03 04:11:42 AM UTC 24 |
2415057505 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.490837546 |
|
|
Oct 03 04:10:45 AM UTC 24 |
Oct 03 04:11:44 AM UTC 24 |
17158393497 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.2289147853 |
|
|
Oct 03 04:11:38 AM UTC 24 |
Oct 03 04:11:46 AM UTC 24 |
414523586 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.341084113 |
|
|
Oct 03 04:11:39 AM UTC 24 |
Oct 03 04:11:47 AM UTC 24 |
440681803 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.2473783486 |
|
|
Oct 03 04:11:39 AM UTC 24 |
Oct 03 04:11:47 AM UTC 24 |
400622706 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.3960069904 |
|
|
Oct 03 04:11:21 AM UTC 24 |
Oct 03 04:11:49 AM UTC 24 |
2520140273 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.3672896839 |
|
|
Oct 03 04:11:48 AM UTC 24 |
Oct 03 04:11:50 AM UTC 24 |
13115654 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.3250117823 |
|
|
Oct 03 04:11:33 AM UTC 24 |
Oct 03 04:11:50 AM UTC 24 |
2395045644 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_stress_all.2720353333 |
|
|
Oct 03 04:07:33 AM UTC 24 |
Oct 03 04:11:50 AM UTC 24 |
24483151651 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.808276094 |
|
|
Oct 03 04:11:48 AM UTC 24 |
Oct 03 04:11:50 AM UTC 24 |
65675272 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.727983866 |
|
|
Oct 03 04:11:50 AM UTC 24 |
Oct 03 04:11:52 AM UTC 24 |
17478361 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.450392376 |
|
|
Oct 03 04:11:51 AM UTC 24 |
Oct 03 04:11:53 AM UTC 24 |
44759552 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.3228514032 |
|
|
Oct 03 04:11:51 AM UTC 24 |
Oct 03 04:11:54 AM UTC 24 |
801914297 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2957362360 |
|
|
Oct 03 04:11:41 AM UTC 24 |
Oct 03 04:11:56 AM UTC 24 |
827042732 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.3896748805 |
|
|
Oct 03 04:10:01 AM UTC 24 |
Oct 03 04:11:57 AM UTC 24 |
8942186937 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.1884064942 |
|
|
Oct 03 04:11:51 AM UTC 24 |
Oct 03 04:11:58 AM UTC 24 |
1268507311 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.1211139198 |
|
|
Oct 03 04:11:34 AM UTC 24 |
Oct 03 04:11:59 AM UTC 24 |
10841990285 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_all.3872677614 |
|
|
Oct 03 04:11:11 AM UTC 24 |
Oct 03 04:12:01 AM UTC 24 |
2567623263 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.3499337354 |
|
|
Oct 03 04:11:45 AM UTC 24 |
Oct 03 04:12:02 AM UTC 24 |
28697683090 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.3889539287 |
|
|
Oct 03 04:12:20 AM UTC 24 |
Oct 03 04:12:36 AM UTC 24 |
3446178069 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.4108586753 |
|
|
Oct 03 04:12:00 AM UTC 24 |
Oct 03 04:12:04 AM UTC 24 |
279976876 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.3055806592 |
|
|
Oct 03 04:11:59 AM UTC 24 |
Oct 03 04:12:05 AM UTC 24 |
220980085 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.2545261474 |
|
|
Oct 03 04:11:54 AM UTC 24 |
Oct 03 04:12:06 AM UTC 24 |
347206260 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.2620411738 |
|
|
Oct 03 04:10:49 AM UTC 24 |
Oct 03 04:12:07 AM UTC 24 |
10377836564 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.1635365837 |
|
|
Oct 03 04:11:51 AM UTC 24 |
Oct 03 04:12:07 AM UTC 24 |
6467267220 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.121151566 |
|
|
Oct 03 04:12:07 AM UTC 24 |
Oct 03 04:12:10 AM UTC 24 |
14083443 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.1682076694 |
|
|
Oct 03 04:11:38 AM UTC 24 |
Oct 03 04:12:10 AM UTC 24 |
7287796938 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.998056943 |
|
|
Oct 03 04:11:32 AM UTC 24 |
Oct 03 04:12:10 AM UTC 24 |
87399691007 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.956478879 |
|
|
Oct 03 04:11:54 AM UTC 24 |
Oct 03 04:12:12 AM UTC 24 |
5923300635 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.341384604 |
|
|
Oct 03 04:12:11 AM UTC 24 |
Oct 03 04:12:13 AM UTC 24 |
15748203 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.175890264 |
|
|
Oct 03 04:11:58 AM UTC 24 |
Oct 03 04:12:13 AM UTC 24 |
36071556287 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.3336911098 |
|
|
Oct 03 04:12:12 AM UTC 24 |
Oct 03 04:12:14 AM UTC 24 |
13351562 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.1201730173 |
|
|
Oct 03 04:12:13 AM UTC 24 |
Oct 03 04:12:15 AM UTC 24 |
116153659 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.401550780 |
|
|
Oct 03 04:11:53 AM UTC 24 |
Oct 03 04:12:16 AM UTC 24 |
26530896883 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.1257943585 |
|
|
Oct 03 04:09:33 AM UTC 24 |
Oct 03 04:12:16 AM UTC 24 |
63044848535 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.3356615985 |
|
|
Oct 03 04:12:14 AM UTC 24 |
Oct 03 04:12:17 AM UTC 24 |
147954922 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.1875056922 |
|
|
Oct 03 04:11:57 AM UTC 24 |
Oct 03 04:12:17 AM UTC 24 |
2920893206 ps |
| T60 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_flash_and_tpm.4169434454 |
|
|
Oct 03 04:01:09 AM UTC 24 |
Oct 03 04:12:19 AM UTC 24 |
115531528179 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.2586403523 |
|
|
Oct 03 04:12:16 AM UTC 24 |
Oct 03 04:12:21 AM UTC 24 |
333852502 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.3117302960 |
|
|
Oct 03 04:10:30 AM UTC 24 |
Oct 03 04:12:21 AM UTC 24 |
44196906444 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.1693578281 |
|
|
Oct 03 04:12:15 AM UTC 24 |
Oct 03 04:12:22 AM UTC 24 |
432100513 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.107953400 |
|
|
Oct 03 04:12:11 AM UTC 24 |
Oct 03 04:12:22 AM UTC 24 |
2238600912 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.3704710354 |
|
|
Oct 03 04:12:03 AM UTC 24 |
Oct 03 04:12:23 AM UTC 24 |
1527155378 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.1867802647 |
|
|
Oct 03 04:12:22 AM UTC 24 |
Oct 03 04:12:25 AM UTC 24 |
395372652 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.1696019354 |
|
|
Oct 03 04:12:23 AM UTC 24 |
Oct 03 04:12:25 AM UTC 24 |
12325768 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.2748216944 |
|
|
Oct 03 04:12:23 AM UTC 24 |
Oct 03 04:12:25 AM UTC 24 |
14269232 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.2378582231 |
|
|
Oct 03 04:12:27 AM UTC 24 |
Oct 03 04:12:29 AM UTC 24 |
15911277 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.596660267 |
|
|
Oct 03 04:10:17 AM UTC 24 |
Oct 03 04:12:32 AM UTC 24 |
5472186722 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.1189817173 |
|
|
Oct 03 04:12:16 AM UTC 24 |
Oct 03 04:12:34 AM UTC 24 |
1489641295 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_rw.1241994376 |
|
|
Oct 03 04:12:30 AM UTC 24 |
Oct 03 04:12:35 AM UTC 24 |
671786276 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.79494240 |
|
|
Oct 03 04:12:18 AM UTC 24 |
Oct 03 04:12:35 AM UTC 24 |
890568859 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.2669634780 |
|
|
Oct 03 04:10:49 AM UTC 24 |
Oct 03 04:12:36 AM UTC 24 |
40083930451 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_stress_all.155462516 |
|
|
Oct 03 04:12:07 AM UTC 24 |
Oct 03 04:12:37 AM UTC 24 |
2344523443 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.973186758 |
|
|
Oct 03 04:12:25 AM UTC 24 |
Oct 03 04:12:37 AM UTC 24 |
6218698506 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.3274931174 |
|
|
Oct 03 04:12:16 AM UTC 24 |
Oct 03 04:12:37 AM UTC 24 |
1053775450 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.2942585499 |
|
|
Oct 03 04:12:18 AM UTC 24 |
Oct 03 04:12:38 AM UTC 24 |
1307064427 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.1411508513 |
|
|
Oct 03 04:10:48 AM UTC 24 |
Oct 03 04:12:39 AM UTC 24 |
37420143981 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.2746569906 |
|
|
Oct 03 04:12:32 AM UTC 24 |
Oct 03 04:12:40 AM UTC 24 |
2738166409 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.1392641422 |
|
|
Oct 03 04:10:50 AM UTC 24 |
Oct 03 04:12:41 AM UTC 24 |
15945639833 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.4258403169 |
|
|
Oct 03 04:11:43 AM UTC 24 |
Oct 03 04:12:41 AM UTC 24 |
49571017398 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.1540495291 |
|
|
Oct 03 04:12:35 AM UTC 24 |
Oct 03 04:12:42 AM UTC 24 |
5557753648 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.57951775 |
|
|
Oct 03 04:12:37 AM UTC 24 |
Oct 03 04:12:43 AM UTC 24 |
633467598 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.478019925 |
|
|
Oct 03 04:12:14 AM UTC 24 |
Oct 03 04:12:44 AM UTC 24 |
11467725179 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.1035851606 |
|
|
Oct 03 04:12:42 AM UTC 24 |
Oct 03 04:12:45 AM UTC 24 |
37852763 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.1413935247 |
|
|
Oct 03 04:12:42 AM UTC 24 |
Oct 03 04:12:45 AM UTC 24 |
16861696 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.3720277583 |
|
|
Oct 03 04:12:36 AM UTC 24 |
Oct 03 04:12:45 AM UTC 24 |
473780938 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.3631598707 |
|
|
Oct 03 04:12:39 AM UTC 24 |
Oct 03 04:12:46 AM UTC 24 |
80452722 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.689486889 |
|
|
Oct 03 04:12:44 AM UTC 24 |
Oct 03 04:12:47 AM UTC 24 |
410845609 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.2684008668 |
|
|
Oct 03 04:12:45 AM UTC 24 |
Oct 03 04:12:50 AM UTC 24 |
329381935 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.3618070097 |
|
|
Oct 03 04:12:46 AM UTC 24 |
Oct 03 04:12:50 AM UTC 24 |
29381292 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.1427284020 |
|
|
Oct 03 04:12:27 AM UTC 24 |
Oct 03 04:12:50 AM UTC 24 |
12947240498 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.1274153349 |
|
|
Oct 03 04:09:53 AM UTC 24 |
Oct 03 04:12:51 AM UTC 24 |
32307668162 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.573396097 |
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|
Oct 03 04:12:46 AM UTC 24 |
Oct 03 04:12:52 AM UTC 24 |
1642768271 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.3902578719 |
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|
Oct 03 04:12:43 AM UTC 24 |
Oct 03 04:12:55 AM UTC 24 |
18013086459 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_mailbox.1072679817 |
|
|
Oct 03 04:12:35 AM UTC 24 |
Oct 03 04:12:55 AM UTC 24 |
6342864886 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.109532438 |
|
|
Oct 03 04:12:51 AM UTC 24 |
Oct 03 04:12:56 AM UTC 24 |
464587945 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.673887989 |
|
|
Oct 03 04:12:47 AM UTC 24 |
Oct 03 04:12:57 AM UTC 24 |
1968549353 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.378140469 |
|
|
Oct 03 04:12:57 AM UTC 24 |
Oct 03 04:12:59 AM UTC 24 |
17023220 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.841830975 |
|
|
Oct 03 04:12:57 AM UTC 24 |
Oct 03 04:13:00 AM UTC 24 |
258161040 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.2831773104 |
|
|
Oct 03 04:12:58 AM UTC 24 |
Oct 03 04:13:00 AM UTC 24 |
52444792 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.3277582554 |
|
|
Oct 03 04:12:33 AM UTC 24 |
Oct 03 04:13:00 AM UTC 24 |
20341918415 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.2631680577 |
|
|
Oct 03 04:12:02 AM UTC 24 |
Oct 03 04:13:01 AM UTC 24 |
10904956364 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.1688350923 |
|
|
Oct 03 04:12:52 AM UTC 24 |
Oct 03 04:13:01 AM UTC 24 |
442947055 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.1763564227 |
|
|
Oct 03 04:12:43 AM UTC 24 |
Oct 03 04:13:01 AM UTC 24 |
3436349135 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.1796975126 |
|
|
Oct 03 04:13:01 AM UTC 24 |
Oct 03 04:13:04 AM UTC 24 |
82750322 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.1587882342 |
|
|
Oct 03 04:12:48 AM UTC 24 |
Oct 03 04:13:04 AM UTC 24 |
356446101 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.699820017 |
|
|
Oct 03 04:13:01 AM UTC 24 |
Oct 03 04:13:06 AM UTC 24 |
200653667 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_10_02/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.3960498183 |
|
|
Oct 03 04:10:35 AM UTC 24 |
Oct 03 04:13:06 AM UTC 24 |
12187857696 ps |