| T441 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_rw.4021861108 |
|
|
Oct 09 10:30:06 AM UTC 24 |
Oct 09 10:30:11 AM UTC 24 |
162342630 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.2182811200 |
|
|
Oct 09 10:30:04 AM UTC 24 |
Oct 09 10:30:13 AM UTC 24 |
9247465247 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.2964920529 |
|
|
Oct 09 10:30:09 AM UTC 24 |
Oct 09 10:30:15 AM UTC 24 |
48517268 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_tpm_all.990324493 |
|
|
Oct 09 10:29:46 AM UTC 24 |
Oct 09 10:30:15 AM UTC 24 |
7810352338 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_mailbox.1875110329 |
|
|
Oct 09 10:30:12 AM UTC 24 |
Oct 09 10:30:16 AM UTC 24 |
284453318 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_intercept.1612826288 |
|
|
Oct 09 10:30:12 AM UTC 24 |
Oct 09 10:30:16 AM UTC 24 |
118471375 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_cfg_cmd.4258344412 |
|
|
Oct 09 10:30:15 AM UTC 24 |
Oct 09 10:30:19 AM UTC 24 |
331201352 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_all.1186085644 |
|
|
Oct 09 10:27:30 AM UTC 24 |
Oct 09 10:30:21 AM UTC 24 |
15107497087 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_mailbox.1166206317 |
|
|
Oct 09 10:29:20 AM UTC 24 |
Oct 09 10:30:23 AM UTC 24 |
4259455448 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.2847118006 |
|
|
Oct 09 10:30:11 AM UTC 24 |
Oct 09 10:30:24 AM UTC 24 |
10813664095 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.1830919042 |
|
|
Oct 09 10:27:31 AM UTC 24 |
Oct 09 10:30:25 AM UTC 24 |
9595120669 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.2572984669 |
|
|
Oct 09 10:30:16 AM UTC 24 |
Oct 09 10:30:26 AM UTC 24 |
662550197 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_alert_test.2923601608 |
|
|
Oct 09 10:30:25 AM UTC 24 |
Oct 09 10:30:27 AM UTC 24 |
14268359 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_stress_all.550046426 |
|
|
Oct 09 10:30:25 AM UTC 24 |
Oct 09 10:30:27 AM UTC 24 |
83656178 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_csb_read.2904930417 |
|
|
Oct 09 10:30:26 AM UTC 24 |
Oct 09 10:30:28 AM UTC 24 |
50644200 ps |
| T44 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/4.spi_device_stress_all.221750228 |
|
|
Oct 09 10:25:15 AM UTC 24 |
Oct 09 10:32:00 AM UTC 24 |
69642985150 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_stress_all.722943688 |
|
|
Oct 09 10:29:12 AM UTC 24 |
Oct 09 10:30:30 AM UTC 24 |
19200449383 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.4153513502 |
|
|
Oct 09 10:30:29 AM UTC 24 |
Oct 09 10:30:32 AM UTC 24 |
107169713 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.1919288537 |
|
|
Oct 09 10:29:22 AM UTC 24 |
Oct 09 10:30:34 AM UTC 24 |
6750205111 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_upload.102331587 |
|
|
Oct 09 10:30:14 AM UTC 24 |
Oct 09 10:30:34 AM UTC 24 |
4329365270 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_rw.885095499 |
|
|
Oct 09 10:30:30 AM UTC 24 |
Oct 09 10:30:35 AM UTC 24 |
271421756 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.317679369 |
|
|
Oct 09 10:30:31 AM UTC 24 |
Oct 09 10:30:37 AM UTC 24 |
275593259 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_all.1439610084 |
|
|
Oct 09 10:30:28 AM UTC 24 |
Oct 09 10:30:37 AM UTC 24 |
1920351973 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.455378135 |
|
|
Oct 09 10:30:34 AM UTC 24 |
Oct 09 10:30:38 AM UTC 24 |
284362457 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_intercept.3081180419 |
|
|
Oct 09 10:30:35 AM UTC 24 |
Oct 09 10:30:41 AM UTC 24 |
411214291 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_tpm_all.328205056 |
|
|
Oct 09 10:30:05 AM UTC 24 |
Oct 09 10:30:41 AM UTC 24 |
3879114775 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_upload.2383643620 |
|
|
Oct 09 10:30:36 AM UTC 24 |
Oct 09 10:30:41 AM UTC 24 |
566024975 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode.2274475946 |
|
|
Oct 09 10:30:16 AM UTC 24 |
Oct 09 10:30:44 AM UTC 24 |
3651237014 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_cfg_cmd.2715383429 |
|
|
Oct 09 10:30:38 AM UTC 24 |
Oct 09 10:30:44 AM UTC 24 |
833738469 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.2021212424 |
|
|
Oct 09 10:30:28 AM UTC 24 |
Oct 09 10:30:49 AM UTC 24 |
16762401997 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.846344997 |
|
|
Oct 09 10:30:41 AM UTC 24 |
Oct 09 10:30:50 AM UTC 24 |
3107504250 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode.422840684 |
|
|
Oct 09 10:30:38 AM UTC 24 |
Oct 09 10:30:51 AM UTC 24 |
222315118 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_alert_test.1194480727 |
|
|
Oct 09 10:30:50 AM UTC 24 |
Oct 09 10:30:52 AM UTC 24 |
47899082 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_csb_read.2668964395 |
|
|
Oct 09 10:30:51 AM UTC 24 |
Oct 09 10:30:53 AM UTC 24 |
76268444 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.1889355917 |
|
|
Oct 09 10:30:53 AM UTC 24 |
Oct 09 10:30:55 AM UTC 24 |
25465463 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.2969866051 |
|
|
Oct 09 10:30:55 AM UTC 24 |
Oct 09 10:30:58 AM UTC 24 |
273832829 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_rw.3759730082 |
|
|
Oct 09 10:30:56 AM UTC 24 |
Oct 09 10:30:59 AM UTC 24 |
237808933 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.1025584639 |
|
|
Oct 09 10:29:57 AM UTC 24 |
Oct 09 10:30:59 AM UTC 24 |
2744624011 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_stress_all.262503672 |
|
|
Oct 09 10:28:50 AM UTC 24 |
Oct 09 10:30:59 AM UTC 24 |
9105891425 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.3471544681 |
|
|
Oct 09 10:30:58 AM UTC 24 |
Oct 09 10:31:04 AM UTC 24 |
166245619 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.2924606940 |
|
|
Oct 09 10:29:55 AM UTC 24 |
Oct 09 10:31:06 AM UTC 24 |
3349268862 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.2286212860 |
|
|
Oct 09 10:30:38 AM UTC 24 |
Oct 09 10:31:08 AM UTC 24 |
1894321887 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_intercept.2515237929 |
|
|
Oct 09 10:31:00 AM UTC 24 |
Oct 09 10:31:13 AM UTC 24 |
2233468488 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.1085660077 |
|
|
Oct 09 10:31:00 AM UTC 24 |
Oct 09 10:31:16 AM UTC 24 |
4375601168 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_upload.478594937 |
|
|
Oct 09 10:31:05 AM UTC 24 |
Oct 09 10:31:17 AM UTC 24 |
566423583 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.4000029357 |
|
|
Oct 09 10:31:17 AM UTC 24 |
Oct 09 10:31:30 AM UTC 24 |
3749203541 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_cfg_cmd.1507480636 |
|
|
Oct 09 10:31:07 AM UTC 24 |
Oct 09 10:31:31 AM UTC 24 |
5878888898 ps |
| T45 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.1179422269 |
|
|
Oct 09 10:28:00 AM UTC 24 |
Oct 09 10:31:34 AM UTC 24 |
22599146703 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.1520915213 |
|
|
Oct 09 10:31:33 AM UTC 24 |
Oct 09 10:31:35 AM UTC 24 |
23139223 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_alert_test.3038018585 |
|
|
Oct 09 10:31:36 AM UTC 24 |
Oct 09 10:31:38 AM UTC 24 |
51149778 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_csb_read.2280669732 |
|
|
Oct 09 10:31:39 AM UTC 24 |
Oct 09 10:31:41 AM UTC 24 |
71884586 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_tpm_all.1364411145 |
|
|
Oct 09 10:30:54 AM UTC 24 |
Oct 09 10:31:42 AM UTC 24 |
14215470807 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.3075612030 |
|
|
Oct 09 10:29:07 AM UTC 24 |
Oct 09 10:31:42 AM UTC 24 |
65980809295 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.3921119091 |
|
|
Oct 09 10:31:17 AM UTC 24 |
Oct 09 10:31:58 AM UTC 24 |
1567835605 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.2161434972 |
|
|
Oct 09 10:31:42 AM UTC 24 |
Oct 09 10:31:45 AM UTC 24 |
197871533 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_mailbox.2289460396 |
|
|
Oct 09 10:30:35 AM UTC 24 |
Oct 09 10:31:46 AM UTC 24 |
4673362571 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.3385042692 |
|
|
Oct 09 10:31:45 AM UTC 24 |
Oct 09 10:31:48 AM UTC 24 |
149002783 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode.138482970 |
|
|
Oct 09 10:31:09 AM UTC 24 |
Oct 09 10:31:50 AM UTC 24 |
2683719967 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_tpm_rw.1745320638 |
|
|
Oct 09 10:31:45 AM UTC 24 |
Oct 09 10:31:52 AM UTC 24 |
1289074129 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_mode_ignore_cmds.2748078543 |
|
|
Oct 09 10:28:43 AM UTC 24 |
Oct 09 10:31:54 AM UTC 24 |
72725743778 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.1709382926 |
|
|
Oct 09 10:30:16 AM UTC 24 |
Oct 09 10:32:02 AM UTC 24 |
12088226638 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_cfg_cmd.60404623 |
|
|
Oct 09 10:31:53 AM UTC 24 |
Oct 09 10:32:04 AM UTC 24 |
410910745 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.1648836338 |
|
|
Oct 09 10:31:14 AM UTC 24 |
Oct 09 10:32:05 AM UTC 24 |
3017101314 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.4190879232 |
|
|
Oct 09 10:30:22 AM UTC 24 |
Oct 09 10:32:06 AM UTC 24 |
7510251421 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.1079889898 |
|
|
Oct 09 10:31:49 AM UTC 24 |
Oct 09 10:32:06 AM UTC 24 |
4177588206 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_all.4027960024 |
|
|
Oct 09 10:30:41 AM UTC 24 |
Oct 09 10:32:07 AM UTC 24 |
9063557699 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_intercept.1768776266 |
|
|
Oct 09 10:31:51 AM UTC 24 |
Oct 09 10:32:08 AM UTC 24 |
2577802504 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_alert_test.3842567836 |
|
|
Oct 09 10:32:08 AM UTC 24 |
Oct 09 10:32:10 AM UTC 24 |
14850514 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_csb_read.1161559502 |
|
|
Oct 09 10:32:08 AM UTC 24 |
Oct 09 10:32:10 AM UTC 24 |
44768629 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_all.2764029443 |
|
|
Oct 09 10:29:55 AM UTC 24 |
Oct 09 10:32:11 AM UTC 24 |
8173809743 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.2146214399 |
|
|
Oct 09 10:32:11 AM UTC 24 |
Oct 09 10:32:13 AM UTC 24 |
76606112 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_mailbox.251980640 |
|
|
Oct 09 10:31:01 AM UTC 24 |
Oct 09 10:32:14 AM UTC 24 |
14953486432 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_rw.2075412631 |
|
|
Oct 09 10:32:11 AM UTC 24 |
Oct 09 10:32:16 AM UTC 24 |
127122137 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode.1383221038 |
|
|
Oct 09 10:31:55 AM UTC 24 |
Oct 09 10:32:17 AM UTC 24 |
2110448513 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.1158713221 |
|
|
Oct 09 10:31:46 AM UTC 24 |
Oct 09 10:32:17 AM UTC 24 |
8974454728 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.1355357270 |
|
|
Oct 09 10:29:11 AM UTC 24 |
Oct 09 10:32:18 AM UTC 24 |
31214060426 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_all.4155658890 |
|
|
Oct 09 10:30:18 AM UTC 24 |
Oct 09 10:32:19 AM UTC 24 |
22734441069 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.1829288684 |
|
|
Oct 09 10:31:59 AM UTC 24 |
Oct 09 10:32:20 AM UTC 24 |
2108204451 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_cfg_cmd.3609206421 |
|
|
Oct 09 10:32:18 AM UTC 24 |
Oct 09 10:32:22 AM UTC 24 |
55776748 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_intercept.3830570163 |
|
|
Oct 09 10:32:16 AM UTC 24 |
Oct 09 10:32:22 AM UTC 24 |
997857311 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_upload.4126640963 |
|
|
Oct 09 10:31:53 AM UTC 24 |
Oct 09 10:32:24 AM UTC 24 |
5228175679 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode.3704159724 |
|
|
Oct 09 10:32:19 AM UTC 24 |
Oct 09 10:32:24 AM UTC 24 |
101425633 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.2292776549 |
|
|
Oct 09 10:32:01 AM UTC 24 |
Oct 09 10:32:25 AM UTC 24 |
2112602611 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.1302921696 |
|
|
Oct 09 10:30:42 AM UTC 24 |
Oct 09 10:32:26 AM UTC 24 |
24096588606 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.94850594 |
|
|
Oct 09 10:32:12 AM UTC 24 |
Oct 09 10:32:26 AM UTC 24 |
1958624739 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_mailbox.824567382 |
|
|
Oct 09 10:31:53 AM UTC 24 |
Oct 09 10:32:26 AM UTC 24 |
3654250979 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_upload.3789222747 |
|
|
Oct 09 10:32:18 AM UTC 24 |
Oct 09 10:32:27 AM UTC 24 |
922353355 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_alert_test.4278798345 |
|
|
Oct 09 10:32:27 AM UTC 24 |
Oct 09 10:32:29 AM UTC 24 |
10757640 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_cfg_cmd.1003149679 |
|
|
Oct 09 10:33:29 AM UTC 24 |
Oct 09 10:33:37 AM UTC 24 |
219838308 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_csb_read.2045993917 |
|
|
Oct 09 10:32:27 AM UTC 24 |
Oct 09 10:32:29 AM UTC 24 |
52695061 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.271898332 |
|
|
Oct 09 10:32:21 AM UTC 24 |
Oct 09 10:32:29 AM UTC 24 |
688659952 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.3222985819 |
|
|
Oct 09 10:32:14 AM UTC 24 |
Oct 09 10:32:30 AM UTC 24 |
2749586459 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.2017155949 |
|
|
Oct 09 10:32:30 AM UTC 24 |
Oct 09 10:32:32 AM UTC 24 |
38292045 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_flash_and_tpm.2985731136 |
|
|
Oct 09 10:26:59 AM UTC 24 |
Oct 09 10:32:33 AM UTC 24 |
26533561513 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.2292343058 |
|
|
Oct 09 10:32:30 AM UTC 24 |
Oct 09 10:32:35 AM UTC 24 |
1547055449 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_rw.1069866571 |
|
|
Oct 09 10:32:30 AM UTC 24 |
Oct 09 10:32:37 AM UTC 24 |
526304059 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.1925030317 |
|
|
Oct 09 10:32:28 AM UTC 24 |
Oct 09 10:32:38 AM UTC 24 |
2587823842 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.891824463 |
|
|
Oct 09 10:32:02 AM UTC 24 |
Oct 09 10:32:38 AM UTC 24 |
3899828242 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_intercept.2802777748 |
|
|
Oct 09 10:32:31 AM UTC 24 |
Oct 09 10:32:39 AM UTC 24 |
160027169 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_tpm_all.247175129 |
|
|
Oct 09 10:32:28 AM UTC 24 |
Oct 09 10:32:41 AM UTC 24 |
449361457 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode.4204605449 |
|
|
Oct 09 10:32:38 AM UTC 24 |
Oct 09 10:32:42 AM UTC 24 |
38080844 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_upload.1401160099 |
|
|
Oct 09 10:32:35 AM UTC 24 |
Oct 09 10:32:44 AM UTC 24 |
4040502916 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.4277353205 |
|
|
Oct 09 10:32:10 AM UTC 24 |
Oct 09 10:32:45 AM UTC 24 |
6265720198 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_tpm_all.600540154 |
|
|
Oct 09 10:32:11 AM UTC 24 |
Oct 09 10:32:45 AM UTC 24 |
6524404715 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_cfg_cmd.2949281350 |
|
|
Oct 09 10:32:37 AM UTC 24 |
Oct 09 10:32:45 AM UTC 24 |
3527018824 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_alert_test.1927442254 |
|
|
Oct 09 10:32:45 AM UTC 24 |
Oct 09 10:32:47 AM UTC 24 |
35114673 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.978054780 |
|
|
Oct 09 10:32:45 AM UTC 24 |
Oct 09 10:32:48 AM UTC 24 |
282502365 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_csb_read.2129464373 |
|
|
Oct 09 10:32:47 AM UTC 24 |
Oct 09 10:32:49 AM UTC 24 |
54160342 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_mailbox.2706822979 |
|
|
Oct 09 10:32:17 AM UTC 24 |
Oct 09 10:32:50 AM UTC 24 |
4456957435 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_stress_all.2539086784 |
|
|
Oct 09 10:30:45 AM UTC 24 |
Oct 09 10:32:50 AM UTC 24 |
24426545149 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/7.spi_device_stress_all.989382741 |
|
|
Oct 09 10:27:01 AM UTC 24 |
Oct 09 10:32:51 AM UTC 24 |
37785389594 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.2268623946 |
|
|
Oct 09 10:32:49 AM UTC 24 |
Oct 09 10:32:51 AM UTC 24 |
109835743 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_mailbox.2367058530 |
|
|
Oct 09 10:32:33 AM UTC 24 |
Oct 09 10:32:52 AM UTC 24 |
1248882416 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_rw.2999888928 |
|
|
Oct 09 10:32:50 AM UTC 24 |
Oct 09 10:32:54 AM UTC 24 |
625409906 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.3340124815 |
|
|
Oct 09 10:32:39 AM UTC 24 |
Oct 09 10:32:57 AM UTC 24 |
1615835163 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.1195940024 |
|
|
Oct 09 10:32:47 AM UTC 24 |
Oct 09 10:32:58 AM UTC 24 |
1941550282 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.874939142 |
|
|
Oct 09 10:32:51 AM UTC 24 |
Oct 09 10:32:59 AM UTC 24 |
267943304 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.3926764500 |
|
|
Oct 09 10:29:28 AM UTC 24 |
Oct 09 10:33:00 AM UTC 24 |
33209769362 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_cfg_cmd.640964721 |
|
|
Oct 09 10:32:55 AM UTC 24 |
Oct 09 10:33:00 AM UTC 24 |
182477484 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode.806065958 |
|
|
Oct 09 10:32:58 AM UTC 24 |
Oct 09 10:33:05 AM UTC 24 |
247960694 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.166165911 |
|
|
Oct 09 10:32:51 AM UTC 24 |
Oct 09 10:33:05 AM UTC 24 |
19749057851 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.3713774316 |
|
|
Oct 09 10:33:00 AM UTC 24 |
Oct 09 10:33:13 AM UTC 24 |
1029476865 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_alert_test.650036056 |
|
|
Oct 09 10:33:14 AM UTC 24 |
Oct 09 10:33:17 AM UTC 24 |
11781809 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.2501335572 |
|
|
Oct 09 10:32:30 AM UTC 24 |
Oct 09 10:33:17 AM UTC 24 |
12861860132 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_intercept.3300106940 |
|
|
Oct 09 10:32:52 AM UTC 24 |
Oct 09 10:33:18 AM UTC 24 |
2190730243 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_tpm_all.3261676674 |
|
|
Oct 09 10:32:49 AM UTC 24 |
Oct 09 10:33:18 AM UTC 24 |
14624389957 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_csb_read.600211236 |
|
|
Oct 09 10:33:17 AM UTC 24 |
Oct 09 10:33:20 AM UTC 24 |
24190214 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.1258198516 |
|
|
Oct 09 10:33:19 AM UTC 24 |
Oct 09 10:33:22 AM UTC 24 |
92331998 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_rw.4276608978 |
|
|
Oct 09 10:33:21 AM UTC 24 |
Oct 09 10:33:23 AM UTC 24 |
41101433 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2839368979 |
|
|
Oct 09 10:33:18 AM UTC 24 |
Oct 09 10:33:25 AM UTC 24 |
1136502000 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.102181517 |
|
|
Oct 09 10:32:20 AM UTC 24 |
Oct 09 10:33:26 AM UTC 24 |
28902016150 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_mailbox.239776066 |
|
|
Oct 09 10:32:52 AM UTC 24 |
Oct 09 10:33:28 AM UTC 24 |
7516097394 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.875267940 |
|
|
Oct 09 10:33:23 AM UTC 24 |
Oct 09 10:33:29 AM UTC 24 |
1133840680 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_intercept.418504035 |
|
|
Oct 09 10:33:26 AM UTC 24 |
Oct 09 10:33:33 AM UTC 24 |
236061276 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.2257750706 |
|
|
Oct 09 10:33:24 AM UTC 24 |
Oct 09 10:33:36 AM UTC 24 |
2094766463 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_upload.2806653250 |
|
|
Oct 09 10:33:29 AM UTC 24 |
Oct 09 10:33:37 AM UTC 24 |
544436655 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.2405165546 |
|
|
Oct 09 10:32:25 AM UTC 24 |
Oct 09 10:33:40 AM UTC 24 |
37796911437 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_upload.2163603581 |
|
|
Oct 09 10:32:53 AM UTC 24 |
Oct 09 10:33:41 AM UTC 24 |
13170537273 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.4111675369 |
|
|
Oct 09 10:30:45 AM UTC 24 |
Oct 09 10:33:42 AM UTC 24 |
46678303453 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_mailbox.2546086996 |
|
|
Oct 09 10:33:27 AM UTC 24 |
Oct 09 10:33:42 AM UTC 24 |
1171265848 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_alert_test.2949095113 |
|
|
Oct 09 10:33:43 AM UTC 24 |
Oct 09 10:33:45 AM UTC 24 |
11030095 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_csb_read.3260514111 |
|
|
Oct 09 10:33:43 AM UTC 24 |
Oct 09 10:33:45 AM UTC 24 |
54356177 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.2600929871 |
|
|
Oct 09 10:33:38 AM UTC 24 |
Oct 09 10:33:48 AM UTC 24 |
2987069759 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode.3357247661 |
|
|
Oct 09 10:33:33 AM UTC 24 |
Oct 09 10:33:50 AM UTC 24 |
1719961168 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3429310996 |
|
|
Oct 09 10:33:49 AM UTC 24 |
Oct 09 10:33:52 AM UTC 24 |
257107744 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_rw.2111879675 |
|
|
Oct 09 10:33:52 AM UTC 24 |
Oct 09 10:33:54 AM UTC 24 |
54593512 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.4163109480 |
|
|
Oct 09 10:33:46 AM UTC 24 |
Oct 09 10:33:56 AM UTC 24 |
3101356924 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.2918567088 |
|
|
Oct 09 10:32:22 AM UTC 24 |
Oct 09 10:33:56 AM UTC 24 |
3230336427 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.4085223679 |
|
|
Oct 09 10:33:55 AM UTC 24 |
Oct 09 10:33:59 AM UTC 24 |
31196230 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_upload.2459958826 |
|
|
Oct 09 10:33:58 AM UTC 24 |
Oct 09 10:34:04 AM UTC 24 |
320121537 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_cfg_cmd.1285342986 |
|
|
Oct 09 10:34:00 AM UTC 24 |
Oct 09 10:34:04 AM UTC 24 |
271365894 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_tpm_all.2127828290 |
|
|
Oct 09 10:33:18 AM UTC 24 |
Oct 09 10:34:07 AM UTC 24 |
2305644575 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_intercept.2865797335 |
|
|
Oct 09 10:33:57 AM UTC 24 |
Oct 09 10:34:08 AM UTC 24 |
836165405 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_stress_all.4033548228 |
|
|
Oct 09 10:32:07 AM UTC 24 |
Oct 09 10:34:14 AM UTC 24 |
37574943987 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.1939674549 |
|
|
Oct 09 10:32:05 AM UTC 24 |
Oct 09 10:34:14 AM UTC 24 |
10721375557 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.722213818 |
|
|
Oct 09 10:34:07 AM UTC 24 |
Oct 09 10:34:16 AM UTC 24 |
1339513536 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_tpm_all.3458301991 |
|
|
Oct 09 10:33:46 AM UTC 24 |
Oct 09 10:34:18 AM UTC 24 |
11065793059 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_alert_test.1090082147 |
|
|
Oct 09 10:34:19 AM UTC 24 |
Oct 09 10:34:21 AM UTC 24 |
11345544 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2012801206 |
|
|
Oct 09 10:32:24 AM UTC 24 |
Oct 09 10:34:22 AM UTC 24 |
6484049050 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode.1397381546 |
|
|
Oct 09 10:34:05 AM UTC 24 |
Oct 09 10:34:24 AM UTC 24 |
3490946428 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_csb_read.2669214570 |
|
|
Oct 09 10:34:22 AM UTC 24 |
Oct 09 10:34:24 AM UTC 24 |
44776012 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.2026083468 |
|
|
Oct 09 10:33:53 AM UTC 24 |
Oct 09 10:34:25 AM UTC 24 |
3401788666 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.740467699 |
|
|
Oct 09 10:34:23 AM UTC 24 |
Oct 09 10:34:27 AM UTC 24 |
187187554 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.673060038 |
|
|
Oct 09 10:34:25 AM UTC 24 |
Oct 09 10:34:28 AM UTC 24 |
62166242 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_rw.583835256 |
|
|
Oct 09 10:34:25 AM UTC 24 |
Oct 09 10:34:29 AM UTC 24 |
108228728 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.1219497791 |
|
|
Oct 09 10:33:35 AM UTC 24 |
Oct 09 10:34:33 AM UTC 24 |
10543582455 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.139746930 |
|
|
Oct 09 10:34:29 AM UTC 24 |
Oct 09 10:34:36 AM UTC 24 |
880080356 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_mailbox.402460175 |
|
|
Oct 09 10:33:57 AM UTC 24 |
Oct 09 10:34:38 AM UTC 24 |
6474506806 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_intercept.1754267701 |
|
|
Oct 09 10:34:30 AM UTC 24 |
Oct 09 10:34:39 AM UTC 24 |
1521924800 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.1448126143 |
|
|
Oct 09 10:32:42 AM UTC 24 |
Oct 09 10:34:40 AM UTC 24 |
25804115740 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.3225687706 |
|
|
Oct 09 10:34:29 AM UTC 24 |
Oct 09 10:34:41 AM UTC 24 |
2345413947 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_upload.1218930855 |
|
|
Oct 09 10:34:37 AM UTC 24 |
Oct 09 10:34:42 AM UTC 24 |
495370709 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_mailbox.2703939513 |
|
|
Oct 09 10:34:35 AM UTC 24 |
Oct 09 10:34:44 AM UTC 24 |
1814469349 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_stress_all.4239014868 |
|
|
Oct 09 10:29:58 AM UTC 24 |
Oct 09 10:34:47 AM UTC 24 |
87918333468 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.3670878835 |
|
|
Oct 09 10:34:42 AM UTC 24 |
Oct 09 10:34:49 AM UTC 24 |
142801338 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.433370318 |
|
|
Oct 09 10:32:07 AM UTC 24 |
Oct 09 10:34:52 AM UTC 24 |
16373307272 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_alert_test.3936558380 |
|
|
Oct 09 10:34:50 AM UTC 24 |
Oct 09 10:34:52 AM UTC 24 |
57499137 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_csb_read.2466337189 |
|
|
Oct 09 10:34:53 AM UTC 24 |
Oct 09 10:34:55 AM UTC 24 |
15601417 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.3098861096 |
|
|
Oct 09 10:34:53 AM UTC 24 |
Oct 09 10:34:55 AM UTC 24 |
13242389 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.3376889516 |
|
|
Oct 09 10:33:01 AM UTC 24 |
Oct 09 10:34:55 AM UTC 24 |
27604392994 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_cfg_cmd.971221486 |
|
|
Oct 09 10:34:39 AM UTC 24 |
Oct 09 10:34:56 AM UTC 24 |
2893750728 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.4193474821 |
|
|
Oct 09 10:34:56 AM UTC 24 |
Oct 09 10:34:58 AM UTC 24 |
63095222 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_rw.3373032639 |
|
|
Oct 09 10:34:56 AM UTC 24 |
Oct 09 10:35:02 AM UTC 24 |
248752614 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.817576775 |
|
|
Oct 09 10:30:20 AM UTC 24 |
Oct 09 10:35:03 AM UTC 24 |
56119490107 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_tpm_all.1112675293 |
|
|
Oct 09 10:34:24 AM UTC 24 |
Oct 09 10:35:07 AM UTC 24 |
5605892353 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_intercept.4170223144 |
|
|
Oct 09 10:35:03 AM UTC 24 |
Oct 09 10:35:07 AM UTC 24 |
400591512 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.1490036946 |
|
|
Oct 09 10:34:59 AM UTC 24 |
Oct 09 10:35:11 AM UTC 24 |
319086684 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.3111270427 |
|
|
Oct 09 10:34:05 AM UTC 24 |
Oct 09 10:35:11 AM UTC 24 |
2541393421 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_cfg_cmd.1153978115 |
|
|
Oct 09 10:35:08 AM UTC 24 |
Oct 09 10:35:14 AM UTC 24 |
542911600 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1886136345 |
|
|
Oct 09 10:33:38 AM UTC 24 |
Oct 09 10:35:19 AM UTC 24 |
14096993426 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.2297224438 |
|
|
Oct 09 10:35:15 AM UTC 24 |
Oct 09 10:35:21 AM UTC 24 |
403518589 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_mailbox.3118659702 |
|
|
Oct 09 10:35:04 AM UTC 24 |
Oct 09 10:35:27 AM UTC 24 |
3931585905 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.149229567 |
|
|
Oct 09 10:35:12 AM UTC 24 |
Oct 09 10:35:30 AM UTC 24 |
3314792977 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode.3594582123 |
|
|
Oct 09 10:34:40 AM UTC 24 |
Oct 09 10:35:31 AM UTC 24 |
16149515664 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.1151796784 |
|
|
Oct 09 10:29:29 AM UTC 24 |
Oct 09 10:35:32 AM UTC 24 |
74737914199 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_alert_test.61299305 |
|
|
Oct 09 10:35:32 AM UTC 24 |
Oct 09 10:35:34 AM UTC 24 |
11995540 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_csb_read.462146789 |
|
|
Oct 09 10:35:34 AM UTC 24 |
Oct 09 10:35:36 AM UTC 24 |
12791234 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/3.spi_device_flash_and_tpm_min_idle.3128811913 |
|
|
Oct 09 10:24:40 AM UTC 24 |
Oct 09 10:35:36 AM UTC 24 |
177453517053 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_upload.2138456131 |
|
|
Oct 09 10:35:08 AM UTC 24 |
Oct 09 10:35:37 AM UTC 24 |
15254289902 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.3477863612 |
|
|
Oct 09 10:34:56 AM UTC 24 |
Oct 09 10:35:38 AM UTC 24 |
9653234108 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.164120347 |
|
|
Oct 09 10:35:37 AM UTC 24 |
Oct 09 10:35:39 AM UTC 24 |
15796980 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_rw.3420768846 |
|
|
Oct 09 10:35:38 AM UTC 24 |
Oct 09 10:35:40 AM UTC 24 |
122266107 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.2712517709 |
|
|
Oct 09 10:34:44 AM UTC 24 |
Oct 09 10:35:41 AM UTC 24 |
6397830047 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.3313330124 |
|
|
Oct 09 10:35:39 AM UTC 24 |
Oct 09 10:35:44 AM UTC 24 |
106655525 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.1254806547 |
|
|
Oct 09 10:35:35 AM UTC 24 |
Oct 09 10:35:45 AM UTC 24 |
3300020090 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_mailbox.210451335 |
|
|
Oct 09 10:35:41 AM UTC 24 |
Oct 09 10:35:46 AM UTC 24 |
54327613 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.2909195897 |
|
|
Oct 09 10:32:59 AM UTC 24 |
Oct 09 10:35:48 AM UTC 24 |
20547158917 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_intercept.3385133423 |
|
|
Oct 09 10:35:41 AM UTC 24 |
Oct 09 10:35:50 AM UTC 24 |
639967614 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_cfg_cmd.3835376066 |
|
|
Oct 09 10:35:47 AM UTC 24 |
Oct 09 10:35:51 AM UTC 24 |
76579901 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode.2050745270 |
|
|
Oct 09 10:35:47 AM UTC 24 |
Oct 09 10:35:56 AM UTC 24 |
492418437 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.2776878809 |
|
|
Oct 09 10:35:51 AM UTC 24 |
Oct 09 10:35:58 AM UTC 24 |
5154627552 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.3397557511 |
|
|
Oct 09 10:33:41 AM UTC 24 |
Oct 09 10:35:59 AM UTC 24 |
16874977372 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_upload.3439537310 |
|
|
Oct 09 10:35:45 AM UTC 24 |
Oct 09 10:36:02 AM UTC 24 |
11644232086 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode.147055868 |
|
|
Oct 09 10:35:12 AM UTC 24 |
Oct 09 10:36:04 AM UTC 24 |
3806157604 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_alert_test.1090337139 |
|
|
Oct 09 10:36:02 AM UTC 24 |
Oct 09 10:36:04 AM UTC 24 |
14885931 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_tpm_all.835226501 |
|
|
Oct 09 10:34:56 AM UTC 24 |
Oct 09 10:36:05 AM UTC 24 |
9773683885 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_csb_read.804064589 |
|
|
Oct 09 10:36:05 AM UTC 24 |
Oct 09 10:36:07 AM UTC 24 |
50822470 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.144621644 |
|
|
Oct 09 10:35:57 AM UTC 24 |
Oct 09 10:36:08 AM UTC 24 |
275913343 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_tpm_all.282534086 |
|
|
Oct 09 10:35:37 AM UTC 24 |
Oct 09 10:36:08 AM UTC 24 |
4818006408 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.3132236808 |
|
|
Oct 09 10:35:40 AM UTC 24 |
Oct 09 10:36:09 AM UTC 24 |
18315806750 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.1654216511 |
|
|
Oct 09 10:36:08 AM UTC 24 |
Oct 09 10:36:10 AM UTC 24 |
1178069512 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_all.1099217625 |
|
|
Oct 09 10:36:06 AM UTC 24 |
Oct 09 10:36:11 AM UTC 24 |
3460429503 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_rw.1329306821 |
|
|
Oct 09 10:36:09 AM UTC 24 |
Oct 09 10:36:12 AM UTC 24 |
44691598 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.3325063601 |
|
|
Oct 09 10:28:49 AM UTC 24 |
Oct 09 10:36:15 AM UTC 24 |
386964620118 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.304019092 |
|
|
Oct 09 10:36:06 AM UTC 24 |
Oct 09 10:36:17 AM UTC 24 |
2145028477 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.849625596 |
|
|
Oct 09 10:32:42 AM UTC 24 |
Oct 09 10:36:18 AM UTC 24 |
55845074962 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.521035161 |
|
|
Oct 09 10:36:09 AM UTC 24 |
Oct 09 10:36:18 AM UTC 24 |
796298131 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_mailbox.2703596883 |
|
|
Oct 09 10:36:11 AM UTC 24 |
Oct 09 10:36:18 AM UTC 24 |
3507817433 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_upload.876604901 |
|
|
Oct 09 10:36:13 AM UTC 24 |
Oct 09 10:36:19 AM UTC 24 |
446289009 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_cfg_cmd.2513761629 |
|
|
Oct 09 10:36:17 AM UTC 24 |
Oct 09 10:36:21 AM UTC 24 |
748372781 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.2520796383 |
|
|
Oct 09 10:32:40 AM UTC 24 |
Oct 09 10:36:22 AM UTC 24 |
107795208292 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_intercept.2651261190 |
|
|
Oct 09 10:36:11 AM UTC 24 |
Oct 09 10:36:22 AM UTC 24 |
17098342277 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_all.997761660 |
|
|
Oct 09 10:34:43 AM UTC 24 |
Oct 09 10:36:24 AM UTC 24 |
2880901639 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_alert_test.3195924619 |
|
|
Oct 09 10:36:23 AM UTC 24 |
Oct 09 10:36:25 AM UTC 24 |
25266832 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.1385768178 |
|
|
Oct 09 10:36:19 AM UTC 24 |
Oct 09 10:36:27 AM UTC 24 |
1951085861 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.173888002 |
|
|
Oct 09 10:31:31 AM UTC 24 |
Oct 09 10:36:27 AM UTC 24 |
38291896924 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.2347737002 |
|
|
Oct 09 10:34:15 AM UTC 24 |
Oct 09 10:36:27 AM UTC 24 |
18720902720 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_csb_read.2295610067 |
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|
Oct 09 10:36:25 AM UTC 24 |
Oct 09 10:36:28 AM UTC 24 |
84200466 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.2602022550 |
|
|
Oct 09 10:36:28 AM UTC 24 |
Oct 09 10:36:30 AM UTC 24 |
129676245 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.1740805955 |
|
|
Oct 09 10:35:22 AM UTC 24 |
Oct 09 10:36:30 AM UTC 24 |
3440086004 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode.247834037 |
|
|
Oct 09 10:36:18 AM UTC 24 |
Oct 09 10:36:31 AM UTC 24 |
734446939 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.1723661544 |
|
|
Oct 09 10:35:27 AM UTC 24 |
Oct 09 10:36:31 AM UTC 24 |
8243080370 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_rw.1232382354 |
|
|
Oct 09 10:36:28 AM UTC 24 |
Oct 09 10:36:32 AM UTC 24 |
125603595 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.4154143473 |
|
|
Oct 09 10:36:29 AM UTC 24 |
Oct 09 10:36:33 AM UTC 24 |
100794136 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.748731351 |
|
|
Oct 09 10:36:31 AM UTC 24 |
Oct 09 10:36:36 AM UTC 24 |
58561997 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.3352446742 |
|
|
Oct 09 10:36:10 AM UTC 24 |
Oct 09 10:36:37 AM UTC 24 |
3751563329 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.2540482083 |
|
|
Oct 09 10:36:32 AM UTC 24 |
Oct 09 10:36:37 AM UTC 24 |
57821854 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_stress_all.3536177603 |
|
|
Oct 09 10:29:33 AM UTC 24 |
Oct 09 10:36:38 AM UTC 24 |
294712472725 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.2398500884 |
|
|
Oct 09 10:36:31 AM UTC 24 |
Oct 09 10:36:42 AM UTC 24 |
1198477856 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_stress_all.932588735 |
|
|
Oct 09 10:34:17 AM UTC 24 |
Oct 09 10:36:45 AM UTC 24 |
21729873371 ps |