| T286 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_upload.2330889569 |
|
|
Oct 09 10:36:32 AM UTC 24 |
Oct 09 10:36:46 AM UTC 24 |
6179751901 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.980527861 |
|
|
Oct 09 10:36:31 AM UTC 24 |
Oct 09 10:36:47 AM UTC 24 |
1160984311 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_alert_test.2376993372 |
|
|
Oct 09 10:36:46 AM UTC 24 |
Oct 09 10:36:48 AM UTC 24 |
13356431 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.2239084539 |
|
|
Oct 09 10:36:37 AM UTC 24 |
Oct 09 10:36:49 AM UTC 24 |
2850812410 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_csb_read.3672136833 |
|
|
Oct 09 10:36:47 AM UTC 24 |
Oct 09 10:36:49 AM UTC 24 |
67743963 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.371080017 |
|
|
Oct 09 10:36:27 AM UTC 24 |
Oct 09 10:36:51 AM UTC 24 |
6137274477 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.2826724778 |
|
|
Oct 09 10:36:49 AM UTC 24 |
Oct 09 10:36:52 AM UTC 24 |
35659684 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.1718467447 |
|
|
Oct 09 10:36:51 AM UTC 24 |
Oct 09 10:36:53 AM UTC 24 |
211691841 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.1284684554 |
|
|
Oct 09 10:34:41 AM UTC 24 |
Oct 09 10:36:56 AM UTC 24 |
6411685402 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.1908476284 |
|
|
Oct 09 10:36:53 AM UTC 24 |
Oct 09 10:36:59 AM UTC 24 |
814584041 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.432525271 |
|
|
Oct 09 10:36:19 AM UTC 24 |
Oct 09 10:37:01 AM UTC 24 |
11702275112 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.2347364843 |
|
|
Oct 09 10:36:54 AM UTC 24 |
Oct 09 10:37:06 AM UTC 24 |
713481743 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.2755904392 |
|
|
Oct 09 10:36:57 AM UTC 24 |
Oct 09 10:37:06 AM UTC 24 |
523591627 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.3562871637 |
|
|
Oct 09 10:37:01 AM UTC 24 |
Oct 09 10:37:07 AM UTC 24 |
547716201 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.1686413714 |
|
|
Oct 09 10:36:28 AM UTC 24 |
Oct 09 10:37:09 AM UTC 24 |
1938672761 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.2907380589 |
|
|
Oct 09 10:36:21 AM UTC 24 |
Oct 09 10:37:12 AM UTC 24 |
7394842546 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.305382627 |
|
|
Oct 09 10:36:52 AM UTC 24 |
Oct 09 10:37:14 AM UTC 24 |
3753146708 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.1682905685 |
|
|
Oct 09 10:36:48 AM UTC 24 |
Oct 09 10:37:14 AM UTC 24 |
27080633976 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.1260619128 |
|
|
Oct 09 10:37:00 AM UTC 24 |
Oct 09 10:37:15 AM UTC 24 |
10020960106 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.4156544383 |
|
|
Oct 09 10:37:07 AM UTC 24 |
Oct 09 10:37:15 AM UTC 24 |
212952283 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.454301244 |
|
|
Oct 09 10:37:16 AM UTC 24 |
Oct 09 10:37:18 AM UTC 24 |
47924433 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.3690794017 |
|
|
Oct 09 10:37:16 AM UTC 24 |
Oct 09 10:37:18 AM UTC 24 |
14990581 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.1040894522 |
|
|
Oct 09 10:35:49 AM UTC 24 |
Oct 09 10:37:20 AM UTC 24 |
19956058167 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.3453728869 |
|
|
Oct 09 10:37:08 AM UTC 24 |
Oct 09 10:37:21 AM UTC 24 |
900606279 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.2196406432 |
|
|
Oct 09 10:37:21 AM UTC 24 |
Oct 09 10:37:24 AM UTC 24 |
166122136 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.1127834306 |
|
|
Oct 09 10:37:19 AM UTC 24 |
Oct 09 10:37:24 AM UTC 24 |
250355192 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.3256333814 |
|
|
Oct 09 10:37:22 AM UTC 24 |
Oct 09 10:37:25 AM UTC 24 |
14991687 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.1390237243 |
|
|
Oct 09 10:37:26 AM UTC 24 |
Oct 09 10:37:30 AM UTC 24 |
42062535 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.4286205284 |
|
|
Oct 09 10:37:24 AM UTC 24 |
Oct 09 10:37:33 AM UTC 24 |
889210751 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.384915622 |
|
|
Oct 09 10:37:26 AM UTC 24 |
Oct 09 10:37:35 AM UTC 24 |
1178353168 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.1348104393 |
|
|
Oct 09 10:37:19 AM UTC 24 |
Oct 09 10:37:35 AM UTC 24 |
1054712360 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.3045977280 |
|
|
Oct 09 10:32:39 AM UTC 24 |
Oct 09 10:37:36 AM UTC 24 |
55635041037 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.1438841264 |
|
|
Oct 09 10:37:13 AM UTC 24 |
Oct 09 10:37:37 AM UTC 24 |
643543112 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.3945923939 |
|
|
Oct 09 10:37:34 AM UTC 24 |
Oct 09 10:37:38 AM UTC 24 |
36834238 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.622923633 |
|
|
Oct 09 10:37:15 AM UTC 24 |
Oct 09 10:37:42 AM UTC 24 |
1700403879 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.766237714 |
|
|
Oct 09 10:37:36 AM UTC 24 |
Oct 09 10:37:43 AM UTC 24 |
227142606 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/5.spi_device_flash_and_tpm.2955036950 |
|
|
Oct 09 10:25:45 AM UTC 24 |
Oct 09 10:37:45 AM UTC 24 |
87873724758 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.450483515 |
|
|
Oct 09 10:37:36 AM UTC 24 |
Oct 09 10:37:46 AM UTC 24 |
1195677282 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.396284861 |
|
|
Oct 09 10:37:47 AM UTC 24 |
Oct 09 10:37:49 AM UTC 24 |
11985738 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.1229615211 |
|
|
Oct 09 10:37:50 AM UTC 24 |
Oct 09 10:37:52 AM UTC 24 |
50370602 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.2866999491 |
|
|
Oct 09 10:36:00 AM UTC 24 |
Oct 09 10:37:53 AM UTC 24 |
12690781014 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.289357096 |
|
|
Oct 09 10:34:48 AM UTC 24 |
Oct 09 10:37:53 AM UTC 24 |
18299593899 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.438130124 |
|
|
Oct 09 10:35:59 AM UTC 24 |
Oct 09 10:37:54 AM UTC 24 |
17247218190 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.2681155203 |
|
|
Oct 09 10:36:49 AM UTC 24 |
Oct 09 10:37:54 AM UTC 24 |
6917802753 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2679000386 |
|
|
Oct 09 10:37:38 AM UTC 24 |
Oct 09 10:37:55 AM UTC 24 |
5122611106 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.1275697402 |
|
|
Oct 09 10:37:54 AM UTC 24 |
Oct 09 10:37:56 AM UTC 24 |
10684311 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.323122201 |
|
|
Oct 09 10:37:53 AM UTC 24 |
Oct 09 10:37:57 AM UTC 24 |
397160175 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.2798928391 |
|
|
Oct 09 10:37:55 AM UTC 24 |
Oct 09 10:37:58 AM UTC 24 |
72837503 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.390542131 |
|
|
Oct 09 10:37:55 AM UTC 24 |
Oct 09 10:38:00 AM UTC 24 |
79099828 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.3734798484 |
|
|
Oct 09 10:34:49 AM UTC 24 |
Oct 09 10:38:01 AM UTC 24 |
110852044795 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.381027082 |
|
|
Oct 09 10:37:55 AM UTC 24 |
Oct 09 10:38:03 AM UTC 24 |
227495541 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.201890638 |
|
|
Oct 09 10:37:59 AM UTC 24 |
Oct 09 10:38:04 AM UTC 24 |
439113161 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.101836522 |
|
|
Oct 09 10:38:01 AM UTC 24 |
Oct 09 10:38:05 AM UTC 24 |
116602068 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.3981405454 |
|
|
Oct 09 10:37:57 AM UTC 24 |
Oct 09 10:38:08 AM UTC 24 |
537751962 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.2682448966 |
|
|
Oct 09 10:36:39 AM UTC 24 |
Oct 09 10:38:11 AM UTC 24 |
2664556988 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_stress_all.4196208349 |
|
|
Oct 09 10:31:35 AM UTC 24 |
Oct 09 10:38:15 AM UTC 24 |
118003925096 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.3696929033 |
|
|
Oct 09 10:38:02 AM UTC 24 |
Oct 09 10:38:16 AM UTC 24 |
318330544 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.875044758 |
|
|
Oct 09 10:37:54 AM UTC 24 |
Oct 09 10:38:16 AM UTC 24 |
21716760888 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.1599762830 |
|
|
Oct 09 10:37:58 AM UTC 24 |
Oct 09 10:38:18 AM UTC 24 |
2507736955 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_all.3161860065 |
|
|
Oct 09 10:34:09 AM UTC 24 |
Oct 09 10:38:18 AM UTC 24 |
26545019829 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.4009808321 |
|
|
Oct 09 10:38:16 AM UTC 24 |
Oct 09 10:38:19 AM UTC 24 |
88101312 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.1166485981 |
|
|
Oct 09 10:38:18 AM UTC 24 |
Oct 09 10:38:20 AM UTC 24 |
107793766 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode.25474244 |
|
|
Oct 09 10:36:32 AM UTC 24 |
Oct 09 10:38:21 AM UTC 24 |
6345614960 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.3378045617 |
|
|
Oct 09 10:38:05 AM UTC 24 |
Oct 09 10:38:22 AM UTC 24 |
3872659636 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.3982743818 |
|
|
Oct 09 10:38:20 AM UTC 24 |
Oct 09 10:38:22 AM UTC 24 |
37188938 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.3337277407 |
|
|
Oct 09 10:37:07 AM UTC 24 |
Oct 09 10:38:23 AM UTC 24 |
6842026383 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.4260667085 |
|
|
Oct 09 10:38:21 AM UTC 24 |
Oct 09 10:38:23 AM UTC 24 |
45061128 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.2714464215 |
|
|
Oct 09 10:38:22 AM UTC 24 |
Oct 09 10:38:26 AM UTC 24 |
31334409 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.2718001008 |
|
|
Oct 09 10:38:23 AM UTC 24 |
Oct 09 10:38:27 AM UTC 24 |
54093135 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_stress_all.1497184104 |
|
|
Oct 09 10:38:15 AM UTC 24 |
Oct 09 10:38:28 AM UTC 24 |
1479341323 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.3572335176 |
|
|
Oct 09 10:38:23 AM UTC 24 |
Oct 09 10:38:28 AM UTC 24 |
188667849 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.86057847 |
|
|
Oct 09 10:36:34 AM UTC 24 |
Oct 09 10:38:30 AM UTC 24 |
14038168501 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.2206189449 |
|
|
Oct 09 10:38:24 AM UTC 24 |
Oct 09 10:38:31 AM UTC 24 |
756980601 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.3962646759 |
|
|
Oct 09 10:38:24 AM UTC 24 |
Oct 09 10:38:32 AM UTC 24 |
1592694384 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.3645248964 |
|
|
Oct 09 10:37:10 AM UTC 24 |
Oct 09 10:38:33 AM UTC 24 |
7820744051 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.195387286 |
|
|
Oct 09 10:38:29 AM UTC 24 |
Oct 09 10:38:34 AM UTC 24 |
156378664 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.3948071667 |
|
|
Oct 09 10:38:28 AM UTC 24 |
Oct 09 10:38:36 AM UTC 24 |
995009350 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.3585605295 |
|
|
Oct 09 10:38:34 AM UTC 24 |
Oct 09 10:38:36 AM UTC 24 |
46434211 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.3392255059 |
|
|
Oct 09 10:38:29 AM UTC 24 |
Oct 09 10:38:38 AM UTC 24 |
236925456 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.3169905930 |
|
|
Oct 09 10:38:36 AM UTC 24 |
Oct 09 10:38:39 AM UTC 24 |
25749347 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.644921944 |
|
|
Oct 09 10:38:19 AM UTC 24 |
Oct 09 10:38:40 AM UTC 24 |
4121149447 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.2025848550 |
|
|
Oct 09 10:37:31 AM UTC 24 |
Oct 09 10:38:42 AM UTC 24 |
25359899199 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.4223138321 |
|
|
Oct 09 10:38:40 AM UTC 24 |
Oct 09 10:38:42 AM UTC 24 |
62531201 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.1977403542 |
|
|
Oct 09 10:38:41 AM UTC 24 |
Oct 09 10:38:44 AM UTC 24 |
57158067 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.1808027132 |
|
|
Oct 09 10:38:19 AM UTC 24 |
Oct 09 10:38:44 AM UTC 24 |
5620349375 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.3266782552 |
|
|
Oct 09 10:38:31 AM UTC 24 |
Oct 09 10:38:46 AM UTC 24 |
733282922 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.1165211983 |
|
|
Oct 09 10:37:43 AM UTC 24 |
Oct 09 10:38:48 AM UTC 24 |
2250965439 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.230702975 |
|
|
Oct 09 10:38:44 AM UTC 24 |
Oct 09 10:38:49 AM UTC 24 |
42483192 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.300084231 |
|
|
Oct 09 10:38:43 AM UTC 24 |
Oct 09 10:38:49 AM UTC 24 |
104103711 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.3873667607 |
|
|
Oct 09 10:38:38 AM UTC 24 |
Oct 09 10:38:50 AM UTC 24 |
2317707651 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.3759509762 |
|
|
Oct 09 10:38:39 AM UTC 24 |
Oct 09 10:38:51 AM UTC 24 |
9284803987 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.2102321081 |
|
|
Oct 09 10:38:04 AM UTC 24 |
Oct 09 10:38:52 AM UTC 24 |
1471613521 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.1318152459 |
|
|
Oct 09 10:38:46 AM UTC 24 |
Oct 09 10:38:54 AM UTC 24 |
3557427541 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.1421043368 |
|
|
Oct 09 10:36:20 AM UTC 24 |
Oct 09 10:38:55 AM UTC 24 |
17687543756 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.2900102225 |
|
|
Oct 09 10:38:43 AM UTC 24 |
Oct 09 10:38:55 AM UTC 24 |
2581529757 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.3477319995 |
|
|
Oct 09 10:38:49 AM UTC 24 |
Oct 09 10:38:58 AM UTC 24 |
502512243 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.2102328635 |
|
|
Oct 09 10:38:56 AM UTC 24 |
Oct 09 10:38:58 AM UTC 24 |
42520925 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.2600323881 |
|
|
Oct 09 10:38:56 AM UTC 24 |
Oct 09 10:38:59 AM UTC 24 |
349611956 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.3165404990 |
|
|
Oct 09 10:38:49 AM UTC 24 |
Oct 09 10:39:01 AM UTC 24 |
905608747 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.3757789084 |
|
|
Oct 09 10:38:59 AM UTC 24 |
Oct 09 10:39:02 AM UTC 24 |
19743638 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.2132690191 |
|
|
Oct 09 10:39:03 AM UTC 24 |
Oct 09 10:39:05 AM UTC 24 |
118334421 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.3194290380 |
|
|
Oct 09 10:38:06 AM UTC 24 |
Oct 09 10:39:08 AM UTC 24 |
15652450108 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.687142882 |
|
|
Oct 09 10:39:09 AM UTC 24 |
Oct 09 10:39:16 AM UTC 24 |
263285230 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.475017999 |
|
|
Oct 09 10:38:52 AM UTC 24 |
Oct 09 10:39:17 AM UTC 24 |
1163068073 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.414397511 |
|
|
Oct 09 10:39:06 AM UTC 24 |
Oct 09 10:39:17 AM UTC 24 |
941191975 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.3553785192 |
|
|
Oct 09 10:38:45 AM UTC 24 |
Oct 09 10:39:19 AM UTC 24 |
2450652426 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.3614110245 |
|
|
Oct 09 10:38:59 AM UTC 24 |
Oct 09 10:39:21 AM UTC 24 |
5416978119 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.834561673 |
|
|
Oct 09 10:38:59 AM UTC 24 |
Oct 09 10:39:25 AM UTC 24 |
14525607690 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.4159092801 |
|
|
Oct 09 10:39:18 AM UTC 24 |
Oct 09 10:39:26 AM UTC 24 |
1447345124 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.4041275909 |
|
|
Oct 09 10:37:37 AM UTC 24 |
Oct 09 10:39:27 AM UTC 24 |
23441720266 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.1294899233 |
|
|
Oct 09 10:39:18 AM UTC 24 |
Oct 09 10:39:28 AM UTC 24 |
1893431453 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.1789504511 |
|
|
Oct 09 10:39:26 AM UTC 24 |
Oct 09 10:39:33 AM UTC 24 |
209847800 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.1444768357 |
|
|
Oct 09 10:39:20 AM UTC 24 |
Oct 09 10:39:34 AM UTC 24 |
493001586 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.1176197293 |
|
|
Oct 09 10:35:52 AM UTC 24 |
Oct 09 10:39:36 AM UTC 24 |
26270269588 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.2672397547 |
|
|
Oct 09 10:39:17 AM UTC 24 |
Oct 09 10:39:37 AM UTC 24 |
9611364597 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.3982747445 |
|
|
Oct 09 10:39:35 AM UTC 24 |
Oct 09 10:39:37 AM UTC 24 |
17487653 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.449857882 |
|
|
Oct 09 10:39:37 AM UTC 24 |
Oct 09 10:39:39 AM UTC 24 |
24876821 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.584394148 |
|
|
Oct 09 10:39:40 AM UTC 24 |
Oct 09 10:39:43 AM UTC 24 |
39545552 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.2471480341 |
|
|
Oct 09 10:39:03 AM UTC 24 |
Oct 09 10:39:43 AM UTC 24 |
30353014591 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.2026135101 |
|
|
Oct 09 10:38:11 AM UTC 24 |
Oct 09 10:39:45 AM UTC 24 |
5357305464 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.2487837808 |
|
|
Oct 09 10:36:19 AM UTC 24 |
Oct 09 10:39:46 AM UTC 24 |
108857445964 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.4257672001 |
|
|
Oct 09 10:34:15 AM UTC 24 |
Oct 09 10:39:46 AM UTC 24 |
44334823987 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.48459660 |
|
|
Oct 09 10:39:43 AM UTC 24 |
Oct 09 10:39:47 AM UTC 24 |
54327523 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.2266201563 |
|
|
Oct 09 10:38:33 AM UTC 24 |
Oct 09 10:39:49 AM UTC 24 |
4875493577 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_stress_all.3882489412 |
|
|
Oct 09 10:35:32 AM UTC 24 |
Oct 09 10:39:49 AM UTC 24 |
139592818125 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.3934267566 |
|
|
Oct 09 10:39:45 AM UTC 24 |
Oct 09 10:39:52 AM UTC 24 |
265926918 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.3262605094 |
|
|
Oct 09 10:39:48 AM UTC 24 |
Oct 09 10:39:52 AM UTC 24 |
31279894 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.255331996 |
|
|
Oct 09 10:39:38 AM UTC 24 |
Oct 09 10:39:52 AM UTC 24 |
3366328021 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.972333163 |
|
|
Oct 09 10:39:50 AM UTC 24 |
Oct 09 10:39:52 AM UTC 24 |
59397406 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.3353549335 |
|
|
Oct 09 10:39:47 AM UTC 24 |
Oct 09 10:39:53 AM UTC 24 |
843124980 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.695549450 |
|
|
Oct 09 10:38:32 AM UTC 24 |
Oct 09 10:39:54 AM UTC 24 |
6061645035 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.146330238 |
|
|
Oct 09 10:39:50 AM UTC 24 |
Oct 09 10:39:57 AM UTC 24 |
840665786 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.2895198394 |
|
|
Oct 09 10:39:56 AM UTC 24 |
Oct 09 10:39:58 AM UTC 24 |
10994247 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.2699301114 |
|
|
Oct 09 10:39:52 AM UTC 24 |
Oct 09 10:39:59 AM UTC 24 |
276697387 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.3126044576 |
|
|
Oct 09 10:39:58 AM UTC 24 |
Oct 09 10:40:00 AM UTC 24 |
39309174 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.791338630 |
|
|
Oct 09 10:37:42 AM UTC 24 |
Oct 09 10:40:00 AM UTC 24 |
33089228519 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.1180917225 |
|
|
Oct 09 10:38:51 AM UTC 24 |
Oct 09 10:40:01 AM UTC 24 |
4464742497 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.1906030312 |
|
|
Oct 09 10:40:01 AM UTC 24 |
Oct 09 10:40:04 AM UTC 24 |
203682561 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.1558539031 |
|
|
Oct 09 10:40:01 AM UTC 24 |
Oct 09 10:40:04 AM UTC 24 |
44653481 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.2578535213 |
|
|
Oct 09 10:39:59 AM UTC 24 |
Oct 09 10:40:04 AM UTC 24 |
1544757856 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.2838072871 |
|
|
Oct 09 10:29:57 AM UTC 24 |
Oct 09 10:40:05 AM UTC 24 |
55626168989 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.606270229 |
|
|
Oct 09 10:39:47 AM UTC 24 |
Oct 09 10:40:05 AM UTC 24 |
2358254878 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.1080692707 |
|
|
Oct 09 10:40:00 AM UTC 24 |
Oct 09 10:40:09 AM UTC 24 |
1312334623 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.1569012432 |
|
|
Oct 09 10:40:05 AM UTC 24 |
Oct 09 10:40:09 AM UTC 24 |
33973789 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.2618431577 |
|
|
Oct 09 10:39:45 AM UTC 24 |
Oct 09 10:40:11 AM UTC 24 |
10938972423 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.3111157423 |
|
|
Oct 09 10:40:06 AM UTC 24 |
Oct 09 10:40:11 AM UTC 24 |
2658765535 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.3797596295 |
|
|
Oct 09 10:40:06 AM UTC 24 |
Oct 09 10:40:13 AM UTC 24 |
186476146 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.2459919124 |
|
|
Oct 09 10:40:05 AM UTC 24 |
Oct 09 10:40:15 AM UTC 24 |
635749581 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2552257538 |
|
|
Oct 09 10:40:04 AM UTC 24 |
Oct 09 10:40:15 AM UTC 24 |
1192073223 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/46.spi_device_csb_read.2991155052 |
|
|
Oct 09 10:44:20 AM UTC 24 |
Oct 09 10:44:22 AM UTC 24 |
14670096 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.4143790898 |
|
|
Oct 09 10:39:38 AM UTC 24 |
Oct 09 10:40:16 AM UTC 24 |
8216651947 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.3260592973 |
|
|
Oct 09 10:40:10 AM UTC 24 |
Oct 09 10:40:17 AM UTC 24 |
169876332 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.53143615 |
|
|
Oct 09 10:40:02 AM UTC 24 |
Oct 09 10:40:18 AM UTC 24 |
922974097 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.1248788877 |
|
|
Oct 09 10:39:47 AM UTC 24 |
Oct 09 10:40:19 AM UTC 24 |
10837038854 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.2987619023 |
|
|
Oct 09 10:40:18 AM UTC 24 |
Oct 09 10:40:20 AM UTC 24 |
43830352 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.705957517 |
|
|
Oct 09 10:40:12 AM UTC 24 |
Oct 09 10:40:21 AM UTC 24 |
408699249 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.4247481959 |
|
|
Oct 09 10:40:19 AM UTC 24 |
Oct 09 10:40:21 AM UTC 24 |
14827514 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.2713015803 |
|
|
Oct 09 10:40:21 AM UTC 24 |
Oct 09 10:40:23 AM UTC 24 |
23872244 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.2373454758 |
|
|
Oct 09 10:40:19 AM UTC 24 |
Oct 09 10:40:25 AM UTC 24 |
322369913 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.801125575 |
|
|
Oct 09 10:39:28 AM UTC 24 |
Oct 09 10:40:25 AM UTC 24 |
21972591539 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.1032017130 |
|
|
Oct 09 10:40:21 AM UTC 24 |
Oct 09 10:40:25 AM UTC 24 |
692183158 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_all.258889932 |
|
|
Oct 09 10:40:12 AM UTC 24 |
Oct 09 10:40:25 AM UTC 24 |
8837539637 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.354384096 |
|
|
Oct 09 10:39:53 AM UTC 24 |
Oct 09 10:40:29 AM UTC 24 |
3771471576 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.1576246010 |
|
|
Oct 09 10:33:42 AM UTC 24 |
Oct 09 10:40:31 AM UTC 24 |
39305545916 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.1309364119 |
|
|
Oct 09 10:40:25 AM UTC 24 |
Oct 09 10:40:32 AM UTC 24 |
1323026281 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.2111194482 |
|
|
Oct 09 10:40:24 AM UTC 24 |
Oct 09 10:40:33 AM UTC 24 |
1756197190 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.2829138042 |
|
|
Oct 09 10:40:22 AM UTC 24 |
Oct 09 10:40:34 AM UTC 24 |
4507023489 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.1759723930 |
|
|
Oct 09 10:40:27 AM UTC 24 |
Oct 09 10:40:36 AM UTC 24 |
637835720 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.400027332 |
|
|
Oct 09 10:33:06 AM UTC 24 |
Oct 09 10:40:37 AM UTC 24 |
163068066976 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.602271576 |
|
|
Oct 09 10:40:25 AM UTC 24 |
Oct 09 10:40:39 AM UTC 24 |
700993282 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.688324349 |
|
|
Oct 09 10:40:10 AM UTC 24 |
Oct 09 10:40:41 AM UTC 24 |
1294773411 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.972421409 |
|
|
Oct 09 10:40:40 AM UTC 24 |
Oct 09 10:40:43 AM UTC 24 |
18372251 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_stress_all.1004203791 |
|
|
Oct 09 10:37:46 AM UTC 24 |
Oct 09 10:40:44 AM UTC 24 |
43122174282 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.384877798 |
|
|
Oct 09 10:40:42 AM UTC 24 |
Oct 09 10:40:44 AM UTC 24 |
39076371 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_stress_all.2968032845 |
|
|
Oct 09 10:38:55 AM UTC 24 |
Oct 09 10:40:44 AM UTC 24 |
128706104027 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.741024705 |
|
|
Oct 09 10:37:39 AM UTC 24 |
Oct 09 10:40:44 AM UTC 24 |
21795625115 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.2763492053 |
|
|
Oct 09 10:40:33 AM UTC 24 |
Oct 09 10:40:46 AM UTC 24 |
986914368 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.766855384 |
|
|
Oct 09 10:40:27 AM UTC 24 |
Oct 09 10:40:47 AM UTC 24 |
2312595212 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.2796711694 |
|
|
Oct 09 10:40:45 AM UTC 24 |
Oct 09 10:40:47 AM UTC 24 |
34728908 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.2553838155 |
|
|
Oct 09 10:40:45 AM UTC 24 |
Oct 09 10:40:48 AM UTC 24 |
328882045 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3643555975 |
|
|
Oct 09 10:40:44 AM UTC 24 |
Oct 09 10:40:48 AM UTC 24 |
864165914 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_stress_all.1204885846 |
|
|
Oct 09 10:40:16 AM UTC 24 |
Oct 09 10:40:51 AM UTC 24 |
5481652426 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_stress_all.2805629717 |
|
|
Oct 09 10:36:22 AM UTC 24 |
Oct 09 10:40:53 AM UTC 24 |
28896059093 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.727993408 |
|
|
Oct 09 10:40:32 AM UTC 24 |
Oct 09 10:40:54 AM UTC 24 |
6848062475 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_all.2124631957 |
|
|
Oct 09 10:40:34 AM UTC 24 |
Oct 09 10:40:55 AM UTC 24 |
1448993328 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.3836231621 |
|
|
Oct 09 10:40:49 AM UTC 24 |
Oct 09 10:40:55 AM UTC 24 |
416770072 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.689704548 |
|
|
Oct 09 10:36:38 AM UTC 24 |
Oct 09 10:40:55 AM UTC 24 |
24739941987 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.1313251586 |
|
|
Oct 09 10:40:45 AM UTC 24 |
Oct 09 10:40:56 AM UTC 24 |
3810088232 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.2657844592 |
|
|
Oct 09 10:40:20 AM UTC 24 |
Oct 09 10:40:57 AM UTC 24 |
22915531116 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.2950106730 |
|
|
Oct 09 10:39:54 AM UTC 24 |
Oct 09 10:40:58 AM UTC 24 |
83604513188 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.1929542760 |
|
|
Oct 09 10:40:58 AM UTC 24 |
Oct 09 10:41:00 AM UTC 24 |
68194197 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.1799405368 |
|
|
Oct 09 10:40:58 AM UTC 24 |
Oct 09 10:41:00 AM UTC 24 |
22390457 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.2717382671 |
|
|
Oct 09 10:40:48 AM UTC 24 |
Oct 09 10:41:01 AM UTC 24 |
2918400413 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.2655286792 |
|
|
Oct 09 10:41:02 AM UTC 24 |
Oct 09 10:41:05 AM UTC 24 |
434774105 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.519657889 |
|
|
Oct 09 10:40:55 AM UTC 24 |
Oct 09 10:41:06 AM UTC 24 |
3468532384 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.2658518855 |
|
|
Oct 09 10:40:52 AM UTC 24 |
Oct 09 10:41:09 AM UTC 24 |
3403859273 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.2862551188 |
|
|
Oct 09 10:40:47 AM UTC 24 |
Oct 09 10:41:10 AM UTC 24 |
29807899060 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.614229842 |
|
|
Oct 09 10:41:07 AM UTC 24 |
Oct 09 10:41:11 AM UTC 24 |
242629575 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2117537343 |
|
|
Oct 09 10:41:07 AM UTC 24 |
Oct 09 10:41:11 AM UTC 24 |
66313446 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.3604886194 |
|
|
Oct 09 10:40:48 AM UTC 24 |
Oct 09 10:41:11 AM UTC 24 |
5590556618 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.3994444569 |
|
|
Oct 09 10:38:29 AM UTC 24 |
Oct 09 10:41:12 AM UTC 24 |
13814676357 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.3163121713 |
|
|
Oct 09 10:40:45 AM UTC 24 |
Oct 09 10:41:13 AM UTC 24 |
4790886339 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_all.3079433084 |
|
|
Oct 09 10:33:38 AM UTC 24 |
Oct 09 10:41:14 AM UTC 24 |
126977213512 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.206140855 |
|
|
Oct 09 10:40:30 AM UTC 24 |
Oct 09 10:41:14 AM UTC 24 |
3940740259 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.914628644 |
|
|
Oct 09 10:41:12 AM UTC 24 |
Oct 09 10:41:16 AM UTC 24 |
116105583 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.258823820 |
|
|
Oct 09 10:41:12 AM UTC 24 |
Oct 09 10:41:16 AM UTC 24 |
521233311 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.2766793170 |
|
|
Oct 09 10:41:12 AM UTC 24 |
Oct 09 10:41:17 AM UTC 24 |
101632123 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_flash_all.1508724805 |
|
|
Oct 09 10:32:22 AM UTC 24 |
Oct 09 10:41:20 AM UTC 24 |
376560700570 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.2315708562 |
|
|
Oct 09 10:41:01 AM UTC 24 |
Oct 09 10:41:21 AM UTC 24 |
1329772172 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.3222599909 |
|
|
Oct 09 10:41:13 AM UTC 24 |
Oct 09 10:41:22 AM UTC 24 |
807301886 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.3073553077 |
|
|
Oct 09 10:41:21 AM UTC 24 |
Oct 09 10:41:23 AM UTC 24 |
11514597 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.3150881204 |
|
|
Oct 09 10:41:10 AM UTC 24 |
Oct 09 10:41:23 AM UTC 24 |
325464530 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.1370555463 |
|
|
Oct 09 10:41:11 AM UTC 24 |
Oct 09 10:41:24 AM UTC 24 |
547053089 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.3143553889 |
|
|
Oct 09 10:41:22 AM UTC 24 |
Oct 09 10:41:24 AM UTC 24 |
112786964 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.2160856225 |
|
|
Oct 09 10:41:15 AM UTC 24 |
Oct 09 10:41:25 AM UTC 24 |
3492075403 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3797559447 |
|
|
Oct 09 10:41:24 AM UTC 24 |
Oct 09 10:41:26 AM UTC 24 |
48411617 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.317021981 |
|
|
Oct 09 10:41:24 AM UTC 24 |
Oct 09 10:41:27 AM UTC 24 |
66369726 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.178801794 |
|
|
Oct 09 10:41:24 AM UTC 24 |
Oct 09 10:41:28 AM UTC 24 |
63415939 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.1962348576 |
|
|
Oct 09 10:41:01 AM UTC 24 |
Oct 09 10:41:28 AM UTC 24 |
4991524779 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.4008786058 |
|
|
Oct 09 10:41:24 AM UTC 24 |
Oct 09 10:41:29 AM UTC 24 |
829084729 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_and_tpm_min_idle.3383362668 |
|
|
Oct 09 10:40:56 AM UTC 24 |
Oct 09 10:41:29 AM UTC 24 |
2839138296 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.3458731099 |
|
|
Oct 09 10:41:27 AM UTC 24 |
Oct 09 10:41:31 AM UTC 24 |
105931696 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.2582386093 |
|
|
Oct 09 10:38:09 AM UTC 24 |
Oct 09 10:41:34 AM UTC 24 |
90395957943 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_stress_all.3284128136 |
|
|
Oct 09 10:41:18 AM UTC 24 |
Oct 09 10:41:35 AM UTC 24 |
1496352562 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.1903824292 |
|
|
Oct 09 10:41:29 AM UTC 24 |
Oct 09 10:41:35 AM UTC 24 |
248720345 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.11427874 |
|
|
Oct 09 10:37:15 AM UTC 24 |
Oct 09 10:41:35 AM UTC 24 |
19330579557 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.1619411087 |
|
|
Oct 09 10:41:23 AM UTC 24 |
Oct 09 10:41:37 AM UTC 24 |
22375549409 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.3172548087 |
|
|
Oct 09 10:41:25 AM UTC 24 |
Oct 09 10:41:38 AM UTC 24 |
4173704086 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.3297485986 |
|
|
Oct 09 10:41:37 AM UTC 24 |
Oct 09 10:41:39 AM UTC 24 |
13616393 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.745677939 |
|
|
Oct 09 10:41:30 AM UTC 24 |
Oct 09 10:41:40 AM UTC 24 |
1383331837 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.3540027324 |
|
|
Oct 09 10:41:38 AM UTC 24 |
Oct 09 10:41:40 AM UTC 24 |
39523040 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.2299144459 |
|
|
Oct 09 10:39:28 AM UTC 24 |
Oct 09 10:41:41 AM UTC 24 |
84742967700 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.3941987061 |
|
|
Oct 09 10:41:25 AM UTC 24 |
Oct 09 10:41:42 AM UTC 24 |
1228902034 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_and_tpm_min_idle.2453946889 |
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Oct 09 10:40:37 AM UTC 24 |
Oct 09 10:41:42 AM UTC 24 |
9947219280 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.1947115723 |
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Oct 09 10:41:41 AM UTC 24 |
Oct 09 10:41:43 AM UTC 24 |
414514024 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.1459404038 |
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Oct 09 10:41:41 AM UTC 24 |
Oct 09 10:41:44 AM UTC 24 |
113671853 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.2383231826 |
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Oct 09 10:41:29 AM UTC 24 |
Oct 09 10:41:46 AM UTC 24 |
1100955123 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_mailbox.3703585439 |
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Oct 09 10:41:44 AM UTC 24 |
Oct 09 10:41:49 AM UTC 24 |
795853037 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.916965529 |
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Oct 09 10:41:30 AM UTC 24 |
Oct 09 10:41:50 AM UTC 24 |
3954290553 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.4175150613 |
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Oct 09 10:41:43 AM UTC 24 |
Oct 09 10:41:57 AM UTC 24 |
1238791081 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.1246045788 |
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Oct 09 10:41:47 AM UTC 24 |
Oct 09 10:41:57 AM UTC 24 |
3106647184 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.2012357940 |
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Oct 09 10:41:42 AM UTC 24 |
Oct 09 10:41:58 AM UTC 24 |
5614212625 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_mode.3351146052 |
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Oct 09 10:41:50 AM UTC 24 |
Oct 09 10:41:58 AM UTC 24 |
726181345 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_all.383630922 |
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Oct 09 10:41:40 AM UTC 24 |
Oct 09 10:41:58 AM UTC 24 |
4815851576 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_all.2041160268 |
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Oct 09 10:39:53 AM UTC 24 |
Oct 09 10:42:05 AM UTC 24 |
68045996374 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.693230111 |
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Oct 09 10:41:44 AM UTC 24 |
Oct 09 10:42:08 AM UTC 24 |
7045740605 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.3273261354 |
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Oct 09 10:42:06 AM UTC 24 |
Oct 09 10:42:08 AM UTC 24 |
13948525 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.53421194 |
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Oct 09 10:41:39 AM UTC 24 |
Oct 09 10:42:09 AM UTC 24 |
5986672284 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.2955098046 |
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Oct 09 10:41:29 AM UTC 24 |
Oct 09 10:42:10 AM UTC 24 |
2207923232 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.2381071289 |
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Oct 09 10:40:48 AM UTC 24 |
Oct 09 10:42:10 AM UTC 24 |
28017018168 ps |