| T609 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.2597221668 |
|
|
Oct 12 08:54:12 AM UTC 24 |
Oct 12 08:54:14 AM UTC 24 |
18284965 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.2422951712 |
|
|
Oct 12 08:54:14 AM UTC 24 |
Oct 12 08:54:17 AM UTC 24 |
252409730 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.4095649420 |
|
|
Oct 12 08:54:14 AM UTC 24 |
Oct 12 08:54:18 AM UTC 24 |
282655580 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.1639122908 |
|
|
Oct 12 08:53:54 AM UTC 24 |
Oct 12 08:54:19 AM UTC 24 |
18665321892 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_intercept.2165944996 |
|
|
Oct 12 08:53:54 AM UTC 24 |
Oct 12 08:54:19 AM UTC 24 |
10114840473 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_all.3129822105 |
|
|
Oct 12 08:53:42 AM UTC 24 |
Oct 12 08:54:19 AM UTC 24 |
1094748216 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_cfg_cmd.861789743 |
|
|
Oct 12 08:53:57 AM UTC 24 |
Oct 12 08:54:21 AM UTC 24 |
8006617265 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_all.1904614254 |
|
|
Oct 12 08:53:49 AM UTC 24 |
Oct 12 08:54:24 AM UTC 24 |
6928819853 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.2266186023 |
|
|
Oct 12 08:54:20 AM UTC 24 |
Oct 12 08:54:25 AM UTC 24 |
496457682 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.1141522650 |
|
|
Oct 12 08:54:15 AM UTC 24 |
Oct 12 08:54:27 AM UTC 24 |
710739565 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.3493818545 |
|
|
Oct 12 08:54:17 AM UTC 24 |
Oct 12 08:54:27 AM UTC 24 |
446167067 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_stress_all.782791771 |
|
|
Oct 12 08:52:03 AM UTC 24 |
Oct 12 08:54:29 AM UTC 24 |
54689055215 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_stress_all.2186506944 |
|
|
Oct 12 08:53:46 AM UTC 24 |
Oct 12 08:54:29 AM UTC 24 |
1944425285 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.685008343 |
|
|
Oct 12 08:54:30 AM UTC 24 |
Oct 12 08:54:33 AM UTC 24 |
14696085 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.2443637543 |
|
|
Oct 12 08:52:21 AM UTC 24 |
Oct 12 08:54:33 AM UTC 24 |
18060209481 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.3245272720 |
|
|
Oct 12 08:54:11 AM UTC 24 |
Oct 12 08:54:33 AM UTC 24 |
3936859471 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.4153927290 |
|
|
Oct 12 08:54:25 AM UTC 24 |
Oct 12 08:54:34 AM UTC 24 |
251721519 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.2367035199 |
|
|
Oct 12 08:54:20 AM UTC 24 |
Oct 12 08:54:34 AM UTC 24 |
733374221 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.353850982 |
|
|
Oct 12 08:54:34 AM UTC 24 |
Oct 12 08:54:36 AM UTC 24 |
14538501 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.2646875381 |
|
|
Oct 12 08:49:00 AM UTC 24 |
Oct 12 08:54:36 AM UTC 24 |
67887049348 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.2880917991 |
|
|
Oct 12 08:54:35 AM UTC 24 |
Oct 12 08:54:37 AM UTC 24 |
71285356 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.1728262555 |
|
|
Oct 12 08:53:55 AM UTC 24 |
Oct 12 08:54:38 AM UTC 24 |
75886045828 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.666890156 |
|
|
Oct 12 08:54:35 AM UTC 24 |
Oct 12 08:54:38 AM UTC 24 |
52695873 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.2167471560 |
|
|
Oct 12 08:54:35 AM UTC 24 |
Oct 12 08:54:38 AM UTC 24 |
325505418 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.3059269801 |
|
|
Oct 12 08:54:20 AM UTC 24 |
Oct 12 08:54:42 AM UTC 24 |
812933165 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.497351727 |
|
|
Oct 12 08:53:44 AM UTC 24 |
Oct 12 08:54:43 AM UTC 24 |
2372138701 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.107394866 |
|
|
Oct 12 08:52:57 AM UTC 24 |
Oct 12 08:54:43 AM UTC 24 |
16408644263 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_stress_all.1285630125 |
|
|
Oct 12 08:48:32 AM UTC 24 |
Oct 12 08:54:46 AM UTC 24 |
245564027950 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.1113101044 |
|
|
Oct 12 08:54:37 AM UTC 24 |
Oct 12 08:54:46 AM UTC 24 |
880755998 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.160675785 |
|
|
Oct 12 08:54:43 AM UTC 24 |
Oct 12 08:54:50 AM UTC 24 |
547012815 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_all.3315437238 |
|
|
Oct 12 08:50:51 AM UTC 24 |
Oct 12 08:54:51 AM UTC 24 |
100825092957 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.391809510 |
|
|
Oct 12 08:54:20 AM UTC 24 |
Oct 12 08:54:51 AM UTC 24 |
11568995159 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.276014292 |
|
|
Oct 12 08:54:38 AM UTC 24 |
Oct 12 08:54:52 AM UTC 24 |
10103884906 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.3761730987 |
|
|
Oct 12 08:54:52 AM UTC 24 |
Oct 12 08:54:55 AM UTC 24 |
20163976 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.906275138 |
|
|
Oct 12 08:54:35 AM UTC 24 |
Oct 12 08:54:55 AM UTC 24 |
3477604180 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_stress_all.3186141948 |
|
|
Oct 12 08:54:52 AM UTC 24 |
Oct 12 08:54:55 AM UTC 24 |
297896166 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.2562277315 |
|
|
Oct 12 08:54:53 AM UTC 24 |
Oct 12 08:54:56 AM UTC 24 |
23861051 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.886288193 |
|
|
Oct 12 08:48:29 AM UTC 24 |
Oct 12 08:54:56 AM UTC 24 |
35980623311 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.4083732402 |
|
|
Oct 12 08:54:30 AM UTC 24 |
Oct 12 08:54:57 AM UTC 24 |
15012656651 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/46.spi_device_tpm_rw.3634913089 |
|
|
Oct 12 09:00:07 AM UTC 24 |
Oct 12 09:00:14 AM UTC 24 |
248642701 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2410004437 |
|
|
Oct 12 08:54:44 AM UTC 24 |
Oct 12 08:54:57 AM UTC 24 |
3439285606 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/16.spi_device_flash_all.1581956568 |
|
|
Oct 12 08:48:58 AM UTC 24 |
Oct 12 08:54:58 AM UTC 24 |
621752328406 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.2340130571 |
|
|
Oct 12 08:54:39 AM UTC 24 |
Oct 12 08:54:59 AM UTC 24 |
3738960862 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.1897382681 |
|
|
Oct 12 08:54:57 AM UTC 24 |
Oct 12 08:54:59 AM UTC 24 |
31709226 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.1397125972 |
|
|
Oct 12 08:54:57 AM UTC 24 |
Oct 12 08:54:59 AM UTC 24 |
24623768 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3186540875 |
|
|
Oct 12 08:54:37 AM UTC 24 |
Oct 12 08:55:01 AM UTC 24 |
5321909913 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_all.3280889315 |
|
|
Oct 12 08:51:14 AM UTC 24 |
Oct 12 08:55:01 AM UTC 24 |
357984229124 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.3071077654 |
|
|
Oct 12 08:54:38 AM UTC 24 |
Oct 12 08:55:02 AM UTC 24 |
5618802936 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.1031275311 |
|
|
Oct 12 08:54:58 AM UTC 24 |
Oct 12 08:55:03 AM UTC 24 |
203303525 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.2896057791 |
|
|
Oct 12 08:54:59 AM UTC 24 |
Oct 12 08:55:03 AM UTC 24 |
335841503 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.3637081874 |
|
|
Oct 12 08:54:59 AM UTC 24 |
Oct 12 08:55:04 AM UTC 24 |
152350198 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.3687904138 |
|
|
Oct 12 08:54:57 AM UTC 24 |
Oct 12 08:55:05 AM UTC 24 |
441732887 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.161729610 |
|
|
Oct 12 08:54:11 AM UTC 24 |
Oct 12 08:55:05 AM UTC 24 |
10512869693 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.1544808547 |
|
|
Oct 12 08:55:00 AM UTC 24 |
Oct 12 08:55:05 AM UTC 24 |
77805265 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.3738798057 |
|
|
Oct 12 08:54:58 AM UTC 24 |
Oct 12 08:55:06 AM UTC 24 |
813025765 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.804441966 |
|
|
Oct 12 08:55:02 AM UTC 24 |
Oct 12 08:55:08 AM UTC 24 |
140438384 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.1489564815 |
|
|
Oct 12 08:55:06 AM UTC 24 |
Oct 12 08:55:09 AM UTC 24 |
12918124 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.4230146457 |
|
|
Oct 12 08:55:06 AM UTC 24 |
Oct 12 08:55:09 AM UTC 24 |
29765677 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.3968609833 |
|
|
Oct 12 08:54:05 AM UTC 24 |
Oct 12 08:55:09 AM UTC 24 |
10957807552 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.358358598 |
|
|
Oct 12 08:55:06 AM UTC 24 |
Oct 12 08:55:10 AM UTC 24 |
218233901 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.3161526553 |
|
|
Oct 12 08:55:08 AM UTC 24 |
Oct 12 08:55:11 AM UTC 24 |
21350764 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.1622296393 |
|
|
Oct 12 08:52:00 AM UTC 24 |
Oct 12 08:55:13 AM UTC 24 |
16071008067 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.4019033213 |
|
|
Oct 12 08:55:10 AM UTC 24 |
Oct 12 08:55:13 AM UTC 24 |
487246774 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.1648465672 |
|
|
Oct 12 08:54:56 AM UTC 24 |
Oct 12 08:55:14 AM UTC 24 |
2629336936 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.3264175626 |
|
|
Oct 12 08:54:38 AM UTC 24 |
Oct 12 08:55:16 AM UTC 24 |
9713348062 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.611859597 |
|
|
Oct 12 08:55:11 AM UTC 24 |
Oct 12 08:55:17 AM UTC 24 |
799898484 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.1899308275 |
|
|
Oct 12 08:55:14 AM UTC 24 |
Oct 12 08:55:18 AM UTC 24 |
38004564 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.3955014107 |
|
|
Oct 12 08:55:10 AM UTC 24 |
Oct 12 08:55:19 AM UTC 24 |
291441237 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.1317480856 |
|
|
Oct 12 08:55:11 AM UTC 24 |
Oct 12 08:55:19 AM UTC 24 |
3449010459 ps |
| T37 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.4156979555 |
|
|
Oct 12 08:54:07 AM UTC 24 |
Oct 12 08:55:19 AM UTC 24 |
8928535357 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_all.1625954035 |
|
|
Oct 12 08:55:19 AM UTC 24 |
Oct 12 08:55:21 AM UTC 24 |
59681991 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.332388979 |
|
|
Oct 12 08:51:57 AM UTC 24 |
Oct 12 08:55:22 AM UTC 24 |
179576749454 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.1612101791 |
|
|
Oct 12 08:55:22 AM UTC 24 |
Oct 12 08:55:24 AM UTC 24 |
29528731 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.3094012300 |
|
|
Oct 12 08:54:57 AM UTC 24 |
Oct 12 08:55:25 AM UTC 24 |
6854432059 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.2988896228 |
|
|
Oct 12 08:55:17 AM UTC 24 |
Oct 12 08:55:25 AM UTC 24 |
363418785 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.2769429117 |
|
|
Oct 12 08:55:23 AM UTC 24 |
Oct 12 08:55:25 AM UTC 24 |
14316814 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.1109048180 |
|
|
Oct 12 08:55:25 AM UTC 24 |
Oct 12 08:55:28 AM UTC 24 |
70151523 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.2049242668 |
|
|
Oct 12 08:55:12 AM UTC 24 |
Oct 12 08:55:28 AM UTC 24 |
1016648586 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.2392337043 |
|
|
Oct 12 08:55:15 AM UTC 24 |
Oct 12 08:55:28 AM UTC 24 |
1747912629 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.2679350959 |
|
|
Oct 12 08:55:26 AM UTC 24 |
Oct 12 08:55:29 AM UTC 24 |
45543340 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.670589925 |
|
|
Oct 12 08:55:00 AM UTC 24 |
Oct 12 08:55:31 AM UTC 24 |
3810796175 ps |
| T38 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.3605183613 |
|
|
Oct 12 08:53:02 AM UTC 24 |
Oct 12 08:55:33 AM UTC 24 |
16495938413 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.1386621741 |
|
|
Oct 12 08:55:29 AM UTC 24 |
Oct 12 08:55:35 AM UTC 24 |
516969879 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.21508102 |
|
|
Oct 12 08:55:14 AM UTC 24 |
Oct 12 08:55:35 AM UTC 24 |
2966820660 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.4258498512 |
|
|
Oct 12 08:55:29 AM UTC 24 |
Oct 12 08:55:36 AM UTC 24 |
2170012142 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.9444770 |
|
|
Oct 12 08:55:25 AM UTC 24 |
Oct 12 08:55:36 AM UTC 24 |
1755995906 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.3500731568 |
|
|
Oct 12 08:55:03 AM UTC 24 |
Oct 12 08:55:38 AM UTC 24 |
3993492492 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.626020632 |
|
|
Oct 12 08:55:06 AM UTC 24 |
Oct 12 08:55:39 AM UTC 24 |
22292840490 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.394613116 |
|
|
Oct 12 08:55:30 AM UTC 24 |
Oct 12 08:55:40 AM UTC 24 |
531369275 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.3736767469 |
|
|
Oct 12 08:55:25 AM UTC 24 |
Oct 12 08:55:40 AM UTC 24 |
2595268156 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.1297551144 |
|
|
Oct 12 08:55:30 AM UTC 24 |
Oct 12 08:55:41 AM UTC 24 |
1574531298 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.2270664470 |
|
|
Oct 12 08:55:41 AM UTC 24 |
Oct 12 08:55:43 AM UTC 24 |
14216442 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.3440674449 |
|
|
Oct 12 08:55:26 AM UTC 24 |
Oct 12 08:55:44 AM UTC 24 |
1307338780 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.1374800890 |
|
|
Oct 12 08:55:42 AM UTC 24 |
Oct 12 08:55:44 AM UTC 24 |
48929056 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.4193287346 |
|
|
Oct 12 08:55:34 AM UTC 24 |
Oct 12 08:55:45 AM UTC 24 |
188703099 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.3614755825 |
|
|
Oct 12 08:55:32 AM UTC 24 |
Oct 12 08:55:45 AM UTC 24 |
3482870652 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.3415248306 |
|
|
Oct 12 08:55:45 AM UTC 24 |
Oct 12 08:55:47 AM UTC 24 |
67959708 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.52266090 |
|
|
Oct 12 08:55:45 AM UTC 24 |
Oct 12 08:55:48 AM UTC 24 |
28947222 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.1082395682 |
|
|
Oct 12 08:55:36 AM UTC 24 |
Oct 12 08:55:50 AM UTC 24 |
2072814598 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.248186354 |
|
|
Oct 12 08:55:46 AM UTC 24 |
Oct 12 08:55:51 AM UTC 24 |
296787365 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.2078989170 |
|
|
Oct 12 08:55:46 AM UTC 24 |
Oct 12 08:55:52 AM UTC 24 |
1108292243 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.1110173230 |
|
|
Oct 12 08:54:51 AM UTC 24 |
Oct 12 08:55:52 AM UTC 24 |
4651134934 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.2263934257 |
|
|
Oct 12 08:55:48 AM UTC 24 |
Oct 12 08:55:53 AM UTC 24 |
400951015 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.3089088758 |
|
|
Oct 12 08:55:49 AM UTC 24 |
Oct 12 08:55:53 AM UTC 24 |
514415785 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_stress_all.754175009 |
|
|
Oct 12 08:50:35 AM UTC 24 |
Oct 12 08:55:54 AM UTC 24 |
39377144676 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.3801596972 |
|
|
Oct 12 08:49:35 AM UTC 24 |
Oct 12 08:55:59 AM UTC 24 |
94350441617 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.1148683312 |
|
|
Oct 12 08:55:42 AM UTC 24 |
Oct 12 08:56:05 AM UTC 24 |
15787210912 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_all.3445495192 |
|
|
Oct 12 08:55:36 AM UTC 24 |
Oct 12 08:56:05 AM UTC 24 |
2548988280 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.581876323 |
|
|
Oct 12 08:56:06 AM UTC 24 |
Oct 12 08:56:08 AM UTC 24 |
13125746 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.403474643 |
|
|
Oct 12 08:55:52 AM UTC 24 |
Oct 12 08:56:09 AM UTC 24 |
4002997356 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.25121905 |
|
|
Oct 12 08:55:54 AM UTC 24 |
Oct 12 08:56:10 AM UTC 24 |
1826690068 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.1586511097 |
|
|
Oct 12 08:54:47 AM UTC 24 |
Oct 12 08:56:11 AM UTC 24 |
5780812451 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.3158426230 |
|
|
Oct 12 08:56:09 AM UTC 24 |
Oct 12 08:56:12 AM UTC 24 |
20042508 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.1819051146 |
|
|
Oct 12 08:56:11 AM UTC 24 |
Oct 12 08:56:13 AM UTC 24 |
33658994 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm_min_idle.670601249 |
|
|
Oct 12 08:55:04 AM UTC 24 |
Oct 12 08:56:13 AM UTC 24 |
7471367272 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.2959318025 |
|
|
Oct 12 08:56:12 AM UTC 24 |
Oct 12 08:56:14 AM UTC 24 |
16706089 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/45.spi_device_upload.3570583994 |
|
|
Oct 12 08:59:49 AM UTC 24 |
Oct 12 09:00:11 AM UTC 24 |
2488463183 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.3679700112 |
|
|
Oct 12 08:56:11 AM UTC 24 |
Oct 12 08:56:15 AM UTC 24 |
296259608 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.1309787142 |
|
|
Oct 12 08:56:13 AM UTC 24 |
Oct 12 08:56:15 AM UTC 24 |
55661150 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.4020234598 |
|
|
Oct 12 08:49:40 AM UTC 24 |
Oct 12 08:56:21 AM UTC 24 |
216819308562 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.4065588656 |
|
|
Oct 12 08:56:14 AM UTC 24 |
Oct 12 08:56:22 AM UTC 24 |
600229044 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.3722396159 |
|
|
Oct 12 08:56:15 AM UTC 24 |
Oct 12 08:56:22 AM UTC 24 |
147010202 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.1400926168 |
|
|
Oct 12 08:55:44 AM UTC 24 |
Oct 12 08:56:23 AM UTC 24 |
1878814422 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.110596341 |
|
|
Oct 12 08:55:35 AM UTC 24 |
Oct 12 08:56:25 AM UTC 24 |
41093121183 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.840432758 |
|
|
Oct 12 08:56:16 AM UTC 24 |
Oct 12 08:56:26 AM UTC 24 |
370814553 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.1972273984 |
|
|
Oct 12 08:56:14 AM UTC 24 |
Oct 12 08:56:27 AM UTC 24 |
14159932701 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.338781197 |
|
|
Oct 12 08:56:24 AM UTC 24 |
Oct 12 08:56:30 AM UTC 24 |
272018246 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.4115186079 |
|
|
Oct 12 08:56:22 AM UTC 24 |
Oct 12 08:56:30 AM UTC 24 |
774202298 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_stress_all.4207214492 |
|
|
Oct 12 08:55:05 AM UTC 24 |
Oct 12 08:56:31 AM UTC 24 |
6803377255 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.4252127813 |
|
|
Oct 12 08:56:31 AM UTC 24 |
Oct 12 08:56:33 AM UTC 24 |
47398922 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.484153245 |
|
|
Oct 12 08:55:52 AM UTC 24 |
Oct 12 08:56:33 AM UTC 24 |
25269500687 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.4036902493 |
|
|
Oct 12 08:56:32 AM UTC 24 |
Oct 12 08:56:35 AM UTC 24 |
107686908 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3520306146 |
|
|
Oct 12 08:56:35 AM UTC 24 |
Oct 12 08:56:37 AM UTC 24 |
35691839 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.3145940736 |
|
|
Oct 12 08:56:22 AM UTC 24 |
Oct 12 08:56:40 AM UTC 24 |
1585796690 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.3229014475 |
|
|
Oct 12 08:55:53 AM UTC 24 |
Oct 12 08:56:41 AM UTC 24 |
15586946489 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.836364557 |
|
|
Oct 12 08:56:38 AM UTC 24 |
Oct 12 08:56:41 AM UTC 24 |
136733772 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.3816776762 |
|
|
Oct 12 08:56:34 AM UTC 24 |
Oct 12 08:56:41 AM UTC 24 |
1789311513 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.2036085045 |
|
|
Oct 12 08:54:27 AM UTC 24 |
Oct 12 08:56:42 AM UTC 24 |
26849526807 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.1412304555 |
|
|
Oct 12 08:56:41 AM UTC 24 |
Oct 12 08:56:44 AM UTC 24 |
148687368 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2345357721 |
|
|
Oct 12 08:56:42 AM UTC 24 |
Oct 12 08:56:45 AM UTC 24 |
76964347 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.2812532665 |
|
|
Oct 12 08:56:43 AM UTC 24 |
Oct 12 08:56:47 AM UTC 24 |
100531024 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.1870378129 |
|
|
Oct 12 08:55:04 AM UTC 24 |
Oct 12 08:56:49 AM UTC 24 |
158023500045 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.3433319067 |
|
|
Oct 12 08:56:42 AM UTC 24 |
Oct 12 08:56:49 AM UTC 24 |
388708786 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.2770564793 |
|
|
Oct 12 08:52:00 AM UTC 24 |
Oct 12 08:56:50 AM UTC 24 |
321221827652 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.1968941017 |
|
|
Oct 12 08:56:45 AM UTC 24 |
Oct 12 08:56:51 AM UTC 24 |
94857595 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3243394300 |
|
|
Oct 12 08:54:28 AM UTC 24 |
Oct 12 08:56:51 AM UTC 24 |
70505163024 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.484923177 |
|
|
Oct 12 08:54:22 AM UTC 24 |
Oct 12 08:56:54 AM UTC 24 |
9280312732 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.2588128603 |
|
|
Oct 12 08:56:52 AM UTC 24 |
Oct 12 08:56:54 AM UTC 24 |
39090543 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.3794632787 |
|
|
Oct 12 08:56:49 AM UTC 24 |
Oct 12 08:56:55 AM UTC 24 |
78376346 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.2056629045 |
|
|
Oct 12 08:52:17 AM UTC 24 |
Oct 12 08:56:55 AM UTC 24 |
29048000525 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.3018496500 |
|
|
Oct 12 08:54:47 AM UTC 24 |
Oct 12 08:56:56 AM UTC 24 |
27946542677 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.2119575698 |
|
|
Oct 12 08:56:55 AM UTC 24 |
Oct 12 08:56:57 AM UTC 24 |
30553215 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.238541572 |
|
|
Oct 12 08:55:16 AM UTC 24 |
Oct 12 08:56:57 AM UTC 24 |
13657846692 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.3433081241 |
|
|
Oct 12 08:56:56 AM UTC 24 |
Oct 12 08:56:59 AM UTC 24 |
135050993 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.4196151357 |
|
|
Oct 12 08:56:56 AM UTC 24 |
Oct 12 08:57:02 AM UTC 24 |
1639137059 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.1153451646 |
|
|
Oct 12 08:56:16 AM UTC 24 |
Oct 12 08:57:02 AM UTC 24 |
8133506223 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.2985333434 |
|
|
Oct 12 08:56:59 AM UTC 24 |
Oct 12 08:57:05 AM UTC 24 |
396065432 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.1496729402 |
|
|
Oct 12 08:54:04 AM UTC 24 |
Oct 12 08:57:05 AM UTC 24 |
118062315641 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.1293786740 |
|
|
Oct 12 08:56:55 AM UTC 24 |
Oct 12 08:57:07 AM UTC 24 |
2139177121 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_all.2228119826 |
|
|
Oct 12 08:56:51 AM UTC 24 |
Oct 12 08:57:08 AM UTC 24 |
4605751296 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.2636266871 |
|
|
Oct 12 08:57:03 AM UTC 24 |
Oct 12 08:57:13 AM UTC 24 |
1144143783 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.2172126709 |
|
|
Oct 12 08:57:06 AM UTC 24 |
Oct 12 08:57:13 AM UTC 24 |
191993139 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.1460043519 |
|
|
Oct 12 08:57:03 AM UTC 24 |
Oct 12 08:57:14 AM UTC 24 |
1851372203 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.2447163250 |
|
|
Oct 12 08:51:14 AM UTC 24 |
Oct 12 08:57:14 AM UTC 24 |
57704151909 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.3897750311 |
|
|
Oct 12 08:56:59 AM UTC 24 |
Oct 12 08:57:17 AM UTC 24 |
1092199596 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.2119568371 |
|
|
Oct 12 08:57:08 AM UTC 24 |
Oct 12 08:57:17 AM UTC 24 |
4473091073 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_stress_all.3165596970 |
|
|
Oct 12 08:57:15 AM UTC 24 |
Oct 12 08:57:17 AM UTC 24 |
57453337 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.3976432521 |
|
|
Oct 12 08:57:16 AM UTC 24 |
Oct 12 08:57:18 AM UTC 24 |
11798969 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_stress_all.1039155406 |
|
|
Oct 12 08:51:17 AM UTC 24 |
Oct 12 08:57:19 AM UTC 24 |
65267612021 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.2565760829 |
|
|
Oct 12 08:56:58 AM UTC 24 |
Oct 12 08:57:20 AM UTC 24 |
25319856735 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.2726530893 |
|
|
Oct 12 08:57:18 AM UTC 24 |
Oct 12 08:57:20 AM UTC 24 |
53608141 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.993849582 |
|
|
Oct 12 08:53:05 AM UTC 24 |
Oct 12 08:57:20 AM UTC 24 |
56158796759 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.3381553495 |
|
|
Oct 12 08:57:19 AM UTC 24 |
Oct 12 08:57:22 AM UTC 24 |
171236207 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.933968834 |
|
|
Oct 12 08:57:19 AM UTC 24 |
Oct 12 08:57:24 AM UTC 24 |
268825693 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.2503071374 |
|
|
Oct 12 08:57:06 AM UTC 24 |
Oct 12 08:57:25 AM UTC 24 |
2183258789 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.2040464715 |
|
|
Oct 12 08:54:25 AM UTC 24 |
Oct 12 08:57:26 AM UTC 24 |
16103580557 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.1573882601 |
|
|
Oct 12 08:57:20 AM UTC 24 |
Oct 12 08:57:26 AM UTC 24 |
177515156 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.2128221390 |
|
|
Oct 12 08:56:51 AM UTC 24 |
Oct 12 08:57:29 AM UTC 24 |
2391340551 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.1581598987 |
|
|
Oct 12 08:55:55 AM UTC 24 |
Oct 12 08:57:29 AM UTC 24 |
9233452105 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.2677097680 |
|
|
Oct 12 08:57:25 AM UTC 24 |
Oct 12 08:57:29 AM UTC 24 |
48656301 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.2943956131 |
|
|
Oct 12 08:57:21 AM UTC 24 |
Oct 12 08:57:30 AM UTC 24 |
5098816903 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.836368310 |
|
|
Oct 12 08:57:26 AM UTC 24 |
Oct 12 08:57:30 AM UTC 24 |
51816989 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_all.105712299 |
|
|
Oct 12 08:57:09 AM UTC 24 |
Oct 12 08:57:32 AM UTC 24 |
4333689223 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.818880942 |
|
|
Oct 12 08:56:56 AM UTC 24 |
Oct 12 08:57:34 AM UTC 24 |
6063832559 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.2653397532 |
|
|
Oct 12 08:57:33 AM UTC 24 |
Oct 12 08:57:35 AM UTC 24 |
53469747 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.600251988 |
|
|
Oct 12 08:56:34 AM UTC 24 |
Oct 12 08:57:36 AM UTC 24 |
29226711807 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/19.spi_device_flash_all.3780684542 |
|
|
Oct 12 08:50:29 AM UTC 24 |
Oct 12 08:57:37 AM UTC 24 |
63249174393 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.2815461124 |
|
|
Oct 12 08:57:35 AM UTC 24 |
Oct 12 08:57:37 AM UTC 24 |
34036561 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.1114569314 |
|
|
Oct 12 08:57:30 AM UTC 24 |
Oct 12 08:57:37 AM UTC 24 |
315655729 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.1244589209 |
|
|
Oct 12 08:57:18 AM UTC 24 |
Oct 12 08:57:39 AM UTC 24 |
5430447042 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.2290740417 |
|
|
Oct 12 08:55:38 AM UTC 24 |
Oct 12 08:57:39 AM UTC 24 |
4286248421 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.459408109 |
|
|
Oct 12 08:56:46 AM UTC 24 |
Oct 12 08:57:40 AM UTC 24 |
8198149488 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.2443082926 |
|
|
Oct 12 08:57:38 AM UTC 24 |
Oct 12 08:57:40 AM UTC 24 |
24729199 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.3760019686 |
|
|
Oct 12 08:57:36 AM UTC 24 |
Oct 12 08:57:41 AM UTC 24 |
643036869 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.1191698863 |
|
|
Oct 12 08:57:38 AM UTC 24 |
Oct 12 08:57:43 AM UTC 24 |
167361335 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.470319973 |
|
|
Oct 12 08:57:21 AM UTC 24 |
Oct 12 08:57:44 AM UTC 24 |
10742280087 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.1021823894 |
|
|
Oct 12 08:55:37 AM UTC 24 |
Oct 12 08:57:45 AM UTC 24 |
13141191013 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.3257575299 |
|
|
Oct 12 08:57:40 AM UTC 24 |
Oct 12 08:57:45 AM UTC 24 |
72474100 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.3901478666 |
|
|
Oct 12 08:57:41 AM UTC 24 |
Oct 12 08:57:46 AM UTC 24 |
596780078 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.803848478 |
|
|
Oct 12 08:57:40 AM UTC 24 |
Oct 12 08:57:46 AM UTC 24 |
2059244935 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.2660555394 |
|
|
Oct 12 08:57:42 AM UTC 24 |
Oct 12 08:57:49 AM UTC 24 |
120791957 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.2545751471 |
|
|
Oct 12 08:57:44 AM UTC 24 |
Oct 12 08:57:51 AM UTC 24 |
278817704 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.833628456 |
|
|
Oct 12 08:57:18 AM UTC 24 |
Oct 12 08:57:51 AM UTC 24 |
6055639132 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.2067033842 |
|
|
Oct 12 08:57:51 AM UTC 24 |
Oct 12 08:57:53 AM UTC 24 |
12567920 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.2112694707 |
|
|
Oct 12 08:57:46 AM UTC 24 |
Oct 12 08:57:54 AM UTC 24 |
289666926 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.3154467412 |
|
|
Oct 12 08:57:52 AM UTC 24 |
Oct 12 08:57:54 AM UTC 24 |
181048430 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.934956270 |
|
|
Oct 12 08:57:41 AM UTC 24 |
Oct 12 08:57:56 AM UTC 24 |
595852269 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_all.3935259792 |
|
|
Oct 12 08:58:22 AM UTC 24 |
Oct 12 08:58:44 AM UTC 24 |
4554735211 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.614495213 |
|
|
Oct 12 08:53:58 AM UTC 24 |
Oct 12 08:57:57 AM UTC 24 |
37051392545 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3660838217 |
|
|
Oct 12 08:57:56 AM UTC 24 |
Oct 12 08:57:58 AM UTC 24 |
12937846 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.3860513562 |
|
|
Oct 12 08:56:00 AM UTC 24 |
Oct 12 08:57:58 AM UTC 24 |
7371687982 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.2158471818 |
|
|
Oct 12 08:56:43 AM UTC 24 |
Oct 12 08:57:58 AM UTC 24 |
5024301997 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.492927027 |
|
|
Oct 12 08:57:57 AM UTC 24 |
Oct 12 08:58:00 AM UTC 24 |
63617943 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_all.3494120921 |
|
|
Oct 12 08:56:26 AM UTC 24 |
Oct 12 08:58:00 AM UTC 24 |
9622073578 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.1634708209 |
|
|
Oct 12 08:57:37 AM UTC 24 |
Oct 12 08:58:00 AM UTC 24 |
3546701247 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2659028069 |
|
|
Oct 12 08:57:38 AM UTC 24 |
Oct 12 08:58:01 AM UTC 24 |
26071138101 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.80225063 |
|
|
Oct 12 08:57:23 AM UTC 24 |
Oct 12 08:58:01 AM UTC 24 |
4165959145 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.3286747068 |
|
|
Oct 12 08:57:59 AM UTC 24 |
Oct 12 08:58:03 AM UTC 24 |
32062671 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.806359007 |
|
|
Oct 12 08:57:59 AM UTC 24 |
Oct 12 08:58:04 AM UTC 24 |
220559461 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.3452848743 |
|
|
Oct 12 08:57:54 AM UTC 24 |
Oct 12 08:58:05 AM UTC 24 |
2061177543 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.3167648690 |
|
|
Oct 12 08:57:59 AM UTC 24 |
Oct 12 08:58:05 AM UTC 24 |
676149700 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.668539451 |
|
|
Oct 12 08:56:28 AM UTC 24 |
Oct 12 08:58:05 AM UTC 24 |
18246447011 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.3316641239 |
|
|
Oct 12 08:58:01 AM UTC 24 |
Oct 12 08:58:06 AM UTC 24 |
60077622 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.535038443 |
|
|
Oct 12 08:58:01 AM UTC 24 |
Oct 12 08:58:06 AM UTC 24 |
41686712 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_stress_all.1265477544 |
|
|
Oct 12 08:56:31 AM UTC 24 |
Oct 12 08:58:06 AM UTC 24 |
11938146844 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.2453285719 |
|
|
Oct 12 08:58:00 AM UTC 24 |
Oct 12 08:58:07 AM UTC 24 |
4865636861 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_all.4279062261 |
|
|
Oct 12 08:55:54 AM UTC 24 |
Oct 12 08:58:07 AM UTC 24 |
13188550014 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.1184224257 |
|
|
Oct 12 08:58:02 AM UTC 24 |
Oct 12 08:58:08 AM UTC 24 |
175288046 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.569337994 |
|
|
Oct 12 08:57:54 AM UTC 24 |
Oct 12 08:58:08 AM UTC 24 |
4918885017 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_stress_all.3309264488 |
|
|
Oct 12 08:58:06 AM UTC 24 |
Oct 12 08:58:08 AM UTC 24 |
54902162 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/42.spi_device_tpm_all.1310350205 |
|
|
Oct 12 08:58:40 AM UTC 24 |
Oct 12 08:58:48 AM UTC 24 |
3706536347 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.3369652177 |
|
|
Oct 12 08:58:07 AM UTC 24 |
Oct 12 08:58:09 AM UTC 24 |
64292149 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.2188613194 |
|
|
Oct 12 08:58:07 AM UTC 24 |
Oct 12 08:58:09 AM UTC 24 |
19149644 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.18728720 |
|
|
Oct 12 08:58:08 AM UTC 24 |
Oct 12 08:58:11 AM UTC 24 |
278518468 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.3156659129 |
|
|
Oct 12 08:57:27 AM UTC 24 |
Oct 12 08:58:11 AM UTC 24 |
2478634125 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.876914655 |
|
|
Oct 12 08:57:00 AM UTC 24 |
Oct 12 08:58:13 AM UTC 24 |
6322563917 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.558071624 |
|
|
Oct 12 08:58:10 AM UTC 24 |
Oct 12 08:58:16 AM UTC 24 |
727674201 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.1369095211 |
|
|
Oct 12 08:58:07 AM UTC 24 |
Oct 12 08:58:16 AM UTC 24 |
3737997966 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.1460729875 |
|
|
Oct 12 08:56:48 AM UTC 24 |
Oct 12 08:58:16 AM UTC 24 |
10205313876 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.3782509720 |
|
|
Oct 12 08:58:08 AM UTC 24 |
Oct 12 08:58:16 AM UTC 24 |
377750013 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.2241678805 |
|
|
Oct 12 08:58:08 AM UTC 24 |
Oct 12 08:58:17 AM UTC 24 |
796469494 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.2788534828 |
|
|
Oct 12 08:57:59 AM UTC 24 |
Oct 12 08:58:18 AM UTC 24 |
2451909731 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.2467674877 |
|
|
Oct 12 08:58:13 AM UTC 24 |
Oct 12 08:58:19 AM UTC 24 |
153719331 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.527703353 |
|
|
Oct 12 08:58:18 AM UTC 24 |
Oct 12 08:58:21 AM UTC 24 |
12461217 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/13.spi_device_stress_all.21573028 |
|
|
Oct 12 08:47:15 AM UTC 24 |
Oct 12 08:58:21 AM UTC 24 |
214850940524 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.1481652338 |
|
|
Oct 12 08:58:20 AM UTC 24 |
Oct 12 08:58:22 AM UTC 24 |
17411037 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.3746534137 |
|
|
Oct 12 08:58:22 AM UTC 24 |
Oct 12 08:58:24 AM UTC 24 |
54814738 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.2812313378 |
|
|
Oct 12 08:58:23 AM UTC 24 |
Oct 12 08:58:26 AM UTC 24 |
224019322 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.1571743420 |
|
|
Oct 12 08:58:10 AM UTC 24 |
Oct 12 08:58:26 AM UTC 24 |
19527521666 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_11/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_all.266552405 |
|
|
Oct 12 08:58:17 AM UTC 24 |
Oct 12 08:58:27 AM UTC 24 |
7558306560 ps |