T285 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_pass_cmd_filtering.2285044591 |
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Aug 23 10:27:11 PM UTC 24 |
Aug 23 10:27:14 PM UTC 24 |
118359941 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_intercept.2535711940 |
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|
Aug 23 10:27:12 PM UTC 24 |
Aug 23 10:27:16 PM UTC 24 |
796798357 ps |
T284 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_upload.1995908585 |
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Aug 23 10:27:12 PM UTC 24 |
Aug 23 10:27:16 PM UTC 24 |
791559434 ps |
T319 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_pass_addr_payload_swap.1565614670 |
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Aug 23 10:27:11 PM UTC 24 |
Aug 23 10:27:16 PM UTC 24 |
237625651 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.1538331918 |
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Aug 23 10:27:17 PM UTC 24 |
Aug 23 10:27:19 PM UTC 24 |
11172360 ps |
T282 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_mailbox.3979099133 |
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Aug 23 10:27:12 PM UTC 24 |
Aug 23 10:27:20 PM UTC 24 |
1075158384 ps |
T355 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.144676763 |
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Aug 23 10:27:01 PM UTC 24 |
Aug 23 10:27:22 PM UTC 24 |
2341082884 ps |
T204 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_all.2983115096 |
|
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Aug 23 10:26:59 PM UTC 24 |
Aug 23 10:27:24 PM UTC 24 |
1138928982 ps |
T268 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_cfg_cmd.3144190310 |
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Aug 23 10:27:13 PM UTC 24 |
Aug 23 10:27:26 PM UTC 24 |
9223336837 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_alert_test.2233213653 |
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Aug 23 10:27:25 PM UTC 24 |
Aug 23 10:27:27 PM UTC 24 |
15108399 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_csb_read.1495274282 |
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Aug 23 10:27:26 PM UTC 24 |
Aug 23 10:27:28 PM UTC 24 |
22549554 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_read_buffer_direct.1179093041 |
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Aug 23 10:27:17 PM UTC 24 |
Aug 23 10:27:29 PM UTC 24 |
1324977702 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mem_parity.2999214699 |
|
|
Aug 23 10:27:28 PM UTC 24 |
Aug 23 10:27:30 PM UTC 24 |
27014943 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.632859152 |
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Aug 23 10:27:29 PM UTC 24 |
Aug 23 10:27:32 PM UTC 24 |
592067594 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.2187985852 |
|
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Aug 23 10:27:31 PM UTC 24 |
Aug 23 10:27:33 PM UTC 24 |
102604958 ps |
T200 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.1547369777 |
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Aug 23 10:26:33 PM UTC 24 |
Aug 23 10:27:33 PM UTC 24 |
7499908223 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_rw.3573234537 |
|
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Aug 23 10:27:33 PM UTC 24 |
Aug 23 10:27:35 PM UTC 24 |
33042395 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.3024528086 |
|
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Aug 23 10:27:30 PM UTC 24 |
Aug 23 10:27:36 PM UTC 24 |
521801019 ps |
T202 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.379585175 |
|
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Aug 23 10:26:58 PM UTC 24 |
Aug 23 10:27:38 PM UTC 24 |
3990320186 ps |
T208 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_and_tpm_min_idle.12714873 |
|
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Aug 23 10:24:07 PM UTC 24 |
Aug 23 10:27:40 PM UTC 24 |
24683680812 ps |
T279 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.1626006407 |
|
|
Aug 23 10:27:36 PM UTC 24 |
Aug 23 10:27:40 PM UTC 24 |
790046301 ps |
T304 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.3988884814 |
|
|
Aug 23 10:27:34 PM UTC 24 |
Aug 23 10:27:41 PM UTC 24 |
711875565 ps |
T249 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.801449146 |
|
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Aug 23 10:27:34 PM UTC 24 |
Aug 23 10:27:41 PM UTC 24 |
887016806 ps |
T220 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.4189899785 |
|
|
Aug 23 10:27:37 PM UTC 24 |
Aug 23 10:27:42 PM UTC 24 |
649344663 ps |
T183 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/7.spi_device_stress_all.1427533398 |
|
|
Aug 23 10:24:38 PM UTC 24 |
Aug 23 10:27:43 PM UTC 24 |
42153176033 ps |
T357 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_tpm_all.1524164680 |
|
|
Aug 23 10:27:07 PM UTC 24 |
Aug 23 10:27:46 PM UTC 24 |
7787020132 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.2899715169 |
|
|
Aug 23 10:27:40 PM UTC 24 |
Aug 23 10:27:46 PM UTC 24 |
1269195929 ps |
T346 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.3016308878 |
|
|
Aug 23 10:27:41 PM UTC 24 |
Aug 23 10:27:47 PM UTC 24 |
646883666 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.230198238 |
|
|
Aug 23 10:27:42 PM UTC 24 |
Aug 23 10:27:48 PM UTC 24 |
718600693 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.3781750446 |
|
|
Aug 23 10:27:47 PM UTC 24 |
Aug 23 10:27:49 PM UTC 24 |
13028885 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_stress_all.2345306394 |
|
|
Aug 23 10:27:47 PM UTC 24 |
Aug 23 10:27:49 PM UTC 24 |
42978910 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.3304340758 |
|
|
Aug 23 10:27:48 PM UTC 24 |
Aug 23 10:27:50 PM UTC 24 |
64975438 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.9485774 |
|
|
Aug 23 10:27:49 PM UTC 24 |
Aug 23 10:27:51 PM UTC 24 |
67334466 ps |
T245 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.1475962643 |
|
|
Aug 23 10:26:39 PM UTC 24 |
Aug 23 10:27:54 PM UTC 24 |
6145447419 ps |
T255 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.3321006874 |
|
|
Aug 23 10:27:39 PM UTC 24 |
Aug 23 10:27:54 PM UTC 24 |
3964559124 ps |
T233 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.2048452619 |
|
|
Aug 23 10:26:38 PM UTC 24 |
Aug 23 10:27:55 PM UTC 24 |
13083064631 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.3676161970 |
|
|
Aug 23 10:27:52 PM UTC 24 |
Aug 23 10:27:55 PM UTC 24 |
139933300 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.3265515574 |
|
|
Aug 23 10:27:49 PM UTC 24 |
Aug 23 10:27:57 PM UTC 24 |
1132958704 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.1566036660 |
|
|
Aug 23 10:27:56 PM UTC 24 |
Aug 23 10:27:59 PM UTC 24 |
2394225373 ps |
T253 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.1719472144 |
|
|
Aug 23 10:27:56 PM UTC 24 |
Aug 23 10:28:00 PM UTC 24 |
156743652 ps |
T229 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.2236620419 |
|
|
Aug 23 10:27:56 PM UTC 24 |
Aug 23 10:28:01 PM UTC 24 |
698547475 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode.1880649578 |
|
|
Aug 23 10:27:15 PM UTC 24 |
Aug 23 10:28:02 PM UTC 24 |
7690370569 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.1016437149 |
|
|
Aug 23 10:28:01 PM UTC 24 |
Aug 23 10:28:04 PM UTC 24 |
51068695 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.3604996143 |
|
|
Aug 23 10:27:21 PM UTC 24 |
Aug 23 10:28:04 PM UTC 24 |
14887181822 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.3083288267 |
|
|
Aug 23 10:28:00 PM UTC 24 |
Aug 23 10:28:05 PM UTC 24 |
579571754 ps |
T363 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.3495187504 |
|
|
Aug 23 10:27:50 PM UTC 24 |
Aug 23 10:28:06 PM UTC 24 |
1823593808 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.831319086 |
|
|
Aug 23 10:27:58 PM UTC 24 |
Aug 23 10:28:06 PM UTC 24 |
1347716419 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_all.1052869602 |
|
|
Aug 23 10:25:32 PM UTC 24 |
Aug 23 10:28:10 PM UTC 24 |
93774853722 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.3717241573 |
|
|
Aug 23 10:28:02 PM UTC 24 |
Aug 23 10:28:11 PM UTC 24 |
277319453 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.2209499795 |
|
|
Aug 23 10:28:11 PM UTC 24 |
Aug 23 10:28:13 PM UTC 24 |
24893544 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.2517837033 |
|
|
Aug 23 10:28:11 PM UTC 24 |
Aug 23 10:28:13 PM UTC 24 |
30363903 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.1897170010 |
|
|
Aug 23 10:28:05 PM UTC 24 |
Aug 23 10:28:14 PM UTC 24 |
2588107716 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.3042653091 |
|
|
Aug 23 10:28:13 PM UTC 24 |
Aug 23 10:28:15 PM UTC 24 |
43897776 ps |
T296 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.3148522234 |
|
|
Aug 23 10:27:56 PM UTC 24 |
Aug 23 10:28:16 PM UTC 24 |
17079420842 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.2245387105 |
|
|
Aug 23 10:28:15 PM UTC 24 |
Aug 23 10:28:17 PM UTC 24 |
341573983 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.2976078902 |
|
|
Aug 23 10:28:16 PM UTC 24 |
Aug 23 10:28:20 PM UTC 24 |
1475848304 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.635326737 |
|
|
Aug 23 10:28:17 PM UTC 24 |
Aug 23 10:28:20 PM UTC 24 |
120978830 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.332346633 |
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|
Aug 23 10:28:13 PM UTC 24 |
Aug 23 10:28:21 PM UTC 24 |
4818517302 ps |
T177 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/8.spi_device_stress_all.2887471892 |
|
|
Aug 23 10:25:13 PM UTC 24 |
Aug 23 10:28:21 PM UTC 24 |
19875720193 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.2566502076 |
|
|
Aug 23 10:28:23 PM UTC 24 |
Aug 23 10:28:27 PM UTC 24 |
217679917 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.3624077756 |
|
|
Aug 23 10:28:23 PM UTC 24 |
Aug 23 10:28:28 PM UTC 24 |
632412800 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.709314250 |
|
|
Aug 23 10:28:29 PM UTC 24 |
Aug 23 10:28:32 PM UTC 24 |
340297732 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.432375768 |
|
|
Aug 23 10:28:33 PM UTC 24 |
Aug 23 10:28:35 PM UTC 24 |
136131542 ps |
T217 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.3457661678 |
|
|
Aug 23 10:28:21 PM UTC 24 |
Aug 23 10:28:37 PM UTC 24 |
1986140712 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.3841990778 |
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|
Aug 23 10:26:37 PM UTC 24 |
Aug 23 10:28:37 PM UTC 24 |
69169372462 ps |
T246 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.1880624991 |
|
|
Aug 23 10:28:20 PM UTC 24 |
Aug 23 10:28:39 PM UTC 24 |
4891869245 ps |
T280 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.1403578693 |
|
|
Aug 23 10:28:28 PM UTC 24 |
Aug 23 10:28:39 PM UTC 24 |
2812921633 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.1345154254 |
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|
Aug 23 10:28:38 PM UTC 24 |
Aug 23 10:28:39 PM UTC 24 |
36093735 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.3926585693 |
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Aug 23 10:28:36 PM UTC 24 |
Aug 23 10:28:41 PM UTC 24 |
229666987 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.3932323028 |
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|
Aug 23 10:28:40 PM UTC 24 |
Aug 23 10:28:42 PM UTC 24 |
15819115 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.1390831604 |
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Aug 23 10:28:40 PM UTC 24 |
Aug 23 10:28:42 PM UTC 24 |
64387605 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.2599321351 |
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Aug 23 10:28:42 PM UTC 24 |
Aug 23 10:28:44 PM UTC 24 |
13235403 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.1364129369 |
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Aug 23 10:28:42 PM UTC 24 |
Aug 23 10:28:44 PM UTC 24 |
33765974 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.423380488 |
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Aug 23 10:28:45 PM UTC 24 |
Aug 23 10:28:47 PM UTC 24 |
95822996 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.463585226 |
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Aug 23 10:28:42 PM UTC 24 |
Aug 23 10:28:48 PM UTC 24 |
1377969159 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.1907775124 |
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Aug 23 10:28:48 PM UTC 24 |
Aug 23 10:28:51 PM UTC 24 |
59193098 ps |
T351 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.2439596043 |
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Aug 23 10:28:14 PM UTC 24 |
Aug 23 10:28:52 PM UTC 24 |
28262572650 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.950342698 |
|
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Aug 23 10:28:48 PM UTC 24 |
Aug 23 10:28:53 PM UTC 24 |
4613012036 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.2881525306 |
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|
Aug 23 10:28:52 PM UTC 24 |
Aug 23 10:28:55 PM UTC 24 |
412388523 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.2204179103 |
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|
Aug 23 10:28:40 PM UTC 24 |
Aug 23 10:28:56 PM UTC 24 |
771004325 ps |
T263 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.612169208 |
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|
Aug 23 10:26:12 PM UTC 24 |
Aug 23 10:28:56 PM UTC 24 |
18941549454 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.1844874000 |
|
|
Aug 23 10:28:51 PM UTC 24 |
Aug 23 10:28:58 PM UTC 24 |
1491224601 ps |
T113 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.895963772 |
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|
Aug 23 10:28:57 PM UTC 24 |
Aug 23 10:28:59 PM UTC 24 |
287026135 ps |
T234 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.3835176625 |
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Aug 23 10:27:43 PM UTC 24 |
Aug 23 10:29:02 PM UTC 24 |
13405996186 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.1959287767 |
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|
Aug 23 10:28:56 PM UTC 24 |
Aug 23 10:29:02 PM UTC 24 |
1184182742 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.140679306 |
|
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Aug 23 10:28:03 PM UTC 24 |
Aug 23 10:29:03 PM UTC 24 |
19425432713 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.2402507841 |
|
|
Aug 23 10:28:44 PM UTC 24 |
Aug 23 10:29:05 PM UTC 24 |
4670495148 ps |
T114 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/0.spi_device_flash_mode_ignore_cmds.2243659397 |
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Aug 23 10:21:53 PM UTC 24 |
Aug 23 10:29:06 PM UTC 24 |
358898890726 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.3690822500 |
|
|
Aug 23 10:29:06 PM UTC 24 |
Aug 23 10:29:08 PM UTC 24 |
37531946 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.4232608316 |
|
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Aug 23 10:29:01 PM UTC 24 |
Aug 23 10:29:08 PM UTC 24 |
391140893 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.3114594899 |
|
|
Aug 23 10:29:07 PM UTC 24 |
Aug 23 10:29:09 PM UTC 24 |
25137254 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.2822903892 |
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Aug 23 10:29:09 PM UTC 24 |
Aug 23 10:29:11 PM UTC 24 |
19996054 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.3983310747 |
|
|
Aug 23 10:29:09 PM UTC 24 |
Aug 23 10:29:11 PM UTC 24 |
17207159 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.1509406503 |
|
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Aug 23 10:28:07 PM UTC 24 |
Aug 23 10:29:13 PM UTC 24 |
9150352213 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.4088603075 |
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Aug 23 10:29:09 PM UTC 24 |
Aug 23 10:29:13 PM UTC 24 |
440540416 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.583460579 |
|
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Aug 23 10:28:07 PM UTC 24 |
Aug 23 10:29:14 PM UTC 24 |
8841390591 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.3081871730 |
|
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Aug 23 10:29:12 PM UTC 24 |
Aug 23 10:29:14 PM UTC 24 |
77479188 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.2072427998 |
|
|
Aug 23 10:29:13 PM UTC 24 |
Aug 23 10:29:15 PM UTC 24 |
22531797 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.2927682097 |
|
|
Aug 23 10:28:57 PM UTC 24 |
Aug 23 10:29:17 PM UTC 24 |
24614215435 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.3941087945 |
|
|
Aug 23 10:29:14 PM UTC 24 |
Aug 23 10:29:18 PM UTC 24 |
595400368 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.688354221 |
|
|
Aug 23 10:29:17 PM UTC 24 |
Aug 23 10:29:20 PM UTC 24 |
216216339 ps |
T359 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.2664738249 |
|
|
Aug 23 10:29:12 PM UTC 24 |
Aug 23 10:29:21 PM UTC 24 |
1462676642 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.1751877058 |
|
|
Aug 23 10:29:14 PM UTC 24 |
Aug 23 10:29:23 PM UTC 24 |
1357109677 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.98815175 |
|
|
Aug 23 10:29:19 PM UTC 24 |
Aug 23 10:29:23 PM UTC 24 |
1383516218 ps |
T247 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.1771664141 |
|
|
Aug 23 10:28:05 PM UTC 24 |
Aug 23 10:29:23 PM UTC 24 |
9432873669 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.3493117528 |
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Aug 23 10:28:59 PM UTC 24 |
Aug 23 10:29:25 PM UTC 24 |
6099972890 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.2339025594 |
|
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Aug 23 10:29:03 PM UTC 24 |
Aug 23 10:29:26 PM UTC 24 |
11493159167 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.2085614767 |
|
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Aug 23 10:29:14 PM UTC 24 |
Aug 23 10:29:28 PM UTC 24 |
3198770622 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.1959085975 |
|
|
Aug 23 10:29:21 PM UTC 24 |
Aug 23 10:29:29 PM UTC 24 |
1994704040 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_mode_ignore_cmds.472681670 |
|
|
Aug 23 10:23:26 PM UTC 24 |
Aug 23 10:29:29 PM UTC 24 |
116613270060 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.2147765894 |
|
|
Aug 23 10:29:29 PM UTC 24 |
Aug 23 10:29:30 PM UTC 24 |
66847630 ps |
T244 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_all.723398147 |
|
|
Aug 23 10:29:03 PM UTC 24 |
Aug 23 10:29:31 PM UTC 24 |
5607063092 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.3707694729 |
|
|
Aug 23 10:29:30 PM UTC 24 |
Aug 23 10:29:31 PM UTC 24 |
16096010 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.3181557792 |
|
|
Aug 23 10:29:30 PM UTC 24 |
Aug 23 10:29:32 PM UTC 24 |
83284772 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2429951216 |
|
|
Aug 23 10:29:26 PM UTC 24 |
Aug 23 10:29:33 PM UTC 24 |
465015105 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.443431459 |
|
|
Aug 23 10:29:32 PM UTC 24 |
Aug 23 10:29:34 PM UTC 24 |
48451395 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.1800654905 |
|
|
Aug 23 10:29:23 PM UTC 24 |
Aug 23 10:29:34 PM UTC 24 |
922643688 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.53702079 |
|
|
Aug 23 10:29:33 PM UTC 24 |
Aug 23 10:29:35 PM UTC 24 |
309073087 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.3088915511 |
|
|
Aug 23 10:29:32 PM UTC 24 |
Aug 23 10:29:37 PM UTC 24 |
2288663090 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.773635253 |
|
|
Aug 23 10:29:31 PM UTC 24 |
Aug 23 10:29:37 PM UTC 24 |
2547953333 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.1031070438 |
|
|
Aug 23 10:29:34 PM UTC 24 |
Aug 23 10:29:37 PM UTC 24 |
500845541 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.565404027 |
|
|
Aug 23 10:28:05 PM UTC 24 |
Aug 23 10:29:38 PM UTC 24 |
5369540784 ps |
T281 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.1104641177 |
|
|
Aug 23 10:29:35 PM UTC 24 |
Aug 23 10:29:41 PM UTC 24 |
231591554 ps |
T299 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.1178956688 |
|
|
Aug 23 10:29:16 PM UTC 24 |
Aug 23 10:29:41 PM UTC 24 |
10405430236 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.478814833 |
|
|
Aug 23 10:29:37 PM UTC 24 |
Aug 23 10:29:43 PM UTC 24 |
1110388630 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.1935892304 |
|
|
Aug 23 10:29:41 PM UTC 24 |
Aug 23 10:29:47 PM UTC 24 |
249191920 ps |
T342 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.242848953 |
|
|
Aug 23 10:29:38 PM UTC 24 |
Aug 23 10:29:52 PM UTC 24 |
812126246 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.905723428 |
|
|
Aug 23 10:29:37 PM UTC 24 |
Aug 23 10:29:54 PM UTC 24 |
4220847505 ps |
T205 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.2352937473 |
|
|
Aug 23 10:29:39 PM UTC 24 |
Aug 23 10:29:54 PM UTC 24 |
1092309333 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.2470705463 |
|
|
Aug 23 10:29:34 PM UTC 24 |
Aug 23 10:29:55 PM UTC 24 |
8837111565 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.2519878655 |
|
|
Aug 23 10:29:55 PM UTC 24 |
Aug 23 10:29:56 PM UTC 24 |
44468702 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.1980587088 |
|
|
Aug 23 10:29:55 PM UTC 24 |
Aug 23 10:29:56 PM UTC 24 |
59916893 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.2194870596 |
|
|
Aug 23 10:28:54 PM UTC 24 |
Aug 23 10:29:57 PM UTC 24 |
29549205708 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.4037747255 |
|
|
Aug 23 10:29:57 PM UTC 24 |
Aug 23 10:29:58 PM UTC 24 |
23675819 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.2131114217 |
|
|
Aug 23 10:29:57 PM UTC 24 |
Aug 23 10:29:58 PM UTC 24 |
86082710 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.1606625494 |
|
|
Aug 23 10:29:58 PM UTC 24 |
Aug 23 10:30:00 PM UTC 24 |
13297753 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.2847953933 |
|
|
Aug 23 10:29:59 PM UTC 24 |
Aug 23 10:30:02 PM UTC 24 |
54524909 ps |
T254 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.2027493898 |
|
|
Aug 23 10:30:01 PM UTC 24 |
Aug 23 10:30:06 PM UTC 24 |
317392077 ps |
T272 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.3806232019 |
|
|
Aug 23 10:29:59 PM UTC 24 |
Aug 23 10:30:07 PM UTC 24 |
3782682398 ps |
T264 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_all.2473082561 |
|
|
Aug 23 10:27:43 PM UTC 24 |
Aug 23 10:30:10 PM UTC 24 |
36719641664 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.3079202101 |
|
|
Aug 23 10:29:24 PM UTC 24 |
Aug 23 10:30:16 PM UTC 24 |
33345833804 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.2627925285 |
|
|
Aug 23 10:30:07 PM UTC 24 |
Aug 23 10:30:16 PM UTC 24 |
4335289673 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.2944081901 |
|
|
Aug 23 10:30:17 PM UTC 24 |
Aug 23 10:30:22 PM UTC 24 |
759488525 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.2813990129 |
|
|
Aug 23 10:30:08 PM UTC 24 |
Aug 23 10:30:22 PM UTC 24 |
1115125233 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.1873559056 |
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|
Aug 23 10:29:57 PM UTC 24 |
Aug 23 10:30:24 PM UTC 24 |
37782489714 ps |
T211 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.798046563 |
|
|
Aug 23 10:27:19 PM UTC 24 |
Aug 23 10:30:30 PM UTC 24 |
111949637745 ps |
T240 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.1066225055 |
|
|
Aug 23 10:25:10 PM UTC 24 |
Aug 23 10:30:30 PM UTC 24 |
41225232652 ps |
T262 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.1929157075 |
|
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Aug 23 10:29:24 PM UTC 24 |
Aug 23 10:30:31 PM UTC 24 |
5804231648 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_stress_all.1998122490 |
|
|
Aug 23 10:30:30 PM UTC 24 |
Aug 23 10:30:32 PM UTC 24 |
173182786 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.2863833243 |
|
|
Aug 23 10:30:31 PM UTC 24 |
Aug 23 10:30:33 PM UTC 24 |
93209991 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.3550400938 |
|
|
Aug 23 10:30:32 PM UTC 24 |
Aug 23 10:30:34 PM UTC 24 |
44406069 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.713361252 |
|
|
Aug 23 10:30:03 PM UTC 24 |
Aug 23 10:30:35 PM UTC 24 |
8702837753 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.4217841158 |
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|
Aug 23 10:30:35 PM UTC 24 |
Aug 23 10:30:37 PM UTC 24 |
120203708 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.1931992647 |
|
|
Aug 23 10:30:36 PM UTC 24 |
Aug 23 10:30:38 PM UTC 24 |
52045806 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.3766543392 |
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|
Aug 23 10:30:34 PM UTC 24 |
Aug 23 10:30:38 PM UTC 24 |
962424564 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.2866884271 |
|
|
Aug 23 10:30:24 PM UTC 24 |
Aug 23 10:30:40 PM UTC 24 |
2111541149 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.265946041 |
|
|
Aug 23 10:30:38 PM UTC 24 |
Aug 23 10:30:41 PM UTC 24 |
56364906 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_stress_all.2097474408 |
|
|
Aug 23 10:31:45 PM UTC 24 |
Aug 23 10:32:03 PM UTC 24 |
3913170237 ps |
T293 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3294770457 |
|
|
Aug 23 10:30:39 PM UTC 24 |
Aug 23 10:30:42 PM UTC 24 |
981978352 ps |
T354 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.1449967539 |
|
|
Aug 23 10:29:53 PM UTC 24 |
Aug 23 10:30:43 PM UTC 24 |
2386645344 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.1989603120 |
|
|
Aug 23 10:29:36 PM UTC 24 |
Aug 23 10:30:47 PM UTC 24 |
41726247615 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.3416398169 |
|
|
Aug 23 10:30:34 PM UTC 24 |
Aug 23 10:30:48 PM UTC 24 |
14838552515 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.3226564640 |
|
|
Aug 23 10:30:39 PM UTC 24 |
Aug 23 10:30:49 PM UTC 24 |
2402319848 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.2206479876 |
|
|
Aug 23 10:30:42 PM UTC 24 |
Aug 23 10:30:51 PM UTC 24 |
1394753917 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.1688119281 |
|
|
Aug 23 10:29:04 PM UTC 24 |
Aug 23 10:30:52 PM UTC 24 |
19839927927 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.2877932057 |
|
|
Aug 23 10:30:10 PM UTC 24 |
Aug 23 10:30:53 PM UTC 24 |
7309600306 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.1242446843 |
|
|
Aug 23 10:30:49 PM UTC 24 |
Aug 23 10:30:54 PM UTC 24 |
3599130057 ps |
T358 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.3813132018 |
|
|
Aug 23 10:29:47 PM UTC 24 |
Aug 23 10:30:54 PM UTC 24 |
6199701667 ps |
T283 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.2174923851 |
|
|
Aug 23 10:30:43 PM UTC 24 |
Aug 23 10:30:55 PM UTC 24 |
2166797712 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.458357860 |
|
|
Aug 23 10:30:55 PM UTC 24 |
Aug 23 10:30:57 PM UTC 24 |
16252436 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.728790596 |
|
|
Aug 23 10:30:55 PM UTC 24 |
Aug 23 10:30:57 PM UTC 24 |
57351394 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.3212719311 |
|
|
Aug 23 10:30:56 PM UTC 24 |
Aug 23 10:30:58 PM UTC 24 |
50809271 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.1482409340 |
|
|
Aug 23 10:30:44 PM UTC 24 |
Aug 23 10:30:58 PM UTC 24 |
756766877 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.3712543554 |
|
|
Aug 23 10:30:57 PM UTC 24 |
Aug 23 10:30:59 PM UTC 24 |
10422456 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3522246936 |
|
|
Aug 23 10:30:57 PM UTC 24 |
Aug 23 10:30:59 PM UTC 24 |
31426279 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.968212047 |
|
|
Aug 23 10:30:58 PM UTC 24 |
Aug 23 10:31:00 PM UTC 24 |
18765660 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.2641388384 |
|
|
Aug 23 10:29:21 PM UTC 24 |
Aug 23 10:31:00 PM UTC 24 |
59409854457 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.719330316 |
|
|
Aug 23 10:31:01 PM UTC 24 |
Aug 23 10:31:03 PM UTC 24 |
305535886 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.2465160376 |
|
|
Aug 23 10:31:00 PM UTC 24 |
Aug 23 10:31:07 PM UTC 24 |
1322635728 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.1913842911 |
|
|
Aug 23 10:29:43 PM UTC 24 |
Aug 23 10:31:07 PM UTC 24 |
12350296849 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.3401308239 |
|
|
Aug 23 10:31:00 PM UTC 24 |
Aug 23 10:31:09 PM UTC 24 |
4152310124 ps |
T286 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.1628027652 |
|
|
Aug 23 10:30:59 PM UTC 24 |
Aug 23 10:31:10 PM UTC 24 |
15060996947 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.382994304 |
|
|
Aug 23 10:31:10 PM UTC 24 |
Aug 23 10:31:15 PM UTC 24 |
385063532 ps |
T256 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.4178263802 |
|
|
Aug 23 10:30:23 PM UTC 24 |
Aug 23 10:31:15 PM UTC 24 |
10158164958 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.300797620 |
|
|
Aug 23 10:31:05 PM UTC 24 |
Aug 23 10:31:15 PM UTC 24 |
3205288969 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.2473832941 |
|
|
Aug 23 10:31:08 PM UTC 24 |
Aug 23 10:31:18 PM UTC 24 |
3360242198 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.907759981 |
|
|
Aug 23 10:31:01 PM UTC 24 |
Aug 23 10:31:21 PM UTC 24 |
26214162223 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.1761117744 |
|
|
Aug 23 10:31:19 PM UTC 24 |
Aug 23 10:31:21 PM UTC 24 |
15684709 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.3033121300 |
|
|
Aug 23 10:31:21 PM UTC 24 |
Aug 23 10:31:23 PM UTC 24 |
26907610 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.2477357588 |
|
|
Aug 23 10:31:21 PM UTC 24 |
Aug 23 10:31:23 PM UTC 24 |
30846061 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.2557507249 |
|
|
Aug 23 10:27:02 PM UTC 24 |
Aug 23 10:31:23 PM UTC 24 |
138650973297 ps |
T302 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_stress_all.4150281287 |
|
|
Aug 23 10:30:54 PM UTC 24 |
Aug 23 10:31:25 PM UTC 24 |
8494636716 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.793786760 |
|
|
Aug 23 10:31:23 PM UTC 24 |
Aug 23 10:31:25 PM UTC 24 |
139842214 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.2504512550 |
|
|
Aug 23 10:30:17 PM UTC 24 |
Aug 23 10:31:26 PM UTC 24 |
5839583700 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.3358866997 |
|
|
Aug 23 10:31:25 PM UTC 24 |
Aug 23 10:31:29 PM UTC 24 |
66748207 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.842473880 |
|
|
Aug 23 10:30:47 PM UTC 24 |
Aug 23 10:31:29 PM UTC 24 |
4289995829 ps |
T300 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.1601863419 |
|
|
Aug 23 10:30:41 PM UTC 24 |
Aug 23 10:31:32 PM UTC 24 |
8786550654 ps |
T276 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.2647118715 |
|
|
Aug 23 10:31:27 PM UTC 24 |
Aug 23 10:31:33 PM UTC 24 |
2791864331 ps |
T295 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.10172097 |
|
|
Aug 23 10:31:27 PM UTC 24 |
Aug 23 10:31:33 PM UTC 24 |
1511877577 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.4226993133 |
|
|
Aug 23 10:31:31 PM UTC 24 |
Aug 23 10:31:34 PM UTC 24 |
2246569255 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.2367102009 |
|
|
Aug 23 10:31:30 PM UTC 24 |
Aug 23 10:31:37 PM UTC 24 |
2596979299 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.956839839 |
|
|
Aug 23 10:31:24 PM UTC 24 |
Aug 23 10:31:37 PM UTC 24 |
6540356075 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.463405254 |
|
|
Aug 23 10:31:23 PM UTC 24 |
Aug 23 10:31:42 PM UTC 24 |
9834473107 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.4027374446 |
|
|
Aug 23 10:31:35 PM UTC 24 |
Aug 23 10:31:44 PM UTC 24 |
1126342020 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.2451001866 |
|
|
Aug 23 10:31:34 PM UTC 24 |
Aug 23 10:31:47 PM UTC 24 |
1141087056 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.2271716014 |
|
|
Aug 23 10:27:46 PM UTC 24 |
Aug 23 10:31:48 PM UTC 24 |
30993558985 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.37380131 |
|
|
Aug 23 10:31:48 PM UTC 24 |
Aug 23 10:31:50 PM UTC 24 |
43272961 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.892235656 |
|
|
Aug 23 10:31:48 PM UTC 24 |
Aug 23 10:31:50 PM UTC 24 |
15579042 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.573557038 |
|
|
Aug 23 10:31:33 PM UTC 24 |
Aug 23 10:31:54 PM UTC 24 |
7066309969 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.230500100 |
|
|
Aug 23 10:31:54 PM UTC 24 |
Aug 23 10:31:56 PM UTC 24 |
34410830 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.928638676 |
|
|
Aug 23 10:31:50 PM UTC 24 |
Aug 23 10:31:59 PM UTC 24 |
1402578686 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.2073400211 |
|
|
Aug 23 10:31:57 PM UTC 24 |
Aug 23 10:32:01 PM UTC 24 |
78278701 ps |
T221 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.2393809896 |
|
|
Aug 23 10:31:38 PM UTC 24 |
Aug 23 10:32:02 PM UTC 24 |
976777413 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.2536051523 |
|
|
Aug 23 10:32:00 PM UTC 24 |
Aug 23 10:32:05 PM UTC 24 |
980945036 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.207213378 |
|
|
Aug 23 10:32:01 PM UTC 24 |
Aug 23 10:32:07 PM UTC 24 |
4230388081 ps |
T213 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.2539199144 |
|
|
Aug 23 10:32:03 PM UTC 24 |
Aug 23 10:32:09 PM UTC 24 |
539287855 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.3140366114 |
|
|
Aug 23 10:31:50 PM UTC 24 |
Aug 23 10:32:10 PM UTC 24 |
41914498190 ps |
T178 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_stress_all.259077620 |
|
|
Aug 23 10:27:22 PM UTC 24 |
Aug 23 10:32:10 PM UTC 24 |
44755390346 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.1667959298 |
|
|
Aug 23 10:32:08 PM UTC 24 |
Aug 23 10:32:12 PM UTC 24 |
617264791 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode.1211159603 |
|
|
Aug 23 10:32:10 PM UTC 24 |
Aug 23 10:32:12 PM UTC 24 |
32849267 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.148190923 |
|
|
Aug 23 10:32:03 PM UTC 24 |
Aug 23 10:32:15 PM UTC 24 |
1844144430 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.3301601818 |
|
|
Aug 23 10:32:12 PM UTC 24 |
Aug 23 10:32:18 PM UTC 24 |
3795737378 ps |
T294 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_all.2595527805 |
|
|
Aug 23 10:27:17 PM UTC 24 |
Aug 23 10:32:22 PM UTC 24 |
186867375232 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.2734900792 |
|
|
Aug 23 10:32:23 PM UTC 24 |
Aug 23 10:32:25 PM UTC 24 |
22027913 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.1293128710 |
|
|
Aug 23 10:32:25 PM UTC 24 |
Aug 23 10:32:27 PM UTC 24 |
69900739 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.370714870 |
|
|
Aug 23 10:32:27 PM UTC 24 |
Aug 23 10:32:31 PM UTC 24 |
413471912 ps |
T209 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_mode_ignore_cmds.2086686215 |
|
|
Aug 23 10:24:31 PM UTC 24 |
Aug 23 10:32:34 PM UTC 24 |
76873441075 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.3719784125 |
|
|
Aug 23 10:32:35 PM UTC 24 |
Aug 23 10:32:37 PM UTC 24 |
568251272 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.4098660002 |
|
|
Aug 23 10:32:37 PM UTC 24 |
Aug 23 10:32:39 PM UTC 24 |
22128295 ps |
T236 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.19063537 |
|
|
Aug 23 10:32:05 PM UTC 24 |
Aug 23 10:32:41 PM UTC 24 |
48850126223 ps |
T356 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.2760356980 |
|
|
Aug 23 10:32:32 PM UTC 24 |
Aug 23 10:32:45 PM UTC 24 |
10640647346 ps |
T210 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.3738267119 |
|
|
Aug 23 10:31:43 PM UTC 24 |
Aug 23 10:32:46 PM UTC 24 |
24196652485 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.2730286554 |
|
|
Aug 23 10:32:11 PM UTC 24 |
Aug 23 10:32:46 PM UTC 24 |
6436751312 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.2328176346 |
|
|
Aug 23 10:32:42 PM UTC 24 |
Aug 23 10:32:46 PM UTC 24 |
1205072584 ps |
T41 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.426602627 |
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|
Aug 23 10:25:34 PM UTC 24 |
Aug 23 10:32:47 PM UTC 24 |
107822126637 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.2071159937 |
|
|
Aug 23 10:32:46 PM UTC 24 |
Aug 23 10:32:51 PM UTC 24 |
224759880 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.4248739057 |
|
|
Aug 23 10:32:40 PM UTC 24 |
Aug 23 10:32:52 PM UTC 24 |
3530063240 ps |
T226 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.2974094721 |
|
|
Aug 23 10:32:47 PM UTC 24 |
Aug 23 10:32:52 PM UTC 24 |
235457499 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.132510576 |
|
|
Aug 23 10:30:53 PM UTC 24 |
Aug 23 10:32:52 PM UTC 24 |
11621360750 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.2471963631 |
|
|
Aug 23 10:32:47 PM UTC 24 |
Aug 23 10:32:53 PM UTC 24 |
1992943669 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.4113075340 |
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Aug 23 10:30:52 PM UTC 24 |
Aug 23 10:32:56 PM UTC 24 |
32644753729 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.3886774238 |
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Aug 23 10:32:53 PM UTC 24 |
Aug 23 10:32:56 PM UTC 24 |
329166542 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.3637923928 |
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Aug 23 10:32:57 PM UTC 24 |
Aug 23 10:32:58 PM UTC 24 |
41698818 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.2297607348 |
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Aug 23 10:27:41 PM UTC 24 |
Aug 23 10:33:00 PM UTC 24 |
50909074053 ps |
T42 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.2020233542 |
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Aug 23 10:31:15 PM UTC 24 |
Aug 23 10:33:00 PM UTC 24 |
30863118474 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.3003586659 |
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Aug 23 10:32:59 PM UTC 24 |
Aug 23 10:33:01 PM UTC 24 |
20786803 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.716897160 |
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Aug 23 10:33:00 PM UTC 24 |
Aug 23 10:33:02 PM UTC 24 |
57373819 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.4028647627 |
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Aug 23 10:33:01 PM UTC 24 |
Aug 23 10:33:03 PM UTC 24 |
180362132 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.1172924008 |
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Aug 23 10:33:02 PM UTC 24 |
Aug 23 10:33:05 PM UTC 24 |
110472501 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.2174173835 |
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Aug 23 10:33:00 PM UTC 24 |
Aug 23 10:33:05 PM UTC 24 |
1185415691 ps |