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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.07 98.44 94.10 98.62 89.36 97.28 95.43 99.26


Total test records in report: 1151
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T179 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_stress_all.1233536072 Aug 23 10:32:19 PM UTC 24 Aug 23 10:33:05 PM UTC 24 7572055826 ps
T613 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.3347992407 Aug 23 10:33:04 PM UTC 24 Aug 23 10:33:07 PM UTC 24 173657345 ps
T614 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.439685706 Aug 23 10:33:05 PM UTC 24 Aug 23 10:33:08 PM UTC 24 99973049 ps
T615 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.1906779401 Aug 23 10:33:08 PM UTC 24 Aug 23 10:33:11 PM UTC 24 93026544 ps
T616 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.2218756276 Aug 23 10:33:07 PM UTC 24 Aug 23 10:33:11 PM UTC 24 892455186 ps
T252 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.3854718928 Aug 23 10:33:06 PM UTC 24 Aug 23 10:33:13 PM UTC 24 289777965 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.2813619580 Aug 23 10:33:05 PM UTC 24 Aug 23 10:33:23 PM UTC 24 12956437361 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.2973084739 Aug 23 10:33:14 PM UTC 24 Aug 23 10:33:25 PM UTC 24 931273246 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.1051561991 Aug 23 10:33:12 PM UTC 24 Aug 23 10:33:28 PM UTC 24 1830089794 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_all.3765586760 Aug 23 10:32:53 PM UTC 24 Aug 23 10:33:33 PM UTC 24 3306715418 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.1228606281 Aug 23 10:33:11 PM UTC 24 Aug 23 10:33:34 PM UTC 24 1845512793 ps
T621 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_alert_test.3926991257 Aug 23 10:33:35 PM UTC 24 Aug 23 10:33:37 PM UTC 24 30578890 ps
T250 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.1130466428 Aug 23 10:31:34 PM UTC 24 Aug 23 10:33:38 PM UTC 24 20265327274 ps
T216 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_and_tpm_min_idle.3307479513 Aug 23 10:23:06 PM UTC 24 Aug 23 10:33:40 PM UTC 24 74166409124 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.2220606684 Aug 23 10:33:38 PM UTC 24 Aug 23 10:33:40 PM UTC 24 135465318 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_all.2926903901 Aug 23 10:33:41 PM UTC 24 Aug 23 10:33:43 PM UTC 24 48959463 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.161139275 Aug 23 10:33:41 PM UTC 24 Aug 23 10:33:43 PM UTC 24 76092182 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_mailbox.2248740375 Aug 23 10:32:46 PM UTC 24 Aug 23 10:33:44 PM UTC 24 35350486895 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_rw.3078390863 Aug 23 10:33:44 PM UTC 24 Aug 23 10:33:47 PM UTC 24 385461000 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.1996740975 Aug 23 10:32:54 PM UTC 24 Aug 23 10:33:48 PM UTC 24 18840191581 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_intercept.1906551531 Aug 23 10:33:47 PM UTC 24 Aug 23 10:33:50 PM UTC 24 121402018 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.3819847613 Aug 23 10:32:48 PM UTC 24 Aug 23 10:33:51 PM UTC 24 4998215994 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.2112788151 Aug 23 10:33:44 PM UTC 24 Aug 23 10:33:51 PM UTC 24 2178347705 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.2327232236 Aug 23 10:33:39 PM UTC 24 Aug 23 10:33:52 PM UTC 24 10173385588 ps
T317 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.1407981439 Aug 23 10:32:13 PM UTC 24 Aug 23 10:33:53 PM UTC 24 10204979030 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.3786504129 Aug 23 10:33:44 PM UTC 24 Aug 23 10:33:54 PM UTC 24 2155949314 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode.3086522656 Aug 23 10:33:52 PM UTC 24 Aug 23 10:33:56 PM UTC 24 60292398 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.3681483347 Aug 23 10:33:53 PM UTC 24 Aug 23 10:34:01 PM UTC 24 939481084 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_all.2495916084 Aug 23 10:33:24 PM UTC 24 Aug 23 10:34:04 PM UTC 24 13685531295 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_all.96517904 Aug 23 10:32:13 PM UTC 24 Aug 23 10:34:04 PM UTC 24 60243705884 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_upload.1673844926 Aug 23 10:33:51 PM UTC 24 Aug 23 10:34:06 PM UTC 24 1848537611 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_alert_test.2288087311 Aug 23 10:34:05 PM UTC 24 Aug 23 10:34:06 PM UTC 24 14112628 ps
T312 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.2870158594 Aug 23 10:30:22 PM UTC 24 Aug 23 10:34:07 PM UTC 24 60292371316 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_csb_read.1163785898 Aug 23 10:34:07 PM UTC 24 Aug 23 10:34:08 PM UTC 24 37504970 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.4189608796 Aug 23 10:34:09 PM UTC 24 Aug 23 10:34:11 PM UTC 24 223922540 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_rw.2900308142 Aug 23 10:34:12 PM UTC 24 Aug 23 10:34:14 PM UTC 24 89416654 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_cfg_cmd.3135555112 Aug 23 10:33:52 PM UTC 24 Aug 23 10:34:15 PM UTC 24 4432834326 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.220297107 Aug 23 10:34:16 PM UTC 24 Aug 23 10:34:22 PM UTC 24 583666498 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_intercept.2450629992 Aug 23 10:34:22 PM UTC 24 Aug 23 10:34:26 PM UTC 24 99263033 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.3255157732 Aug 23 10:34:14 PM UTC 24 Aug 23 10:34:27 PM UTC 24 7312496803 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.2616646744 Aug 23 10:34:07 PM UTC 24 Aug 23 10:34:28 PM UTC 24 31943212125 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_cfg_cmd.1043279127 Aug 23 10:34:29 PM UTC 24 Aug 23 10:34:35 PM UTC 24 462859365 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_all.547310525 Aug 23 10:34:08 PM UTC 24 Aug 23 10:34:36 PM UTC 24 19701219724 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.1720780147 Aug 23 10:33:56 PM UTC 24 Aug 23 10:34:36 PM UTC 24 19824552854 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_upload.2550379236 Aug 23 10:34:27 PM UTC 24 Aug 23 10:34:37 PM UTC 24 14152659108 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_mailbox.769739568 Aug 23 10:34:26 PM UTC 24 Aug 23 10:34:37 PM UTC 24 4671270243 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode.1059882204 Aug 23 10:34:36 PM UTC 24 Aug 23 10:34:43 PM UTC 24 894319220 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.702220231 Aug 23 10:34:37 PM UTC 24 Aug 23 10:34:45 PM UTC 24 3373095619 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_stress_all.526662289 Aug 23 10:33:35 PM UTC 24 Aug 23 10:34:48 PM UTC 24 7888940773 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_alert_test.3016233633 Aug 23 10:34:48 PM UTC 24 Aug 23 10:34:50 PM UTC 24 77414892 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.1016896821 Aug 23 10:29:27 PM UTC 24 Aug 23 10:34:50 PM UTC 24 92509665042 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_csb_read.1883005056 Aug 23 10:34:50 PM UTC 24 Aug 23 10:34:52 PM UTC 24 21922593 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_mailbox.172992654 Aug 23 10:33:48 PM UTC 24 Aug 23 10:34:56 PM UTC 24 8865091606 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.1575170647 Aug 23 10:34:57 PM UTC 24 Aug 23 10:34:59 PM UTC 24 319899912 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_rw.635679809 Aug 23 10:35:00 PM UTC 24 Aug 23 10:35:02 PM UTC 24 519999621 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.1828788449 Aug 23 10:34:51 PM UTC 24 Aug 23 10:35:02 PM UTC 24 6099441399 ps
T206 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.2360642328 Aug 23 10:34:02 PM UTC 24 Aug 23 10:35:04 PM UTC 24 3526325620 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_all.374404971 Aug 23 10:34:53 PM UTC 24 Aug 23 10:35:06 PM UTC 24 3106522919 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.2007789413 Aug 23 10:35:03 PM UTC 24 Aug 23 10:35:06 PM UTC 24 97075206 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.4043476061 Aug 23 10:35:03 PM UTC 24 Aug 23 10:35:06 PM UTC 24 98793300 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.3999402304 Aug 23 10:33:29 PM UTC 24 Aug 23 10:35:07 PM UTC 24 9551418939 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_intercept.106368940 Aug 23 10:35:05 PM UTC 24 Aug 23 10:35:11 PM UTC 24 659384958 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_cfg_cmd.971818054 Aug 23 10:35:07 PM UTC 24 Aug 23 10:35:12 PM UTC 24 600783505 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2830457090 Aug 23 10:35:12 PM UTC 24 Aug 23 10:35:16 PM UTC 24 153310829 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_upload.2086281259 Aug 23 10:35:07 PM UTC 24 Aug 23 10:35:17 PM UTC 24 5869319441 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.3093800032 Aug 23 10:32:52 PM UTC 24 Aug 23 10:35:17 PM UTC 24 21505711081 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode.3458284604 Aug 23 10:35:08 PM UTC 24 Aug 23 10:35:18 PM UTC 24 1000710879 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_stress_all.3938484567 Aug 23 10:35:19 PM UTC 24 Aug 23 10:35:21 PM UTC 24 159692922 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_alert_test.4105935219 Aug 23 10:35:22 PM UTC 24 Aug 23 10:35:24 PM UTC 24 37614350 ps
T237 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.748687401 Aug 23 10:29:42 PM UTC 24 Aug 23 10:35:26 PM UTC 24 204431747598 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_csb_read.3970683677 Aug 23 10:35:25 PM UTC 24 Aug 23 10:35:27 PM UTC 24 24008298 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.1980672989 Aug 23 10:34:36 PM UTC 24 Aug 23 10:35:29 PM UTC 24 8176075459 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_and_tpm_min_idle.1386759506 Aug 23 10:24:37 PM UTC 24 Aug 23 10:35:29 PM UTC 24 320273632379 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.583984655 Aug 23 10:35:29 PM UTC 24 Aug 23 10:35:31 PM UTC 24 106481926 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_rw.3039552835 Aug 23 10:35:29 PM UTC 24 Aug 23 10:35:31 PM UTC 24 133982769 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.2825205168 Aug 23 10:35:32 PM UTC 24 Aug 23 10:35:36 PM UTC 24 1048858859 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.509910099 Aug 23 10:35:33 PM UTC 24 Aug 23 10:35:37 PM UTC 24 624720503 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_intercept.3042066514 Aug 23 10:35:37 PM UTC 24 Aug 23 10:35:40 PM UTC 24 94913003 ps
T334 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_stress_all.1503708686 Aug 23 10:34:05 PM UTC 24 Aug 23 10:35:41 PM UTC 24 29884757381 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.1544282531 Aug 23 10:35:17 PM UTC 24 Aug 23 10:35:44 PM UTC 24 23543320403 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.2493896213 Aug 23 10:35:26 PM UTC 24 Aug 23 10:35:44 PM UTC 24 15627271055 ps
T214 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_mailbox.2586820587 Aug 23 10:35:39 PM UTC 24 Aug 23 10:35:46 PM UTC 24 3194065832 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_cfg_cmd.2822628125 Aug 23 10:35:42 PM UTC 24 Aug 23 10:35:48 PM UTC 24 506683007 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_all.2394022695 Aug 23 10:35:28 PM UTC 24 Aug 23 10:35:49 PM UTC 24 3806370455 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.1364948814 Aug 23 10:35:45 PM UTC 24 Aug 23 10:35:49 PM UTC 24 398585191 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_mailbox.3371114136 Aug 23 10:35:07 PM UTC 24 Aug 23 10:35:52 PM UTC 24 4358841112 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_upload.1606493776 Aug 23 10:35:41 PM UTC 24 Aug 23 10:35:55 PM UTC 24 4737940677 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.4070779508 Aug 23 10:35:47 PM UTC 24 Aug 23 10:35:57 PM UTC 24 3935502343 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_alert_test.3298963731 Aug 23 10:35:56 PM UTC 24 Aug 23 10:35:58 PM UTC 24 187281869 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode.638012302 Aug 23 10:35:45 PM UTC 24 Aug 23 10:35:58 PM UTC 24 5062604288 ps
T313 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.1184060127 Aug 23 10:28:38 PM UTC 24 Aug 23 10:35:59 PM UTC 24 125560030059 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.853886432 Aug 23 10:35:58 PM UTC 24 Aug 23 10:36:00 PM UTC 24 39579751 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_csb_read.379669513 Aug 23 10:35:58 PM UTC 24 Aug 23 10:36:00 PM UTC 24 30003723 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.2545765637 Aug 23 10:35:59 PM UTC 24 Aug 23 10:36:01 PM UTC 24 322784916 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_rw.98139415 Aug 23 10:36:00 PM UTC 24 Aug 23 10:36:02 PM UTC 24 12618292 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.16952966 Aug 23 10:36:00 PM UTC 24 Aug 23 10:36:05 PM UTC 24 210000866 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.1396171652 Aug 23 10:36:01 PM UTC 24 Aug 23 10:36:06 PM UTC 24 499925812 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.954149214 Aug 23 10:32:54 PM UTC 24 Aug 23 10:36:08 PM UTC 24 100109740112 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_upload.3119493221 Aug 23 10:36:07 PM UTC 24 Aug 23 10:36:09 PM UTC 24 518459869 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_cfg_cmd.3563246240 Aug 23 10:36:09 PM UTC 24 Aug 23 10:36:12 PM UTC 24 37072316 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_all.2902523839 Aug 23 10:35:58 PM UTC 24 Aug 23 10:36:17 PM UTC 24 7592491149 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode.4227337261 Aug 23 10:36:10 PM UTC 24 Aug 23 10:36:18 PM UTC 24 1687781467 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.2414167848 Aug 23 10:35:12 PM UTC 24 Aug 23 10:36:23 PM UTC 24 106175928099 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.1698802659 Aug 23 10:31:08 PM UTC 24 Aug 23 10:36:26 PM UTC 24 317892275846 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_all.1762860245 Aug 23 10:36:19 PM UTC 24 Aug 23 10:36:28 PM UTC 24 438557491 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.1563418768 Aug 23 10:36:18 PM UTC 24 Aug 23 10:36:29 PM UTC 24 2874675363 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_stress_all.2157214245 Aug 23 10:36:29 PM UTC 24 Aug 23 10:36:31 PM UTC 24 268832635 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_intercept.270360115 Aug 23 10:36:02 PM UTC 24 Aug 23 10:36:31 PM UTC 24 15902742069 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_alert_test.865125136 Aug 23 10:36:30 PM UTC 24 Aug 23 10:36:32 PM UTC 24 36081313 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_csb_read.1741363252 Aug 23 10:36:32 PM UTC 24 Aug 23 10:36:34 PM UTC 24 16695348 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_mailbox.1985140849 Aug 23 10:36:05 PM UTC 24 Aug 23 10:36:36 PM UTC 24 97027664430 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.633816704 Aug 23 10:36:35 PM UTC 24 Aug 23 10:36:37 PM UTC 24 429183401 ps
T273 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.1576609283 Aug 23 10:35:17 PM UTC 24 Aug 23 10:36:39 PM UTC 24 11443199878 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_rw.731167742 Aug 23 10:36:37 PM UTC 24 Aug 23 10:36:39 PM UTC 24 25210194 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.3195841556 Aug 23 10:36:24 PM UTC 24 Aug 23 10:36:40 PM UTC 24 4574180252 ps
T373 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_all.2927685702 Aug 23 10:36:32 PM UTC 24 Aug 23 10:36:44 PM UTC 24 3590442281 ps
T224 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.3207337259 Aug 23 10:31:11 PM UTC 24 Aug 23 10:36:47 PM UTC 24 130741234236 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.3291600667 Aug 23 10:35:50 PM UTC 24 Aug 23 10:36:47 PM UTC 24 3545400955 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.3792955451 Aug 23 10:36:38 PM UTC 24 Aug 23 10:36:48 PM UTC 24 6677863884 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_upload.2002344825 Aug 23 10:36:44 PM UTC 24 Aug 23 10:36:48 PM UTC 24 357290620 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.509601350 Aug 23 10:36:32 PM UTC 24 Aug 23 10:36:48 PM UTC 24 7045528697 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.4066339414 Aug 23 10:36:39 PM UTC 24 Aug 23 10:36:48 PM UTC 24 4834523294 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_mailbox.1780793539 Aug 23 10:36:41 PM UTC 24 Aug 23 10:36:49 PM UTC 24 4733673211 ps
T326 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_all.2962457016 Aug 23 10:35:49 PM UTC 24 Aug 23 10:36:49 PM UTC 24 5301750144 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode.315825086 Aug 23 10:36:49 PM UTC 24 Aug 23 10:36:52 PM UTC 24 142556085 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_cfg_cmd.3091439561 Aug 23 10:36:48 PM UTC 24 Aug 23 10:36:53 PM UTC 24 392504377 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.386394772 Aug 23 10:36:49 PM UTC 24 Aug 23 10:36:54 PM UTC 24 267676687 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_alert_test.503865206 Aug 23 10:36:53 PM UTC 24 Aug 23 10:36:55 PM UTC 24 16555690 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.1608373101 Aug 23 10:36:54 PM UTC 24 Aug 23 10:36:56 PM UTC 24 12724867 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_csb_read.2905672404 Aug 23 10:36:54 PM UTC 24 Aug 23 10:36:56 PM UTC 24 48779149 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.1088660548 Aug 23 10:36:56 PM UTC 24 Aug 23 10:36:58 PM UTC 24 70811020 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_all.860649296 Aug 23 10:35:17 PM UTC 24 Aug 23 10:36:58 PM UTC 24 42631348706 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_rw.481914006 Aug 23 10:36:57 PM UTC 24 Aug 23 10:36:59 PM UTC 24 32585382 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.35174537 Aug 23 10:36:59 PM UTC 24 Aug 23 10:37:03 PM UTC 24 290770099 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_all.3035189541 Aug 23 10:34:37 PM UTC 24 Aug 23 10:37:04 PM UTC 24 21592399119 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_intercept.3636300447 Aug 23 10:36:40 PM UTC 24 Aug 23 10:37:05 PM UTC 24 18382494082 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.737456170 Aug 23 10:36:58 PM UTC 24 Aug 23 10:37:06 PM UTC 24 2814001450 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_mailbox.1041505572 Aug 23 10:37:03 PM UTC 24 Aug 23 10:37:07 PM UTC 24 216325148 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_all.2241073084 Aug 23 10:36:56 PM UTC 24 Aug 23 10:37:09 PM UTC 24 1355741777 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_cfg_cmd.1708972976 Aug 23 10:37:06 PM UTC 24 Aug 23 10:37:10 PM UTC 24 299078952 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_intercept.111160130 Aug 23 10:37:00 PM UTC 24 Aug 23 10:37:11 PM UTC 24 1208825691 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/30.spi_device_stress_all.2800546156 Aug 23 10:35:52 PM UTC 24 Aug 23 10:37:14 PM UTC 24 44960848082 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_all.1074494239 Aug 23 10:37:12 PM UTC 24 Aug 23 10:37:18 PM UTC 24 1047800245 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.2025527203 Aug 23 10:37:09 PM UTC 24 Aug 23 10:37:18 PM UTC 24 4657535914 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_alert_test.2039366726 Aug 23 10:37:19 PM UTC 24 Aug 23 10:37:20 PM UTC 24 13047531 ps
T344 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode.486646218 Aug 23 10:37:06 PM UTC 24 Aug 23 10:37:21 PM UTC 24 666314411 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_csb_read.4282487345 Aug 23 10:37:21 PM UTC 24 Aug 23 10:37:22 PM UTC 24 22204924 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.3059749780 Aug 23 10:30:50 PM UTC 24 Aug 23 10:37:26 PM UTC 24 241077023171 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_all.2028570341 Aug 23 10:37:23 PM UTC 24 Aug 23 10:37:28 PM UTC 24 1599076762 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.3491962556 Aug 23 10:37:22 PM UTC 24 Aug 23 10:37:28 PM UTC 24 3383519181 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.553414345 Aug 23 10:37:27 PM UTC 24 Aug 23 10:37:29 PM UTC 24 388459656 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_rw.1283929739 Aug 23 10:37:28 PM UTC 24 Aug 23 10:37:30 PM UTC 24 10486054 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.2762974703 Aug 23 10:37:28 PM UTC 24 Aug 23 10:37:31 PM UTC 24 58025864 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_intercept.186620700 Aug 23 10:37:30 PM UTC 24 Aug 23 10:37:36 PM UTC 24 406772293 ps
T325 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.514961335 Aug 23 10:37:30 PM UTC 24 Aug 23 10:37:37 PM UTC 24 1110698456 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.2343111630 Aug 23 10:32:16 PM UTC 24 Aug 23 10:37:38 PM UTC 24 153880976864 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_upload.1567982151 Aug 23 10:37:04 PM UTC 24 Aug 23 10:37:39 PM UTC 24 124816588950 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_upload.3769247259 Aug 23 10:37:37 PM UTC 24 Aug 23 10:37:41 PM UTC 24 262852061 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_mailbox.1157069971 Aug 23 10:37:32 PM UTC 24 Aug 23 10:37:42 PM UTC 24 1033821235 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.2156641559 Aug 23 10:36:50 PM UTC 24 Aug 23 10:37:44 PM UTC 24 30299111313 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.1444165108 Aug 23 10:37:41 PM UTC 24 Aug 23 10:37:46 PM UTC 24 616368377 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_all.1778432294 Aug 23 10:36:49 PM UTC 24 Aug 23 10:37:49 PM UTC 24 11222068877 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_cfg_cmd.1188384658 Aug 23 10:37:37 PM UTC 24 Aug 23 10:37:49 PM UTC 24 5123989546 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_alert_test.1407041306 Aug 23 10:37:50 PM UTC 24 Aug 23 10:37:51 PM UTC 24 14394317 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_csb_read.3542080738 Aug 23 10:37:52 PM UTC 24 Aug 23 10:37:54 PM UTC 24 54745558 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.699009777 Aug 23 10:37:39 PM UTC 24 Aug 23 10:37:57 PM UTC 24 15329325451 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_all.3452312120 Aug 23 10:37:58 PM UTC 24 Aug 23 10:38:02 PM UTC 24 945620972 ps
T320 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.3861935353 Aug 23 10:33:27 PM UTC 24 Aug 23 10:38:04 PM UTC 24 138961469667 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3108123953 Aug 23 10:38:03 PM UTC 24 Aug 23 10:38:05 PM UTC 24 63532050 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_all.3322409214 Aug 23 10:37:43 PM UTC 24 Aug 23 10:38:06 PM UTC 24 13869472543 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_rw.4163231112 Aug 23 10:38:05 PM UTC 24 Aug 23 10:38:07 PM UTC 24 112221249 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.1142169276 Aug 23 10:37:54 PM UTC 24 Aug 23 10:38:09 PM UTC 24 19831885284 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.3436216776 Aug 23 10:38:05 PM UTC 24 Aug 23 10:38:12 PM UTC 24 855147461 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode.3577357820 Aug 23 10:37:38 PM UTC 24 Aug 23 10:38:13 PM UTC 24 11665403469 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.551457994 Aug 23 10:37:12 PM UTC 24 Aug 23 10:38:13 PM UTC 24 12759131476 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_intercept.449041371 Aug 23 10:38:08 PM UTC 24 Aug 23 10:38:16 PM UTC 24 838538465 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.3761915461 Aug 23 10:37:15 PM UTC 24 Aug 23 10:38:17 PM UTC 24 3129794544 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.3058418941 Aug 23 10:38:16 PM UTC 24 Aug 23 10:38:18 PM UTC 24 23921588 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode.3948143417 Aug 23 10:38:14 PM UTC 24 Aug 23 10:38:19 PM UTC 24 1904960047 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_all.1081428436 Aug 23 10:38:18 PM UTC 24 Aug 23 10:38:20 PM UTC 24 36608394 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_cfg_cmd.1902819624 Aug 23 10:38:14 PM UTC 24 Aug 23 10:38:22 PM UTC 24 491441455 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.1680488151 Aug 23 10:38:17 PM UTC 24 Aug 23 10:38:23 PM UTC 24 1333420535 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.1304008326 Aug 23 10:38:07 PM UTC 24 Aug 23 10:38:25 PM UTC 24 5167050110 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_mailbox.65786631 Aug 23 10:38:10 PM UTC 24 Aug 23 10:38:25 PM UTC 24 1054118786 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_upload.1142328866 Aug 23 10:38:13 PM UTC 24 Aug 23 10:38:26 PM UTC 24 12287119334 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_alert_test.3605037516 Aug 23 10:38:25 PM UTC 24 Aug 23 10:38:26 PM UTC 24 16826955 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_csb_read.1076240388 Aug 23 10:38:26 PM UTC 24 Aug 23 10:38:27 PM UTC 24 12684002 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.2242543249 Aug 23 10:36:13 PM UTC 24 Aug 23 10:38:28 PM UTC 24 14916688489 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.3686504118 Aug 23 10:38:27 PM UTC 24 Aug 23 10:38:29 PM UTC 24 66592721 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.748542683 Aug 23 10:38:26 PM UTC 24 Aug 23 10:38:29 PM UTC 24 2148527693 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_rw.1057581936 Aug 23 10:38:28 PM UTC 24 Aug 23 10:38:29 PM UTC 24 38958710 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.2337927943 Aug 23 10:38:29 PM UTC 24 Aug 23 10:38:32 PM UTC 24 36877422 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_intercept.2573914022 Aug 23 10:38:30 PM UTC 24 Aug 23 10:38:33 PM UTC 24 278976394 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_all.4084187011 Aug 23 10:38:27 PM UTC 24 Aug 23 10:38:36 PM UTC 24 3186979847 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_upload.1135979215 Aug 23 10:38:32 PM UTC 24 Aug 23 10:38:38 PM UTC 24 4061789252 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_cfg_cmd.1927596504 Aug 23 10:38:34 PM UTC 24 Aug 23 10:38:38 PM UTC 24 223151930 ps
T318 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.614662003 Aug 23 10:31:16 PM UTC 24 Aug 23 10:38:38 PM UTC 24 101659849777 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode.4195905464 Aug 23 10:38:36 PM UTC 24 Aug 23 10:38:41 PM UTC 24 1687082144 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_all.219689602 Aug 23 10:33:54 PM UTC 24 Aug 23 10:38:46 PM UTC 24 168353672144 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.2511202298 Aug 23 10:38:38 PM UTC 24 Aug 23 10:38:46 PM UTC 24 3413541247 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.3670592942 Aug 23 10:37:07 PM UTC 24 Aug 23 10:38:49 PM UTC 24 28978592195 ps
T275 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.1322062255 Aug 23 10:38:29 PM UTC 24 Aug 23 10:38:50 PM UTC 24 7199242782 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_alert_test.1234758086 Aug 23 10:38:50 PM UTC 24 Aug 23 10:38:52 PM UTC 24 24238578 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_csb_read.3650761520 Aug 23 10:38:50 PM UTC 24 Aug 23 10:38:52 PM UTC 24 25063403 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_stress_all.60061794 Aug 23 10:34:46 PM UTC 24 Aug 23 10:38:55 PM UTC 24 60658761818 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.485919879 Aug 23 10:38:56 PM UTC 24 Aug 23 10:38:58 PM UTC 24 25643577 ps
T314 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/22.spi_device_stress_all.3419414516 Aug 23 10:31:16 PM UTC 24 Aug 23 10:39:00 PM UTC 24 222314614548 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_rw.2731529373 Aug 23 10:38:59 PM UTC 24 Aug 23 10:39:01 PM UTC 24 12674425 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.106808728 Aug 23 10:39:01 PM UTC 24 Aug 23 10:39:05 PM UTC 24 600142784 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_all.342104145 Aug 23 10:38:53 PM UTC 24 Aug 23 10:39:10 PM UTC 24 19735530949 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_all.3953418075 Aug 23 10:38:39 PM UTC 24 Aug 23 10:39:12 PM UTC 24 4893373165 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.4054454647 Aug 23 10:38:53 PM UTC 24 Aug 23 10:39:12 PM UTC 24 27938508977 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.646833784 Aug 23 10:39:01 PM UTC 24 Aug 23 10:39:13 PM UTC 24 1219023586 ps
T315 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/32.spi_device_stress_all.233285095 Aug 23 10:36:50 PM UTC 24 Aug 23 10:39:15 PM UTC 24 45178684445 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode_ignore_cmds.3572428029 Aug 23 10:39:13 PM UTC 24 Aug 23 10:39:15 PM UTC 24 16670509 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_cfg_cmd.2040947856 Aug 23 10:39:13 PM UTC 24 Aug 23 10:39:16 PM UTC 24 37770098 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_intercept.4162126715 Aug 23 10:39:06 PM UTC 24 Aug 23 10:39:17 PM UTC 24 5346385770 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_mailbox.3680601055 Aug 23 10:38:30 PM UTC 24 Aug 23 10:39:21 PM UTC 24 14604799261 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_all.3376899620 Aug 23 10:39:16 PM UTC 24 Aug 23 10:39:23 PM UTC 24 2422817705 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.573043899 Aug 23 10:39:15 PM UTC 24 Aug 23 10:39:24 PM UTC 24 3371035014 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_upload.3327822549 Aug 23 10:39:12 PM UTC 24 Aug 23 10:39:25 PM UTC 24 6308989063 ps
T799 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_alert_test.2935848219 Aug 23 10:39:24 PM UTC 24 Aug 23 10:39:25 PM UTC 24 14049442 ps
T800 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_csb_read.1914368978 Aug 23 10:39:25 PM UTC 24 Aug 23 10:39:26 PM UTC 24 31172903 ps
T73 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.2908168702 Aug 23 10:34:43 PM UTC 24 Aug 23 10:39:27 PM UTC 24 84990452692 ps
T801 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_mailbox.774909793 Aug 23 10:39:11 PM UTC 24 Aug 23 10:39:27 PM UTC 24 2542629460 ps
T802 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.3266807654 Aug 23 10:39:27 PM UTC 24 Aug 23 10:39:28 PM UTC 24 88889531 ps
T316 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.1384371928 Aug 23 10:31:37 PM UTC 24 Aug 23 10:39:29 PM UTC 24 75572794393 ps
T803 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_rw.2615348011 Aug 23 10:39:28 PM UTC 24 Aug 23 10:39:30 PM UTC 24 41873113 ps
T339 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.3588398750 Aug 23 10:33:52 PM UTC 24 Aug 23 10:39:31 PM UTC 24 50286798768 ps
T804 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.1664932372 Aug 23 10:39:26 PM UTC 24 Aug 23 10:39:32 PM UTC 24 6158336257 ps
T74 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm.1166019422 Aug 23 10:37:45 PM UTC 24 Aug 23 10:39:32 PM UTC 24 35653232884 ps
T805 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_intercept.1295126649 Aug 23 10:39:30 PM UTC 24 Aug 23 10:39:34 PM UTC 24 141029124 ps
T806 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_cfg_cmd.1798194897 Aug 23 10:39:33 PM UTC 24 Aug 23 10:39:36 PM UTC 24 166907979 ps
T807 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_all.1384084268 Aug 23 10:39:26 PM UTC 24 Aug 23 10:39:38 PM UTC 24 15100896085 ps
T808 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.2519479927 Aug 23 10:38:19 PM UTC 24 Aug 23 10:39:38 PM UTC 24 22573896119 ps
T809 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_upload.1993691285 Aug 23 10:39:31 PM UTC 24 Aug 23 10:39:40 PM UTC 24 1581231065 ps
T164 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/9.spi_device_stress_all.3015751790 Aug 23 10:25:35 PM UTC 24 Aug 23 10:39:45 PM UTC 24 197922704508 ps
T810 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.3190315246 Aug 23 10:39:37 PM UTC 24 Aug 23 10:39:45 PM UTC 24 523496899 ps
T811 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_alert_test.1146114635 Aug 23 10:39:45 PM UTC 24 Aug 23 10:39:47 PM UTC 24 94585702 ps
T812 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.1200013785 Aug 23 10:39:28 PM UTC 24 Aug 23 10:39:49 PM UTC 24 13400883157 ps
T813 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_csb_read.2948108704 Aug 23 10:39:47 PM UTC 24 Aug 23 10:39:49 PM UTC 24 36400478 ps
T814 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.1150657973 Aug 23 10:39:29 PM UTC 24 Aug 23 10:39:49 PM UTC 24 12110406271 ps
T815 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3387463748 Aug 23 10:39:51 PM UTC 24 Aug 23 10:39:52 PM UTC 24 37887080 ps
T816 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_rw.1841801275 Aug 23 10:39:53 PM UTC 24 Aug 23 10:39:55 PM UTC 24 92589278 ps
T817 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode.3753714722 Aug 23 10:39:33 PM UTC 24 Aug 23 10:39:58 PM UTC 24 1707875629 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode.420862772 Aug 23 10:39:13 PM UTC 24 Aug 23 10:39:59 PM UTC 24 4083297521 ps
T335 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.494330039 Aug 23 10:34:37 PM UTC 24 Aug 23 10:39:59 PM UTC 24 35420621206 ps
T818 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/38.spi_device_mailbox.1474254702 Aug 23 10:39:30 PM UTC 24 Aug 23 10:40:01 PM UTC 24 3534846761 ps
T819 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_and_tpm.4233565330 Aug 23 10:38:42 PM UTC 24 Aug 23 10:40:02 PM UTC 24 48796854817 ps
T820 /workspaces/repo/scratch/os_regression_2024_08_22/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_all.3865815366 Aug 23 10:39:50 PM UTC 24 Aug 23 10:40:02 PM UTC 24 4827809649 ps
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